pub enum SLTNode<A: Hash + Eq + Clone> {
Input {
variable: A,
signed: bool,
index: Vec<SLTIndex>,
access: BitAccess,
},
Constant(BigUint, BigUint, usize, bool),
Binary(NodeId, BinaryOp, NodeId),
Unary(UnaryOp, NodeId),
Mux {
cond: NodeId,
then_expr: NodeId,
else_expr: NodeId,
},
ForFold {Show 14 fields
loop_var: A,
loop_width: usize,
loop_signed: bool,
start: SLTLoopBound,
end: SLTLoopBound,
inclusive: bool,
step: usize,
step_op: SLTStepOp,
reverse: bool,
result: SLTForFoldResult<A>,
initials: Vec<SLTForUpdate<A>>,
updates: Vec<SLTForUpdate<A>>,
effects: Vec<SLTForEffect>,
continue_cond: NodeId,
},
ForFoldGroup {
loop_var: A,
loop_width: usize,
loop_signed: bool,
start: BigInt,
step: BigInt,
trip_count: usize,
entry_guard: NodeId,
states: Vec<SLTForFoldGroupState<A>>,
},
Concat(Vec<(NodeId, usize)>),
Slice {
expr: NodeId,
access: BitAccess,
},
Capture {
expr: NodeId,
key: u64,
},
}Variants§
Input
Constant(BigUint, BigUint, usize, bool)
Binary(NodeId, BinaryOp, NodeId)
Unary(UnaryOp, NodeId)
Mux
ForFold
Fields
loop_var: Astart: SLTLoopBoundend: SLTLoopBoundresult: SLTForFoldResult<A>initials: Vec<SLTForUpdate<A>>updates: Vec<SLTForUpdate<A>>effects: Vec<SLTForEffect>ForFoldGroup
A fixed-trip-count fold carrying multiple state values and returning their final values as one packed result.
Concat(Vec<(NodeId, usize)>)
Slice
Capture
A value materialized at a specific semantic evaluation position.
key keeps captures from distinct runtime-event operands separate even
when their expressions are structurally identical.
Implementations§
Source§impl<A: Hash + Eq + Clone> SLTNode<A>
impl<A: Hash + Eq + Clone> SLTNode<A>
pub fn fmt_expression(
&self,
f: &mut Formatter<'_>,
arena: &SLTNodeArena<A>,
) -> Resultwhere
A: Display,
Source§impl<A: Debug + Display + Hash + Eq + Clone> SLTNode<A>
impl<A: Debug + Display + Hash + Eq + Clone> SLTNode<A>
Sourcepub fn map_addr<B, F>(
&self,
id: NodeId,
arena: &SLTNodeArena<A>,
target_arena: &mut SLTNodeArena<B>,
cache: &mut HashMap<NodeId, NodeId>,
f: &F,
) -> Result<NodeId, SLTNodeFactsError>
pub fn map_addr<B, F>( &self, id: NodeId, arena: &SLTNodeArena<A>, target_arena: &mut SLTNodeArena<B>, cache: &mut HashMap<NodeId, NodeId>, f: &F, ) -> Result<NodeId, SLTNodeFactsError>
Maps the address type A to B throughout the reachable graph.
The traversal is explicitly postorder so deeply nested expressions do not consume the host thread’s call stack.
Source§impl<A: Debug + Display + Hash + Eq + Clone> SLTNode<A>
Display implementation for SLTNode - provides human-readable tree structure
impl<A: Debug + Display + Hash + Eq + Clone> SLTNode<A>
Display implementation for SLTNode - provides human-readable tree structure
This implementation formats the Signal Logic Tree (SLT) as a hierarchical ASCII tree, making it easy to visualize the expression structure. Each node type displays relevant information:
- Input: Shows variable ID, dynamic indices (if any), and bit range
[lsb:msb] - Constant: Displays the value in hexadecimal and width in bits
- Binary: Shows the operation and recursively formats both operands with indentation
- Unary: Shows the operation and recursively formats the inner expression
- Mux: Displays condition, then-branch, and else-branch with clear labels
- Concat: Lists concatenated parts with their widths
- Slice: Shows the bit range extraction with the inner expression
§Example
A binary expression a + b would display as:
Binary(Add)
Const(0x1, 32bits)
Const(0x2, 32bits)A more complex expression (a + b) * (c - d) would show:
Binary(Mul)
Binary(Add)
Const(0x1, 32bits)
Const(0x2, 32bits)
Binary(Sub)
Const(0x3, 32bits)
Const(0x4, 32bits)