Type Definition cc3220sf::gpioa0::DR8R

type DR8R = Reg<u32, _DR8R>;

0x4000 5508 0x4000 6508 0x4000 7508 0x4002 4508 GPIO 8-mA Drive Select (GPIODR8R)@@ offset 0x508 The GPIODR8R register is the 8-mA drive control register. Each GPIO signal in the port can be individually configured without affecting the other pads. When setting the DRV8 bit for a GPIO signal@@ the corresponding DRV2 bit in the GPIODR2R register and DRV4 bit in the GPIODR4R register are automatically cleared by hardware. The 8-mA setting is also used for high-current operation. Note: There is no configuration difference between 8-mA and high-current operation. The additional current capacity results from a shift in the VOH/VOL levels.

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see dr8r module

Trait Implementations

impl Readable for DR8R

read() method returns dr8r::R reader structure

impl ResetValue for DR8R

Register DR8R reset()'s with value 0

type Type = u32

Register size

fn reset_value() -> Self::Type

Reset value of the register

impl Writable for DR8R

write(|w| ..) method takes dr8r::W writer structure