[][src]Type Definition cc3220sf::gpioa2::DR4R

type DR4R = Reg<u32, _DR4R>;

0x4000 5504 0x4000 6504 0x4000 7504 0x4002 4504 GPIO 4-mA Drive Select (GPIODR4R)@@ offset 0x504 The GPIODR4R register is the 4-mA drive control register. Each GPIO signal in the port can be individually configured without affecting the other pads. When setting the DRV4 bit for a GPIO signal@@ the corresponding DRV2 bit in the GPIODR2R register and DRV8 bit in the GPIODR8R register are automatically cleared by hardware.

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see dr4r module

Trait Implementations

impl Readable for DR4R[src]

read() method returns dr4r::R reader structure

impl ResetValue for DR4R[src]

Register DR4R reset()'s with value 0

type Type = u32

Register size

impl Writable for DR4R[src]

write(|w| ..) method takes dr4r::W writer structure