Module cc3220sf::gpioa2::dr4r

0x4000 5504 0x4000 6504 0x4000 7504 0x4002 4504 GPIO 4-mA Drive Select (GPIODR4R)@@ offset 0x504 The GPIODR4R register is the 4-mA drive control register. Each GPIO signal in the port can be individually configured without affecting the other pads. When setting the DRV4 bit for a GPIO signal@@ the corresponding DRV2 bit in the GPIODR2R register and DRV8 bit in the GPIODR8R register are automatically cleared by hardware.

Type Definitions

R	Reader of register DR4R
W	Writer for register DR4R