Struct cc2650::crypto::irqstat::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn dma_bus_err(&self) -> DMA_BUS_ERRR

Bit 31 - This bit is set when a DMA bus error is detected during a DMA operation. The value of this register is held until it is cleared via IRQCLR.DMA_BUS_ERR Note: This error is asserted if an error is detected on the AHB master interface during a DMA operation. Note: This is not an interrupt source.

pub fn key_st_wr_err(&self) -> KEY_ST_WR_ERRR

Bit 30 - This bit is set when a write error is detected during the DMA write operation to the key store memory. The value of this register is held until it is cleared via IRQCLR.KEY_ST_WR_ERR Note: This error is asserted if a DMA operation does not cover a full key area or more areas are written than expected. Note: This is not an interrupt source.

pub fn key_st_rd_err(&self) -> KEY_ST_RD_ERRR

Bit 29 - This bit will be set when a read error is detected during the read of a key from the key store, while copying it to the AES engine. The value of this register is held until it is cleared via IRQCLR.KEY_ST_RD_ERR. Note: This error is asserted if a key location is selected in the key store that is not available. Note: This is not an interrupt source.

pub fn reserved2(&self) -> RESERVED2R

Bits 2:28 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn dma_in_done(&self) -> DMA_IN_DONER

Bit 1 - This bit returns the status of DMA data in done interrupt.

pub fn result_avail(&self) -> RESULT_AVAILR

Bit 0 - This bit is set high when the Crypto peripheral has a result available.