cc2538/sys_ctrl/
pwrdbg.rs

1#[doc = "Reader of register PWRDBG"]
2pub type R = crate::R<u32, super::PWRDBG>;
3#[doc = "Writer for register PWRDBG"]
4pub type W = crate::W<u32, super::PWRDBG>;
5#[doc = "Register PWRDBG `reset()`'s with value 0"]
6impl crate::ResetValue for super::PWRDBG {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `Reserved32`"]
14pub type RESERVED32_R = crate::R<u32, u32>;
15#[doc = "Write proxy for field `Reserved32`"]
16pub struct RESERVED32_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> RESERVED32_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u32) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x0fff_ffff << 4)) | (((value as u32) & 0x0fff_ffff) << 4);
24        self.w
25    }
26}
27#[doc = "Reader of field `FORCE_WARM_RESET`"]
28pub type FORCE_WARM_RESET_R = crate::R<bool, bool>;
29#[doc = "Write proxy for field `FORCE_WARM_RESET`"]
30pub struct FORCE_WARM_RESET_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> FORCE_WARM_RESET_W<'a> {
34    #[doc = r"Sets the field bit"]
35    #[inline(always)]
36    pub fn set_bit(self) -> &'a mut W {
37        self.bit(true)
38    }
39    #[doc = r"Clears the field bit"]
40    #[inline(always)]
41    pub fn clear_bit(self) -> &'a mut W {
42        self.bit(false)
43    }
44    #[doc = r"Writes raw bits to the field"]
45    #[inline(always)]
46    pub fn bit(self, value: bool) -> &'a mut W {
47        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
48        self.w
49    }
50}
51#[doc = "Reader of field `Reserved2`"]
52pub type RESERVED2_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `Reserved2`"]
54pub struct RESERVED2_W<'a> {
55    w: &'a mut W,
56}
57impl<'a> RESERVED2_W<'a> {
58    #[doc = r"Sets the field bit"]
59    #[inline(always)]
60    pub fn set_bit(self) -> &'a mut W {
61        self.bit(true)
62    }
63    #[doc = r"Clears the field bit"]
64    #[inline(always)]
65    pub fn clear_bit(self) -> &'a mut W {
66        self.bit(false)
67    }
68    #[doc = r"Writes raw bits to the field"]
69    #[inline(always)]
70    pub fn bit(self, value: bool) -> &'a mut W {
71        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
72        self.w
73    }
74}
75#[doc = "Reader of field `Reserved1`"]
76pub type RESERVED1_R = crate::R<bool, bool>;
77#[doc = "Write proxy for field `Reserved1`"]
78pub struct RESERVED1_W<'a> {
79    w: &'a mut W,
80}
81impl<'a> RESERVED1_W<'a> {
82    #[doc = r"Sets the field bit"]
83    #[inline(always)]
84    pub fn set_bit(self) -> &'a mut W {
85        self.bit(true)
86    }
87    #[doc = r"Clears the field bit"]
88    #[inline(always)]
89    pub fn clear_bit(self) -> &'a mut W {
90        self.bit(false)
91    }
92    #[doc = r"Writes raw bits to the field"]
93    #[inline(always)]
94    pub fn bit(self, value: bool) -> &'a mut W {
95        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
96        self.w
97    }
98}
99impl R {
100    #[doc = "Bits 4:31 - 31:4\\] This register is 8 bits in a 32-bit address space."]
101    #[inline(always)]
102    pub fn reserved32(&self) -> RESERVED32_R {
103        RESERVED32_R::new(((self.bits >> 4) & 0x0fff_ffff) as u32)
104    }
105    #[doc = "Bit 3 - 3:3\\] 0: No action 1: When written high, the chip is reset in the same manner as a CLD event and is readable from the RST field in the CLOCK_STA register."]
106    #[inline(always)]
107    pub fn force_warm_reset(&self) -> FORCE_WARM_RESET_R {
108        FORCE_WARM_RESET_R::new(((self.bits >> 3) & 0x01) != 0)
109    }
110    #[doc = "Bit 2 - 2:2\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."]
111    #[inline(always)]
112    pub fn reserved2(&self) -> RESERVED2_R {
113        RESERVED2_R::new(((self.bits >> 2) & 0x01) != 0)
114    }
115    #[doc = "Bit 1 - 1:1\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."]
116    #[inline(always)]
117    pub fn reserved1(&self) -> RESERVED1_R {
118        RESERVED1_R::new(((self.bits >> 1) & 0x01) != 0)
119    }
120}
121impl W {
122    #[doc = "Bits 4:31 - 31:4\\] This register is 8 bits in a 32-bit address space."]
123    #[inline(always)]
124    pub fn reserved32(&mut self) -> RESERVED32_W {
125        RESERVED32_W { w: self }
126    }
127    #[doc = "Bit 3 - 3:3\\] 0: No action 1: When written high, the chip is reset in the same manner as a CLD event and is readable from the RST field in the CLOCK_STA register."]
128    #[inline(always)]
129    pub fn force_warm_reset(&mut self) -> FORCE_WARM_RESET_W {
130        FORCE_WARM_RESET_W { w: self }
131    }
132    #[doc = "Bit 2 - 2:2\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."]
133    #[inline(always)]
134    pub fn reserved2(&mut self) -> RESERVED2_W {
135        RESERVED2_W { w: self }
136    }
137    #[doc = "Bit 1 - 1:1\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."]
138    #[inline(always)]
139    pub fn reserved1(&mut self) -> RESERVED1_W {
140        RESERVED1_W { w: self }
141    }
142}
cc2538/sys_ctrl/pwrdbg.rs

cc2538/sys_ctrl/
pwrdbg.rs
