Type Alias W 

pub type W = W<u32, CTL>;

Writer for register CTL

Aliased Type

pub struct W { /* private fields */ }

Implementations

impl W

pub fn reserved6(&mut self) -> RESERVED6_W<'_>

Bits 16:31 - 31:16] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation.

pub fn ctsen(&mut self) -> CTSEN_W<'_>

Bit 15 - 15:15] U1CTS Hardware Flow control enable 1: When U1CTS input is asserted, UART1 can transmit data. 0: U1CTS does not control UART1 data transmission. Note: Only used for UART1. This bit is reserved RO for UART0.

pub fn rtsen(&mut self) -> RTSEN_W<'_>

Bit 14 - 14:14] U1RTS Hardware Flow control enable 1: U1RTS indicates the state of UART1 receive FIFO. U1RTS remains asserted until the preprogrammed watermark level is reached, indicating that the UART1 RXFIFO has no space to store additional characters. 0: U1RTS does not indicate state of UART1 RX FIFO. Note: Only used for UART1. This bit is reserved RO for UART0.

pub fn reserved4(&mut self) -> RESERVED4_W<'_>

Bits 10:13 - 13:10] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation.

pub fn rxe(&mut self) -> RXE_W<'_>

Bit 9 - 9:9] UART receive enable 1: The receive section of the UART is enabled. 0: The receive section of the UART is disabled. If the UART is disabled in the middle of a receive, it completes the current character before stopping. Note: To enable reception, the UARTEN bit must also be set.

pub fn txe(&mut self) -> TXE_W<'_>

Bit 8 - 8:8] UART transmit enable 1: The transmit section of the UART is enabled. 0: The transmit section of the UART is disabled. If the UART is disabled in the middle of a transmission, it completes the current character before stopping. Note: To enable transmission, the UARTEN bit must also be set.

pub fn lbe(&mut self) -> LBE_W<'_>

Bit 7 - 7:7] UART loop back enable 1: The UnTx path is fed through the UnRx path. 0: Normal operation

pub fn lin(&mut self) -> LIN_W<'_>

Bit 6 - 6:6] LIN mode enable 1: The UART operates in LIN mode. 0: Normal operation

pub fn hse(&mut self) -> HSE_W<'_>

Bit 5 - 5:5] High-speed enable 0: The UART is clocked using the system clock divided by 16. 1: The UART is clocked using the system clock divided by 8. Note: System clock used is also dependent on the baud-rate divisor configuration (See Universal Asynchronous Receivers/Transmitters - Baud-Rate Generation).

pub fn eot(&mut self) -> EOT_W<'_>

Bit 4 - 4:4] End of transmission This bit determines the behavior of the TXRIS bit in the UARTRIS register. 1: The TXRIS bit is set only after all transmitted data, including stop bits, have cleared the serializer. 0: The TXRIS bit is set when the transmit FIFO condition specified in UARTIFLS is met.

pub fn reserved1(&mut self) -> RESERVED1_W<'_>

Bit 3 - 3:3] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation. Note field should always be written as 0 for correct operation.

pub fn sirlp(&mut self) -> SIRLP_W<'_>

Bit 2 - 2:2] UART SIR low-power mode This bit selects the IrDA encoding mode. 1: The UART operates in SIR Low-Power mode. Low-level bits are transmitted with a pulse width which is 3 times the period of the IrLPBaud16 input signal, regardless of the selected bit rate. 0: Low-level bits are transmitted as an active high pulse with a width of 3/16th of the bit period. Setting this bit uses less power, but might reduce transmission distances.

pub fn siren(&mut self) -> SIREN_W<'_>

Bit 1 - 1:1] UART SIR enable 1: The IrDA SIR block is enabled, and the UART transmits and receives data using SIR protocol. 0: Normal operation.

pub fn uarten(&mut self) -> UARTEN_W<'_>

Bit 0 - 0:0] UART enable 1: The UART is enabled. 0: The UART is disabled. If the UART is disabled in the middle of transmission or reception, it completes the current character before stopping.