[−][src]Struct cc13x2_cc26x2_hal::cpu_dwt::lsucnt::W
Value to write to the register
Methods
impl W
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pub fn reset_value() -> W
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Reset value of the register
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self
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Writes raw bits to the register
pub fn reserved8(&mut self) -> _RESERVED8W
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Bits 8:31 - 31:8] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn lsucnt(&mut self) -> _LSUCNTW
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Bits 0:7 - 7:0] LSU counter. This counts the total number of cycles that the processor is processing an LSU operation. The initial execution cost of the instruction is not counted. For example, an LDR that takes two cycles to complete increments this counter one cycle. Equivalently, an LDR that stalls for two cycles (i.e. takes four cycles to execute), increments this counter three times. An event is emitted on counter overflow (every 256 cycles). This counter initializes to 0 when it is enabled using CTRL.LSUEVTENA.
Auto Trait Implementations
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