[−][src]Struct cc13x2_cc26x2_hal::aux_timer2::ch3ccfg::R
Value read from the register
Methods
impl R
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pub fn bits(&self) -> u32
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Value of the register as raw bits
pub fn reserved7(&self) -> RESERVED7R
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Bits 7:31 - 31:7] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn capt_src(&self) -> CAPT_SRCR
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Bits 1:6 - 6:1] Select capture signal source from the asynchronous AUX event bus. The selected signal enters the edge-detection circuit. False capture events can occur when: - the edge-detection circuit contains expired signal samples and the circuit is enabled without flush as described in CH3EVCFG - this register is reconfigured while CTL.MODE is different from DIS. You can avoid false capture events. When wanted channel function: - SET_ON_CAPT_DIS, see description for SET_ON_CAPT_DIS in CH3EVCFG.CCACT. - SET_ON_CAPT, see description for SET_ON_CAPT in CH3EVCFG.CCACT. - PER_PULSE_WIDTH_MEAS, see description for PER_PULSE_WIDTH_MEAS in CH3EVCFG.CCACT. If you write a non-enumerated value the behavior is identical to NO_EVENT. The written value is returned when read.
pub fn edge(&self) -> EDGER
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Bit 0 - 0:0] Edge configuration. Channel captures counter value at selected edge on signal source selected by CAPT_SRC. See CH3EVCFG.CCACT.
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