[−][src]Struct cc13x2_cc26x2_hal::uart1::icr::W
Value to write to the register
Methods
impl W
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pub fn reset_value() -> W
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Reset value of the register
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self
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Writes raw bits to the register
pub fn reserved12(&mut self) -> _RESERVED12W
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Bits 12:31 - 31:12] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn eotic(&mut self) -> _EOTICW
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Bit 11 - 11:11] End of Transmission interrupt clear: Writing 1 to this field clears the overrun error interrupt (RIS.EOTRIS). Writing 0 has no effect.
pub fn oeic(&mut self) -> _OEICW
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Bit 10 - 10:10] Overrun error interrupt clear: Writing 1 to this field clears the overrun error interrupt (RIS.OERIS). Writing 0 has no effect.
pub fn beic(&mut self) -> _BEICW
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Bit 9 - 9:9] Break error interrupt clear: Writing 1 to this field clears the break error interrupt (RIS.BERIS). Writing 0 has no effect.
pub fn peic(&mut self) -> _PEICW
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Bit 8 - 8:8] Parity error interrupt clear: Writing 1 to this field clears the parity error interrupt (RIS.PERIS). Writing 0 has no effect.
pub fn feic(&mut self) -> _FEICW
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Bit 7 - 7:7] Framing error interrupt clear: Writing 1 to this field clears the framing error interrupt (RIS.FERIS). Writing 0 has no effect.
pub fn rtic(&mut self) -> _RTICW
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Bit 6 - 6:6] Receive timeout interrupt clear: Writing 1 to this field clears the receive timeout interrupt (RIS.RTRIS). Writing 0 has no effect.
pub fn txic(&mut self) -> _TXICW
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Bit 5 - 5:5] Transmit interrupt clear: Writing 1 to this field clears the transmit interrupt (RIS.TXRIS). Writing 0 has no effect.
pub fn rxic(&mut self) -> _RXICW
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Bit 4 - 4:4] Receive interrupt clear: Writing 1 to this field clears the receive interrupt (RIS.RXRIS). Writing 0 has no effect.
pub fn reserved2(&mut self) -> _RESERVED2W
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Bits 2:3 - 3:2] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. Write 0
pub fn ctsmic(&mut self) -> _CTSMICW
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Bit 1 - 1:1] Clear to Send (CTS) modem interrupt clear: Writing 1 to this field clears the clear to send interrupt (RIS.CTSRMIS). Writing 0 has no effect.
pub fn reserved0(&mut self) -> _RESERVED0W
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Bit 0 - 0:0] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. Write 0.
Auto Trait Implementations
Blanket Implementations
impl<T> From for T
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impl<T, U> TryFrom for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> TryInto for T where
U: TryFrom<T>,
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U: TryFrom<T>,
type Error = <U as TryFrom<T>>::Error
The type returned in the event of a conversion error.
fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>
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impl<T, U> Into for T where
U: From<T>,
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U: From<T>,
impl<T> Borrow for T where
T: ?Sized,
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T: ?Sized,
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T: ?Sized,
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T: ?Sized,
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impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
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Should always be Self