[−][src]Struct cc13x2_cc26x2_hal::prcm::secdmaclkgr::R
Value read from the register
Methods
impl R
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pub fn bits(&self) -> u32
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Value of the register as raw bits
pub fn reserved25(&self) -> RESERVED25R
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Bits 25:31 - 31:25] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn dma_am_clk_en(&self) -> DMA_AM_CLK_ENR
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Bit 24 - 24:24] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides DMA_CLK_EN, SECDMACLKGS.DMA_CLK_EN and SECDMACLKGDS.DMA_CLK_EN when enabled. SYSBUS clock will always run when enabled For changes to take effect, CLKLOADCTL.LOAD needs to be written
pub fn reserved20(&self) -> RESERVED20R
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Bits 20:23 - 23:20] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn pka_zerioze_reset_n(&self) -> PKA_ZERIOZE_RESET_NR
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Bit 19 - 19:19] Zeroization logic hardware reset. 0: pka_zeroize logic inactive. 1: pka_zeroize of memory is enabled. This register must remain active until the memory are completely zeroized which requires 256 periods on systembus clock.
pub fn pka_am_clk_en(&self) -> PKA_AM_CLK_ENR
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Bit 18 - 18:18] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides PKA_CLK_EN, SECDMACLKGS.PKA_CLK_EN and SECDMACLKGDS.PKA_CLK_EN when enabled. For changes to take effect, CLKLOADCTL.LOAD needs to be written
pub fn trng_am_clk_en(&self) -> TRNG_AM_CLK_ENR
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Bit 17 - 17:17] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides TRNG_CLK_EN, SECDMACLKGS.TRNG_CLK_EN and SECDMACLKGDS.TRNG_CLK_EN when enabled. For changes to take effect, CLKLOADCTL.LOAD needs to be written
pub fn crypto_am_clk_en(&self) -> CRYPTO_AM_CLK_ENR
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Bit 16 - 16:16] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides CRYPTO_CLK_EN, SECDMACLKGS.CRYPTO_CLK_EN and SECDMACLKGDS.CRYPTO_CLK_EN when enabled. SYSBUS clock will always run when enabled For changes to take effect, CLKLOADCTL.LOAD needs to be written
pub fn reserved9(&self) -> RESERVED9R
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Bits 9:15 - 15:9] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn dma_clk_en(&self) -> DMA_CLK_ENR
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Bit 8 - 8:8] 0: Disable clock 1: Enable clock Can be forced on by DMA_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written
pub fn reserved3(&self) -> RESERVED3R
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Bits 3:7 - 7:3] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn pka_clk_en(&self) -> PKA_CLK_ENR
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Bit 2 - 2:2] 0: Disable clock 1: Enable clock Can be forced on by PKA_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written
pub fn trng_clk_en(&self) -> TRNG_CLK_ENR
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Bit 1 - 1:1] 0: Disable clock 1: Enable clock Can be forced on by TRNG_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written
pub fn crypto_clk_en(&self) -> CRYPTO_CLK_ENR
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Bit 0 - 0:0] 0: Disable clock 1: Enable clock Can be forced on by CRYPTO_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written
Auto Trait Implementations
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impl<T> From for T
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impl<T, U> TryFrom for T where
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impl<T, U> TryInto for T where
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impl<T, U> Into for T where
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