[−][src]Struct cc13x2_cc26x2_hal::prcm::resetsecdma::R
Value read from the register
Methods
impl R
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pub fn bits(&self) -> u32
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Value of the register as raw bits
pub fn reserved9(&self) -> RESERVED9R
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Bits 9:31 - 31:9] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn dma(&self) -> DMAR
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Bit 8 - 8:8] Write 1 to reset. HW cleared. Acess will only have effect when PERIPH power domain is on, PDSTAT0.PERIPH_ON = 1 Before writing set FLASH:CFG.DIS_READACCESS = 1 to ensure the reset is not activated while executing from flash. This means one cannot execute from flash when using the SW reset.
pub fn reserved3(&self) -> RESERVED3R
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Bits 3:7 - 7:3] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn pka(&self) -> PKAR
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Bit 2 - 2:2] Write 1 to reset. HW cleared. Acess will only have effect when PERIPH power domain is on, PDSTAT0.PERIPH_ON = 1 Before writing set FLASH:CFG.DIS_READACCESS = 1 to ensure the reset is not activated while executing from flash. This means one cannot execute from flash when using the SW reset.
pub fn trng(&self) -> TRNGR
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Bit 1 - 1:1] Write 1 to reset. HW cleared. Acess will only have effect when PERIPH power domain is on, PDSTAT0.PERIPH_ON = 1 Before writing set FLASH:CFG.DIS_READACCESS = 1 to ensure the reset is not activated while executing from flash. This means one cannot execute from flash when using the SW reset.
pub fn crypto(&self) -> CRYPTOR
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Bit 0 - 0:0] Write 1 to reset. HW cleared. Acess will only have effect when PERIPH power domain is on, PDSTAT0.PERIPH_ON = 1 Before writing set FLASH:CFG.DIS_READACCESS = 1 to ensure the reset is not activated while executing from flash. This means one cannot execute from flash when using the SW reset.
Auto Trait Implementations
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impl<T> From for T
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