[−][src]Struct cc13x2_cc26x2_hal::cpu_scs::dfsr::R
Value read from the register
Methods
impl R
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pub fn bits(&self) -> u32
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Value of the register as raw bits
pub fn reserved5(&self) -> RESERVED5R
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Bits 5:31 - 31:5] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn external(&self) -> EXTERNALR
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Bit 4 - 4:4] External debug request flag. The processor stops on next instruction boundary. 0x0: External debug request signal not asserted 0x1: External debug request signal asserted
pub fn vcatch(&self) -> VCATCHR
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Bit 3 - 3:3] Vector catch flag. When this flag is set, a flag in one of the local fault status registers is also set to indicate the type of fault. 0x0: No vector catch occurred 0x1: Vector catch occurred
pub fn dwttrap(&self) -> DWTTRAPR
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Bit 2 - 2:2] Data Watchpoint and Trace (DWT) flag. The processor stops at the current instruction or at the next instruction. 0x0: No DWT match 0x1: DWT match
pub fn bkpt(&self) -> BKPTR
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Bit 1 - 1:1] BKPT flag. The BKPT flag is set by a BKPT instruction in flash patch code, and also by normal code. Return PC points to breakpoint containing instruction. 0x0: No BKPT instruction execution 0x1: BKPT instruction execution
pub fn halted(&self) -> HALTEDR
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Bit 0 - 0:0] Halt request flag. The processor is halted on the next instruction. 0x0: No halt request 0x1: Halt requested by NVIC, including step
Auto Trait Implementations
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impl<T> From for T
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