[−][src]Struct cc13x2_cc26x2_hal::cpu_itm::TCR
Trace Control Use this register to configure and control ITM transfers. This register can only be written in privilege mode. DWT is not enabled in the ITM block. However, DWT stimulus entry into the FIFO is controlled by DWTENA. If DWT requires timestamping, the TSENA bit must be set.
Methods
impl TCR
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pub fn modify<F>(&self, f: F) where
F: FnOnce(&R, &'w mut W) -> &'w mut W,
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F: FnOnce(&R, &'w mut W) -> &'w mut W,
Modifies the contents of the register
pub fn read(&self) -> R
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Reads the contents of the register
pub fn write<F>(&self, f: F) where
F: FnOnce(&mut W) -> &mut W,
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F: FnOnce(&mut W) -> &mut W,
Writes to the register
pub fn reset(&self)
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Writes the reset value to the register
Auto Trait Implementations
Blanket Implementations
impl<T> From for T
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impl<T, U> TryFrom for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> TryInto for T where
U: TryFrom<T>,
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U: TryFrom<T>,
type Error = <U as TryFrom<T>>::Error
The type returned in the event of a conversion error.
fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>
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impl<T, U> Into for T where
U: From<T>,
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U: From<T>,
impl<T> Borrow for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut for T where
T: ?Sized,
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T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
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impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
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Should always be Self