pub enum Mode {
Show 32 variants
Arm,
Mode16,
Mode32,
Mode64,
Thumb,
Mips2,
Mips3,
Mips32R6,
Mips32,
Mips64,
V9,
Qpx,
M68k000,
M68k010,
M68k020,
M68k030,
M68k040,
M680x6301,
M680x6309,
M680x6800,
M680x6801,
M680x6805,
M680x6808,
M680x6809,
M680x6811,
M680xCpu12,
M680xHcs08,
RiscV32,
RiscV64,
Cbpf,
Ebpf,
Default,
}
Expand description
Disassembler modes
Variants§
Arm
32-bit ARM
Mode16
16-bit mode (X86)
Mode32
32-bit mode (X86)
Mode64
64-bit mode (X86, PPC)
Thumb
ARM’s Thumb mode, including Thumb-2
Mips2
Mips II ISA
Mips3
Mips III ISA
Mips32R6
Mips32r6 ISA
Mips32
Mips32 ISA (Mips)
Mips64
Mips64 ISA (Mips)
V9
SparcV9 mode (Sparc)
Qpx
Quad Processing eXtensions mode (PPC)
M68k000
M68K 68000 mode
M68k010
M68K 68010 mode
M68k020
M68K 68020 mode
M68k030
M68K 68030 mode
M68k040
M68K 68040 mode
M680x6301
M680X Hitachi 6301,6303 mode
M680x6309
M680X Hitachi 6309 mode
M680x6800
M680X Motorola 6800,6802 mode
M680x6801
M680X Motorola 6801,6803 mode
M680x6805
M680X Motorola/Freescale 6805 mode
M680x6808
M680X Motorola/Freescale/NXP 68HC08 mode
M680x6809
M680X Motorola 6809 mode
M680x6811
M680X Motorola/Freescale/NXP 68HC11 mode
M680xCpu12
M680X Motorola/Freescale/NXP CPU12
M680xHcs08
M680X Freescale/NXP HCS08 mode
RiscV32
RISC-V 32-bit mode
RiscV64
RISC-V 64-bit mode
Cbpf
Classic BPF mode
Ebpf
Extended BPF mode
Default
Default mode for little-endian
Trait Implementations§
impl Copy for Mode
impl Eq for Mode
impl StructuralPartialEq for Mode
Auto Trait Implementations§
impl Freeze for Mode
impl RefUnwindSafe for Mode
impl Send for Mode
impl Sync for Mode
impl Unpin for Mode
impl UnwindSafe for Mode
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more