Enum capstone_sys::arm_sysreg

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#[repr(u32)]
pub enum arm_sysreg {
Show 79 variants    ARM_SYSREG_INVALID,
    ARM_SYSREG_SPSR_C,
    ARM_SYSREG_SPSR_X,
    ARM_SYSREG_SPSR_S,
    ARM_SYSREG_SPSR_F,
    ARM_SYSREG_CPSR_C,
    ARM_SYSREG_CPSR_X,
    ARM_SYSREG_CPSR_S,
    ARM_SYSREG_CPSR_F,
    ARM_SYSREG_APSR,
    ARM_SYSREG_APSR_G,
    ARM_SYSREG_APSR_NZCVQ,
    ARM_SYSREG_APSR_NZCVQG,
    ARM_SYSREG_IAPSR,
    ARM_SYSREG_IAPSR_G,
    ARM_SYSREG_IAPSR_NZCVQG,
    ARM_SYSREG_IAPSR_NZCVQ,
    ARM_SYSREG_EAPSR,
    ARM_SYSREG_EAPSR_G,
    ARM_SYSREG_EAPSR_NZCVQG,
    ARM_SYSREG_EAPSR_NZCVQ,
    ARM_SYSREG_XPSR,
    ARM_SYSREG_XPSR_G,
    ARM_SYSREG_XPSR_NZCVQG,
    ARM_SYSREG_XPSR_NZCVQ,
    ARM_SYSREG_IPSR,
    ARM_SYSREG_EPSR,
    ARM_SYSREG_IEPSR,
    ARM_SYSREG_MSP,
    ARM_SYSREG_PSP,
    ARM_SYSREG_PRIMASK,
    ARM_SYSREG_BASEPRI,
    ARM_SYSREG_BASEPRI_MAX,
    ARM_SYSREG_FAULTMASK,
    ARM_SYSREG_CONTROL,
    ARM_SYSREG_MSPLIM,
    ARM_SYSREG_PSPLIM,
    ARM_SYSREG_MSP_NS,
    ARM_SYSREG_PSP_NS,
    ARM_SYSREG_MSPLIM_NS,
    ARM_SYSREG_PSPLIM_NS,
    ARM_SYSREG_PRIMASK_NS,
    ARM_SYSREG_BASEPRI_NS,
    ARM_SYSREG_FAULTMASK_NS,
    ARM_SYSREG_CONTROL_NS,
    ARM_SYSREG_SP_NS,
    ARM_SYSREG_R8_USR,
    ARM_SYSREG_R9_USR,
    ARM_SYSREG_R10_USR,
    ARM_SYSREG_R11_USR,
    ARM_SYSREG_R12_USR,
    ARM_SYSREG_SP_USR,
    ARM_SYSREG_LR_USR,
    ARM_SYSREG_R8_FIQ,
    ARM_SYSREG_R9_FIQ,
    ARM_SYSREG_R10_FIQ,
    ARM_SYSREG_R11_FIQ,
    ARM_SYSREG_R12_FIQ,
    ARM_SYSREG_SP_FIQ,
    ARM_SYSREG_LR_FIQ,
    ARM_SYSREG_LR_IRQ,
    ARM_SYSREG_SP_IRQ,
    ARM_SYSREG_LR_SVC,
    ARM_SYSREG_SP_SVC,
    ARM_SYSREG_LR_ABT,
    ARM_SYSREG_SP_ABT,
    ARM_SYSREG_LR_UND,
    ARM_SYSREG_SP_UND,
    ARM_SYSREG_LR_MON,
    ARM_SYSREG_SP_MON,
    ARM_SYSREG_ELR_HYP,
    ARM_SYSREG_SP_HYP,
    ARM_SYSREG_SPSR_FIQ,
    ARM_SYSREG_SPSR_IRQ,
    ARM_SYSREG_SPSR_SVC,
    ARM_SYSREG_SPSR_ABT,
    ARM_SYSREG_SPSR_UND,
    ARM_SYSREG_SPSR_MON,
    ARM_SYSREG_SPSR_HYP,
}

Variants

`ARM_SYSREG_INVALID`

Special registers for MSR

`ARM_SYSREG_SPSR_C`

Special registers for MSR

`ARM_SYSREG_SPSR_X`

Special registers for MSR

`ARM_SYSREG_SPSR_S`

Special registers for MSR

`ARM_SYSREG_SPSR_F`

Special registers for MSR

`ARM_SYSREG_CPSR_C`

Special registers for MSR

`ARM_SYSREG_CPSR_X`

Special registers for MSR

`ARM_SYSREG_CPSR_S`

Special registers for MSR

`ARM_SYSREG_CPSR_F`

Special registers for MSR

`ARM_SYSREG_APSR`

Special registers for MSR

`ARM_SYSREG_APSR_G`

Special registers for MSR

`ARM_SYSREG_APSR_NZCVQ`

Special registers for MSR

`ARM_SYSREG_APSR_NZCVQG`

Special registers for MSR

`ARM_SYSREG_IAPSR`

Special registers for MSR

`ARM_SYSREG_IAPSR_G`

Special registers for MSR

`ARM_SYSREG_IAPSR_NZCVQG`

Special registers for MSR

`ARM_SYSREG_IAPSR_NZCVQ`

Special registers for MSR

`ARM_SYSREG_EAPSR`

Special registers for MSR

`ARM_SYSREG_EAPSR_G`

Special registers for MSR

`ARM_SYSREG_EAPSR_NZCVQG`

Special registers for MSR

`ARM_SYSREG_EAPSR_NZCVQ`

Special registers for MSR

`ARM_SYSREG_XPSR`

Special registers for MSR

`ARM_SYSREG_XPSR_G`

Special registers for MSR

`ARM_SYSREG_XPSR_NZCVQG`

Special registers for MSR

`ARM_SYSREG_XPSR_NZCVQ`

Special registers for MSR

`ARM_SYSREG_IPSR`

Special registers for MSR

`ARM_SYSREG_EPSR`

Special registers for MSR

`ARM_SYSREG_IEPSR`

Special registers for MSR

`ARM_SYSREG_MSP`

Special registers for MSR

`ARM_SYSREG_PSP`

Special registers for MSR

`ARM_SYSREG_PRIMASK`

Special registers for MSR

`ARM_SYSREG_BASEPRI`

Special registers for MSR

`ARM_SYSREG_BASEPRI_MAX`

Special registers for MSR

`ARM_SYSREG_FAULTMASK`

Special registers for MSR

`ARM_SYSREG_CONTROL`

Special registers for MSR

`ARM_SYSREG_MSPLIM`

Special registers for MSR

`ARM_SYSREG_PSPLIM`

Special registers for MSR

`ARM_SYSREG_MSP_NS`

Special registers for MSR

`ARM_SYSREG_PSP_NS`

Special registers for MSR

`ARM_SYSREG_MSPLIM_NS`

Special registers for MSR

`ARM_SYSREG_PSPLIM_NS`

Special registers for MSR

`ARM_SYSREG_PRIMASK_NS`

Special registers for MSR

`ARM_SYSREG_BASEPRI_NS`

Special registers for MSR

`ARM_SYSREG_FAULTMASK_NS`

Special registers for MSR

`ARM_SYSREG_CONTROL_NS`

Special registers for MSR

`ARM_SYSREG_SP_NS`

Special registers for MSR

`ARM_SYSREG_R8_USR`

Special registers for MSR

`ARM_SYSREG_R9_USR`

Special registers for MSR

`ARM_SYSREG_R10_USR`

Special registers for MSR

`ARM_SYSREG_R11_USR`

Special registers for MSR

`ARM_SYSREG_R12_USR`

Special registers for MSR

`ARM_SYSREG_SP_USR`

Special registers for MSR

`ARM_SYSREG_LR_USR`

Special registers for MSR

`ARM_SYSREG_R8_FIQ`

Special registers for MSR

`ARM_SYSREG_R9_FIQ`

Special registers for MSR

`ARM_SYSREG_R10_FIQ`

Special registers for MSR

`ARM_SYSREG_R11_FIQ`

Special registers for MSR

`ARM_SYSREG_R12_FIQ`

Special registers for MSR

`ARM_SYSREG_SP_FIQ`

Special registers for MSR

`ARM_SYSREG_LR_FIQ`

Special registers for MSR

`ARM_SYSREG_LR_IRQ`

Special registers for MSR

`ARM_SYSREG_SP_IRQ`

Special registers for MSR

`ARM_SYSREG_LR_SVC`

Special registers for MSR

`ARM_SYSREG_SP_SVC`

Special registers for MSR

`ARM_SYSREG_LR_ABT`

Special registers for MSR

`ARM_SYSREG_SP_ABT`

Special registers for MSR

`ARM_SYSREG_LR_UND`

Special registers for MSR

`ARM_SYSREG_SP_UND`

Special registers for MSR

`ARM_SYSREG_LR_MON`

Special registers for MSR

`ARM_SYSREG_SP_MON`

Special registers for MSR

`ARM_SYSREG_ELR_HYP`

Special registers for MSR

`ARM_SYSREG_SP_HYP`

Special registers for MSR

`ARM_SYSREG_SPSR_FIQ`

Special registers for MSR

`ARM_SYSREG_SPSR_IRQ`

Special registers for MSR

`ARM_SYSREG_SPSR_SVC`

Special registers for MSR

`ARM_SYSREG_SPSR_ABT`

Special registers for MSR

`ARM_SYSREG_SPSR_UND`

Special registers for MSR

`ARM_SYSREG_SPSR_MON`

Special registers for MSR

`ARM_SYSREG_SPSR_HYP`

Special registers for MSR

Trait Implementations

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impl Clone for arm_sysreg

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fn clone(&self) -> arm_sysreg

Returns a copy of the value. Read more

1.0.0 · source

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more

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impl Debug for arm_sysreg

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

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impl Hash for arm_sysreg

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fn hash<H: Hasher>(&self, state: &mut H)

Feeds this value into the given Hasher. Read more

1.3.0 · source

fn hash_slice<H>(data: &[Self], state: &mut H) where
H: Hasher,

Feeds a slice of this type into the given Hasher. Read more

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impl PartialEq<arm_sysreg> for arm_sysreg

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fn eq(&self, other: &arm_sysreg) -> bool

This method tests for self and other values to be equal, and is used by ==. Read more

1.0.0 · source

fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

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impl StructuralPartialEq for arm_sysreg

Auto Trait Implementations

impl RefUnwindSafe for arm_sysreg

impl Send for arm_sysreg

impl Sync for arm_sysreg

impl Unpin for arm_sysreg

impl UnwindSafe for arm_sysreg

Blanket Implementations

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impl<T> Any for T where
T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

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impl<T> Borrow<T> for T where
T: ?Sized,

const: unstable · source

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

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impl<T> BorrowMut<T> for T where
T: ?Sized,

const: unstable · source

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

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impl<T> From<T> for T

const: unstable · source

fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into for T where
U: From<T>,

const: unstable · source

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T, U> TryFrom for T where
U: Into<T>,

type Error = Infallible

The type returned in the event of a conversion error.

const: unstable · source

fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>

Performs the conversion.

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impl<T, U> TryInto for T where
U: TryFrom<T>,

type Error = >::Error

The type returned in the event of a conversion error.

const: unstable · source

fn try_into(self) -> Result<U, >::Error>

Performs the conversion.