#[repr(C)]pub struct cs_x86 {Show 19 fields
pub prefix: [u8; 4],
pub opcode: [u8; 4],
pub rex: u8,
pub addr_size: u8,
pub modrm: u8,
pub sib: u8,
pub disp: i64,
pub sib_index: Type,
pub sib_scale: i8,
pub sib_base: Type,
pub xop_cc: x86_xop_cc,
pub sse_cc: x86_sse_cc,
pub avx_cc: x86_avx_cc,
pub avx_sae: bool,
pub avx_rm: x86_avx_rm,
pub __bindgen_anon_1: cs_x86__bindgen_ty_1,
pub op_count: u8,
pub operands: [cs_x86_op; 8],
pub encoding: cs_x86_encoding,
}Expand description
Instruction structure
Fields§
§prefix: [u8; 4]Instruction prefix, which can be up to 4 bytes. A prefix byte gets value 0 when irrelevant. prefix[0] indicates REP/REPNE/LOCK prefix (See X86_PREFIX_REP/REPNE/LOCK above) prefix[1] indicates segment override (irrelevant for x86_64): See X86_PREFIX_CS/SS/DS/ES/FS/GS above. prefix[2] indicates operand-size override (X86_PREFIX_OPSIZE) prefix[3] indicates address-size override (X86_PREFIX_ADDRSIZE)
opcode: [u8; 4]Instruction opcode, which can be from 1 to 4 bytes in size. This contains VEX opcode as well. An trailing opcode byte gets value 0 when irrelevant.
rex: u8REX prefix: only a non-zero value is relevant for x86_64
addr_size: u8Address size, which can be overridden with above prefix[5].
modrm: u8ModR/M byte
sib: u8SIB value, or 0 when irrelevant.
disp: i64Displacement value, valid if encoding.disp_offset != 0
sib_index: TypeSIB index register, or X86_REG_INVALID when irrelevant.
sib_scale: i8SIB scale, only applicable if sib_index is valid.
sib_base: TypeSIB base register, or X86_REG_INVALID when irrelevant.
xop_cc: x86_xop_ccXOP Code Condition
sse_cc: x86_sse_ccSSE Code Condition
avx_cc: x86_avx_ccAVX Code Condition
avx_sae: boolAVX Suppress all Exception
avx_rm: x86_avx_rmAVX static rounding mode
__bindgen_anon_1: cs_x86__bindgen_ty_1§op_count: u8Number of operands of this instruction, or 0 when instruction has no operand.
operands: [cs_x86_op; 8]< operands for this instruction.
encoding: cs_x86_encoding< encoding information