RegisterBlock

bl702_pac::cam

Struct RegisterBlock 

Source 
pub struct RegisterBlock {
Show 48 fields
    pub dvp2axi_configue: DVP2AXI_CONFIGUE,
    pub dvp2ahb_addr_start_0: DVP2AHB_ADDR_START_0,
    pub dvp2ahb_mem_bcnt_0: DVP2AHB_MEM_BCNT_0,
    pub dvp2ahb_frame_bcnt_0: DVP2AHB_FRAME_BCNT_0,
    pub dvp2ahb_addr_start_1: DVP2AHB_ADDR_START_1,
    pub dvp2ahb_mem_bcnt_1: DVP2AHB_MEM_BCNT_1,
    pub dvp2ahb_frame_bcnt_1: DVP2AHB_FRAME_BCNT_1,
    pub dvp_status_and_error: DVP_STATUS_AND_ERROR,
    pub dvp_frame_fifo_pop: DVP_FRAME_FIFO_POP,
    pub snsr_control: SNSR_CONTROL,
    pub int_control: INT_CONTROL,
    pub hsync_control: HSYNC_CONTROL,
    pub vsync_control: VSYNC_CONTROL,
    pub frame_size_control: FRAME_SIZE_CONTROL,
    pub frame_start_addr0_0: FRAME_START_ADDR0_0,
    pub frame_byte_cnt0_0: FRAME_BYTE_CNT0_0,
    pub frame_start_addr0_1: FRAME_START_ADDR0_1,
    pub frame_byte_cnt0_1: FRAME_BYTE_CNT0_1,
    pub frame_start_addr0_2: FRAME_START_ADDR0_2,
    pub frame_byte_cnt0_2: FRAME_BYTE_CNT0_2,
    pub frame_start_addr0_3: FRAME_START_ADDR0_3,
    pub frame_byte_cnt0_3: FRAME_BYTE_CNT0_3,
    pub frame_start_addr0_4: FRAME_START_ADDR0_4,
    pub frame_byte_cnt0_4: FRAME_BYTE_CNT0_4,
    pub frame_start_addr0_5: FRAME_START_ADDR0_5,
    pub frame_byte_cnt0_5: FRAME_BYTE_CNT0_5,
    pub frame_start_addr0_6: FRAME_START_ADDR0_6,
    pub frame_byte_cnt0_6: FRAME_BYTE_CNT0_6,
    pub frame_start_addr0_7: FRAME_START_ADDR0_7,
    pub frame_byte_cnt0_7: FRAME_BYTE_CNT0_7,
    pub frame_start_addr1_0: FRAME_START_ADDR1_0,
    pub frame_byte_cnt1_0: FRAME_BYTE_CNT1_0,
    pub frame_start_addr1_1: FRAME_START_ADDR1_1,
    pub frame_byte_cnt1_1: FRAME_BYTE_CNT1_1,
    pub frame_start_addr1_2: FRAME_START_ADDR1_2,
    pub frame_byte_cnt1_2: FRAME_BYTE_CNT1_2,
    pub frame_start_addr1_3: FRAME_START_ADDR1_3,
    pub frame_byte_cnt1_3: FRAME_BYTE_CNT1_3,
    pub frame_start_addr1_4: FRAME_START_ADDR1_4,
    pub frame_byte_cnt1_4: FRAME_BYTE_CNT1_4,
    pub frame_start_addr1_5: FRAME_START_ADDR1_5,
    pub frame_byte_cnt1_5: FRAME_BYTE_CNT1_5,
    pub frame_start_addr1_6: FRAME_START_ADDR1_6,
    pub frame_byte_cnt1_6: FRAME_BYTE_CNT1_6,
    pub frame_start_addr1_7: FRAME_START_ADDR1_7,
    pub frame_byte_cnt1_7: FRAME_BYTE_CNT1_7,
    pub dvp_debug: DVP_DEBUG,
    pub dvp_dummy_reg: DVP_DUMMY_REG,
    /* private fields */

}
Expand description

Register block

Fields§

§dvp2axi_configue: DVP2AXI_CONFIGUE

0x00 - dvp2axi_configue.

§dvp2ahb_addr_start_0: DVP2AHB_ADDR_START_0

0x04 - dvp2ahb_addr_start_0.

§dvp2ahb_mem_bcnt_0: DVP2AHB_MEM_BCNT_0

0x08 - dvp2ahb_mem_bcnt_0.

§dvp2ahb_frame_bcnt_0: DVP2AHB_FRAME_BCNT_0

0x0c - dvp2ahb_frame_bcnt_0.

§dvp2ahb_addr_start_1: DVP2AHB_ADDR_START_1

0x10 - dvp2ahb_addr_start_1.

§dvp2ahb_mem_bcnt_1: DVP2AHB_MEM_BCNT_1

0x14 - dvp2ahb_mem_bcnt_1.

§dvp2ahb_frame_bcnt_1: DVP2AHB_FRAME_BCNT_1

0x18 - dvp2ahb_frame_bcnt_1.

§dvp_status_and_error: DVP_STATUS_AND_ERROR

0x1c - dvp_status_and_error.

§dvp_frame_fifo_pop: DVP_FRAME_FIFO_POP

0x20 - dvp_frame_fifo_pop.

§snsr_control: SNSR_CONTROL

0x24 - snsr_control.

§int_control: INT_CONTROL

0x28 - int_control.

§hsync_control: HSYNC_CONTROL

0x30 - hsync_control.

§vsync_control: VSYNC_CONTROL

0x34 - vsync_control.

§frame_size_control: FRAME_SIZE_CONTROL

0x38 - frame_size_control.

§frame_start_addr0_0: FRAME_START_ADDR0_0

0x40 - frame_start_addr0_0.

§frame_byte_cnt0_0: FRAME_BYTE_CNT0_0

0x44 - frame_byte_cnt0_0.

§frame_start_addr0_1: FRAME_START_ADDR0_1

0x48 - frame_start_addr0_1.

§frame_byte_cnt0_1: FRAME_BYTE_CNT0_1

0x4c - frame_byte_cnt0_1.

§frame_start_addr0_2: FRAME_START_ADDR0_2

0x50 - frame_start_addr0_2.

§frame_byte_cnt0_2: FRAME_BYTE_CNT0_2

0x54 - frame_byte_cnt0_2.

§frame_start_addr0_3: FRAME_START_ADDR0_3

0x58 - frame_start_addr0_3.

§frame_byte_cnt0_3: FRAME_BYTE_CNT0_3

0x5c - frame_byte_cnt0_3.

§frame_start_addr0_4: FRAME_START_ADDR0_4

0x60 - frame_start_addr0_4.

§frame_byte_cnt0_4: FRAME_BYTE_CNT0_4

0x64 - frame_byte_cnt0_4.

§frame_start_addr0_5: FRAME_START_ADDR0_5

0x68 - frame_start_addr0_5.

§frame_byte_cnt0_5: FRAME_BYTE_CNT0_5

0x6c - frame_byte_cnt0_5.

§frame_start_addr0_6: FRAME_START_ADDR0_6

0x70 - frame_start_addr0_6.

§frame_byte_cnt0_6: FRAME_BYTE_CNT0_6

0x74 - frame_byte_cnt0_6.

§frame_start_addr0_7: FRAME_START_ADDR0_7

0x78 - frame_start_addr0_7.

§frame_byte_cnt0_7: FRAME_BYTE_CNT0_7

0x7c - frame_byte_cnt0_7.

§frame_start_addr1_0: FRAME_START_ADDR1_0

0x80 - frame_start_addr1_0.

§frame_byte_cnt1_0: FRAME_BYTE_CNT1_0

0x84 - frame_byte_cnt1_0.

§frame_start_addr1_1: FRAME_START_ADDR1_1

0x88 - frame_start_addr1_1.

§frame_byte_cnt1_1: FRAME_BYTE_CNT1_1

0x8c - frame_byte_cnt1_1.

§frame_start_addr1_2: FRAME_START_ADDR1_2

0x90 - frame_start_addr1_2.

§frame_byte_cnt1_2: FRAME_BYTE_CNT1_2

0x94 - frame_byte_cnt1_2.

§frame_start_addr1_3: FRAME_START_ADDR1_3

0x98 - frame_start_addr1_3.

§frame_byte_cnt1_3: FRAME_BYTE_CNT1_3

0x9c - frame_byte_cnt1_3.

§frame_start_addr1_4: FRAME_START_ADDR1_4

0xa0 - frame_start_addr1_4.

§frame_byte_cnt1_4: FRAME_BYTE_CNT1_4

0xa4 - frame_byte_cnt1_4.

§frame_start_addr1_5: FRAME_START_ADDR1_5

0xa8 - frame_start_addr1_5.

§frame_byte_cnt1_5: FRAME_BYTE_CNT1_5

0xac - frame_byte_cnt1_5.

§frame_start_addr1_6: FRAME_START_ADDR1_6

0xb0 - frame_start_addr1_6.

§frame_byte_cnt1_6: FRAME_BYTE_CNT1_6

0xb4 - frame_byte_cnt1_6.

§frame_start_addr1_7: FRAME_START_ADDR1_7

0xb8 - frame_start_addr1_7.

§frame_byte_cnt1_7: FRAME_BYTE_CNT1_7

0xbc - frame_byte_cnt1_7.

§dvp_debug: DVP_DEBUG

0xff0 - dvp_debug.

§dvp_dummy_reg: DVP_DUMMY_REG

0xffc - dvp_dummy_reg.

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