Crate bitloom_builder

Expand description

Builder session: the only public mutation path into HIR (AD-13).

Structs§

Diagnostic
Diagnostics
ElaborateSession: Session token holding the unfrozen circuit (AD-13).
Frozen: Immutable circuit after freeze (AD-7).
FrozenHir: Immutable circuit after freeze (AD-7).
GeneratedInstance: Plain instance spec produced by an elaborate-time factory Fn (FR73 / Cap-R-53).
HirDiagnostics
HwCaptureRef: Documented illegal-capture marker for Wire/Reg/signal refs (Story 27.3).
LegalEmptyClosure: Positive stand-in: empty non-capturing closure (FR74 ATDD).
LegalSimpleClosure: Positive stand-in: simple pure unary transform (FR74 / FR75 comb inline).
SeqOwnershipViolation: Documented Cap-R-70 ownership violation token (Story 28.3).
Span: Source span threaded from builder / macros (opaque for now).
SynthesizableClosureViolation: Documented SynthesizableClosure violation token (Story 28.1 / Cap-R-60).

CombInline: Elaborate-time description of a combinational RHS (FR75 / Cap-R-55).
GroundType: Ground types for phase-1 HIR (AD-12).
HwCaptureKind: Kind of hardware reference that must not be captured into elaborate-time generator / factory closures (FR73 / NFR35 / AD-18).
SeqInline: Elaborate-time description of a sequential Reg.d next-state (FR75 / Cap-R-56).
SeqOwnershipViolationKind: Cap-R-70 ownership breach inside sequential synthesizable-closure inline.
SignalKind
SynthesizableClosureViolationKind: Kind of SynthesizableClosure constraint breach (FR74 / Cap-R-48…50).

Elaboratable: Trait implemented by #[rhdl::top] / design modules (AD-19 partial for 1.1).
SynthesizableClosure: Documented constraints for closures that may enter the synthesizable hardware path (FR74 / Cap-R-48…50 / AD-18).

diagnose_seq_ownership_violations: Cap-R-70 check surface: diagnose seq-ownership violations without a session.
diagnose_synthesizable_closure_violations: Cap-R-60 check surface: diagnose SynthesizableClosure violations without a session (CLI / cargo bitloom check can call this; session methods wrap it).
generate_mem_init_words: Elaborate-time LUT/ROM table builder (FR73). Runs f(addr) for each address; returns plain words — the closure never enters HIR.
mask_mem_word: Mask a mem init word to width bits (MVP: width ≤ 64).