Expand description
§Base64 Turbo
A SIMD-accelerated Base64 encoder/decoder for Rust, optimized for high-throughput systems.
This crate provides runtime CPU detection to utilize AVX2, SSE4.1, or AVX512 (via feature flag) intrinsics.
It includes a highly optimized scalar fallback for non-SIMD targets and supports no_std environments.
§Usage
Add this to your Cargo.toml:
[dependencies]
base64-turbo = "0.1"§Basic API (Allocating)
Standard usage for general applications. Requires the std feature (enabled by default).
use base64_turbo::STANDARD;
let data = b"Hello world";
// Encode to String
let encoded = STANDARD.encode(data);
assert_eq!(encoded, "SGVsbG8gd29ybGQ=");
// Decode to Vec<u8>
let decoded = STANDARD.decode(&encoded).unwrap();
assert_eq!(decoded, data);§Zero-Allocation API (Slice-based)
For low-latency scenarios or no_std environments where heap allocation is undesirable.
These methods write directly into a user-provided mutable slice.
use base64_turbo::STANDARD;
let input = b"Raw bytes";
let mut output = [0u8; 64]; // Pre-allocated stack buffer
// Returns Result<usize, Error> indicating bytes written
let len = STANDARD.encode_into(input, &mut output).unwrap();
assert_eq!(&output[..len], b"UmF3IGJ5dGVz");§Feature Flags
This crate is highly configurable via Cargo features:
| Feature | Default | Description |
|---|---|---|
std | Yes | Enables String and Vec support. Disable this for no_std environments. |
simd | Yes | Enables runtime detection for AVX2 and SSE4.1 intrinsics. If disabled or unsupported by hardware, the crate falls back to scalar logic automatic. |
parallel | No | Enables Rayon support. Automatically parallelizes processing for payloads larger than 512KB. Recommended only for massive data ingestion tasks. |
avx512 | No | Enables AVX512 intrinsics. |
§Safety & Verification
This crate utilizes unsafe code for SIMD intrinsics and pointer arithmetic to achieve maximum performance.
- Formal Verification (Kani): Scalar (Done), SSE4.1 (In Progress), AVX2 (Done), AVX512 (In Progress) code mathematic proven to be UB free and panic free.
- MIRI Tests: Core SIMD logic and scalar fallbacks are verified with MIRI (Undefined Behavior checker) in CI.
- Fuzzing: The codebase is fuzz-tested via
cargo-fuzz. - Fallback: Invalid or unsupported hardware instruction sets are detected at runtime, ensuring safe fallback to scalar code.
Learn More: Details on our threat model and formal verification strategy.
Structs§
- Engine
- A high-performance, stateless Base64 encoder/decoder.
Enums§
- Error
- Errors that can occur during Base64 encoding or decoding operations.
Constants§
- STANDARD
- Standard Base64 (RFC 4648) with padding (
=). - STANDARD_
NO_ PAD - Standard Base64 (RFC 4648) without padding.
- URL_
SAFE - URL-Safe Base64 with padding.
- URL_
SAFE_ NO_ PAD - URL-Safe Base64 without padding.