Enum bad64::Operand [−][src]
pub enum Operand {
Show 22 variants
Imm32 {
imm: Imm,
shift: Option<Shift>,
},
Imm64 {
imm: Imm,
shift: Option<Shift>,
},
FImm32(u32),
ShiftReg {
reg: Reg,
shift: Shift,
},
QualReg {
reg: Reg,
qual: char,
},
Reg {
reg: Reg,
arrspec: Option<ArrSpec>,
},
MultiReg {
regs: [Option<Reg>; 5],
arrspec: Option<ArrSpec>,
},
SysReg(SysReg),
MemReg(Reg),
MemOffset {
reg: Reg,
offset: Imm,
mul_vl: bool,
arrspec: Option<ArrSpec>,
},
MemPreIdx {
reg: Reg,
imm: Imm,
},
MemPostIdxReg([Reg; 2]),
MemPostIdxImm {
reg: Reg,
imm: Imm,
},
MemExt {
regs: [Reg; 2],
shift: Option<Shift>,
arrspec: Option<ArrSpec>,
},
SmeTile {
tile: u16,
slice: Option<SliceIndicator>,
arrspec: Option<ArrSpec>,
reg: Option<Reg>,
imm: Imm,
},
AccumArray {
reg: Reg,
imm: Imm,
},
IndexedElement {
regs: [Reg; 2],
arrspec: Option<ArrSpec>,
imm: Imm,
},
Label(Imm),
ImplSpec {
o0: u8,
o1: u8,
cm: u8,
cn: u8,
o2: u8,
},
Cond(Condition),
Name([u8; 16]),
StrImm {
str: [u8; 16],
imm: u64,
},
}Expand description
An instruction operand
Variants
Imm32
Imm64
FImm32(u32)
Tuple Fields
0: u32ShiftReg
QualReg
Reg
MultiReg
SysReg(SysReg)
Tuple Fields
0: SysRegMemReg(Reg)
Tuple Fields
0: RegMemOffset
MemPreIdx
MemPostIdxReg([Reg; 2])
MemPostIdxImm
MemExt
SmeTile
AccumArray
IndexedElement
Label(Imm)
Tuple Fields
0: ImmImplSpec
Cond(Condition)
Tuple Fields
0: ConditionName([u8; 16])
StrImm
Trait Implementations
Auto Trait Implementations
impl RefUnwindSafe for Operand
impl UnwindSafe for Operand
Blanket Implementations
Mutably borrows from an owned value. Read more
