Struct InstDesc

Source

pub struct InstDesc { /* private fields */ }

Expand description

One machine instruction’s description.

§Examples

use backend_lang::target::InstKind;
use backend_lang::x86_64::{self, op, RAX, RDX, FLAGS};

let div = x86_64::TARGET.inst(op::IDIV64).unwrap();
assert_eq!(div.name(), "idiv64");
assert_eq!(div.kind(), InstKind::Plain);
assert_eq!(div.implicit_uses(), [RAX, RDX]);
assert_eq!(div.implicit_defs(), [RAX, RDX, FLAGS]);

Implementations§

Source §

impl InstDesc

Source

pub const fn new( name: &'static str, kind: InstKind, operands: &'static [OperandRule], implicit_uses: &'static [PReg], implicit_defs: &'static [PReg], clobbers: RegSet, ) -> InstDesc

Describes an instruction.

implicit_uses are registers read without being named as operands, implicit_defs registers written that way (results the code may read afterwards, such as idiv’s quotient in rax), and clobbers registers left with unspecified contents.

§Examples

use backend_lang::RegSet;
use backend_lang::target::{InstDesc, InstKind};

let nop = InstDesc::new("nop", InstKind::Plain, &[], &[], &[], RegSet::EMPTY);
assert!(nop.operands().is_empty());

Source

pub const fn name(&self) -> &'static str

The instruction’s MIR name.

§Examples

use backend_lang::x86_64::{self, op};

assert_eq!(x86_64::TARGET.inst(op::MOVZX8).unwrap().name(), "movzx8");

Source

pub const fn kind(&self) -> InstKind

What the instruction does to control flow.

§Examples

use backend_lang::target::InstKind;
use backend_lang::x86_64::{self, op};

assert_eq!(x86_64::TARGET.inst(op::RET).unwrap().kind(), InstKind::Return);

Source

pub const fn operands(&self) -> &'static [OperandRule]

The explicit operands, definitions first. Empty for Opcode::COPY and Opcode::PCOPY, whose operands are checked by their own rule.

§Examples

use backend_lang::x86_64::{self, op};

assert_eq!(x86_64::TARGET.inst(op::CMP64).unwrap().operands().len(), 2);

Source

pub fn defs(&self) -> usize

The number of explicit definitions (the leading Def operands).

§Examples

use backend_lang::x86_64::{self, op};

assert_eq!(x86_64::TARGET.inst(op::ADD64).unwrap().defs(), 1);
assert_eq!(x86_64::TARGET.inst(op::CMP64).unwrap().defs(), 0);

Source

pub const fn implicit_uses(&self) -> &'static [PReg]

Registers the instruction reads without naming them.

§Examples

use backend_lang::x86_64::{self, op, RAX};

assert_eq!(x86_64::TARGET.inst(op::CQO).unwrap().implicit_uses(), [RAX]);

Source

pub const fn implicit_defs(&self) -> &'static [PReg]

Registers the instruction writes without naming them, with defined results.

§Examples

use backend_lang::x86_64::{self, op, RDX};

assert_eq!(x86_64::TARGET.inst(op::CQO).unwrap().implicit_defs(), [RDX]);

Source

pub const fn clobbers(&self) -> RegSet

Registers the instruction leaves with unspecified contents.

§Examples

use backend_lang::x86_64::{self, op, RCX, R11};

let clobbers = x86_64::TARGET.inst(op::SYSCALL).unwrap().clobbers();
assert!(clobbers.contains(RCX) && clobbers.contains(R11));