Struct AxpLowLevel

pub struct AxpLowLevel<I> { /* private fields */ }

Root block of the AxpLowLevel driver

Implementations

impl<I> AxpLowLevel<I>

pub const fn new(interface: I) -> Self

Create a new instance of the block based on device interface

pub fn read_all_registers( &mut self, callback: impl FnMut(u8, &'static str, FieldSetValue), ) -> Result<(), I::Error>

where I: RegisterInterface<AddressType = u8>,

Read all readable register values in this block from the device. The callback is called for each of them. Any registers in child blocks are not included.

The callback has three arguments:

• The address of the register
• The name of the register (with index for repeated registers)
• The read value from the register

This is useful for e.g. debug printing all values. The given field_sets::FieldSetValue has a Debug and Format implementation that forwards to the concrete type the lies within so it can be printed without matching on it.

pub async fn read_all_registers_async( &mut self, callback: impl FnMut(u8, &'static str, FieldSetValue), ) -> Result<(), I::Error>

where I: AsyncRegisterInterface<AddressType = u8>,

Read all readable register values in this block from the device. The callback is called for each of them. Any registers in child blocks are not included.

The callback has three arguments:

• The address of the register
• The name of the register (with index for repeated registers)
• The read value from the register

This is useful for e.g. debug printing all values. The given field_sets::FieldSetValue has a Debug and Format implementation that forwards to the concrete type the lies within so it can be printed without matching on it.

pub fn power_status(&mut self) -> RegisterOperation<'_, I, u8, PowerStatus, RO>

Indicates the input power source status (ACIN, VBUS), battery current direction, and other power-related conditions.

pub fn charge_status( &mut self, ) -> RegisterOperation<'_, I, u8, ChargeStatus, RO>

Indicates various operational modes and charging statuses, including AXP192 temperature, battery presence, and charging progress.

pub fn otg_vbus_status( &mut self, ) -> RegisterOperation<'_, I, u8, OtgVbusStatus, RO>

Indicates the status of VBUS when operating in USB OTG (On-The-Go) mode.

pub fn data_buffer_0(&mut self) -> RegisterOperation<'_, I, u8, DataBuffer0, RW>

General purpose data buffer for system data storage. Note: Retained as long as any AXP192 power source is present (not affected by host on/off).

pub fn data_buffer_1(&mut self) -> RegisterOperation<'_, I, u8, DataBuffer0, RW>

pub fn data_buffer_2(&mut self) -> RegisterOperation<'_, I, u8, DataBuffer0, RW>

pub fn data_buffer_3(&mut self) -> RegisterOperation<'_, I, u8, DataBuffer0, RW>

pub fn data_buffer_4(&mut self) -> RegisterOperation<'_, I, u8, DataBuffer0, RW>

pub fn data_buffer_5(&mut self) -> RegisterOperation<'_, I, u8, DataBuffer0, RW>

pub fn exten_dc_dc_2_control( &mut self, ) -> RegisterOperation<'_, I, u8, ExtenDcDc2Control, RW>

Controls the output enable state for the EXTEN pin and the DC-DC2 converter.

pub fn power_output_control( &mut self, ) -> RegisterOperation<'_, I, u8, PowerOutputControl, RW>

Controls output enable for DC-DC1, DC-DC3, LDO2, LDO3, EXTEN, and DC-DC2. Power-on default for M5StickC Plus is 0x5F. IMPORTANT: REG12H bit 6 (exten_output_enable) is linked to REG10H bit 2. REG12H bit 4 (dcdc2_output_enable) is linked to REG10H bit 0. These pairs control the same underlying hardware function.

pub fn dc_dc_2_voltage_setting( &mut self, ) -> RegisterOperation<'_, I, u8, DcDc2VoltageSetting, RW>

Sets the output voltage for the DC-DC2 converter. Formula: Output Voltage (V) = 0.7 + (value * 0.025). Range: 0.7V to 2.275V (raw 0-63).

pub fn dc_dc_2_vrc_parameter( &mut self, ) -> RegisterOperation<'_, I, u8, DcDc2VrcParameter, RW>

Configures DC-DC2 Dynamic Voltage Scaling / Voltage Ramp Control (VRC).

pub fn dc_dc_1_voltage_setting( &mut self, ) -> RegisterOperation<'_, I, u8, DcDc1VoltageSetting, RW>

Sets the output voltage for a DC-DC converter. Formula: V_out = 0.7V + (value * 25mV). Range 0.7V-3.5V (raw 0-112).

pub fn dc_dc_3_voltage_setting( &mut self, ) -> RegisterOperation<'_, I, u8, DcDc1VoltageSetting, RW>

pub fn ldo_2_and_3_voltage_setting( &mut self, ) -> RegisterOperation<'_, I, u8, Ldo2And3VoltageSetting, RW>

Sets the output voltage for both LDO2 and LDO3. LDO2 (bits 7-4) & LDO3 (bits 3-0): V_out = 1.8V + (setting * 100mV). Range: 1.8V-3.3V.

pub fn vbus_ipsout_path_management( &mut self, ) -> RegisterOperation<'_, I, u8, VbusIpsoutPathManagement, RW>

Manages VBUS to IPSOUT path, VHOLD voltage limiting, and VBUS current limiting.

pub fn shutdown_voltage_setting( &mut self, ) -> RegisterOperation<'_, I, u8, ShutdownVoltageSetting, RW>

Sets VOFF (shutdown) voltage and PWRON short-press wakeup from sleep.

pub fn shutdown_bat_chg_led_control( &mut self, ) -> RegisterOperation<'_, I, u8, ShutdownBatChgLedControl, RW>

Controls shutdown, battery detection, CHGLED pin, and N_OE shutdown delay.

pub fn charge_control_1( &mut self, ) -> RegisterOperation<'_, I, u8, ChargeControl1, RW>

Controls primary charging parameters.

pub fn charge_control_2( &mut self, ) -> RegisterOperation<'_, I, u8, ChargeControl2, RW>

Controls secondary charging parameters including pre-charge timeout, external path charge current and enable state, and constant current mode timeout.

pub fn backup_battery_charge_control( &mut self, ) -> RegisterOperation<'_, I, u8, BackupBatteryChargeControl, RW>

Controls the charging parameters for the backup battery (RTC battery).

pub fn pek_key_parameters( &mut self, ) -> RegisterOperation<'_, I, u8, PekKeyParameters, RW>

Configures parameters related to the PEK (Power Enable Key/Button) operations.

pub fn dc_dc_operating_frequency( &mut self, ) -> RegisterOperation<'_, I, u8, DcDcOperatingFrequency, RW>

Sets the operating (switching) frequency for the DC-DC converters. The 4-bit value (bits 0-3) adjusts the frequency around a default of 1.5MHz. The raw value 0b1000 (decimal 8) corresponds to 1.5MHz. Each step away from this default value changes the frequency by approximately 5% of 1.5MHz (75kHz). Range approx 0.9MHz (raw 0) to 2.025MHz (raw 15).

pub fn battery_charge_low_temp_threshold( &mut self, ) -> RegisterOperation<'_, I, u8, BatteryChargeLowTempThreshold, RW>

Sets the low-temperature threshold (V_LTF_charge) for battery charging, typically read from an NTC thermistor. If the NTC voltage rises above this threshold (indicating low temperature), charging may be suspended or modified. Formula: Threshold Voltage (V) = raw_value * 0.0128. Range: 0V (raw 0x00) to 3.264V (raw 0xFF).

pub fn battery_charge_high_temp_threshold( &mut self, ) -> RegisterOperation<'_, I, u8, BatteryChargeHighTempThreshold, RW>

Sets the high-temperature threshold (V_HTF_charge) for battery charging, typically read from an NTC thermistor. If the NTC voltage falls below this threshold (indicating high temperature), charging may be suspended or modified. Formula: Threshold Voltage (V) = raw_value * 0.0128. Range: 0V (raw 0x00) to 3.264V (raw 0xFF).

pub fn aps_low_power_level_1_setting( &mut self, ) -> RegisterOperation<'_, I, u8, ApsLowPowerLevel1Setting, RW>

Sets the APS (Average Power Source voltage) low power warning Level 1 threshold. An IRQ may be triggered if APS voltage drops below this level. Formula: V_WARNING1 (V) = 2.8672 + (raw_value * 0.0014 * 4). The raw_value is the 8-bit content of this register.

pub fn aps_low_power_level_2_setting( &mut self, ) -> RegisterOperation<'_, I, u8, ApsLowPowerLevel2Setting, RW>

Sets the APS (Average Power Source voltage) low power warning Level 2 threshold. Typically set lower than Level 1. An IRQ may be triggered if APS voltage drops below this level. Formula: V_WARNING2 (V) = 2.8672 + (raw_value * 0.0014 * 4). The raw_value is the 8-bit content of this register.

pub fn battery_discharge_low_temp_threshold( &mut self, ) -> RegisterOperation<'_, I, u8, BatteryDischargeLowTempThreshold, RW>

Sets the low-temperature threshold (V_LTF_discharge) for battery discharging, typically read from an NTC thermistor. If the NTC voltage rises above this threshold (indicating low temperature), system behavior may be modified. Formula: Threshold Voltage (V) = raw_value * 0.0128. Range: 0V (raw 0x00) to 3.264V (raw 0xFF).

pub fn battery_discharge_high_temp_threshold( &mut self, ) -> RegisterOperation<'_, I, u8, BatteryDischargeHighTempThreshold, RW>

Sets the high-temperature threshold (V_HTF_discharge) for battery discharging, typically read from an NTC thermistor. If the NTC voltage falls below this threshold (indicating high temperature), system behavior may be modified. Formula: Threshold Voltage (V) = raw_value * 0.0128. Range: 0V (raw 0x00) to 3.264V (raw 0xFF).

pub fn dc_dc_operating_mode( &mut self, ) -> RegisterOperation<'_, I, u8, DcDcOperatingMode, RW>

Selects the operating mode (PFM/PWM Auto or Fixed PWM) for DC-DC1, DC-DC2, and DC-DC3.

pub fn adc_enable_1(&mut self) -> RegisterOperation<'_, I, u8, AdcEnable1, RW>

Controls the enable state for various ADC channels (Set 1).

pub fn adc_enable_2(&mut self) -> RegisterOperation<'_, I, u8, AdcEnable2, RW>

Controls the enable state for internal temperature ADC and GPIO ADCs (Set 2).

pub fn adc_sample_rate_ts_pin_control( &mut self, ) -> RegisterOperation<'_, I, u8, AdcSampleRateTsPinControl, RW>

Configures ADC sample rate and TS (Temperature Sense) pin functionality, current, and output mode.

pub fn gpio_adc_input_range_setting( &mut self, ) -> RegisterOperation<'_, I, u8, GpioAdcInputRangeSetting, RW>

Sets the ADC input voltage range for GPIO0, GPIO1, GPIO2, and GPIO3.

pub fn gpio_1_adc_irq_rising_threshold( &mut self, ) -> RegisterOperation<'_, I, u8, Gpio1AdcIrqRisingThreshold, RW>

Sets the rising edge voltage threshold for GPIO1 ADC input to trigger an interrupt. An IRQ is generated when the GPIO1 ADC voltage rises above this set threshold. Formula: Threshold Voltage (V) = raw_value * 0.008. Range: 0V (raw 0x00) to 2.04V (raw 0xFF).

pub fn gpio_1_adc_irq_falling_threshold( &mut self, ) -> RegisterOperation<'_, I, u8, Gpio1AdcIrqFallingThreshold, RW>

Sets the falling edge voltage threshold for GPIO1 ADC input to trigger an interrupt. An IRQ is generated when the GPIO1 ADC voltage falls below this set threshold. Formula: Threshold Voltage (V) = raw_value * 0.008. Range: 0V (raw 0x00) to 2.04V (raw 0xFF).

pub fn timer_control( &mut self, ) -> RegisterOperation<'_, I, u8, TimerControl, RW>

Controls an internal timer, sets its duration, and indicates timeout status.

pub fn vbus_srp_control( &mut self, ) -> RegisterOperation<'_, I, u8, VbusSrpControl, RW>

Controls VBUS pin monitoring for Session Request Protocol (SRP) related functions, including valid voltage threshold and SRP feature enables.

pub fn over_temp_shutdown_control( &mut self, ) -> RegisterOperation<'_, I, u8, OverTempShutdownControl, RW>

Controls the AXP192 internal over-temperature shutdown function. Other bits are reserved.

pub fn gpio_0_control( &mut self, ) -> RegisterOperation<'_, I, u8, Gpio0Control, RW>

Configures the function of the GPIO0 pin.

pub fn gpio_0_ldo_voltage_setting( &mut self, ) -> RegisterOperation<'_, I, u8, Gpio0LdoVoltageSetting, RW>

Sets the output voltage for GPIO0 when it is configured in Low Noise LDO (LDOIO0) mode (via REG90H).

pub fn gpio_1_control( &mut self, ) -> RegisterOperation<'_, I, u8, Gpio1Control, RW>

Configures the function of the GPIO1 pin.

pub fn gpio_2_control( &mut self, ) -> RegisterOperation<'_, I, u8, Gpio2Control, RW>

Configures the function of the GPIO2 pin.

pub fn gpio_0_to_2_signal_status_and_control( &mut self, ) -> RegisterOperation<'_, I, u8, Gpio0To2SignalStatusAndControl, RW>

Monitors input status for GPIO0-GPIO2 and controls their output levels when configured as NMOS open-drain or output low.

pub fn gpio_3_and_4_function_control( &mut self, ) -> RegisterOperation<'_, I, u8, Gpio3And4FunctionControl, RW>

Configures the function for GPIO3 and GPIO4 pins, and enables their GPIO mode.

pub fn gpio_3_and_4_signal_status_and_control( &mut self, ) -> RegisterOperation<'_, I, u8, Gpio3And4SignalStatusAndControl, RW>

Monitors input status for GPIO3-GPIO4 and controls their output levels when configured as NMOS open-drain or output low.

pub fn gpio_0_to_2_pulldown_control( &mut self, ) -> RegisterOperation<'_, I, u8, Gpio0To2PulldownControl, RW>

Controls internal pull-down resistors for GPIO0, GPIO1, and GPIO2 when they are configured as inputs.

pub fn pwm_1_frequency_setting( &mut self, ) -> RegisterOperation<'_, I, u8, Pwm1FrequencySetting, RW>

Sets the ‘X’ parameter for PWM1 output frequency calculation. Formula: F_pwm1 = 2.25MHz / (X_value + 1) / Y1_value (where Y1 is from REG99H).

pub fn pwm_1_duty_cycle_setting_y_1( &mut self, ) -> RegisterOperation<'_, I, u8, Pwm1DutyCycleSettingY1, RW>

Sets the ‘Y1’ parameter for PWM1 duty cycle and frequency calculations. Y1 is the denominator for duty cycle (Duty = Y2/Y1) and also affects frequency. Y1 should not be set to 0.

pub fn pwm_1_duty_cycle_setting_y_2( &mut self, ) -> RegisterOperation<'_, I, u8, Pwm1DutyCycleSettingY2, RW>

Sets the ‘Y2’ parameter (numerator) for PWM1 duty cycle calculation (Duty = Y2/Y1). Only upper 5 bits (bits 7-3) are used for Y2.

pub fn pwm_2_frequency_setting( &mut self, ) -> RegisterOperation<'_, I, u8, Pwm1FrequencySetting, RW>

Sets the ‘X’ parameter for PWM2 output frequency calculation. Formula: F_pwm2 = 2.25MHz / (X_value + 1) / Y1_value (where Y1 is from REG9CH).

pub fn pwm_2_duty_cycle_setting_y_1( &mut self, ) -> RegisterOperation<'_, I, u8, Pwm1DutyCycleSettingY1, RW>

Sets the ‘Y1’ parameter for PWM2 duty cycle and frequency calculations. Y1 is the denominator for duty cycle (Duty = Y2/Y1) and also affects frequency. Y1 should not be set to 0.

pub fn pwm_2_duty_cycle_setting_y_2( &mut self, ) -> RegisterOperation<'_, I, u8, Pwm1DutyCycleSettingY2, RW>

Sets the ‘Y2’ parameter (numerator) for PWM2 duty cycle calculation (Duty = Y2/Y1). Only upper 5 bits (bits 7-3) are used for Y2.

pub fn nrsto_gpio_5_control( &mut self, ) -> RegisterOperation<'_, I, u8, NrstoGpio5Control, RW>

Configures the N_RSTO/GPIO5 pin function. It can operate as N_RSTO (LDO1 status monitor) or as a general-purpose I/O pin (GPIO5) with configurable direction and output state.

pub fn irq_enable_control_1( &mut self, ) -> RegisterOperation<'_, I, u8, IrqEnableControl1, RW>

Interrupt Enable Control Register 1 (ACIN and VBUS related IRQs).

pub fn irq_enable_control_2( &mut self, ) -> RegisterOperation<'_, I, u8, IrqEnableControl2, RW>

Interrupt Enable Control Register 2 (Battery and Charge related IRQs).

pub fn irq_enable_control_3( &mut self, ) -> RegisterOperation<'_, I, u8, IrqEnableControl3, RW>

Interrupt Enable Control Register 3 (IC Temp, Charge Current, DCDC VLow, PEK IRQs).

pub fn irq_enable_control_4( &mut self, ) -> RegisterOperation<'_, I, u8, IrqEnableControl4, RW>

Interrupt Enable Control Register 4 (N_OE and VBUS session/status related IRQs, APS Low Voltage).

pub fn irq_enable_control_5( &mut self, ) -> RegisterOperation<'_, I, u8, IrqEnableControl5, RW>

Interrupt Enable Control Register 5 (Timer and GPIO Input Edge Trigger IRQs).

pub fn irq_status_1(&mut self) -> RegisterOperation<'_, I, u8, IrqStatus1, RW>

Interrupt Status Register 1. Bits are set when corresponding IRQ occurs. Write 1 to a bit to clear it.

pub fn irq_status_2(&mut self) -> RegisterOperation<'_, I, u8, IrqStatus2, RW>

Interrupt Status Register 2. Bits are set when corresponding IRQ occurs. Write 1 to a bit to clear it.

pub fn irq_status_3(&mut self) -> RegisterOperation<'_, I, u8, IrqStatus3, RW>

Interrupt Status Register 3. Bits are set when corresponding IRQ occurs. Write 1 to a bit to clear it.

pub fn irq_status_4(&mut self) -> RegisterOperation<'_, I, u8, IrqStatus4, RW>

Interrupt Status Register 4. Bits are set when corresponding IRQ occurs. Write 1 to a bit to clear it.

pub fn irq_status_5(&mut self) -> RegisterOperation<'_, I, u8, IrqStatus5, RW>

Interrupt Status Register 5. Bits are set when corresponding IRQ occurs. Write 1 to a bit to clear it.

pub fn acin_voltage_adc( &mut self, ) -> RegisterOperation<'_, I, u8, AcinVoltageAdc, RO>

Raw 16-bit data from REG56H (MSB) and REG57H (LSB) for ACIN Voltage ADC. The actual 12-bit ADC value is (REG56H << 4) | (REG57H & 0x0F). Use the driver’s helper function to extract and convert: Voltage (mV) = adc_value * 1.7.

pub fn acin_current_adc( &mut self, ) -> RegisterOperation<'_, I, u8, AcinCurrentAdc, RO>

Raw 16-bit data from REG58H (MSB) and REG59H (LSB) for ACIN Current ADC. The actual 12-bit ADC value is (REG58H << 4) | (REG59H & 0x0F). Use driver helper: Current (mA) = adc_value * 0.625.

pub fn vbus_voltage_adc( &mut self, ) -> RegisterOperation<'_, I, u8, VbusVoltageAdc, RO>

Raw 16-bit data from REG5AH (MSB) and REG5BH (LSB) for VBUS Voltage ADC. The actual 12-bit ADC value is (REG5AH << 4) | (REG5BH & 0x0F). Use driver helper: Voltage (mV) = adc_value * 1.7.

pub fn vbus_current_adc( &mut self, ) -> RegisterOperation<'_, I, u8, VbusCurrentAdc, RO>

Raw 16-bit data from REG5CH (MSB) and REG5DH (LSB) for VBUS Current ADC. The actual 12-bit ADC value is (REG5CH << 4) | (REG5DH & 0x0F). Use driver helper: Current (mA) = adc_value * 0.375.

pub fn internal_temperature_adc( &mut self, ) -> RegisterOperation<'_, I, u8, InternalTemperatureAdc, RO>

Raw 16-bit data from REG5EH (MSB) and REG5FH (LSB) for Internal Temperature ADC. The actual 12-bit ADC value is (REG5EH << 4) | (REG5FH & 0x0F). Use driver helper: Temp (°C) = (adc_value * 0.1) - 144.7.

pub fn ts_pin_adc(&mut self) -> RegisterOperation<'_, I, u8, TsPinAdc, RO>

Raw 16-bit data from REG62H (MSB) and REG63H (LSB) for TS Pin ADC. The actual 12-bit ADC value is (REG62H << 4) | (REG63H & 0x0F). Use driver helper: Voltage (mV) = adc_value * 0.8.

pub fn gpio_voltage_adc( &mut self, index: usize, ) -> RegisterOperation<'_, I, u8, GpioVoltageAdc, RO>

Raw 16-bit data for GPIO Pin ADC (indexed 0-3). The actual 12-bit ADC value is (MSB_byte << 4) | (LSB_byte & 0x0F). Use driver helper: Voltage (mV) = adc_value * 0.5.

Valid index range: 0..4

pub fn battery_instantaneous_power_adc( &mut self, ) -> RegisterOperation<'_, I, u8, BatteryInstantaneousPowerAdc, RO>

Raw 24-bit data from REG70H (MSB), REG71H, REG72H (LSB) for Battery Power ADC. The value is (REG70H << 16) | (REG71H << 8) | REG72H. Use driver helper: Power (uW) = adc_value * 0.55.

pub fn battery_voltage_adc( &mut self, ) -> RegisterOperation<'_, I, u8, BatteryVoltageAdc, RO>

Raw 16-bit data from REG78H (MSB) and REG79H (LSB) for Battery Voltage ADC. The actual 12-bit ADC value is (REG78H << 4) | (REG79H & 0x0F). Use driver helper: Voltage (mV) = adc_value * 1.1.

pub fn battery_charge_current_adc( &mut self, ) -> RegisterOperation<'_, I, u8, BatteryChargeCurrentAdc, RO>

Raw 16-bit data from REG7AH (MSB) and REG7BH (LSB) for Battery Charge Current ADC. The actual 13-bit ADC value is (REG7AH << 5) | (REG7BH & 0x1F). Use driver helper: Current (mA) = adc_value * 0.5.

pub fn battery_discharge_current_adc( &mut self, ) -> RegisterOperation<'_, I, u8, BatteryDischargeCurrentAdc, RO>

Raw 16-bit data from REG7CH (MSB) and REG7DH (LSB) for Battery Discharge Current ADC. The actual 13-bit ADC value is (REG7CH << 5) | (REG7DH & 0x1F). Use driver helper: Current (mA) = adc_value * 0.5.

pub fn aps_voltage_adc( &mut self, ) -> RegisterOperation<'_, I, u8, ApsVoltageAdc, RO>

Raw 16-bit data from REG7EH (MSB) and REG7FH (LSB) for APS Voltage ADC. The actual 12-bit ADC value is (REG7EH << 4) | (REG7FH & 0x0F). Use driver helper: Voltage (mV) = adc_value * 1.4.

pub fn battery_charge_coulomb_counter( &mut self, ) -> RegisterOperation<'_, I, u8, BatteryChargeCoulombCounter, RO>

Raw 32-bit data for the battery charge coulomb counter. The value is (REG_B0 << 24) | (REG_B1 << 16) | (REG_B2 << 8) | REG_B3. Represents accumulated charge input.

pub fn battery_discharge_coulomb_counter( &mut self, ) -> RegisterOperation<'_, I, u8, BatteryDischargeCoulombCounter, RO>

Raw 32-bit data for the battery discharge coulomb counter. The value is (REG_B4 << 24) | (REG_B5 << 16) | (REG_B6 << 8) | REG_B7. Represents accumulated charge output.

pub fn coulomb_counter_control( &mut self, ) -> RegisterOperation<'_, I, u8, CoulombCounterControl, RW>

Controls the operation of the fuel gauge / coulomb counter, including enabling, pausing, and clearing its value.

Trait Implementations

impl<I: Debug> Debug for AxpLowLevel<I>

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.