pub trait ComponentType<F: Field>: 'static + Sized {
type InputValue: FixLenLogical<F>;
type InputWitness: FixLenLogical<AssignedValue<F>>;
type OutputValue: FixLenLogical<F>;
type OutputWitness: FixLenLogical<AssignedValue<F>>;
type LogicalInput: LogicalInputValue<F>;
type Commiter: ComponentCommiter<F> = BasicComponentCommiter<F>;
// Required methods
fn get_type_id() -> ComponentTypeId;
fn logical_result_to_virtual_rows_impl(
ins: &LogicalResult<F, Self>,
) -> Vec<(Self::InputValue, Self::OutputValue)>;
fn logical_input_to_virtual_rows_impl(
li: &Self::LogicalInput,
) -> Vec<Self::InputValue>;
// Provided methods
fn get_type_name() -> &'static str { ... }
fn logical_result_to_virtual_rows(
ins: &LogicalResult<F, Self>,
) -> Vec<(Self::InputValue, Self::OutputValue)> { ... }
fn logical_input_to_virtual_rows(
li: &Self::LogicalInput,
) -> Vec<Self::InputValue> { ... }
fn rlc_virtual_rows(
(gate_ctx, rlc_ctx): (&mut Context<F>, &mut Context<F>),
range_chip: &RangeChip<F>,
rlc_chip: &RlcChip<F>,
inputs: &[(Self::InputWitness, Self::OutputWitness)],
) -> Vec<AssignedValue<F>> { ... }
}Expand description
Specify the logical types of a component type.
Required Associated Types§
type InputValue: FixLenLogical<F>
type InputWitness: FixLenLogical<AssignedValue<F>>
type OutputValue: FixLenLogical<F>
type OutputWitness: FixLenLogical<AssignedValue<F>>
type LogicalInput: LogicalInputValue<F>
Provided Associated Types§
type Commiter: ComponentCommiter<F> = BasicComponentCommiter<F>
Required Methods§
Sourcefn get_type_id() -> ComponentTypeId
fn get_type_id() -> ComponentTypeId
Get ComponentTypeId of this component type.
Sourcefn logical_result_to_virtual_rows_impl(
ins: &LogicalResult<F, Self>,
) -> Vec<(Self::InputValue, Self::OutputValue)>
fn logical_result_to_virtual_rows_impl( ins: &LogicalResult<F, Self>, ) -> Vec<(Self::InputValue, Self::OutputValue)>
Convert a logical result to 1 or multiple virtual rows.
Sourcefn logical_input_to_virtual_rows_impl(
li: &Self::LogicalInput,
) -> Vec<Self::InputValue>
fn logical_input_to_virtual_rows_impl( li: &Self::LogicalInput, ) -> Vec<Self::InputValue>
Real implementation to convert a logical input to virtual rows.
Provided Methods§
Sourcefn get_type_name() -> &'static str
fn get_type_name() -> &'static str
Get ComponentTypeName for logging/debugging.
Sourcefn logical_result_to_virtual_rows(
ins: &LogicalResult<F, Self>,
) -> Vec<(Self::InputValue, Self::OutputValue)>
fn logical_result_to_virtual_rows( ins: &LogicalResult<F, Self>, ) -> Vec<(Self::InputValue, Self::OutputValue)>
Wrap logical_result_to_virtual_rows_impl with sanity check.
Sourcefn logical_input_to_virtual_rows(
li: &Self::LogicalInput,
) -> Vec<Self::InputValue>
fn logical_input_to_virtual_rows( li: &Self::LogicalInput, ) -> Vec<Self::InputValue>
Wrap logical_input_to_virtual_rows_impl with sanity check. TODO: we are not using this.
Sourcefn rlc_virtual_rows(
(gate_ctx, rlc_ctx): (&mut Context<F>, &mut Context<F>),
range_chip: &RangeChip<F>,
rlc_chip: &RlcChip<F>,
inputs: &[(Self::InputWitness, Self::OutputWitness)],
) -> Vec<AssignedValue<F>>
fn rlc_virtual_rows( (gate_ctx, rlc_ctx): (&mut Context<F>, &mut Context<F>), range_chip: &RangeChip<F>, rlc_chip: &RlcChip<F>, inputs: &[(Self::InputWitness, Self::OutputWitness)], ) -> Vec<AssignedValue<F>>
RLC virtual rows. A logical input might take multiple virtual rows. The default implementation is for the fixed length case.
Dyn Compatibility§
This trait is not dyn compatible.
In older versions of Rust, dyn compatibility was called "object safety".