ax_hal/
lib.rs

1//! [ArceOS] hardware abstraction layer, provides unified APIs for
2//! platform-specific operations.
3//!
4//! It does the bootstrapping and initialization process for the specified
5//! platform, and provides useful operations on the hardware.
6//!
7//! Currently supported platforms (specify by cargo features):
8//!
9//! - `x86-pc`: Standard PC with x86_64 ISA.
10//! - `riscv64-qemu-virt`: QEMU virt machine with RISC-V ISA.
11//! - `aarch64-qemu-virt`: QEMU virt machine with AArch64 ISA.
12//! - `aarch64-raspi`: Raspberry Pi with AArch64 ISA.
13//! - `dummy`: If none of the above platform is selected, the dummy platform
14//!   will be used. In this platform, most of the operations are no-op or
15//!   `unimplemented!()`. This platform is mainly used for [cargo test].
16//!
17//! # Cargo Features
18//!
19//! - `smp`: Enable SMP (symmetric multiprocessing) support.
20//! - `fp-simd`: Enable floating-point and SIMD support.
21//! - `paging`: Enable page table manipulation.
22//! - `irq`: Enable interrupt handling support.
23//! - `tls`: Enable kernel space thread-local storage support.
24//! - `rtc`: Enable real-time clock support.
25//! - `uspace`: Enable user space support.
26//!
27//! [ArceOS]: https://github.com/arceos-org/arceos
28//! [cargo test]: https://doc.rust-lang.org/cargo/guide/tests.html
29
30#![no_std]
31
32#[allow(unused_imports)]
33#[macro_use]
34extern crate log;
35
36#[allow(unused_imports)]
37#[macro_use]
38extern crate ax_memory_addr;
39
40cfg_if::cfg_if! {
41    if #[cfg(feature = "myplat")] {
42        // link the custom platform crate in your application.
43    }
44    else if #[cfg(plat_dyn)] {
45        extern crate axplat_dyn;
46    }
47    else if #[cfg(all(target_os = "none", feature = "defplat"))] {
48        #[cfg(target_arch = "x86_64")]
49        extern crate ax_plat_x86_pc;
50        #[cfg(target_arch = "aarch64")]
51        extern crate ax_plat_aarch64_qemu_virt;
52        #[cfg(target_arch = "riscv64")]
53        extern crate ax_plat_riscv64_qemu_virt;
54        #[cfg(target_arch = "loongarch64")]
55        extern crate ax_plat_loongarch64_qemu_virt;
56    } else {
57        // Link the dummy platform implementation to pass cargo test.
58        mod dummy;
59    }
60}
61
62pub mod dtb;
63pub mod mem;
64pub mod percpu;
65pub mod time;
66
67#[cfg(feature = "tls")]
68pub mod tls;
69
70#[cfg(feature = "irq")]
71pub mod irq;
72
73#[cfg(feature = "paging")]
74pub mod paging;
75
76/// Console input and output.
77pub mod console {
78    #[cfg(feature = "irq")]
79    pub use ax_plat::console::irq_num;
80    pub use ax_plat::console::{read_bytes, write_bytes};
81}
82
83/// CPU power management.
84pub mod power {
85    #[cfg(feature = "smp")]
86    pub use ax_plat::power::cpu_boot;
87    pub use ax_plat::power::system_off;
88}
89
90/// Trap handling.
91pub mod trap {
92    #[cfg(target_arch = "x86_64")]
93    pub use ax_cpu::trap::debug_handler;
94    pub use ax_cpu::trap::{
95        PageFaultFlags, breakpoint_handler, dispatch_irq, dispatch_page_fault, irq_handler,
96        page_fault_handler, set_irq_handler, set_page_fault_handler,
97    };
98}
99
100/// CPU register states for context switching.
101///
102/// There are two types of context:
103///
104/// - [`TaskContext`][ax_cpu::TaskContext]: The context of a task.
105/// - [`TrapFrame`][ax_cpu::TrapFrame]: The context of an interrupt or an exception.
106pub mod context {
107    pub use ax_cpu::{TaskContext, TrapFrame};
108}
109
110pub use ax_cpu::asm;
111#[cfg(feature = "uspace")]
112pub use ax_cpu::uspace;
113pub use ax_plat::init::init_later;
114#[cfg(feature = "smp")]
115pub use ax_plat::init::{init_early_secondary, init_later_secondary};
116
117/// Initializes the platform and boot argument.
118/// This function should be called as early as possible.
119pub fn init_early(cpu_id: usize, arg: usize) {
120    dtb::init(arg);
121    ax_plat::init::init_early(cpu_id, arg);
122}
123
124/// Gets the number of CPUs running in the system.
125///
126/// When SMP is disabled, this function always returns 1.
127///
128/// When SMP is enabled, it's the smaller one between the platform-declared CPU
129/// number [`ax_plat::power::cpu_num`] and the configured maximum CPU number
130/// `ax_config::plat::MAX_CPU_NUM`.
131///
132/// This value is determined during the BSP initialization phase.
133pub fn cpu_num() -> usize {
134    #[cfg(feature = "smp")]
135    {
136        use spin::Lazy;
137
138        /// The number of CPUs in the system. Based on the number declared by the
139        /// platform crate and limited by the configured maximum CPU number.
140        static CPU_NUM: Lazy<usize> = Lazy::new(|| {
141            let max_cpu_num = ax_config::plat::MAX_CPU_NUM;
142            let plat_cpu_num = ax_plat::power::cpu_num();
143            let cpu_num = plat_cpu_num.min(max_cpu_num);
144
145            info!("CPU number: max = {max_cpu_num}, platform = {plat_cpu_num}, use = {cpu_num}");
146
147            if plat_cpu_num > max_cpu_num {
148                warn!(
149                    "platform declares more CPUs ({plat_cpu_num}) than configured max \
150                     ({max_cpu_num}), only the first {max_cpu_num} CPUs will be used."
151                );
152            }
153
154            cpu_num
155        });
156
157        *CPU_NUM
158    }
159    #[cfg(not(feature = "smp"))]
160    {
161        1
162    }
163}
164
165#[allow(unused_macros)]
166macro_rules! addr_of_sym {
167    ($e:ident) => {
168        $e as *const () as usize
169    };
170}
171pub(crate) use addr_of_sym;
ax_hal/lib.rs

ax_hal/
lib.rs
