Struct avr_device::atmega2560::adc::admux::MUX_W

pub struct MUX_W<'a> { /* fields omitted */ }

Field MUX writer - Analog Channel and Gain Selection Bits

Implementations

impl<'a> MUX_W<'a>

pub fn variant(self, variant: MUX_A) -> &'a mut W

Writes variant to the field

pub fn adc0(self) -> &'a mut W

ADC Single Ended Input pin 0

pub fn adc1(self) -> &'a mut W

ADC Single Ended Input pin 1

pub fn adc2(self) -> &'a mut W

ADC Single Ended Input pin 2

pub fn adc3(self) -> &'a mut W

ADC Single Ended Input pin 3

pub fn adc4(self) -> &'a mut W

ADC Single Ended Input pin 4

pub fn adc5(self) -> &'a mut W

ADC Single Ended Input pin 5

pub fn adc6(self) -> &'a mut W

ADC Single Ended Input pin 6

pub fn adc7(self) -> &'a mut W

ADC Single Ended Input pin 7

pub fn adc0_adc0_10x(self) -> &'a mut W

ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain

pub fn adc1_adc0_10x(self) -> &'a mut W

ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain

pub fn adc0_adc0_200x(self) -> &'a mut W

ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain

pub fn adc1_adc0_200x(self) -> &'a mut W

ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain

pub fn adc2_adc2_10x(self) -> &'a mut W

ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain

pub fn adc3_adc2_10x(self) -> &'a mut W

ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain

pub fn adc2_adc2_200x(self) -> &'a mut W

ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain

pub fn adc3_adc2_200x(self) -> &'a mut W

ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain

pub fn adc0_adc1_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain

pub fn adc1_adc1_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain

pub fn adc2_adc1_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain

pub fn adc3_adc1_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain

pub fn adc4_adc1_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain

pub fn adc5_adc1_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain

pub fn adc6_adc1_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain

pub fn adc7_adc1_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain

pub fn adc0_adc2_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain

pub fn adc1_adc2_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain

pub fn adc2_adc2_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain

pub fn adc3_adc2_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain

pub fn adc4_adc2_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain

pub fn adc5_adc2_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain

pub fn adc_vbg(self) -> &'a mut W

Internal Reference (VBG)

pub fn adc_gnd(self) -> &'a mut W

0V (GND)

pub fn adc8(self) -> &'a mut W

ADC Single Ended Input pin 8

pub fn adc9(self) -> &'a mut W

ADC Single Ended Input pin 9

pub fn adc10(self) -> &'a mut W

ADC Single Ended Input pin 10

pub fn adc11(self) -> &'a mut W

ADC Single Ended Input pin 11

pub fn adc12(self) -> &'a mut W

ADC Single Ended Input pin 12

pub fn adc13(self) -> &'a mut W

ADC Single Ended Input pin 13

pub fn adc14(self) -> &'a mut W

ADC Single Ended Input pin 14

pub fn adc15(self) -> &'a mut W

ADC Single Ended Input pin 15

pub fn adc8_adc8_10x(self) -> &'a mut W

ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain

pub fn adc9_adc8_10x(self) -> &'a mut W

ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain

pub fn adc8_adc8_200x(self) -> &'a mut W

ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain

pub fn adc9_adc8_200x(self) -> &'a mut W

ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain

pub fn adc10_adc10_10x(self) -> &'a mut W

ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain

pub fn adc11_adc10_10x(self) -> &'a mut W

ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain

pub fn adc10_adc10_200x(self) -> &'a mut W

ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain

pub fn adc11_adc10_200x(self) -> &'a mut W

ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain

pub fn adc8_adc9_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain

pub fn adc9_adc9_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain

pub fn adc10_adc9_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain

pub fn adc11_adc9_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain

pub fn adc12_adc9_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain

pub fn adc13_adc9_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain

pub fn adc14_adc9_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain

pub fn adc15_adc9_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain

pub fn adc8_adc10_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain

pub fn adc9_adc10_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain

pub fn adc10_adc10_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain

pub fn adc11_adc10_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain

pub fn adc12_adc10_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain

pub fn adc13_adc10_1x(self) -> &'a mut W

ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain

pub unsafe fn bits(self, value: u8) -> &'a mut W

Writes raw bits to the field