Struct avr_device::generic::W

pub struct W<U, REG> { /* fields omitted */ }

Register writer.

Used as an argument to the closures in the write and modify methods of the register.

Implementations

impl<U, REG> W<U, REG>

pub unsafe fn bits(&mut self, bits: U) -> &mut Self

Writes raw bits to the register.

impl W<u8, Reg<u8, _ACSR>>

pub fn acis(&mut self) -> ACIS_W

Bits 0:1 - Analog Comparator Interrupt Mode Select

pub fn acic(&mut self) -> ACIC_W

Bit 2 - Analog Comparator Input Capture Enable

pub fn acie(&mut self) -> ACIE_W

Bit 3 - Analog Comparator Interrupt Enable

pub fn aci(&mut self) -> ACI_W

Bit 4 - Analog Comparator Interrupt Flag

pub fn acbg(&mut self) -> ACBG_W

Bit 6 - Analog Comparator Bandgap Select

pub fn acd(&mut self) -> ACD_W

Bit 7 - Analog Comparator Disable

impl W<u8, Reg<u8, _ADCSRB>>

pub fn acme(&mut self) -> ACME_W

Bit 6 - Analog Comparator Multiplexer Enable

impl W<u8, Reg<u8, _DIDR1>>

pub fn ain0d(&mut self) -> AIN0D_W

Bit 0 - AIN0 Digital Input Disable

pub fn ain1d(&mut self) -> AIN1D_W

Bit 1 - AIN1 Digital Input Disable

impl W<u8, Reg<u8, _ADCSRA>>

pub fn adps(&mut self) -> ADPS_W

Bits 0:2 - ADC Prescaler Select Bits

pub fn adie(&mut self) -> ADIE_W

Bit 3 - ADC Interrupt Enable

pub fn adif(&mut self) -> ADIF_W

Bit 4 - ADC Interrupt Flag

pub fn adate(&mut self) -> ADATE_W

Bit 5 - ADC Auto Trigger Enable

pub fn adsc(&mut self) -> ADSC_W

Bit 6 - ADC Start Conversion

pub fn aden(&mut self) -> ADEN_W

Bit 7 - ADC Enable

impl W<u8, Reg<u8, _ADCSRB>>

pub fn adts(&mut self) -> ADTS_W

Bits 0:2 - ADC Auto Trigger Source bits

pub fn mux5(&mut self) -> MUX5_W

Bit 3 - Analog Channel and Gain Selection Bits

pub fn acme(&mut self) -> ACME_W

Bit 6 -

impl W<u8, Reg<u8, _ADMUX>>

pub fn mux(&mut self) -> MUX_W

Bits 0:4 - Analog Channel and Gain Selection Bits

pub fn adlar(&mut self) -> ADLAR_W

Bit 5 - Left Adjust Result

pub fn refs(&mut self) -> REFS_W

Bits 6:7 - Reference Selection Bits

impl W<u8, Reg<u8, _DIDR0>>

pub fn adc0d(&mut self) -> ADC0D_W

Bit 0 -

pub fn adc1d(&mut self) -> ADC1D_W

Bit 1 -

pub fn adc2d(&mut self) -> ADC2D_W

Bit 2 -

pub fn adc3d(&mut self) -> ADC3D_W

Bit 3 -

pub fn adc4d(&mut self) -> ADC4D_W

Bit 4 -

pub fn adc5d(&mut self) -> ADC5D_W

Bit 5 -

pub fn adc6d(&mut self) -> ADC6D_W

Bit 6 -

pub fn adc7d(&mut self) -> ADC7D_W

Bit 7 -

impl W<u8, Reg<u8, _DIDR2>>

pub fn adc8d(&mut self) -> ADC8D_W

Bit 0 -

pub fn adc9d(&mut self) -> ADC9D_W

Bit 1 -

pub fn adc10d(&mut self) -> ADC10D_W

Bit 2 -

pub fn adc11d(&mut self) -> ADC11D_W

Bit 3 -

pub fn adc12d(&mut self) -> ADC12D_W

Bit 4 -

pub fn adc13d(&mut self) -> ADC13D_W

Bit 5 -

pub fn adc14d(&mut self) -> ADC14D_W

Bit 6 -

pub fn adc15d(&mut self) -> ADC15D_W

Bit 7 -

impl W<u8, Reg<u8, _SPMCSR>>

pub fn spmen(&mut self) -> SPMEN_W

Bit 0 - Store Program Memory Enable

pub fn pgers(&mut self) -> PGERS_W

Bit 1 - Page Erase

pub fn pgwrt(&mut self) -> PGWRT_W

Bit 2 - Page Write

pub fn blbset(&mut self) -> BLBSET_W

Bit 3 - Boot Lock Bit Set

pub fn rwwsre(&mut self) -> RWWSRE_W

Bit 4 - Read While Write section read enable

pub fn sigrd(&mut self) -> SIGRD_W

Bit 5 - Signature Row Read

pub fn rwwsb(&mut self) -> RWWSB_W

Bit 6 - Read While Write Section Busy

pub fn spmie(&mut self) -> SPMIE_W

Bit 7 - SPM Interrupt Enable

impl W<u8, Reg<u8, _CLKPR>>

pub fn clkps(&mut self) -> CLKPS_W

Bits 0:3 -

pub fn clkpce(&mut self) -> CLKPCE_W

Bit 7 -

impl W<u8, Reg<u8, _GPIOR0>>

pub fn gpior00(&mut self) -> GPIOR00_W

Bit 0 - General Purpose IO Register 0 bit 0

pub fn gpior01(&mut self) -> GPIOR01_W

Bit 1 - General Purpose IO Register 0 bit 1

pub fn gpior02(&mut self) -> GPIOR02_W

Bit 2 - General Purpose IO Register 0 bit 2

pub fn gpior03(&mut self) -> GPIOR03_W

Bit 3 - General Purpose IO Register 0 bit 3

pub fn gpior04(&mut self) -> GPIOR04_W

Bit 4 - General Purpose IO Register 0 bit 4

pub fn gpior05(&mut self) -> GPIOR05_W

Bit 5 - General Purpose IO Register 0 bit 5

pub fn gpior06(&mut self) -> GPIOR06_W

Bit 6 - General Purpose IO Register 0 bit 6

pub fn gpior07(&mut self) -> GPIOR07_W

Bit 7 - General Purpose IO Register 0 bit 7

impl W<u8, Reg<u8, _GPIOR1>>

pub fn gpior(&mut self) -> GPIOR_W

Bits 0:7 - General Purpose IO Register 1 bis

impl W<u8, Reg<u8, _GPIOR2>>

pub fn gpior(&mut self) -> GPIOR_W

Bits 0:7 - General Purpose IO Register 2 bis

impl W<u8, Reg<u8, _MCUCR>>

pub fn ivce(&mut self) -> IVCE_W

Bit 0 - Interrupt Vector Change Enable

pub fn ivsel(&mut self) -> IVSEL_W

Bit 1 - Interrupt Vector Select

pub fn pud(&mut self) -> PUD_W

Bit 4 - Pull-up disable

pub fn jtd(&mut self) -> JTD_W

Bit 7 - JTAG Interface Disable

impl W<u8, Reg<u8, _OSCCAL>>

pub fn osccal(&mut self) -> OSCCAL_W

Bits 0:7 - Oscillator Calibration

impl W<u8, Reg<u8, _PRR0>>

pub fn pradc(&mut self) -> PRADC_W

Bit 0 - Power Reduction ADC

pub fn prusart0(&mut self) -> PRUSART0_W

Bit 1 - Power Reduction USART0

pub fn prspi(&mut self) -> PRSPI_W

Bit 2 - Power Reduction Serial Peripheral Interface

pub fn prtim1(&mut self) -> PRTIM1_W

Bit 3 - Power Reduction Timer/Counter1

pub fn prtim0(&mut self) -> PRTIM0_W

Bit 5 - Power Reduction Timer/Counter0

pub fn prtim2(&mut self) -> PRTIM2_W

Bit 6 - Power Reduction Timer/Counter2

pub fn prtwi(&mut self) -> PRTWI_W

Bit 7 - Power Reduction TWI

impl W<u8, Reg<u8, _PRR1>>

pub fn prusart1(&mut self) -> PRUSART1_W

Bit 0 - Power Reduction USART1

pub fn prusart2(&mut self) -> PRUSART2_W

Bit 1 - Power Reduction USART2

pub fn prusart3(&mut self) -> PRUSART3_W

Bit 2 - Power Reduction USART3

pub fn prtim3(&mut self) -> PRTIM3_W

Bit 3 - Power Reduction Timer/Counter3

pub fn prtim4(&mut self) -> PRTIM4_W

Bit 4 - Power Reduction Timer/Counter4

pub fn prtim5(&mut self) -> PRTIM5_W

Bit 5 - Power Reduction Timer/Counter5

impl W<u8, Reg<u8, _SMCR>>

pub fn se(&mut self) -> SE_W

Bit 0 - Sleep Enable

pub fn sm(&mut self) -> SM_W

Bits 1:3 - Sleep Mode Select bits

impl W<u8, Reg<u8, _XMCRA>>

pub fn srw0(&mut self) -> SRW0_W

Bits 0:1 - Wait state select bit lower page

pub fn srw1(&mut self) -> SRW1_W

Bits 2:3 - Wait state select bit upper page

pub fn srl(&mut self) -> SRL_W

Bits 4:6 - Wait state page limit

pub fn sre(&mut self) -> SRE_W

Bit 7 - External SRAM Enable

impl W<u8, Reg<u8, _XMCRB>>

pub fn xmm(&mut self) -> XMM_W

Bits 0:2 - External Memory High Mask

pub fn xmbk(&mut self) -> XMBK_W

Bit 7 - External Memory Bus Keeper Enable

impl W<u8, Reg<u8, _EECR>>

pub fn eere(&mut self) -> EERE_W

Bit 0 - EEPROM Read Enable

pub fn eepe(&mut self) -> EEPE_W

Bit 1 - EEPROM Write Enable

pub fn eempe(&mut self) -> EEMPE_W

Bit 2 - EEPROM Master Write Enable

pub fn eerie(&mut self) -> EERIE_W

Bit 3 - EEPROM Ready Interrupt Enable

pub fn eepm(&mut self) -> EEPM_W

Bits 4:5 - EEPROM Programming Mode Bits

impl W<u8, Reg<u8, _EICRA>>

pub fn isc0(&mut self) -> ISC0_W

Bits 0:1 - External Interrupt Sense Control Bit

pub fn isc1(&mut self) -> ISC1_W

Bits 2:3 - External Interrupt Sense Control Bit

pub fn isc2(&mut self) -> ISC2_W

Bits 4:5 - External Interrupt Sense Control Bit

pub fn isc3(&mut self) -> ISC3_W

Bits 6:7 - External Interrupt Sense Control Bit

impl W<u8, Reg<u8, _EICRB>>

pub fn isc4(&mut self) -> ISC4_W

Bits 0:1 - External Interrupt 7-4 Sense Control Bit

pub fn isc5(&mut self) -> ISC5_W

Bits 2:3 - External Interrupt 7-4 Sense Control Bit

pub fn isc6(&mut self) -> ISC6_W

Bits 4:5 - External Interrupt 7-4 Sense Control Bit

pub fn isc7(&mut self) -> ISC7_W

Bits 6:7 - External Interrupt 7-4 Sense Control Bit

impl W<u8, Reg<u8, _EIMSK>>

pub fn int(&mut self) -> INT_W

Bits 0:7 - External Interrupt Request 7 Enable

impl W<u8, Reg<u8, _PCICR>>

pub fn pcie(&mut self) -> PCIE_W

Bits 0:2 - Pin Change Interrupt Enables

impl W<u8, Reg<u8, _PCMSK0>>

pub fn pcint(&mut self) -> PCINT_W

Bits 0:7 - Pin Change Enable bits

impl W<u8, Reg<u8, _PCMSK1>>

pub fn pcint(&mut self) -> PCINT_W

Bits 0:7 - Pin Change Enable bits

impl W<u8, Reg<u8, _PCMSK2>>

pub fn pcint(&mut self) -> PCINT_W

Bits 0:7 - Pin Change Enable bits

impl W<u8, Reg<u8, _EXTENDED>>

pub fn bodlevel(&mut self) -> BODLEVEL_W

Bits 0:2 - Brown-out Detector trigger level

impl W<u8, Reg<u8, _HIGH>>

pub fn bootrst(&mut self) -> BOOTRST_W

Bit 0 - Boot Reset vector Enabled

pub fn bootsz(&mut self) -> BOOTSZ_W

Bits 1:2 - Select Boot Size

pub fn eesave(&mut self) -> EESAVE_W

Bit 3 - Preserve EEPROM through the Chip Erase cycle

pub fn wdton(&mut self) -> WDTON_W

Bit 4 - Watchdog timer always on

pub fn spien(&mut self) -> SPIEN_W

Bit 5 - Serial program downloading (SPI) enabled

pub fn jtagen(&mut self) -> JTAGEN_W

Bit 6 - JTAG Interface Enabled

pub fn ocden(&mut self) -> OCDEN_W

Bit 7 - On-Chip Debug Enabled

impl W<u8, Reg<u8, _LOW>>

pub fn sut_cksel(&mut self) -> SUT_CKSEL_W

Bits 0:5 - Select Clock Source

pub fn ckout(&mut self) -> CKOUT_W

Bit 6 - Clock output on PORTE7

pub fn ckdiv8(&mut self) -> CKDIV8_W

Bit 7 - Divide clock by 8 internally

impl W<u8, Reg<u8, _MCUCR>>

pub fn jtd(&mut self) -> JTD_W

Bit 7 - JTAG Interface Disable

impl W<u8, Reg<u8, _LOCKBIT>>

pub fn lb(&mut self) -> LB_W

Bits 0:1 - Memory Lock

pub fn blb0(&mut self) -> BLB0_W

Bits 2:3 - Boot Loader Protection Mode

pub fn blb1(&mut self) -> BLB1_W

Bits 4:5 - Boot Loader Protection Mode

impl W<u8, Reg<u8, _DDRA>>

pub fn pa0(&mut self) -> PA0_W

Bit 0 - Pin A0

pub fn pa1(&mut self) -> PA1_W

Bit 1 - Pin A1

pub fn pa2(&mut self) -> PA2_W

Bit 2 - Pin A2

pub fn pa3(&mut self) -> PA3_W

Bit 3 - Pin A3

pub fn pa4(&mut self) -> PA4_W

Bit 4 - Pin A4

pub fn pa5(&mut self) -> PA5_W

Bit 5 - Pin A5

pub fn pa6(&mut self) -> PA6_W

Bit 6 - Pin A6

pub fn pa7(&mut self) -> PA7_W

Bit 7 - Pin A7

impl W<u8, Reg<u8, _PORTA>>

pub fn pa0(&mut self) -> PA0_W

Bit 0 - Pin A0

pub fn pa1(&mut self) -> PA1_W

Bit 1 - Pin A1

pub fn pa2(&mut self) -> PA2_W

Bit 2 - Pin A2

pub fn pa3(&mut self) -> PA3_W

Bit 3 - Pin A3

pub fn pa4(&mut self) -> PA4_W

Bit 4 - Pin A4

pub fn pa5(&mut self) -> PA5_W

Bit 5 - Pin A5

pub fn pa6(&mut self) -> PA6_W

Bit 6 - Pin A6

pub fn pa7(&mut self) -> PA7_W

Bit 7 - Pin A7

impl W<u8, Reg<u8, _DDRB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

pub fn pb6(&mut self) -> PB6_W

Bit 6 - Pin B6

pub fn pb7(&mut self) -> PB7_W

Bit 7 - Pin B7

impl W<u8, Reg<u8, _PORTB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

pub fn pb6(&mut self) -> PB6_W

Bit 6 - Pin B6

pub fn pb7(&mut self) -> PB7_W

Bit 7 - Pin B7

impl W<u8, Reg<u8, _DDRC>>

pub fn pc0(&mut self) -> PC0_W

Bit 0 - Pin C0

pub fn pc1(&mut self) -> PC1_W

Bit 1 - Pin C1

pub fn pc2(&mut self) -> PC2_W

Bit 2 - Pin C2

pub fn pc3(&mut self) -> PC3_W

Bit 3 - Pin C3

pub fn pc4(&mut self) -> PC4_W

Bit 4 - Pin C4

pub fn pc5(&mut self) -> PC5_W

Bit 5 - Pin C5

pub fn pc6(&mut self) -> PC6_W

Bit 6 - Pin C6

pub fn pc7(&mut self) -> PC7_W

Bit 7 - Pin C7

impl W<u8, Reg<u8, _PORTC>>

pub fn pc0(&mut self) -> PC0_W

Bit 0 - Pin C0

pub fn pc1(&mut self) -> PC1_W

Bit 1 - Pin C1

pub fn pc2(&mut self) -> PC2_W

Bit 2 - Pin C2

pub fn pc3(&mut self) -> PC3_W

Bit 3 - Pin C3

pub fn pc4(&mut self) -> PC4_W

Bit 4 - Pin C4

pub fn pc5(&mut self) -> PC5_W

Bit 5 - Pin C5

pub fn pc6(&mut self) -> PC6_W

Bit 6 - Pin C6

pub fn pc7(&mut self) -> PC7_W

Bit 7 - Pin C7

impl W<u8, Reg<u8, _DDRD>>

pub fn pd0(&mut self) -> PD0_W

Bit 0 - Pin D0

pub fn pd1(&mut self) -> PD1_W

Bit 1 - Pin D1

pub fn pd2(&mut self) -> PD2_W

Bit 2 - Pin D2

pub fn pd3(&mut self) -> PD3_W

Bit 3 - Pin D3

pub fn pd4(&mut self) -> PD4_W

Bit 4 - Pin D4

pub fn pd5(&mut self) -> PD5_W

Bit 5 - Pin D5

pub fn pd6(&mut self) -> PD6_W

Bit 6 - Pin D6

pub fn pd7(&mut self) -> PD7_W

Bit 7 - Pin D7

impl W<u8, Reg<u8, _PORTD>>

pub fn pd0(&mut self) -> PD0_W

Bit 0 - Pin D0

pub fn pd1(&mut self) -> PD1_W

Bit 1 - Pin D1

pub fn pd2(&mut self) -> PD2_W

Bit 2 - Pin D2

pub fn pd3(&mut self) -> PD3_W

Bit 3 - Pin D3

pub fn pd4(&mut self) -> PD4_W

Bit 4 - Pin D4

pub fn pd5(&mut self) -> PD5_W

Bit 5 - Pin D5

pub fn pd6(&mut self) -> PD6_W

Bit 6 - Pin D6

pub fn pd7(&mut self) -> PD7_W

Bit 7 - Pin D7

impl W<u8, Reg<u8, _DDRE>>

pub fn pe0(&mut self) -> PE0_W

Bit 0 - Pin E0

pub fn pe1(&mut self) -> PE1_W

Bit 1 - Pin E1

pub fn pe2(&mut self) -> PE2_W

Bit 2 - Pin E2

pub fn pe3(&mut self) -> PE3_W

Bit 3 - Pin E3

pub fn pe4(&mut self) -> PE4_W

Bit 4 - Pin E4

pub fn pe5(&mut self) -> PE5_W

Bit 5 - Pin E5

pub fn pe6(&mut self) -> PE6_W

Bit 6 - Pin E6

pub fn pe7(&mut self) -> PE7_W

Bit 7 - Pin E7

impl W<u8, Reg<u8, _PORTE>>

pub fn pe0(&mut self) -> PE0_W

Bit 0 - Pin E0

pub fn pe1(&mut self) -> PE1_W

Bit 1 - Pin E1

pub fn pe2(&mut self) -> PE2_W

Bit 2 - Pin E2

pub fn pe3(&mut self) -> PE3_W

Bit 3 - Pin E3

pub fn pe4(&mut self) -> PE4_W

Bit 4 - Pin E4

pub fn pe5(&mut self) -> PE5_W

Bit 5 - Pin E5

pub fn pe6(&mut self) -> PE6_W

Bit 6 - Pin E6

pub fn pe7(&mut self) -> PE7_W

Bit 7 - Pin E7

impl W<u8, Reg<u8, _DDRF>>

pub fn pf0(&mut self) -> PF0_W

Bit 0 - Pin F0

pub fn pf1(&mut self) -> PF1_W

Bit 1 - Pin F1

pub fn pf2(&mut self) -> PF2_W

Bit 2 - Pin F2

pub fn pf3(&mut self) -> PF3_W

Bit 3 - Pin F3

pub fn pf4(&mut self) -> PF4_W

Bit 4 - Pin F4

pub fn pf5(&mut self) -> PF5_W

Bit 5 - Pin F5

pub fn pf6(&mut self) -> PF6_W

Bit 6 - Pin F6

pub fn pf7(&mut self) -> PF7_W

Bit 7 - Pin F7

impl W<u8, Reg<u8, _PORTF>>

pub fn pf0(&mut self) -> PF0_W

Bit 0 - Pin F0

pub fn pf1(&mut self) -> PF1_W

Bit 1 - Pin F1

pub fn pf2(&mut self) -> PF2_W

Bit 2 - Pin F2

pub fn pf3(&mut self) -> PF3_W

Bit 3 - Pin F3

pub fn pf4(&mut self) -> PF4_W

Bit 4 - Pin F4

pub fn pf5(&mut self) -> PF5_W

Bit 5 - Pin F5

pub fn pf6(&mut self) -> PF6_W

Bit 6 - Pin F6

pub fn pf7(&mut self) -> PF7_W

Bit 7 - Pin F7

impl W<u8, Reg<u8, _DDRG>>

pub fn pg0(&mut self) -> PG0_W

Bit 0 - Pin G0

pub fn pg1(&mut self) -> PG1_W

Bit 1 - Pin G1

pub fn pg2(&mut self) -> PG2_W

Bit 2 - Pin G2

pub fn pg3(&mut self) -> PG3_W

Bit 3 - Pin G3

pub fn pg4(&mut self) -> PG4_W

Bit 4 - Pin G4

pub fn pg5(&mut self) -> PG5_W

Bit 5 - Pin G5

pub fn pg6(&mut self) -> PG6_W

Bit 6 - Pin G6

pub fn pg7(&mut self) -> PG7_W

Bit 7 - Pin G7

impl W<u8, Reg<u8, _PING>>

pub fn pg0(&mut self) -> PG0_W

Bit 0 - Pin G0

pub fn pg1(&mut self) -> PG1_W

Bit 1 - Pin G1

pub fn pg2(&mut self) -> PG2_W

Bit 2 - Pin G2

pub fn pg3(&mut self) -> PG3_W

Bit 3 - Pin G3

pub fn pg4(&mut self) -> PG4_W

Bit 4 - Pin G4

pub fn pg5(&mut self) -> PG5_W

Bit 5 - Pin G5

pub fn pg6(&mut self) -> PG6_W

Bit 6 - Pin G6

pub fn pg7(&mut self) -> PG7_W

Bit 7 - Pin G7

impl W<u8, Reg<u8, _PORTG>>

pub fn pg0(&mut self) -> PG0_W

Bit 0 - Pin G0

pub fn pg1(&mut self) -> PG1_W

Bit 1 - Pin G1

pub fn pg2(&mut self) -> PG2_W

Bit 2 - Pin G2

pub fn pg3(&mut self) -> PG3_W

Bit 3 - Pin G3

pub fn pg4(&mut self) -> PG4_W

Bit 4 - Pin G4

pub fn pg5(&mut self) -> PG5_W

Bit 5 - Pin G5

pub fn pg6(&mut self) -> PG6_W

Bit 6 - Pin G6

pub fn pg7(&mut self) -> PG7_W

Bit 7 - Pin G7

impl W<u8, Reg<u8, _DDRH>>

pub fn ph0(&mut self) -> PH0_W

Bit 0 - Pin H0

pub fn ph1(&mut self) -> PH1_W

Bit 1 - Pin H1

pub fn ph2(&mut self) -> PH2_W

Bit 2 - Pin H2

pub fn ph3(&mut self) -> PH3_W

Bit 3 - Pin H3

pub fn ph4(&mut self) -> PH4_W

Bit 4 - Pin H4

pub fn ph5(&mut self) -> PH5_W

Bit 5 - Pin H5

pub fn ph6(&mut self) -> PH6_W

Bit 6 - Pin H6

pub fn ph7(&mut self) -> PH7_W

Bit 7 - Pin H7

impl W<u8, Reg<u8, _PINH>>

pub fn ph0(&mut self) -> PH0_W

Bit 0 - Pin H0

pub fn ph1(&mut self) -> PH1_W

Bit 1 - Pin H1

pub fn ph2(&mut self) -> PH2_W

Bit 2 - Pin H2

pub fn ph3(&mut self) -> PH3_W

Bit 3 - Pin H3

pub fn ph4(&mut self) -> PH4_W

Bit 4 - Pin H4

pub fn ph5(&mut self) -> PH5_W

Bit 5 - Pin H5

pub fn ph6(&mut self) -> PH6_W

Bit 6 - Pin H6

pub fn ph7(&mut self) -> PH7_W

Bit 7 - Pin H7

impl W<u8, Reg<u8, _PORTH>>

pub fn ph0(&mut self) -> PH0_W

Bit 0 - Pin H0

pub fn ph1(&mut self) -> PH1_W

Bit 1 - Pin H1

pub fn ph2(&mut self) -> PH2_W

Bit 2 - Pin H2

pub fn ph3(&mut self) -> PH3_W

Bit 3 - Pin H3

pub fn ph4(&mut self) -> PH4_W

Bit 4 - Pin H4

pub fn ph5(&mut self) -> PH5_W

Bit 5 - Pin H5

pub fn ph6(&mut self) -> PH6_W

Bit 6 - Pin H6

pub fn ph7(&mut self) -> PH7_W

Bit 7 - Pin H7

impl W<u8, Reg<u8, _DDRJ>>

pub fn pj0(&mut self) -> PJ0_W

Bit 0 - Pin J0

pub fn pj1(&mut self) -> PJ1_W

Bit 1 - Pin J1

pub fn pj2(&mut self) -> PJ2_W

Bit 2 - Pin J2

pub fn pj3(&mut self) -> PJ3_W

Bit 3 - Pin J3

pub fn pj4(&mut self) -> PJ4_W

Bit 4 - Pin J4

pub fn pj5(&mut self) -> PJ5_W

Bit 5 - Pin J5

pub fn pj6(&mut self) -> PJ6_W

Bit 6 - Pin J6

pub fn pj7(&mut self) -> PJ7_W

Bit 7 - Pin J7

impl W<u8, Reg<u8, _PINJ>>

pub fn pj0(&mut self) -> PJ0_W

Bit 0 - Pin J0

pub fn pj1(&mut self) -> PJ1_W

Bit 1 - Pin J1

pub fn pj2(&mut self) -> PJ2_W

Bit 2 - Pin J2

pub fn pj3(&mut self) -> PJ3_W

Bit 3 - Pin J3

pub fn pj4(&mut self) -> PJ4_W

Bit 4 - Pin J4

pub fn pj5(&mut self) -> PJ5_W

Bit 5 - Pin J5

pub fn pj6(&mut self) -> PJ6_W

Bit 6 - Pin J6

pub fn pj7(&mut self) -> PJ7_W

Bit 7 - Pin J7

impl W<u8, Reg<u8, _PORTJ>>

pub fn pj0(&mut self) -> PJ0_W

Bit 0 - Pin J0

pub fn pj1(&mut self) -> PJ1_W

Bit 1 - Pin J1

pub fn pj2(&mut self) -> PJ2_W

Bit 2 - Pin J2

pub fn pj3(&mut self) -> PJ3_W

Bit 3 - Pin J3

pub fn pj4(&mut self) -> PJ4_W

Bit 4 - Pin J4

pub fn pj5(&mut self) -> PJ5_W

Bit 5 - Pin J5

pub fn pj6(&mut self) -> PJ6_W

Bit 6 - Pin J6

pub fn pj7(&mut self) -> PJ7_W

Bit 7 - Pin J7

impl W<u8, Reg<u8, _DDRK>>

pub fn pk0(&mut self) -> PK0_W

Bit 0 - Pin K0

pub fn pk1(&mut self) -> PK1_W

Bit 1 - Pin K1

pub fn pk2(&mut self) -> PK2_W

Bit 2 - Pin K2

pub fn pk3(&mut self) -> PK3_W

Bit 3 - Pin K3

pub fn pk4(&mut self) -> PK4_W

Bit 4 - Pin K4

pub fn pk5(&mut self) -> PK5_W

Bit 5 - Pin K5

pub fn pk6(&mut self) -> PK6_W

Bit 6 - Pin K6

pub fn pk7(&mut self) -> PK7_W

Bit 7 - Pin K7

impl W<u8, Reg<u8, _PINK>>

pub fn pk0(&mut self) -> PK0_W

Bit 0 - Pin K0

pub fn pk1(&mut self) -> PK1_W

Bit 1 - Pin K1

pub fn pk2(&mut self) -> PK2_W

Bit 2 - Pin K2

pub fn pk3(&mut self) -> PK3_W

Bit 3 - Pin K3

pub fn pk4(&mut self) -> PK4_W

Bit 4 - Pin K4

pub fn pk5(&mut self) -> PK5_W

Bit 5 - Pin K5

pub fn pk6(&mut self) -> PK6_W

Bit 6 - Pin K6

pub fn pk7(&mut self) -> PK7_W

Bit 7 - Pin K7

impl W<u8, Reg<u8, _PORTK>>

pub fn pk0(&mut self) -> PK0_W

Bit 0 - Pin K0

pub fn pk1(&mut self) -> PK1_W

Bit 1 - Pin K1

pub fn pk2(&mut self) -> PK2_W

Bit 2 - Pin K2

pub fn pk3(&mut self) -> PK3_W

Bit 3 - Pin K3

pub fn pk4(&mut self) -> PK4_W

Bit 4 - Pin K4

pub fn pk5(&mut self) -> PK5_W

Bit 5 - Pin K5

pub fn pk6(&mut self) -> PK6_W

Bit 6 - Pin K6

pub fn pk7(&mut self) -> PK7_W

Bit 7 - Pin K7

impl W<u8, Reg<u8, _DDRL>>

pub fn pl0(&mut self) -> PL0_W

Bit 0 - Pin L0

pub fn pl1(&mut self) -> PL1_W

Bit 1 - Pin L1

pub fn pl2(&mut self) -> PL2_W

Bit 2 - Pin L2

pub fn pl3(&mut self) -> PL3_W

Bit 3 - Pin L3

pub fn pl4(&mut self) -> PL4_W

Bit 4 - Pin L4

pub fn pl5(&mut self) -> PL5_W

Bit 5 - Pin L5

pub fn pl6(&mut self) -> PL6_W

Bit 6 - Pin L6

pub fn pl7(&mut self) -> PL7_W

Bit 7 - Pin L7

impl W<u8, Reg<u8, _PINL>>

pub fn pl0(&mut self) -> PL0_W

Bit 0 - Pin L0

pub fn pl1(&mut self) -> PL1_W

Bit 1 - Pin L1

pub fn pl2(&mut self) -> PL2_W

Bit 2 - Pin L2

pub fn pl3(&mut self) -> PL3_W

Bit 3 - Pin L3

pub fn pl4(&mut self) -> PL4_W

Bit 4 - Pin L4

pub fn pl5(&mut self) -> PL5_W

Bit 5 - Pin L5

pub fn pl6(&mut self) -> PL6_W

Bit 6 - Pin L6

pub fn pl7(&mut self) -> PL7_W

Bit 7 - Pin L7

impl W<u8, Reg<u8, _PORTL>>

pub fn pl0(&mut self) -> PL0_W

Bit 0 - Pin L0

pub fn pl1(&mut self) -> PL1_W

Bit 1 - Pin L1

pub fn pl2(&mut self) -> PL2_W

Bit 2 - Pin L2

pub fn pl3(&mut self) -> PL3_W

Bit 3 - Pin L3

pub fn pl4(&mut self) -> PL4_W

Bit 4 - Pin L4

pub fn pl5(&mut self) -> PL5_W

Bit 5 - Pin L5

pub fn pl6(&mut self) -> PL6_W

Bit 6 - Pin L6

pub fn pl7(&mut self) -> PL7_W

Bit 7 - Pin L7

impl W<u8, Reg<u8, _SPCR>>

pub fn spr(&mut self) -> SPR_W

Bits 0:1 - SPI Clock Rate Selects

pub fn cpha(&mut self) -> CPHA_W

Bit 2 - Clock Phase

pub fn cpol(&mut self) -> CPOL_W

Bit 3 - Clock polarity

pub fn mstr(&mut self) -> MSTR_W

Bit 4 - Master/Slave Select

pub fn dord(&mut self) -> DORD_W

Bit 5 - Data Order

pub fn spe(&mut self) -> SPE_W

Bit 6 - SPI Enable

pub fn spie(&mut self) -> SPIE_W

Bit 7 - SPI Interrupt Enable

impl W<u8, Reg<u8, _SPSR>>

pub fn spi2x(&mut self) -> SPI2X_W

Bit 0 - Double SPI Speed Bit

impl W<u8, Reg<u8, _GTCCR>>

pub fn psrsync(&mut self) -> PSRSYNC_W

Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0

pub fn tsm(&mut self) -> TSM_W

Bit 7 - Timer/Counter Synchronization Mode

impl W<u8, Reg<u8, _TCCR0A>>

pub fn wgm0(&mut self) -> WGM0_W

Bits 0:1 - Waveform Generation Mode

pub fn com0b(&mut self) -> COM0B_W

Bits 4:5 - Compare Output Mode, Fast PWm

pub fn com0a(&mut self) -> COM0A_W

Bits 6:7 - Compare Output Mode, Phase Correct PWM Mode

impl W<u8, Reg<u8, _TCCR0B>>

pub fn cs0(&mut self) -> CS0_W

Bits 0:2 - Clock Select

pub fn wgm02(&mut self) -> WGM02_W

Bit 3 -

pub fn foc0b(&mut self) -> FOC0B_W

Bit 6 - Force Output Compare B

pub fn foc0a(&mut self) -> FOC0A_W

Bit 7 - Force Output Compare A

impl W<u8, Reg<u8, _TIMSK0>>

pub fn toie0(&mut self) -> TOIE0_W

Bit 0 - Timer/Counter0 Overflow Interrupt Enable

pub fn ocie0a(&mut self) -> OCIE0A_W

Bit 1 - Timer/Counter0 Output Compare Match A Interrupt Enable

pub fn ocie0b(&mut self) -> OCIE0B_W

Bit 2 - Timer/Counter0 Output Compare Match B Interrupt Enable

impl W<u8, Reg<u8, _TCCR1A>>

pub fn wgm1(&mut self) -> WGM1_W

Bits 0:1 - Waveform Generation Mode

pub fn com1c(&mut self) -> COM1C_W

Bits 2:3 - Compare Output Mode 1C, bits

pub fn com1b(&mut self) -> COM1B_W

Bits 4:5 - Compare Output Mode 1B, bits

pub fn com1a(&mut self) -> COM1A_W

Bits 6:7 - Compare Output Mode 1A, bits

impl W<u8, Reg<u8, _TCCR1B>>

pub fn cs1(&mut self) -> CS1_W

Bits 0:2 - Prescaler source of Timer/Counter 1

pub fn wgm1(&mut self) -> WGM1_W

Bits 3:4 - Waveform Generation Mode

pub fn ices1(&mut self) -> ICES1_W

Bit 6 - Input Capture 1 Edge Select

pub fn icnc1(&mut self) -> ICNC1_W

Bit 7 - Input Capture 1 Noise Canceler

impl W<u8, Reg<u8, _TCCR1C>>

pub fn foc1c(&mut self) -> FOC1C_W

Bit 5 - Force Output Compare 1C

pub fn foc1b(&mut self) -> FOC1B_W

Bit 6 - Force Output Compare 1B

pub fn foc1a(&mut self) -> FOC1A_W

Bit 7 - Force Output Compare 1A

impl W<u8, Reg<u8, _TIMSK1>>

pub fn toie1(&mut self) -> TOIE1_W

Bit 0 - Timer/Counter1 Overflow Interrupt Enable

pub fn ocie1a(&mut self) -> OCIE1A_W

Bit 1 - Timer/Counter1 Output Compare A Match Interrupt Enable

pub fn ocie1b(&mut self) -> OCIE1B_W

Bit 2 - Timer/Counter1 Output Compare B Match Interrupt Enable

pub fn ocie1c(&mut self) -> OCIE1C_W

Bit 3 - Timer/Counter1 Output Compare C Match Interrupt Enable

pub fn icie1(&mut self) -> ICIE1_W

Bit 5 - Timer/Counter1 Input Capture Interrupt Enable

impl W<u8, Reg<u8, _ASSR>>

pub fn tcr2bub(&mut self) -> TCR2BUB_W

Bit 0 - Timer/Counter Control Register2 Update Busy

pub fn tcr2aub(&mut self) -> TCR2AUB_W

Bit 1 - Timer/Counter Control Register2 Update Busy

pub fn ocr2bub(&mut self) -> OCR2BUB_W

Bit 2 - Output Compare Register 2 Update Busy

pub fn ocr2aub(&mut self) -> OCR2AUB_W

Bit 3 - Output Compare Register2 Update Busy

pub fn tcn2ub(&mut self) -> TCN2UB_W

Bit 4 - Timer/Counter2 Update Busy

pub fn as2(&mut self) -> AS2_W

Bit 5 - Asynchronous Timer/Counter2

pub fn exclk(&mut self) -> EXCLK_W

Bit 6 - Enable External Clock Input

impl W<u8, Reg<u8, _GTCCR>>

pub fn psrasy(&mut self) -> PSRASY_W

Bit 1 - Prescaler Reset Timer/Counter2

pub fn tsm(&mut self) -> TSM_W

Bit 7 - Timer/Counter Synchronization Mode

impl W<u8, Reg<u8, _TCCR2A>>

pub fn wgm2(&mut self) -> WGM2_W

Bits 0:1 - Waveform Genration Mode

pub fn com2b(&mut self) -> COM2B_W

Bits 4:5 - Compare Output Mode bits

pub fn com2a(&mut self) -> COM2A_W

Bits 6:7 - Compare Output Mode bits

impl W<u8, Reg<u8, _TCCR2B>>

pub fn cs2(&mut self) -> CS2_W

Bits 0:2 - Clock Select bits

pub fn wgm22(&mut self) -> WGM22_W

Bit 3 - Waveform Generation Mode

pub fn foc2b(&mut self) -> FOC2B_W

Bit 6 - Force Output Compare B

pub fn foc2a(&mut self) -> FOC2A_W

Bit 7 - Force Output Compare A

impl W<u8, Reg<u8, _TIMSK2>>

pub fn toie2(&mut self) -> TOIE2_W

Bit 0 - Timer/Counter2 Overflow Interrupt Enable

pub fn ocie2a(&mut self) -> OCIE2A_W

Bit 1 - Timer/Counter2 Output Compare Match A Interrupt Enable

pub fn ocie2b(&mut self) -> OCIE2B_W

Bit 2 - Timer/Counter2 Output Compare Match B Interrupt Enable

impl W<u8, Reg<u8, _TCCR3A>>

pub fn wgm3(&mut self) -> WGM3_W

Bits 0:1 - Waveform Generation Mode

pub fn com3c(&mut self) -> COM3C_W

Bits 2:3 - Compare Output Mode 3C, bits

pub fn com3b(&mut self) -> COM3B_W

Bits 4:5 - Compare Output Mode 3B, bits

pub fn com3a(&mut self) -> COM3A_W

Bits 6:7 - Compare Output Mode 1A, bits

impl W<u8, Reg<u8, _TCCR3B>>

pub fn cs3(&mut self) -> CS3_W

Bits 0:2 - Prescaler source of Timer/Counter 3

pub fn wgm3(&mut self) -> WGM3_W

Bits 3:4 - Waveform Generation Mode

pub fn ices3(&mut self) -> ICES3_W

Bit 6 - Input Capture 3 Edge Select

pub fn icnc3(&mut self) -> ICNC3_W

Bit 7 - Input Capture 3 Noise Canceler

impl W<u8, Reg<u8, _TCCR3C>>

pub fn foc3c(&mut self) -> FOC3C_W

Bit 5 - Force Output Compare 3C

pub fn foc3b(&mut self) -> FOC3B_W

Bit 6 - Force Output Compare 3B

pub fn foc3a(&mut self) -> FOC3A_W

Bit 7 - Force Output Compare 3A

impl W<u8, Reg<u8, _TIMSK3>>

pub fn toie3(&mut self) -> TOIE3_W

Bit 0 - Timer/Counter3 Overflow Interrupt Enable

pub fn ocie3a(&mut self) -> OCIE3A_W

Bit 1 - Timer/Counter3 Output Compare A Match Interrupt Enable

pub fn ocie3b(&mut self) -> OCIE3B_W

Bit 2 - Timer/Counter3 Output Compare B Match Interrupt Enable

pub fn ocie3c(&mut self) -> OCIE3C_W

Bit 3 - Timer/Counter3 Output Compare C Match Interrupt Enable

pub fn icie3(&mut self) -> ICIE3_W

Bit 5 - Timer/Counter3 Input Capture Interrupt Enable

impl W<u8, Reg<u8, _TCCR4A>>

pub fn wgm4(&mut self) -> WGM4_W

Bits 0:1 - Waveform Generation Mode

pub fn com4c(&mut self) -> COM4C_W

Bits 2:3 - Compare Output Mode 4C, bits

pub fn com4b(&mut self) -> COM4B_W

Bits 4:5 - Compare Output Mode 4B, bits

pub fn com4a(&mut self) -> COM4A_W

Bits 6:7 - Compare Output Mode 1A, bits

impl W<u8, Reg<u8, _TCCR4B>>

pub fn cs4(&mut self) -> CS4_W

Bits 0:2 - Prescaler source of Timer/Counter 4

pub fn wgm4(&mut self) -> WGM4_W

Bits 3:4 - Waveform Generation Mode

pub fn ices4(&mut self) -> ICES4_W

Bit 6 - Input Capture 4 Edge Select

pub fn icnc4(&mut self) -> ICNC4_W

Bit 7 - Input Capture 4 Noise Canceler

impl W<u8, Reg<u8, _TCCR4C>>

pub fn foc4c(&mut self) -> FOC4C_W

Bit 5 - Force Output Compare 4C

pub fn foc4b(&mut self) -> FOC4B_W

Bit 6 - Force Output Compare 4B

pub fn foc4a(&mut self) -> FOC4A_W

Bit 7 - Force Output Compare 4A

impl W<u8, Reg<u8, _TIFR4>>

pub fn tov4(&mut self) -> TOV4_W

Bit 0 - Timer/Counter4 Overflow Flag

pub fn ocf4a(&mut self) -> OCF4A_W

Bit 1 - Output Compare Flag 4A

pub fn ocf4b(&mut self) -> OCF4B_W

Bit 2 - Output Compare Flag 4B

pub fn ocf4c(&mut self) -> OCF4C_W

Bit 3 - Output Compare Flag 4C

pub fn icf4(&mut self) -> ICF4_W

Bit 5 - Input Capture Flag 4

impl W<u8, Reg<u8, _TIMSK4>>

pub fn toie4(&mut self) -> TOIE4_W

Bit 0 - Timer/Counter4 Overflow Interrupt Enable

pub fn ocie4a(&mut self) -> OCIE4A_W

Bit 1 - Timer/Counter4 Output Compare A Match Interrupt Enable

pub fn ocie4b(&mut self) -> OCIE4B_W

Bit 2 - Timer/Counter4 Output Compare B Match Interrupt Enable

pub fn ocie4c(&mut self) -> OCIE4C_W

Bit 3 - Timer/Counter4 Output Compare C Match Interrupt Enable

pub fn icie4(&mut self) -> ICIE4_W

Bit 5 - Timer/Counter4 Input Capture Interrupt Enable

impl W<u8, Reg<u8, _TCCR5A>>

pub fn wgm5(&mut self) -> WGM5_W

Bits 0:1 - Waveform Generation Mode

pub fn com5c(&mut self) -> COM5C_W

Bits 2:3 - Compare Output Mode 5C, bits

pub fn com5b(&mut self) -> COM5B_W

Bits 4:5 - Compare Output Mode 5B, bits

pub fn com5a(&mut self) -> COM5A_W

Bits 6:7 - Compare Output Mode 1A, bits

impl W<u8, Reg<u8, _TCCR5B>>

pub fn cs5(&mut self) -> CS5_W

Bits 0:2 - Prescaler source of Timer/Counter 5

pub fn wgm5(&mut self) -> WGM5_W

Bits 3:4 - Waveform Generation Mode

pub fn ices5(&mut self) -> ICES5_W

Bit 6 - Input Capture 5 Edge Select

pub fn icnc5(&mut self) -> ICNC5_W

Bit 7 - Input Capture 5 Noise Canceler

impl W<u8, Reg<u8, _TCCR5C>>

pub fn foc5c(&mut self) -> FOC5C_W

Bit 5 - Force Output Compare 5C

pub fn foc5b(&mut self) -> FOC5B_W

Bit 6 - Force Output Compare 5B

pub fn foc5a(&mut self) -> FOC5A_W

Bit 7 - Force Output Compare 5A

impl W<u8, Reg<u8, _TIFR5>>

pub fn tov5(&mut self) -> TOV5_W

Bit 0 - Timer/Counter5 Overflow Flag

pub fn ocf5a(&mut self) -> OCF5A_W

Bit 1 - Output Compare Flag 5A

pub fn ocf5b(&mut self) -> OCF5B_W

Bit 2 - Output Compare Flag 5B

pub fn ocf5c(&mut self) -> OCF5C_W

Bit 3 - Output Compare Flag 5C

pub fn icf5(&mut self) -> ICF5_W

Bit 5 - Input Capture Flag 5

impl W<u8, Reg<u8, _TIMSK5>>

pub fn toie5(&mut self) -> TOIE5_W

Bit 0 - Timer/Counter5 Overflow Interrupt Enable

pub fn ocie5a(&mut self) -> OCIE5A_W

Bit 1 - Timer/Counter5 Output Compare A Match Interrupt Enable

pub fn ocie5b(&mut self) -> OCIE5B_W

Bit 2 - Timer/Counter5 Output Compare B Match Interrupt Enable

pub fn ocie5c(&mut self) -> OCIE5C_W

Bit 3 - Timer/Counter5 Output Compare C Match Interrupt Enable

pub fn icie5(&mut self) -> ICIE5_W

Bit 5 - Timer/Counter5 Input Capture Interrupt Enable

impl W<u8, Reg<u8, _TWAMR>>

pub fn twam(&mut self) -> TWAM_W

Bits 1:7 - TWI (Slave) Address Mask Bits

impl W<u8, Reg<u8, _TWAR>>

pub fn twgce(&mut self) -> TWGCE_W

Bit 0 - TWI General Call Recognition Enable Bit

pub fn twa(&mut self) -> TWA_W

Bits 1:7 - TWI (Slave) Address register Bits

impl W<u8, Reg<u8, _TWCR>>

pub fn twie(&mut self) -> TWIE_W

Bit 0 - TWI Interrupt Enable

pub fn twen(&mut self) -> TWEN_W

Bit 2 - TWI Enable Bit

pub fn twsto(&mut self) -> TWSTO_W

Bit 4 - TWI Stop Condition Bit

pub fn twsta(&mut self) -> TWSTA_W

Bit 5 - TWI Start Condition Bit

pub fn twea(&mut self) -> TWEA_W

Bit 6 - TWI Enable Acknowledge Bit

pub fn twint(&mut self) -> TWINT_W

Bit 7 - TWI Interrupt Flag

impl W<u8, Reg<u8, _TWSR>>

pub fn twps(&mut self) -> TWPS_W

Bits 0:1 - TWI Prescaler

impl W<u8, Reg<u8, _UCSR0A>>

pub fn mpcm0(&mut self) -> MPCM0_W

Bit 0 - Multi-processor Communication Mode

pub fn u2x0(&mut self) -> U2X0_W

Bit 1 - Double the USART transmission speed

pub fn txc0(&mut self) -> TXC0_W

Bit 6 - USART Transmit Complete

impl W<u8, Reg<u8, _UCSR0B>>

pub fn txb80(&mut self) -> TXB80_W

Bit 0 - Transmit Data Bit 8

pub fn ucsz02(&mut self) -> UCSZ02_W

Bit 2 - Character Size

pub fn txen0(&mut self) -> TXEN0_W

Bit 3 - Transmitter Enable

pub fn rxen0(&mut self) -> RXEN0_W

Bit 4 - Receiver Enable

pub fn udrie0(&mut self) -> UDRIE0_W

Bit 5 - USART Data register Empty Interrupt Enable

pub fn txcie0(&mut self) -> TXCIE0_W

Bit 6 - TX Complete Interrupt Enable

pub fn rxcie0(&mut self) -> RXCIE0_W

Bit 7 - RX Complete Interrupt Enable

impl W<u8, Reg<u8, _UCSR0C>>

pub fn ucpol0(&mut self) -> UCPOL0_W

Bit 0 - Clock Polarity

pub fn ucsz0(&mut self) -> UCSZ0_W

Bits 1:2 - Character Size

pub fn usbs0(&mut self) -> USBS0_W

Bit 3 - Stop Bit Select

pub fn upm0(&mut self) -> UPM0_W

Bits 4:5 - Parity Mode Bits

pub fn umsel0(&mut self) -> UMSEL0_W

Bits 6:7 - USART Mode Select

impl W<u8, Reg<u8, _UCSR1A>>

pub fn mpcm1(&mut self) -> MPCM1_W

Bit 0 - Multi-processor Communication Mode

pub fn u2x1(&mut self) -> U2X1_W

Bit 1 - Double the USART transmission speed

pub fn txc1(&mut self) -> TXC1_W

Bit 6 - USART Transmit Complete

impl W<u8, Reg<u8, _UCSR1B>>

pub fn txb81(&mut self) -> TXB81_W

Bit 0 - Transmit Data Bit 8

pub fn ucsz12(&mut self) -> UCSZ12_W

Bit 2 - Character Size

pub fn txen1(&mut self) -> TXEN1_W

Bit 3 - Transmitter Enable

pub fn rxen1(&mut self) -> RXEN1_W

Bit 4 - Receiver Enable

pub fn udrie1(&mut self) -> UDRIE1_W

Bit 5 - USART Data register Empty Interrupt Enable

pub fn txcie1(&mut self) -> TXCIE1_W

Bit 6 - TX Complete Interrupt Enable

pub fn rxcie1(&mut self) -> RXCIE1_W

Bit 7 - RX Complete Interrupt Enable

impl W<u8, Reg<u8, _UCSR1C>>

pub fn ucpol1(&mut self) -> UCPOL1_W

Bit 0 - Clock Polarity

pub fn ucsz1(&mut self) -> UCSZ1_W

Bits 1:2 - Character Size

pub fn usbs1(&mut self) -> USBS1_W

Bit 3 - Stop Bit Select

pub fn upm1(&mut self) -> UPM1_W

Bits 4:5 - Parity Mode Bits

pub fn umsel1(&mut self) -> UMSEL1_W

Bits 6:7 - USART Mode Select

impl W<u8, Reg<u8, _UCSR2A>>

pub fn mpcm2(&mut self) -> MPCM2_W

Bit 0 - Multi-processor Communication Mode

pub fn u2x2(&mut self) -> U2X2_W

Bit 1 - Double the USART transmission speed

pub fn txc2(&mut self) -> TXC2_W

Bit 6 - USART Transmit Complete

impl W<u8, Reg<u8, _UCSR2B>>

pub fn txb82(&mut self) -> TXB82_W

Bit 0 - Transmit Data Bit 8

pub fn ucsz22(&mut self) -> UCSZ22_W

Bit 2 - Character Size

pub fn txen2(&mut self) -> TXEN2_W

Bit 3 - Transmitter Enable

pub fn rxen2(&mut self) -> RXEN2_W

Bit 4 - Receiver Enable

pub fn udrie2(&mut self) -> UDRIE2_W

Bit 5 - USART Data register Empty Interrupt Enable

pub fn txcie2(&mut self) -> TXCIE2_W

Bit 6 - TX Complete Interrupt Enable

pub fn rxcie2(&mut self) -> RXCIE2_W

Bit 7 - RX Complete Interrupt Enable

impl W<u8, Reg<u8, _UCSR2C>>

pub fn ucpol2(&mut self) -> UCPOL2_W

Bit 0 - Clock Polarity

pub fn ucsz2(&mut self) -> UCSZ2_W

Bits 1:2 - Character Size

pub fn usbs2(&mut self) -> USBS2_W

Bit 3 - Stop Bit Select

pub fn upm2(&mut self) -> UPM2_W

Bits 4:5 - Parity Mode Bits

pub fn umsel2(&mut self) -> UMSEL2_W

Bits 6:7 - USART Mode Select

impl W<u8, Reg<u8, _UCSR3A>>

pub fn mpcm3(&mut self) -> MPCM3_W

Bit 0 - Multi-processor Communication Mode

pub fn u2x3(&mut self) -> U2X3_W

Bit 1 - Double the USART transmission speed

pub fn txc3(&mut self) -> TXC3_W

Bit 6 - USART Transmit Complete

impl W<u8, Reg<u8, _UCSR3B>>

pub fn txb83(&mut self) -> TXB83_W

Bit 0 - Transmit Data Bit 8

pub fn ucsz32(&mut self) -> UCSZ32_W

Bit 2 - Character Size

pub fn txen3(&mut self) -> TXEN3_W

Bit 3 - Transmitter Enable

pub fn rxen3(&mut self) -> RXEN3_W

Bit 4 - Receiver Enable

pub fn udrie3(&mut self) -> UDRIE3_W

Bit 5 - USART Data register Empty Interrupt Enable

pub fn txcie3(&mut self) -> TXCIE3_W

Bit 6 - TX Complete Interrupt Enable

pub fn rxcie3(&mut self) -> RXCIE3_W

Bit 7 - RX Complete Interrupt Enable

impl W<u8, Reg<u8, _UCSR3C>>

pub fn ucpol3(&mut self) -> UCPOL3_W

Bit 0 - Clock Polarity

pub fn ucsz3(&mut self) -> UCSZ3_W

Bits 1:2 - Character Size

pub fn usbs3(&mut self) -> USBS3_W

Bit 3 - Stop Bit Select

pub fn upm3(&mut self) -> UPM3_W

Bits 4:5 - Parity Mode Bits

pub fn umsel3(&mut self) -> UMSEL3_W

Bits 6:7 - USART Mode Select

impl W<u8, Reg<u8, _WDTCSR>>

pub fn wde(&mut self) -> WDE_W

Bit 3 - Watch Dog Enable

pub fn wdce(&mut self) -> WDCE_W

Bit 4 - Watchdog Change Enable

pub fn wdie(&mut self) -> WDIE_W

Bit 6 - Watchdog Timeout Interrupt Enable

pub fn wdif(&mut self) -> WDIF_W

Bit 7 - Watchdog Timeout Interrupt Flag

pub fn wdpl(&mut self) -> WDPL_W

Bits 0:2 - Watchdog Timer Prescaler - Low Bits

pub fn wdph(&mut self) -> WDPH_W

Bit 5 - Watchdog Timer Prescaler - High Bit

impl W<u8, Reg<u8, _ACSR>>

pub fn acis(&mut self) -> ACIS_W

Bits 0:1 - Analog Comparator Interrupt Mode Select

pub fn acic(&mut self) -> ACIC_W

Bit 2 - Analog Comparator Input Capture Enable

pub fn acie(&mut self) -> ACIE_W

Bit 3 - Analog Comparator Interrupt Enable

pub fn aci(&mut self) -> ACI_W

Bit 4 - Analog Comparator Interrupt Flag

pub fn acbg(&mut self) -> ACBG_W

Bit 6 - Analog Comparator Bandgap Select

pub fn acd(&mut self) -> ACD_W

Bit 7 - Analog Comparator Disable

impl W<u8, Reg<u8, _DIDR1>>

pub fn ain0d(&mut self) -> AIN0D_W

Bit 0 - AIN0 Digital Input Disable

pub fn ain1d(&mut self) -> AIN1D_W

Bit 1 - AIN1 Digital Input Disable

impl W<u8, Reg<u8, _ADCSRA>>

pub fn adps(&mut self) -> ADPS_W

Bits 0:2 - ADC Prescaler Select Bits

pub fn adie(&mut self) -> ADIE_W

Bit 3 - ADC Interrupt Enable

pub fn adif(&mut self) -> ADIF_W

Bit 4 - ADC Interrupt Flag

pub fn adate(&mut self) -> ADATE_W

Bit 5 - ADC Auto Trigger Enable

pub fn adsc(&mut self) -> ADSC_W

Bit 6 - ADC Start Conversion

pub fn aden(&mut self) -> ADEN_W

Bit 7 - ADC Enable

impl W<u8, Reg<u8, _ADCSRB>>

pub fn adts(&mut self) -> ADTS_W

Bits 0:2 - ADC Auto Trigger Source bits

pub fn acme(&mut self) -> ACME_W

Bit 6 -

impl W<u8, Reg<u8, _ADMUX>>

pub fn mux(&mut self) -> MUX_W

Bits 0:3 - Analog Channel Selection Bits

pub fn adlar(&mut self) -> ADLAR_W

Bit 5 - Left Adjust Result

pub fn refs(&mut self) -> REFS_W

Bits 6:7 - Reference Selection Bits

impl W<u8, Reg<u8, _DIDR0>>

pub fn adc0d(&mut self) -> ADC0D_W

Bit 0 -

pub fn adc1d(&mut self) -> ADC1D_W

Bit 1 -

pub fn adc2d(&mut self) -> ADC2D_W

Bit 2 -

pub fn adc3d(&mut self) -> ADC3D_W

Bit 3 -

pub fn adc4d(&mut self) -> ADC4D_W

Bit 4 -

pub fn adc5d(&mut self) -> ADC5D_W

Bit 5 -

impl W<u8, Reg<u8, _MCUCR>>

pub fn ivce(&mut self) -> IVCE_W

Bit 0 -

pub fn ivsel(&mut self) -> IVSEL_W

Bit 1 -

pub fn pud(&mut self) -> PUD_W

Bit 4 -

pub fn bodse(&mut self) -> BODSE_W

Bit 5 - BOD Sleep Enable

pub fn bods(&mut self) -> BODS_W

Bit 6 - BOD Sleep

impl W<u8, Reg<u8, _MCUSR>>

pub fn porf(&mut self) -> PORF_W

Bit 0 - Power-on reset flag

pub fn extrf(&mut self) -> EXTRF_W

Bit 1 - External Reset Flag

pub fn borf(&mut self) -> BORF_W

Bit 2 - Brown-out Reset Flag

pub fn wdrf(&mut self) -> WDRF_W

Bit 3 - Watchdog Reset Flag

impl W<u8, Reg<u8, _SMCR>>

pub fn se(&mut self) -> SE_W

Bit 0 - Sleep Enable

pub fn sm(&mut self) -> SM_W

Bits 1:3 - Sleep Mode Select Bits

impl W<u8, Reg<u8, _SPMCSR>>

pub fn spmen(&mut self) -> SPMEN_W

Bit 0 - Store Program Memory

pub fn pgers(&mut self) -> PGERS_W

Bit 1 - Page Erase

pub fn pgwrt(&mut self) -> PGWRT_W

Bit 2 - Page Write

pub fn blbset(&mut self) -> BLBSET_W

Bit 3 - Boot Lock Bit Set

pub fn rwwsre(&mut self) -> RWWSRE_W

Bit 4 - Read-While-Write section read enable

pub fn sigrd(&mut self) -> SIGRD_W

Bit 5 - Signature Row Read

pub fn rwwsb(&mut self) -> RWWSB_W

Bit 6 - Read-While-Write Section Busy

pub fn spmie(&mut self) -> SPMIE_W

Bit 7 - SPM Interrupt Enable

impl W<u8, Reg<u8, _EECR>>

pub fn eere(&mut self) -> EERE_W

Bit 0 - EEPROM Read Enable

pub fn eepe(&mut self) -> EEPE_W

Bit 1 - EEPROM Write Enable

pub fn eempe(&mut self) -> EEMPE_W

Bit 2 - EEPROM Master Write Enable

pub fn eerie(&mut self) -> EERIE_W

Bit 3 - EEPROM Ready Interrupt Enable

pub fn eepm(&mut self) -> EEPM_W

Bits 4:5 - EEPROM Programming Mode Bits

impl W<u8, Reg<u8, _EICRA>>

pub fn isc0(&mut self) -> ISC0_W

Bits 0:1 - External Interrupt Sense Control 0 Bits

pub fn isc1(&mut self) -> ISC1_W

Bits 2:3 - External Interrupt Sense Control 1 Bits

impl W<u8, Reg<u8, _EIMSK>>

pub fn int(&mut self) -> INT_W

Bits 0:1 - External Interrupt Request 1 Enable

impl W<u8, Reg<u8, _PCICR>>

pub fn pcie(&mut self) -> PCIE_W

Bits 0:2 - Pin Change Interrupt Enables

impl W<u8, Reg<u8, _PCMSK0>>

pub fn pcint(&mut self) -> PCINT_W

Bits 0:7 - Pin Change Enable Masks

impl W<u8, Reg<u8, _PCMSK1>>

pub fn pcint(&mut self) -> PCINT_W

Bits 0:6 - Pin Change Enable Masks

impl W<u8, Reg<u8, _PCMSK2>>

pub fn pcint(&mut self) -> PCINT_W

Bits 0:7 - Pin Change Enable Masks

impl W<u8, Reg<u8, _EXTENDED>>

pub fn bodlevel(&mut self) -> BODLEVEL_W

Bits 0:2 - Brown-out Detector trigger level

impl W<u8, Reg<u8, _HIGH>>

pub fn bootrst(&mut self) -> BOOTRST_W

Bit 0 - Boot Reset vector Enabled

pub fn bootsz(&mut self) -> BOOTSZ_W

Bits 1:2 - Select boot size

pub fn eesave(&mut self) -> EESAVE_W

Bit 3 - Preserve EEPROM through the Chip Erase cycle

pub fn wdton(&mut self) -> WDTON_W

Bit 4 - Watch-dog Timer always on

pub fn spien(&mut self) -> SPIEN_W

Bit 5 - Serial program downloading (SPI) enabled

pub fn dwen(&mut self) -> DWEN_W

Bit 6 - Debug Wire enable

pub fn rstdisbl(&mut self) -> RSTDISBL_W

Bit 7 - Reset Disabled (Enable PC6 as i/o pin)

impl W<u8, Reg<u8, _LOW>>

pub fn sut_cksel(&mut self) -> SUT_CKSEL_W

Bits 0:5 - Select Clock Source

pub fn ckout(&mut self) -> CKOUT_W

Bit 6 - Clock output on PORTB0

pub fn ckdiv8(&mut self) -> CKDIV8_W

Bit 7 - Divide clock by 8 internally

impl W<u8, Reg<u8, _LOCKBIT>>

pub fn lb(&mut self) -> LB_W

Bits 0:1 - Memory Lock

pub fn blb0(&mut self) -> BLB0_W

Bits 2:3 - Boot Loader Protection Mode

pub fn blb1(&mut self) -> BLB1_W

Bits 4:5 - Boot Loader Protection Mode

impl W<u8, Reg<u8, _DDRB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

pub fn pb6(&mut self) -> PB6_W

Bit 6 - Pin B6

pub fn pb7(&mut self) -> PB7_W

Bit 7 - Pin B7

impl W<u8, Reg<u8, _PORTB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

pub fn pb6(&mut self) -> PB6_W

Bit 6 - Pin B6

pub fn pb7(&mut self) -> PB7_W

Bit 7 - Pin B7

impl W<u8, Reg<u8, _DDRC>>

pub fn pc0(&mut self) -> PC0_W

Bit 0 - Pin C0

pub fn pc1(&mut self) -> PC1_W

Bit 1 - Pin C1

pub fn pc2(&mut self) -> PC2_W

Bit 2 - Pin C2

pub fn pc3(&mut self) -> PC3_W

Bit 3 - Pin C3

pub fn pc4(&mut self) -> PC4_W

Bit 4 - Pin C4

pub fn pc5(&mut self) -> PC5_W

Bit 5 - Pin C5

pub fn pc6(&mut self) -> PC6_W

Bit 6 - Pin C6

impl W<u8, Reg<u8, _PORTC>>

pub fn pc0(&mut self) -> PC0_W

Bit 0 - Pin C0

pub fn pc1(&mut self) -> PC1_W

Bit 1 - Pin C1

pub fn pc2(&mut self) -> PC2_W

Bit 2 - Pin C2

pub fn pc3(&mut self) -> PC3_W

Bit 3 - Pin C3

pub fn pc4(&mut self) -> PC4_W

Bit 4 - Pin C4

pub fn pc5(&mut self) -> PC5_W

Bit 5 - Pin C5

pub fn pc6(&mut self) -> PC6_W

Bit 6 - Pin C6

impl W<u8, Reg<u8, _DDRD>>

pub fn pd0(&mut self) -> PD0_W

Bit 0 - Pin D0

pub fn pd1(&mut self) -> PD1_W

Bit 1 - Pin D1

pub fn pd2(&mut self) -> PD2_W

Bit 2 - Pin D2

pub fn pd3(&mut self) -> PD3_W

Bit 3 - Pin D3

pub fn pd4(&mut self) -> PD4_W

Bit 4 - Pin D4

pub fn pd5(&mut self) -> PD5_W

Bit 5 - Pin D5

pub fn pd6(&mut self) -> PD6_W

Bit 6 - Pin D6

pub fn pd7(&mut self) -> PD7_W

Bit 7 - Pin D7

impl W<u8, Reg<u8, _PORTD>>

pub fn pd0(&mut self) -> PD0_W

Bit 0 - Pin D0

pub fn pd1(&mut self) -> PD1_W

Bit 1 - Pin D1

pub fn pd2(&mut self) -> PD2_W

Bit 2 - Pin D2

pub fn pd3(&mut self) -> PD3_W

Bit 3 - Pin D3

pub fn pd4(&mut self) -> PD4_W

Bit 4 - Pin D4

pub fn pd5(&mut self) -> PD5_W

Bit 5 - Pin D5

pub fn pd6(&mut self) -> PD6_W

Bit 6 - Pin D6

pub fn pd7(&mut self) -> PD7_W

Bit 7 - Pin D7

impl W<u8, Reg<u8, _SPCR>>

pub fn spr(&mut self) -> SPR_W

Bits 0:1 - SPI Clock Rate Selects

pub fn cpha(&mut self) -> CPHA_W

Bit 2 - Clock Phase

pub fn cpol(&mut self) -> CPOL_W

Bit 3 - Clock polarity

pub fn mstr(&mut self) -> MSTR_W

Bit 4 - Master/Slave Select

pub fn dord(&mut self) -> DORD_W

Bit 5 - Data Order

pub fn spe(&mut self) -> SPE_W

Bit 6 - SPI Enable

pub fn spie(&mut self) -> SPIE_W

Bit 7 - SPI Interrupt Enable

impl W<u8, Reg<u8, _SPSR>>

pub fn spi2x(&mut self) -> SPI2X_W

Bit 0 - Double SPI Speed Bit

impl W<u8, Reg<u8, _GTCCR>>

pub fn psrsync(&mut self) -> PSRSYNC_W

Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0

pub fn tsm(&mut self) -> TSM_W

Bit 7 - Timer/Counter Synchronization Mode

impl W<u8, Reg<u8, _TCCR0A>>

pub fn wgm0(&mut self) -> WGM0_W

Bits 0:1 - Waveform Generation Mode

pub fn com0b(&mut self) -> COM0B_W

Bits 4:5 - Compare Output B Mode

pub fn com0a(&mut self) -> COM0A_W

Bits 6:7 - Compare Output A Mode

impl W<u8, Reg<u8, _TCCR0B>>

pub fn cs0(&mut self) -> CS0_W

Bits 0:2 - Clock Select

pub fn wgm02(&mut self) -> WGM02_W

Bit 3 - Waveform Generation Mode High Bit (Enable Top: OCRA for PWM modes)

pub fn foc0b(&mut self) -> FOC0B_W

Bit 6 - Force Output Compare B

pub fn foc0a(&mut self) -> FOC0A_W

Bit 7 - Force Output Compare A

impl W<u8, Reg<u8, _TIMSK0>>

pub fn toie0(&mut self) -> TOIE0_W

Bit 0 - Timer/Counter0 Overflow Interrupt Enable

pub fn ocie0a(&mut self) -> OCIE0A_W

Bit 1 - Timer/Counter0 Output Compare Match A Interrupt Enable

pub fn ocie0b(&mut self) -> OCIE0B_W

Bit 2 - Timer/Counter0 Output Compare Match B Interrupt Enable

impl W<u8, Reg<u8, _GTCCR>>

pub fn psrsync(&mut self) -> PSRSYNC_W

Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0

pub fn tsm(&mut self) -> TSM_W

Bit 7 - Timer/Counter Synchronization Mode

impl W<u8, Reg<u8, _TCCR1A>>

pub fn wgm1(&mut self) -> WGM1_W

Bits 0:1 - Waveform Generation Mode

pub fn com1b(&mut self) -> COM1B_W

Bits 4:5 - Compare Output Mode 1B, bits

pub fn com1a(&mut self) -> COM1A_W

Bits 6:7 - Compare Output Mode 1A, bits

impl W<u8, Reg<u8, _TCCR1B>>

pub fn cs1(&mut self) -> CS1_W

Bits 0:2 - Prescaler source of Timer/Counter 1

pub fn wgm1(&mut self) -> WGM1_W

Bits 3:4 - Waveform Generation Mode

pub fn ices1(&mut self) -> ICES1_W

Bit 6 - Input Capture 1 Edge Select

pub fn icnc1(&mut self) -> ICNC1_W

Bit 7 - Input Capture 1 Noise Canceler

impl W<u8, Reg<u8, _TCCR1C>>

pub fn foc1b(&mut self) -> FOC1B_W

Bit 6 -

pub fn foc1a(&mut self) -> FOC1A_W

Bit 7 -

impl W<u8, Reg<u8, _TIMSK1>>

pub fn toie1(&mut self) -> TOIE1_W

Bit 0 - Timer/Counter1 Overflow Interrupt Enable

pub fn ocie1a(&mut self) -> OCIE1A_W

Bit 1 - Timer/Counter1 Output CompareA Match Interrupt Enable

pub fn ocie1b(&mut self) -> OCIE1B_W

Bit 2 - Timer/Counter1 Output CompareB Match Interrupt Enable

pub fn icie1(&mut self) -> ICIE1_W

Bit 5 - Timer/Counter1 Input Capture Interrupt Enable

impl W<u8, Reg<u8, _ASSR>>

pub fn tcr2bub(&mut self) -> TCR2BUB_W

Bit 0 - Timer/Counter Control Register2 Update Busy

pub fn tcr2aub(&mut self) -> TCR2AUB_W

Bit 1 - Timer/Counter Control Register2 Update Busy

pub fn ocr2bub(&mut self) -> OCR2BUB_W

Bit 2 - Output Compare Register 2 Update Busy

pub fn ocr2aub(&mut self) -> OCR2AUB_W

Bit 3 - Output Compare Register2 Update Busy

pub fn tcn2ub(&mut self) -> TCN2UB_W

Bit 4 - Timer/Counter2 Update Busy

pub fn as2(&mut self) -> AS2_W

Bit 5 - Asynchronous Timer/Counter2

pub fn exclk(&mut self) -> EXCLK_W

Bit 6 - Enable External Clock Input

impl W<u8, Reg<u8, _GTCCR>>

pub fn psrasy(&mut self) -> PSRASY_W

Bit 1 - Prescaler Reset Timer/Counter2

pub fn tsm(&mut self) -> TSM_W

Bit 7 - Timer/Counter Synchronization Mode

impl W<u8, Reg<u8, _TCCR2A>>

pub fn wgm2(&mut self) -> WGM2_W

Bits 0:1 - Waveform Genration Mode

pub fn com2b(&mut self) -> COM2B_W

Bits 4:5 - Compare Output Mode bits

pub fn com2a(&mut self) -> COM2A_W

Bits 6:7 - Compare Output Mode bits

impl W<u8, Reg<u8, _TCCR2B>>

pub fn cs2(&mut self) -> CS2_W

Bits 0:2 - Clock Select bits

pub fn wgm22(&mut self) -> WGM22_W

Bit 3 - Waveform Generation Mode

pub fn foc2b(&mut self) -> FOC2B_W

Bit 6 - Force Output Compare B

pub fn foc2a(&mut self) -> FOC2A_W

Bit 7 - Force Output Compare A

impl W<u8, Reg<u8, _TIMSK2>>

pub fn toie2(&mut self) -> TOIE2_W

Bit 0 - Timer/Counter2 Overflow Interrupt Enable

pub fn ocie2a(&mut self) -> OCIE2A_W

Bit 1 - Timer/Counter2 Output Compare Match A Interrupt Enable

pub fn ocie2b(&mut self) -> OCIE2B_W

Bit 2 - Timer/Counter2 Output Compare Match B Interrupt Enable

impl W<u8, Reg<u8, _TWAMR>>

pub fn twam(&mut self) -> TWAM_W

Bits 1:7 - TWI (Slave) Address Mask Bits

impl W<u8, Reg<u8, _TWAR>>

pub fn twgce(&mut self) -> TWGCE_W

Bit 0 - TWI General Call Recognition Enable Bit

pub fn twa(&mut self) -> TWA_W

Bits 1:7 - TWI (Slave) Address register Bits

impl W<u8, Reg<u8, _TWCR>>

pub fn twie(&mut self) -> TWIE_W

Bit 0 - TWI Interrupt Enable

pub fn twen(&mut self) -> TWEN_W

Bit 2 - TWI Enable Bit

pub fn twsto(&mut self) -> TWSTO_W

Bit 4 - TWI Stop Condition Bit

pub fn twsta(&mut self) -> TWSTA_W

Bit 5 - TWI Start Condition Bit

pub fn twea(&mut self) -> TWEA_W

Bit 6 - TWI Enable Acknowledge Bit

pub fn twint(&mut self) -> TWINT_W

Bit 7 - TWI Interrupt Flag

impl W<u8, Reg<u8, _TWSR>>

pub fn twps(&mut self) -> TWPS_W

Bits 0:1 - TWI Prescaler

impl W<u8, Reg<u8, _UCSR0A>>

pub fn mpcm0(&mut self) -> MPCM0_W

Bit 0 - Multi-processor Communication Mode

pub fn u2x0(&mut self) -> U2X0_W

Bit 1 - Double the USART transmission speed

pub fn txc0(&mut self) -> TXC0_W

Bit 6 - USART Transmit Complete

impl W<u8, Reg<u8, _UCSR0B>>

pub fn txb80(&mut self) -> TXB80_W

Bit 0 - Transmit Data Bit 8

pub fn ucsz02(&mut self) -> UCSZ02_W

Bit 2 - Character Size

pub fn txen0(&mut self) -> TXEN0_W

Bit 3 - Transmitter Enable

pub fn rxen0(&mut self) -> RXEN0_W

Bit 4 - Receiver Enable

pub fn udrie0(&mut self) -> UDRIE0_W

Bit 5 - USART Data register Empty Interrupt Enable

pub fn txcie0(&mut self) -> TXCIE0_W

Bit 6 - TX Complete Interrupt Enable

pub fn rxcie0(&mut self) -> RXCIE0_W

Bit 7 - RX Complete Interrupt Enable

impl W<u8, Reg<u8, _UCSR0C>>

pub fn ucpol0(&mut self) -> UCPOL0_W

Bit 0 - Clock Polarity

pub fn ucsz0(&mut self) -> UCSZ0_W

Bits 1:2 - Character Size

pub fn usbs0(&mut self) -> USBS0_W

Bit 3 - Stop Bit Select

pub fn upm0(&mut self) -> UPM0_W

Bits 4:5 - Parity Mode Bits

pub fn umsel0(&mut self) -> UMSEL0_W

Bits 6:7 - USART Mode Select

impl W<u8, Reg<u8, _WDTCSR>>

pub fn wde(&mut self) -> WDE_W

Bit 3 - Watch Dog Enable

pub fn wdce(&mut self) -> WDCE_W

Bit 4 - Watchdog Change Enable

pub fn wdie(&mut self) -> WDIE_W

Bit 6 - Watchdog Timeout Interrupt Enable

pub fn wdif(&mut self) -> WDIF_W

Bit 7 - Watchdog Timeout Interrupt Flag

pub fn wdpl(&mut self) -> WDPL_W

Bits 0:2 - Watchdog Timer Prescaler - Low Bits

pub fn wdph(&mut self) -> WDPH_W

Bit 5 - Watchdog Timer Prescaler - High Bit

impl W<u8, Reg<u8, _ACSR>>

pub fn acis(&mut self) -> ACIS_W

Bits 0:1 - Analog Comparator Interrupt Mode Select

pub fn acic(&mut self) -> ACIC_W

Bit 2 - Analog Comparator Input Capture Enable

pub fn acie(&mut self) -> ACIE_W

Bit 3 - Analog Comparator Interrupt Enable

pub fn aci(&mut self) -> ACI_W

Bit 4 - Analog Comparator Interrupt Flag

pub fn acbg(&mut self) -> ACBG_W

Bit 6 - Analog Comparator Bandgap Select

pub fn acd(&mut self) -> ACD_W

Bit 7 - Analog Comparator Disable

impl W<u8, Reg<u8, _ADCSRB>>

pub fn acme(&mut self) -> ACME_W

Bit 6 - Analog Comparator Multiplexer Enable

impl W<u8, Reg<u8, _DIDR1>>

pub fn ain0d(&mut self) -> AIN0D_W

Bit 0 - AIN0 Digital Input Disable

pub fn ain1d(&mut self) -> AIN1D_W

Bit 1 - AIN1 Digital Input Disable

impl W<u8, Reg<u8, _ADCSRA>>

pub fn adps(&mut self) -> ADPS_W

Bits 0:2 - ADC Prescaler Select Bits

pub fn adie(&mut self) -> ADIE_W

Bit 3 - ADC Interrupt Enable

pub fn adif(&mut self) -> ADIF_W

Bit 4 - ADC Interrupt Flag

pub fn adate(&mut self) -> ADATE_W

Bit 5 - ADC Auto Trigger Enable

pub fn adsc(&mut self) -> ADSC_W

Bit 6 - ADC Start Conversion

pub fn aden(&mut self) -> ADEN_W

Bit 7 - ADC Enable

impl W<u8, Reg<u8, _ADCSRB>>

pub fn adts(&mut self) -> ADTS_W

Bits 0:4 - ADC Auto Trigger Sources

pub fn mux5(&mut self) -> MUX5_W

Bit 5 - Analog Channel and Gain Selection Bits

pub fn adhsm(&mut self) -> ADHSM_W

Bit 7 - ADC High Speed Mode

impl W<u8, Reg<u8, _ADMUX>>

pub fn mux(&mut self) -> MUX_W

Bits 0:4 - Analog Channel and Gain Selection Bits

pub fn adlar(&mut self) -> ADLAR_W

Bit 5 - Left Adjust Result

pub fn refs(&mut self) -> REFS_W

Bits 6:7 - Reference Selection Bits

impl W<u8, Reg<u8, _DIDR0>>

pub fn adc0d(&mut self) -> ADC0D_W

Bit 0 - ADC0 Digital input Disable

pub fn adc1d(&mut self) -> ADC1D_W

Bit 1 - ADC1 Digital input Disable

pub fn adc2d(&mut self) -> ADC2D_W

Bit 2 - ADC2 Digital input Disable

pub fn adc3d(&mut self) -> ADC3D_W

Bit 3 - ADC3 Digital input Disable

pub fn adc4d(&mut self) -> ADC4D_W

Bit 4 - ADC4 Digital input Disable

pub fn adc5d(&mut self) -> ADC5D_W

Bit 5 - ADC5 Digital input Disable

pub fn adc6d(&mut self) -> ADC6D_W

Bit 6 - ADC6 Digital input Disable

pub fn adc7d(&mut self) -> ADC7D_W

Bit 7 - ADC7 Digital input Disable

impl W<u8, Reg<u8, _DIDR2>>

pub fn adc8d(&mut self) -> ADC8D_W

Bit 0 - ADC8 Digital input Disable

pub fn adc9d(&mut self) -> ADC9D_W

Bit 1 - ADC9 Digital input Disable

pub fn adc10d(&mut self) -> ADC10D_W

Bit 2 - ADC10 Digital input Disable

pub fn adc11d(&mut self) -> ADC11D_W

Bit 3 - ADC11 Digital input Disable

pub fn adc12d(&mut self) -> ADC12D_W

Bit 4 - ADC12 Digital input Disable

pub fn adc13d(&mut self) -> ADC13D_W

Bit 5 - ADC13 Digital input Disable

impl W<u8, Reg<u8, _SPMCSR>>

pub fn spmen(&mut self) -> SPMEN_W

Bit 0 - Store Program Memory Enable

pub fn pgers(&mut self) -> PGERS_W

Bit 1 - Page Erase

pub fn pgwrt(&mut self) -> PGWRT_W

Bit 2 - Page Write

pub fn blbset(&mut self) -> BLBSET_W

Bit 3 - Boot Lock Bit Set

pub fn rwwsre(&mut self) -> RWWSRE_W

Bit 4 - Read While Write section read enable

pub fn sigrd(&mut self) -> SIGRD_W

Bit 5 - Signature Row Read

pub fn rwwsb(&mut self) -> RWWSB_W

Bit 6 - Read While Write Section Busy

pub fn spmie(&mut self) -> SPMIE_W

Bit 7 - SPM Interrupt Enable

impl W<u8, Reg<u8, _CLKPR>>

pub fn clkps(&mut self) -> CLKPS_W

Bits 0:3 -

pub fn clkpce(&mut self) -> CLKPCE_W

Bit 7 -

impl W<u8, Reg<u8, _CLKSEL0>>

pub fn clks(&mut self) -> CLKS_W

Bit 0 -

pub fn exte(&mut self) -> EXTE_W

Bit 2 -

pub fn rce(&mut self) -> RCE_W

Bit 3 -

pub fn exsut(&mut self) -> EXSUT_W

Bits 4:5 -

pub fn rcsut(&mut self) -> RCSUT_W

Bits 6:7 -

impl W<u8, Reg<u8, _CLKSEL1>>

pub fn excksel(&mut self) -> EXCKSEL_W

Bits 0:3 -

pub fn rccksel(&mut self) -> RCCKSEL_W

Bits 4:7 -

impl W<u8, Reg<u8, _GPIOR0>>

pub fn gpior00(&mut self) -> GPIOR00_W

Bit 0 - General Purpose IO Register 0 bit 0

pub fn gpior01(&mut self) -> GPIOR01_W

Bit 1 - General Purpose IO Register 0 bit 1

pub fn gpior02(&mut self) -> GPIOR02_W

Bit 2 - General Purpose IO Register 0 bit 2

pub fn gpior03(&mut self) -> GPIOR03_W

Bit 3 - General Purpose IO Register 0 bit 3

pub fn gpior04(&mut self) -> GPIOR04_W

Bit 4 - General Purpose IO Register 0 bit 4

pub fn gpior05(&mut self) -> GPIOR05_W

Bit 5 - General Purpose IO Register 0 bit 5

pub fn gpior06(&mut self) -> GPIOR06_W

Bit 6 - General Purpose IO Register 0 bit 6

pub fn gpior07(&mut self) -> GPIOR07_W

Bit 7 - General Purpose IO Register 0 bit 7

impl W<u8, Reg<u8, _GPIOR1>>

pub fn gpior(&mut self) -> GPIOR_W

Bits 0:7 - General Purpose IO Register 1 bis

impl W<u8, Reg<u8, _GPIOR2>>

pub fn gpior(&mut self) -> GPIOR_W

Bits 0:7 - General Purpose IO Register 2 bis

impl W<u8, Reg<u8, _MCUCR>>

pub fn ivce(&mut self) -> IVCE_W

Bit 0 - Interrupt Vector Change Enable

pub fn ivsel(&mut self) -> IVSEL_W

Bit 1 - Interrupt Vector Select

pub fn pud(&mut self) -> PUD_W

Bit 4 - Pull-up disable

pub fn jtd(&mut self) -> JTD_W

Bit 7 - JTAG Interface Disable

impl W<u8, Reg<u8, _MCUSR>>

pub fn porf(&mut self) -> PORF_W

Bit 0 - Power-on reset flag

pub fn extrf(&mut self) -> EXTRF_W

Bit 1 - External Reset Flag

pub fn borf(&mut self) -> BORF_W

Bit 2 - Brown-out Reset Flag

pub fn wdrf(&mut self) -> WDRF_W

Bit 3 - Watchdog Reset Flag

pub fn jtrf(&mut self) -> JTRF_W

Bit 4 - JTAG Reset Flag

impl W<u8, Reg<u8, _OSCCAL>>

pub fn osccal(&mut self) -> OSCCAL_W

Bits 0:7 - Oscillator Calibration

impl W<u8, Reg<u8, _PRR0>>

pub fn pradc(&mut self) -> PRADC_W

Bit 0 - Power Reduction ADC

pub fn prusart0(&mut self) -> PRUSART0_W

Bit 1 - Power Reduction USART

pub fn prspi(&mut self) -> PRSPI_W

Bit 2 - Power Reduction Serial Peripheral Interface

pub fn prtim1(&mut self) -> PRTIM1_W

Bit 3 - Power Reduction Timer/Counter1

pub fn prtim0(&mut self) -> PRTIM0_W

Bit 5 - Power Reduction Timer/Counter0

pub fn prtim2(&mut self) -> PRTIM2_W

Bit 6 - Power Reduction Timer/Counter2

pub fn prtwi(&mut self) -> PRTWI_W

Bit 7 - Power Reduction TWI

impl W<u8, Reg<u8, _PRR1>>

pub fn prusart1(&mut self) -> PRUSART1_W

Bit 0 - Power Reduction USART1

pub fn prtim3(&mut self) -> PRTIM3_W

Bit 3 - Power Reduction Timer/Counter3

pub fn prtim4(&mut self) -> PRTIM4_W

Bit 4 - Power Reduction Timer/Counter4

pub fn prusb(&mut self) -> PRUSB_W

Bit 7 - Power Reduction USB

impl W<u8, Reg<u8, _RAMPZ>>

pub fn rampz(&mut self) -> RAMPZ_W

Bits 0:1 - Extended Z-Pointer Value

pub fn res(&mut self) -> RES_W

Bits 2:7 - Reserved

impl W<u8, Reg<u8, _RCCTRL>>

pub fn rcfreq(&mut self) -> RCFREQ_W

Bit 0 -

impl W<u8, Reg<u8, _SMCR>>

pub fn se(&mut self) -> SE_W

Bit 0 - Sleep Enable

pub fn sm(&mut self) -> SM_W

Bits 1:3 - Sleep Mode Select bits

impl W<u8, Reg<u8, _EECR>>

pub fn eere(&mut self) -> EERE_W

Bit 0 - EEPROM Read Enable

pub fn eepe(&mut self) -> EEPE_W

Bit 1 - EEPROM Write Enable

pub fn eempe(&mut self) -> EEMPE_W

Bit 2 - EEPROM Master Write Enable

pub fn eerie(&mut self) -> EERIE_W

Bit 3 - EEPROM Ready Interrupt Enable

pub fn eepm(&mut self) -> EEPM_W

Bits 4:5 - EEPROM Programming Mode Bits

impl W<u8, Reg<u8, _EICRA>>

pub fn isc0(&mut self) -> ISC0_W

Bits 0:1 - External Interrupt Sense Control Bit

pub fn isc1(&mut self) -> ISC1_W

Bits 2:3 - External Interrupt Sense Control Bit

pub fn isc2(&mut self) -> ISC2_W

Bits 4:5 - External Interrupt Sense Control Bit

pub fn isc3(&mut self) -> ISC3_W

Bits 6:7 - External Interrupt Sense Control Bit

impl W<u8, Reg<u8, _EICRB>>

pub fn isc4(&mut self) -> ISC4_W

Bits 0:1 - External Interrupt 7-4 Sense Control Bit

pub fn isc5(&mut self) -> ISC5_W

Bits 2:3 - External Interrupt 7-4 Sense Control Bit

pub fn isc6(&mut self) -> ISC6_W

Bits 4:5 - External Interrupt 7-4 Sense Control Bit

pub fn isc7(&mut self) -> ISC7_W

Bits 6:7 - External Interrupt 7-4 Sense Control Bit

impl W<u8, Reg<u8, _EIMSK>>

pub fn int(&mut self) -> INT_W

Bits 0:7 - External Interrupt Request 7 Enable

impl W<u8, Reg<u8, _PCICR>>

pub fn pcie0(&mut self) -> PCIE0_W

Bit 0 - Pin Change Interrupt Enable 0

impl W<u8, Reg<u8, _EXTENDED>>

pub fn bodlevel(&mut self) -> BODLEVEL_W

Bits 0:2 - Brown-out Detector trigger level

pub fn hwbe(&mut self) -> HWBE_W

Bit 3 - Hardware Boot Enable

impl W<u8, Reg<u8, _HIGH>>

pub fn bootrst(&mut self) -> BOOTRST_W

Bit 0 - Boot Reset vector Enabled

pub fn bootsz(&mut self) -> BOOTSZ_W

Bits 1:2 - Select Boot Size

pub fn eesave(&mut self) -> EESAVE_W

Bit 3 - Preserve EEPROM through the Chip Erase cycle

pub fn wdton(&mut self) -> WDTON_W

Bit 4 - Watchdog timer always on

pub fn spien(&mut self) -> SPIEN_W

Bit 5 - Serial program downloading (SPI) enabled

pub fn jtagen(&mut self) -> JTAGEN_W

Bit 6 - JTAG Interface Enabled

pub fn ocden(&mut self) -> OCDEN_W

Bit 7 - On-Chip Debug Enabled

impl W<u8, Reg<u8, _LOW>>

pub fn sut_cksel(&mut self) -> SUT_CKSEL_W

Bits 0:5 - Select Clock Source

pub fn ckout(&mut self) -> CKOUT_W

Bit 6 - Clock output on PORTC7

pub fn ckdiv8(&mut self) -> CKDIV8_W

Bit 7 - Divide clock by 8 internally

impl W<u8, Reg<u8, _MCUCR>>

pub fn jtd(&mut self) -> JTD_W

Bit 7 - JTAG Interface Disable

impl W<u8, Reg<u8, _LOCKBIT>>

pub fn lb(&mut self) -> LB_W

Bits 0:1 - Memory Lock

pub fn blb0(&mut self) -> BLB0_W

Bits 2:3 - Boot Loader Protection Mode

pub fn blb1(&mut self) -> BLB1_W

Bits 4:5 - Boot Loader Protection Mode

impl W<u8, Reg<u8, _PLLCSR>>

pub fn plle(&mut self) -> PLLE_W

Bit 1 - PLL Enable Bit

pub fn pindiv(&mut self) -> PINDIV_W

Bit 4 - PLL prescaler Bit 2

impl W<u8, Reg<u8, _PLLFRQ>>

pub fn pdiv(&mut self) -> PDIV_W

Bits 0:3 - PLL Lock Frequency

pub fn plltm(&mut self) -> PLLTM_W

Bits 4:5 - PLL Postscaler for High Speed Timer

pub fn pllusb(&mut self) -> PLLUSB_W

Bit 6 - PLL Postscaler for USB Peripheral

pub fn pinmux(&mut self) -> PINMUX_W

Bit 7 - PLL Input Multiplexer

impl W<u8, Reg<u8, _DDRB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

pub fn pb6(&mut self) -> PB6_W

Bit 6 - Pin B6

pub fn pb7(&mut self) -> PB7_W

Bit 7 - Pin B7

impl W<u8, Reg<u8, _PORTB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

pub fn pb6(&mut self) -> PB6_W

Bit 6 - Pin B6

pub fn pb7(&mut self) -> PB7_W

Bit 7 - Pin B7

impl W<u8, Reg<u8, _DDRC>>

pub fn pc6(&mut self) -> PC6_W

Bit 6 - Pin C6

pub fn pc7(&mut self) -> PC7_W

Bit 7 - Pin C7

impl W<u8, Reg<u8, _PORTC>>

pub fn pc6(&mut self) -> PC6_W

Bit 6 - Pin C6

pub fn pc7(&mut self) -> PC7_W

Bit 7 - Pin C7

impl W<u8, Reg<u8, _DDRD>>

pub fn pd0(&mut self) -> PD0_W

Bit 0 - Pin D0

pub fn pd1(&mut self) -> PD1_W

Bit 1 - Pin D1

pub fn pd2(&mut self) -> PD2_W

Bit 2 - Pin D2

pub fn pd3(&mut self) -> PD3_W

Bit 3 - Pin D3

pub fn pd4(&mut self) -> PD4_W

Bit 4 - Pin D4

pub fn pd5(&mut self) -> PD5_W

Bit 5 - Pin D5

pub fn pd6(&mut self) -> PD6_W

Bit 6 - Pin D6

pub fn pd7(&mut self) -> PD7_W

Bit 7 - Pin D7

impl W<u8, Reg<u8, _PORTD>>

pub fn pd0(&mut self) -> PD0_W

Bit 0 - Pin D0

pub fn pd1(&mut self) -> PD1_W

Bit 1 - Pin D1

pub fn pd2(&mut self) -> PD2_W

Bit 2 - Pin D2

pub fn pd3(&mut self) -> PD3_W

Bit 3 - Pin D3

pub fn pd4(&mut self) -> PD4_W

Bit 4 - Pin D4

pub fn pd5(&mut self) -> PD5_W

Bit 5 - Pin D5

pub fn pd6(&mut self) -> PD6_W

Bit 6 - Pin D6

pub fn pd7(&mut self) -> PD7_W

Bit 7 - Pin D7

impl W<u8, Reg<u8, _DDRE>>

pub fn pe2(&mut self) -> PE2_W

Bit 2 - Pin E2

pub fn pe6(&mut self) -> PE6_W

Bit 6 - Pin E6

impl W<u8, Reg<u8, _PORTE>>

pub fn pe2(&mut self) -> PE2_W

Bit 2 - Pin E2

pub fn pe6(&mut self) -> PE6_W

Bit 6 - Pin E6

impl W<u8, Reg<u8, _DDRF>>

pub fn pf0(&mut self) -> PF0_W

Bit 0 - Pin F0

pub fn pf1(&mut self) -> PF1_W

Bit 1 - Pin F1

pub fn pf4(&mut self) -> PF4_W

Bit 4 - Pin F4

pub fn pf5(&mut self) -> PF5_W

Bit 5 - Pin F5

pub fn pf6(&mut self) -> PF6_W

Bit 6 - Pin F6

impl W<u8, Reg<u8, _PORTF>>

pub fn pf0(&mut self) -> PF0_W

Bit 0 - Pin F0

pub fn pf1(&mut self) -> PF1_W

Bit 1 - Pin F1

pub fn pf4(&mut self) -> PF4_W

Bit 4 - Pin F4

pub fn pf5(&mut self) -> PF5_W

Bit 5 - Pin F5

pub fn pf6(&mut self) -> PF6_W

Bit 6 - Pin F6

impl W<u8, Reg<u8, _SPCR>>

pub fn spr(&mut self) -> SPR_W

Bits 0:1 - SPI Clock Rate Selects

pub fn cpha(&mut self) -> CPHA_W

Bit 2 - Clock Phase

pub fn cpol(&mut self) -> CPOL_W

Bit 3 - Clock polarity

pub fn mstr(&mut self) -> MSTR_W

Bit 4 - Master/Slave Select

pub fn dord(&mut self) -> DORD_W

Bit 5 - Data Order

pub fn spe(&mut self) -> SPE_W

Bit 6 - SPI Enable

pub fn spie(&mut self) -> SPIE_W

Bit 7 - SPI Interrupt Enable

impl W<u8, Reg<u8, _SPSR>>

pub fn spi2x(&mut self) -> SPI2X_W

Bit 0 - Double SPI Speed Bit

impl W<u8, Reg<u8, _GTCCR>>

pub fn psrsync(&mut self) -> PSRSYNC_W

Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0

pub fn tsm(&mut self) -> TSM_W

Bit 7 - Timer/Counter Synchronization Mode

impl W<u8, Reg<u8, _TCCR0A>>

pub fn wgm0(&mut self) -> WGM0_W

Bits 0:1 - Waveform Generation Mode

pub fn com0b(&mut self) -> COM0B_W

Bits 4:5 - Compare Output B Mode

pub fn com0a(&mut self) -> COM0A_W

Bits 6:7 - Compare Output A Mode

impl W<u8, Reg<u8, _TCCR0B>>

pub fn cs0(&mut self) -> CS0_W

Bits 0:2 - Clock Select

pub fn wgm02(&mut self) -> WGM02_W

Bit 3 - Waveform Generation Mode High Bit (Enable Top: OCRA for PWM modes)

pub fn foc0b(&mut self) -> FOC0B_W

Bit 6 - Force Output Compare B

pub fn foc0a(&mut self) -> FOC0A_W

Bit 7 - Force Output Compare A

impl W<u8, Reg<u8, _TIMSK0>>

pub fn toie0(&mut self) -> TOIE0_W

Bit 0 - Timer/Counter0 Overflow Interrupt Enable

pub fn ocie0a(&mut self) -> OCIE0A_W

Bit 1 - Timer/Counter0 Output Compare Match A Interrupt Enable

pub fn ocie0b(&mut self) -> OCIE0B_W

Bit 2 - Timer/Counter0 Output Compare Match B Interrupt Enable

impl W<u8, Reg<u8, _TCCR1A>>

pub fn wgm1(&mut self) -> WGM1_W

Bits 0:1 - Waveform Generation Mode

pub fn com1c(&mut self) -> COM1C_W

Bits 2:3 - Compare Output Mode 1C, bits

pub fn com1b(&mut self) -> COM1B_W

Bits 4:5 - Compare Output Mode 1B, bits

pub fn com1a(&mut self) -> COM1A_W

Bits 6:7 - Compare Output Mode 1A, bits

impl W<u8, Reg<u8, _TCCR1B>>

pub fn cs1(&mut self) -> CS1_W

Bits 0:2 - Prescaler source of Timer/Counter 1

pub fn wgm1(&mut self) -> WGM1_W

Bits 3:4 - Waveform Generation Mode

pub fn ices1(&mut self) -> ICES1_W

Bit 6 - Input Capture 1 Edge Select

pub fn icnc1(&mut self) -> ICNC1_W

Bit 7 - Input Capture 1 Noise Canceler

impl W<u8, Reg<u8, _TCCR1C>>

pub fn foc1c(&mut self) -> FOC1C_W

Bit 5 - Force Output Compare 1C

pub fn foc1b(&mut self) -> FOC1B_W

Bit 6 - Force Output Compare 1B

pub fn foc1a(&mut self) -> FOC1A_W

Bit 7 - Force Output Compare 1A

impl W<u8, Reg<u8, _TIMSK1>>

pub fn toie1(&mut self) -> TOIE1_W

Bit 0 - Timer/Counter1 Overflow Interrupt Enable

pub fn ocie1a(&mut self) -> OCIE1A_W

Bit 1 - Timer/Counter1 Output Compare A Match Interrupt Enable

pub fn ocie1b(&mut self) -> OCIE1B_W

Bit 2 - Timer/Counter1 Output Compare B Match Interrupt Enable

pub fn ocie1c(&mut self) -> OCIE1C_W

Bit 3 - Timer/Counter1 Output Compare C Match Interrupt Enable

pub fn icie1(&mut self) -> ICIE1_W

Bit 5 - Timer/Counter1 Input Capture Interrupt Enable

impl W<u8, Reg<u8, _TCCR3A>>

pub fn wgm3(&mut self) -> WGM3_W

Bits 0:1 - Waveform Generation Mode

pub fn com3c(&mut self) -> COM3C_W

Bits 2:3 - Compare Output Mode 3C, bits

pub fn com3b(&mut self) -> COM3B_W

Bits 4:5 - Compare Output Mode 3B, bits

pub fn com3a(&mut self) -> COM3A_W

Bits 6:7 - Compare Output Mode 1A, bits

impl W<u8, Reg<u8, _TCCR3B>>

pub fn cs3(&mut self) -> CS3_W

Bits 0:2 - Prescaler source of Timer/Counter 3

pub fn wgm3(&mut self) -> WGM3_W

Bits 3:4 - Waveform Generation Mode

pub fn ices3(&mut self) -> ICES3_W

Bit 6 - Input Capture 3 Edge Select

pub fn icnc3(&mut self) -> ICNC3_W

Bit 7 - Input Capture 3 Noise Canceler

impl W<u8, Reg<u8, _TCCR3C>>

pub fn foc3c(&mut self) -> FOC3C_W

Bit 5 - Force Output Compare 3C

pub fn foc3b(&mut self) -> FOC3B_W

Bit 6 - Force Output Compare 3B

pub fn foc3a(&mut self) -> FOC3A_W

Bit 7 - Force Output Compare 3A

impl W<u8, Reg<u8, _TIMSK3>>

pub fn toie3(&mut self) -> TOIE3_W

Bit 0 - Timer/Counter3 Overflow Interrupt Enable

pub fn ocie3a(&mut self) -> OCIE3A_W

Bit 1 - Timer/Counter3 Output Compare A Match Interrupt Enable

pub fn ocie3b(&mut self) -> OCIE3B_W

Bit 2 - Timer/Counter3 Output Compare B Match Interrupt Enable

pub fn ocie3c(&mut self) -> OCIE3C_W

Bit 3 - Timer/Counter3 Output Compare C Match Interrupt Enable

pub fn icie3(&mut self) -> ICIE3_W

Bit 5 - Timer/Counter3 Input Capture Interrupt Enable

impl W<u8, Reg<u8, _DT4>>

pub fn dt4l(&mut self) -> DT4L_W

Bits 0:7 - Timer/Counter 4 Dead Time Value Bits

impl W<u8, Reg<u8, _TCCR4A>>

pub fn pwm4b(&mut self) -> PWM4B_W

Bit 0 -

pub fn pwm4a(&mut self) -> PWM4A_W

Bit 1 -

pub fn foc4b(&mut self) -> FOC4B_W

Bit 2 - Force Output Compare Match 4B

pub fn foc4a(&mut self) -> FOC4A_W

Bit 3 - Force Output Compare Match 4A

pub fn com4b(&mut self) -> COM4B_W

Bits 4:5 - Compare Output Mode 4B, bits

pub fn com4a(&mut self) -> COM4A_W

Bits 6:7 - Compare Output Mode 1A, bits

impl W<u8, Reg<u8, _TCCR4B>>

pub fn cs4(&mut self) -> CS4_W

Bits 0:3 - Clock Select Bits

pub fn dtps4(&mut self) -> DTPS4_W

Bits 4:5 - Dead Time Prescaler Bits

pub fn psr4(&mut self) -> PSR4_W

Bit 6 - Prescaler Reset Timer/Counter 4

pub fn pwm4x(&mut self) -> PWM4X_W

Bit 7 - PWM Inversion Mode

impl W<u8, Reg<u8, _TCCR4C>>

pub fn pwm4d(&mut self) -> PWM4D_W

Bit 0 - Pulse Width Modulator D Enable

pub fn foc4d(&mut self) -> FOC4D_W

Bit 1 - Force Output Compare Match 4D

pub fn com4d(&mut self) -> COM4D_W

Bits 2:3 - Comparator D Output Mode

pub fn com4b0s(&mut self) -> COM4B0S_W

Bit 4 - Comparator B Output Mode

pub fn com4b1s(&mut self) -> COM4B1S_W

Bit 5 - Comparator B Output Mode

pub fn com4a0s(&mut self) -> COM4A0S_W

Bit 6 - Comparator A Output Mode

pub fn com4a1s(&mut self) -> COM4A1S_W

Bit 7 - Comparator A Output Mode

impl W<u8, Reg<u8, _TCCR4D>>

pub fn wgm4(&mut self) -> WGM4_W

Bits 0:1 - Waveform Generation Mode bits

pub fn fpf4(&mut self) -> FPF4_W

Bit 2 - Fault Protection Interrupt Flag

pub fn fpac4(&mut self) -> FPAC4_W

Bit 3 - Fault Protection Analog Comparator Enable

pub fn fpes4(&mut self) -> FPES4_W

Bit 4 - Fault Protection Edge Select

pub fn fpnc4(&mut self) -> FPNC4_W

Bit 5 - Fault Protection Noise Canceler

pub fn fpen4(&mut self) -> FPEN4_W

Bit 6 - Fault Protection Mode Enable

pub fn fpie4(&mut self) -> FPIE4_W

Bit 7 - Fault Protection Interrupt Enable

impl W<u8, Reg<u8, _TCCR4E>>

pub fn oc4oe(&mut self) -> OC4OE_W

Bits 0:5 - Output Compare Override Enable bit

pub fn enhc4(&mut self) -> ENHC4_W

Bit 6 - Enhanced Compare/PWM Mode

pub fn tlock4(&mut self) -> TLOCK4_W

Bit 7 - Register Update Lock

impl W<u8, Reg<u8, _TIMSK4>>

pub fn toie4(&mut self) -> TOIE4_W

Bit 2 - Timer/Counter4 Overflow Interrupt Enable

pub fn ocie4b(&mut self) -> OCIE4B_W

Bit 5 - Timer/Counter4 Output Compare B Match Interrupt Enable

pub fn ocie4a(&mut self) -> OCIE4A_W

Bit 6 - Timer/Counter4 Output Compare A Match Interrupt Enable

pub fn ocie4d(&mut self) -> OCIE4D_W

Bit 7 - Timer/Counter4 Output Compare D Match Interrupt Enable

impl W<u8, Reg<u8, _TWAMR>>

pub fn twam(&mut self) -> TWAM_W

Bits 1:7 - TWI (Slave) Address Mask Bits

impl W<u8, Reg<u8, _TWAR>>

pub fn twgce(&mut self) -> TWGCE_W

Bit 0 - TWI General Call Recognition Enable Bit

pub fn twa(&mut self) -> TWA_W

Bits 1:7 - TWI (Slave) Address register Bits

impl W<u8, Reg<u8, _TWCR>>

pub fn twie(&mut self) -> TWIE_W

Bit 0 - TWI Interrupt Enable

pub fn twen(&mut self) -> TWEN_W

Bit 2 - TWI Enable Bit

pub fn twsto(&mut self) -> TWSTO_W

Bit 4 - TWI Stop Condition Bit

pub fn twsta(&mut self) -> TWSTA_W

Bit 5 - TWI Start Condition Bit

pub fn twea(&mut self) -> TWEA_W

Bit 6 - TWI Enable Acknowledge Bit

pub fn twint(&mut self) -> TWINT_W

Bit 7 - TWI Interrupt Flag

impl W<u8, Reg<u8, _TWSR>>

pub fn twps(&mut self) -> TWPS_W

Bits 0:1 - TWI Prescaler

impl W<u8, Reg<u8, _UCSR1A>>

pub fn mpcm1(&mut self) -> MPCM1_W

Bit 0 - Multi-processor Communication Mode

pub fn u2x1(&mut self) -> U2X1_W

Bit 1 - Double the USART transmission speed

pub fn txc1(&mut self) -> TXC1_W

Bit 6 - USART Transmit Complete

impl W<u8, Reg<u8, _UCSR1B>>

pub fn txb81(&mut self) -> TXB81_W

Bit 0 - Transmit Data Bit 8

pub fn ucsz12(&mut self) -> UCSZ12_W

Bit 2 - Character Size

pub fn txen1(&mut self) -> TXEN1_W

Bit 3 - Transmitter Enable

pub fn rxen1(&mut self) -> RXEN1_W

Bit 4 - Receiver Enable

pub fn udrie1(&mut self) -> UDRIE1_W

Bit 5 - USART Data register Empty Interrupt Enable

pub fn txcie1(&mut self) -> TXCIE1_W

Bit 6 - TX Complete Interrupt Enable

pub fn rxcie1(&mut self) -> RXCIE1_W

Bit 7 - RX Complete Interrupt Enable

impl W<u8, Reg<u8, _UCSR1C>>

pub fn ucpol1(&mut self) -> UCPOL1_W

Bit 0 - Clock Polarity

pub fn ucsz1(&mut self) -> UCSZ1_W

Bits 1:2 - Character Size

pub fn usbs1(&mut self) -> USBS1_W

Bit 3 - Stop Bit Select

pub fn upm1(&mut self) -> UPM1_W

Bits 4:5 - Parity Mode Bits

pub fn umsel1(&mut self) -> UMSEL1_W

Bits 6:7 - USART Mode Select

impl W<u8, Reg<u8, _UCSR1D>>

pub fn rtsen(&mut self) -> RTSEN_W

Bit 0 - RTS Enable

pub fn ctsen(&mut self) -> CTSEN_W

Bit 1 - CTS Enable

impl W<u8, Reg<u8, _UDADDR>>

pub fn uadd(&mut self) -> UADD_W

Bits 0:6 -

pub fn adden(&mut self) -> ADDEN_W

Bit 7 -

impl W<u8, Reg<u8, _UDCON>>

pub fn detach(&mut self) -> DETACH_W

Bit 0 -

pub fn rmwkup(&mut self) -> RMWKUP_W

Bit 1 -

pub fn lsm(&mut self) -> LSM_W

Bit 2 - USB low speed mode

pub fn rstcpu(&mut self) -> RSTCPU_W

Bit 3 -

impl W<u8, Reg<u8, _UDIEN>>

pub fn suspe(&mut self) -> SUSPE_W

Bit 0 -

pub fn sofe(&mut self) -> SOFE_W

Bit 2 -

pub fn eorste(&mut self) -> EORSTE_W

Bit 3 -

pub fn wakeupe(&mut self) -> WAKEUPE_W

Bit 4 -

pub fn eorsme(&mut self) -> EORSME_W

Bit 5 -

pub fn uprsme(&mut self) -> UPRSME_W

Bit 6 -

impl W<u8, Reg<u8, _UDINT>>

pub fn suspi(&mut self) -> SUSPI_W

Bit 0 -

pub fn sofi(&mut self) -> SOFI_W

Bit 2 -

pub fn eorsti(&mut self) -> EORSTI_W

Bit 3 -

pub fn wakeupi(&mut self) -> WAKEUPI_W

Bit 4 -

pub fn eorsmi(&mut self) -> EORSMI_W

Bit 5 -

pub fn uprsmi(&mut self) -> UPRSMI_W

Bit 6 -

impl W<u8, Reg<u8, _UECFG0X>>

pub fn epdir(&mut self) -> EPDIR_W

Bit 0 -

pub fn eptype(&mut self) -> EPTYPE_W

Bits 6:7 -

impl W<u8, Reg<u8, _UECFG1X>>

pub fn alloc(&mut self) -> ALLOC_W

Bit 1 -

pub fn epbk(&mut self) -> EPBK_W

Bits 2:3 -

pub fn epsize(&mut self) -> EPSIZE_W

Bits 4:6 -

impl W<u8, Reg<u8, _UECONX>>

pub fn epen(&mut self) -> EPEN_W

Bit 0 -

pub fn rstdt(&mut self) -> RSTDT_W

Bit 3 -

pub fn stallrqc(&mut self) -> STALLRQC_W

Bit 4 -

pub fn stallrq(&mut self) -> STALLRQ_W

Bit 5 -

impl W<u8, Reg<u8, _UEDATX>>

pub fn dat(&mut self) -> DAT_W

Bits 0:7 -

impl W<u8, Reg<u8, _UEIENX>>

pub fn txine(&mut self) -> TXINE_W

Bit 0 -

pub fn stallede(&mut self) -> STALLEDE_W

Bit 1 -

pub fn rxoute(&mut self) -> RXOUTE_W

Bit 2 -

pub fn rxstpe(&mut self) -> RXSTPE_W

Bit 3 -

pub fn nakoute(&mut self) -> NAKOUTE_W

Bit 4 -

pub fn nakine(&mut self) -> NAKINE_W

Bit 6 -

pub fn flerre(&mut self) -> FLERRE_W

Bit 7 -

impl W<u8, Reg<u8, _UEINTX>>

pub fn txini(&mut self) -> TXINI_W

Bit 0 -

pub fn stalledi(&mut self) -> STALLEDI_W

Bit 1 -

pub fn rxouti(&mut self) -> RXOUTI_W

Bit 2 -

pub fn rxstpi(&mut self) -> RXSTPI_W

Bit 3 -

pub fn nakouti(&mut self) -> NAKOUTI_W

Bit 4 -

pub fn rwal(&mut self) -> RWAL_W

Bit 5 -

pub fn nakini(&mut self) -> NAKINI_W

Bit 6 -

pub fn fifocon(&mut self) -> FIFOCON_W

Bit 7 -

impl W<u8, Reg<u8, _UERST>>

pub fn eprst(&mut self) -> EPRST_W

Bits 0:6 -

impl W<u8, Reg<u8, _UESTA0X>>

pub fn nbusybk(&mut self) -> NBUSYBK_W

Bits 0:1 -

pub fn dtseq(&mut self) -> DTSEQ_W

Bits 2:3 -

pub fn underfi(&mut self) -> UNDERFI_W

Bit 5 -

pub fn overfi(&mut self) -> OVERFI_W

Bit 6 -

pub fn cfgok(&mut self) -> CFGOK_W

Bit 7 -

impl W<u8, Reg<u8, _UHWCON>>

pub fn uvrege(&mut self) -> UVREGE_W

Bit 0 -

impl W<u8, Reg<u8, _USBCON>>

pub fn vbuste(&mut self) -> VBUSTE_W

Bit 0 -

pub fn otgpade(&mut self) -> OTGPADE_W

Bit 4 -

pub fn frzclk(&mut self) -> FRZCLK_W

Bit 5 -

pub fn usbe(&mut self) -> USBE_W

Bit 7 -

impl W<u8, Reg<u8, _USBINT>>

pub fn vbusti(&mut self) -> VBUSTI_W

Bit 0 -

impl W<u8, Reg<u8, _WDTCSR>>

pub fn wde(&mut self) -> WDE_W

Bit 3 - Watch Dog Enable

pub fn wdce(&mut self) -> WDCE_W

Bit 4 - Watchdog Change Enable

pub fn wdie(&mut self) -> WDIE_W

Bit 6 - Watchdog Timeout Interrupt Enable

pub fn wdif(&mut self) -> WDIF_W

Bit 7 - Watchdog Timeout Interrupt Flag

pub fn wdpl(&mut self) -> WDPL_W

Bits 0:2 - Watchdog Timer Prescaler - Low Bits

pub fn wdph(&mut self) -> WDPH_W

Bit 5 - Watchdog Timer Prescaler - High Bit

impl W<u8, Reg<u8, _SFIOR>>

pub fn acme(&mut self) -> ACME_W

Bit 3 - Analog Comparator Multiplexer Enable

impl W<u8, Reg<u8, _ADCSRA>>

pub fn adps(&mut self) -> ADPS_W

Bits 0:2 - ADC Prescaler Select Bits

pub fn adie(&mut self) -> ADIE_W

Bit 3 - ADC Interrupt Enable

pub fn adif(&mut self) -> ADIF_W

Bit 4 - ADC Interrupt Flag

pub fn adfr(&mut self) -> ADFR_W

Bit 5 - ADC Free Running Select

pub fn adsc(&mut self) -> ADSC_W

Bit 6 - ADC Start Conversion

pub fn aden(&mut self) -> ADEN_W

Bit 7 - ADC Enable

impl W<u8, Reg<u8, _ADMUX>>

pub fn mux(&mut self) -> MUX_W

Bits 0:3 - Analog Channel and Gain Selection Bits

pub fn adlar(&mut self) -> ADLAR_W

Bit 5 - Left Adjust Result

pub fn refs(&mut self) -> REFS_W

Bits 6:7 - Reference Selection Bits

impl W<u8, Reg<u8, _MCUCR>>

pub fn isc0(&mut self) -> ISC0_W

Bits 0:1 - Interrupt Sense Control 0 Bits

pub fn isc1(&mut self) -> ISC1_W

Bits 2:3 - Interrupt Sense Control 1 Bits

pub fn sm(&mut self) -> SM_W

Bits 4:6 - Sleep Mode Select

pub fn se(&mut self) -> SE_W

Bit 7 - Sleep Enable

impl W<u8, Reg<u8, _MCUCSR>>

pub fn porf(&mut self) -> PORF_W

Bit 0 - Power-on reset flag

pub fn extrf(&mut self) -> EXTRF_W

Bit 1 - External Reset Flag

pub fn borf(&mut self) -> BORF_W

Bit 2 - Brown-out Reset Flag

pub fn wdrf(&mut self) -> WDRF_W

Bit 3 - Watchdog Reset Flag

impl W<u8, Reg<u8, _OSCCAL>>

pub fn osccal(&mut self) -> OSCCAL_W

Bits 0:7 - Oscillator Calibration

impl W<u8, Reg<u8, _SFIOR>>

pub fn psr10(&mut self) -> PSR10_W

Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0

pub fn pud(&mut self) -> PUD_W

Bit 2 - Pull-up Disable

pub fn adhsm(&mut self) -> ADHSM_W

Bit 4 - ADC High Speed Mode

impl W<u8, Reg<u8, _SPMCR>>

pub fn spmen(&mut self) -> SPMEN_W

Bit 0 - Store Program Memory Enable

pub fn pgers(&mut self) -> PGERS_W

Bit 1 - Page Erase

pub fn pgwrt(&mut self) -> PGWRT_W

Bit 2 - Page Write

pub fn blbset(&mut self) -> BLBSET_W

Bit 3 - Boot Lock Bit Set

pub fn rwwsre(&mut self) -> RWWSRE_W

Bit 4 - Read-While-Write Section Read Enable

pub fn rwwsb(&mut self) -> RWWSB_W

Bit 6 - Read-While-Write Section Busy

pub fn spmie(&mut self) -> SPMIE_W

Bit 7 - SPM Interrupt Enable

impl W<u8, Reg<u8, _EECR>>

pub fn eere(&mut self) -> EERE_W

Bit 0 - EEPROM Read Enable

pub fn eewe(&mut self) -> EEWE_W

Bit 1 - EEPROM Write Enable

pub fn eemwe(&mut self) -> EEMWE_W

Bit 2 - EEPROM Master Write Enable

pub fn eerie(&mut self) -> EERIE_W

Bit 3 - EEPROM Ready Interrupt Enable

impl W<u8, Reg<u8, _GICR>>

pub fn ivce(&mut self) -> IVCE_W

Bit 0 - Interrupt Vector Change Enable

pub fn ivsel(&mut self) -> IVSEL_W

Bit 1 - Interrupt Vector Select

pub fn int(&mut self) -> INT_W

Bits 6:7 - External Interrupt Request 1 Enable

impl W<u8, Reg<u8, _GIFR>>

pub fn intf(&mut self) -> INTF_W

Bits 6:7 - External Interrupt Flags

impl W<u8, Reg<u8, _MCUCR>>

pub fn isc0(&mut self) -> ISC0_W

Bits 0:1 - Interrupt Sense Control 0 Bits

pub fn isc1(&mut self) -> ISC1_W

Bits 2:3 - Interrupt Sense Control 1 Bits

impl W<u8, Reg<u8, _HIGH>>

pub fn bootrst(&mut self) -> BOOTRST_W

Bit 0 - Boot Reset vector Enabled

pub fn bootsz(&mut self) -> BOOTSZ_W

Bits 1:2 - Select Boot Size

pub fn eesave(&mut self) -> EESAVE_W

Bit 3 - Preserve EEPROM through the Chip Erase cycle

pub fn ckopt(&mut self) -> CKOPT_W

Bit 4 - CKOPT fuse (operation dependent of CKSEL fuses)

pub fn spien(&mut self) -> SPIEN_W

Bit 5 - Serial program downloading (SPI) enabled

pub fn wdton(&mut self) -> WDTON_W

Bit 6 - Watch-dog Timer always on

pub fn rstdisbl(&mut self) -> RSTDISBL_W

Bit 7 - Reset Disabled (Enable PC6 as i/o pin)

impl W<u8, Reg<u8, _LOW>>

pub fn sut_cksel(&mut self) -> SUT_CKSEL_W

Bits 0:5 - Select Clock Source

pub fn boden(&mut self) -> BODEN_W

Bit 6 - Brown-out detection enabled

pub fn bodlevel(&mut self) -> BODLEVEL_W

Bit 7 - Brownout detector trigger level

impl W<u8, Reg<u8, _LOCKBIT>>

pub fn lb(&mut self) -> LB_W

Bits 0:1 - Memory Lock

pub fn blb0(&mut self) -> BLB0_W

Bits 2:3 - Boot Loader Protection Mode

pub fn blb1(&mut self) -> BLB1_W

Bits 4:5 - Boot Loader Protection Mode

impl W<u8, Reg<u8, _DDRB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

pub fn pb6(&mut self) -> PB6_W

Bit 6 - Pin B6

pub fn pb7(&mut self) -> PB7_W

Bit 7 - Pin B7

impl W<u8, Reg<u8, _PORTB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

pub fn pb6(&mut self) -> PB6_W

Bit 6 - Pin B6

pub fn pb7(&mut self) -> PB7_W

Bit 7 - Pin B7

impl W<u8, Reg<u8, _DDRC>>

pub fn pc0(&mut self) -> PC0_W

Bit 0 - Pin C0

pub fn pc1(&mut self) -> PC1_W

Bit 1 - Pin C1

pub fn pc2(&mut self) -> PC2_W

Bit 2 - Pin C2

pub fn pc3(&mut self) -> PC3_W

Bit 3 - Pin C3

pub fn pc4(&mut self) -> PC4_W

Bit 4 - Pin C4

pub fn pc5(&mut self) -> PC5_W

Bit 5 - Pin C5

pub fn pc6(&mut self) -> PC6_W

Bit 6 - Pin C6

impl W<u8, Reg<u8, _PORTC>>

pub fn pc0(&mut self) -> PC0_W

Bit 0 - Pin C0

pub fn pc1(&mut self) -> PC1_W

Bit 1 - Pin C1

pub fn pc2(&mut self) -> PC2_W

Bit 2 - Pin C2

pub fn pc3(&mut self) -> PC3_W

Bit 3 - Pin C3

pub fn pc4(&mut self) -> PC4_W

Bit 4 - Pin C4

pub fn pc5(&mut self) -> PC5_W

Bit 5 - Pin C5

pub fn pc6(&mut self) -> PC6_W

Bit 6 - Pin C6

impl W<u8, Reg<u8, _DDRD>>

pub fn pd0(&mut self) -> PD0_W

Bit 0 - Pin D0

pub fn pd1(&mut self) -> PD1_W

Bit 1 - Pin D1

pub fn pd2(&mut self) -> PD2_W

Bit 2 - Pin D2

pub fn pd3(&mut self) -> PD3_W

Bit 3 - Pin D3

pub fn pd4(&mut self) -> PD4_W

Bit 4 - Pin D4

pub fn pd5(&mut self) -> PD5_W

Bit 5 - Pin D5

pub fn pd6(&mut self) -> PD6_W

Bit 6 - Pin D6

pub fn pd7(&mut self) -> PD7_W

Bit 7 - Pin D7

impl W<u8, Reg<u8, _PORTD>>

pub fn pd0(&mut self) -> PD0_W

Bit 0 - Pin D0

pub fn pd1(&mut self) -> PD1_W

Bit 1 - Pin D1

pub fn pd2(&mut self) -> PD2_W

Bit 2 - Pin D2

pub fn pd3(&mut self) -> PD3_W

Bit 3 - Pin D3

pub fn pd4(&mut self) -> PD4_W

Bit 4 - Pin D4

pub fn pd5(&mut self) -> PD5_W

Bit 5 - Pin D5

pub fn pd6(&mut self) -> PD6_W

Bit 6 - Pin D6

pub fn pd7(&mut self) -> PD7_W

Bit 7 - Pin D7

impl W<u8, Reg<u8, _SPCR>>

pub fn spr(&mut self) -> SPR_W

Bits 0:1 - SPI Clock Rate Selects

pub fn cpha(&mut self) -> CPHA_W

Bit 2 - Clock Phase

pub fn cpol(&mut self) -> CPOL_W

Bit 3 - Clock polarity

pub fn mstr(&mut self) -> MSTR_W

Bit 4 - Master/Slave Select

pub fn dord(&mut self) -> DORD_W

Bit 5 - Data Order

pub fn spe(&mut self) -> SPE_W

Bit 6 - SPI Enable

pub fn spie(&mut self) -> SPIE_W

Bit 7 - SPI Interrupt Enable

impl W<u8, Reg<u8, _TCCR0>>

pub fn cs00(&mut self) -> CS00_W

Bit 0 - Clock Select0 bit 0

pub fn cs01(&mut self) -> CS01_W

Bit 1 - Clock Select0 bit 1

pub fn cs02(&mut self) -> CS02_W

Bit 2 - Clock Select0 bit 2

impl W<u8, Reg<u8, _TIFR>>

pub fn tov0(&mut self) -> TOV0_W

Bit 0 - Timer/Counter0 Overflow Flag

impl W<u8, Reg<u8, _TIMSK>>

pub fn toie0(&mut self) -> TOIE0_W

Bit 0 - Timer/Counter0 Overflow Interrupt Enable

impl W<u8, Reg<u8, _TCCR1A>>

pub fn wgm1(&mut self) -> WGM1_W

Bits 0:1 - Waveform Generation Mode

pub fn foc1b(&mut self) -> FOC1B_W

Bit 2 - Force Output Compare 1B

pub fn foc1a(&mut self) -> FOC1A_W

Bit 3 - Force Output Compare 1A

pub fn com1b(&mut self) -> COM1B_W

Bits 4:5 - Compare Output Mode 1B, bits

pub fn com1a(&mut self) -> COM1A_W

Bits 6:7 - Compare Output Mode 1A, bits

impl W<u8, Reg<u8, _TCCR1B>>

pub fn cs1(&mut self) -> CS1_W

Bits 0:2 - Prescaler source of Timer/Counter 1

pub fn wgm1(&mut self) -> WGM1_W

Bits 3:4 - Waveform Generation Mode

pub fn ices1(&mut self) -> ICES1_W

Bit 6 - Input Capture 1 Edge Select

pub fn icnc1(&mut self) -> ICNC1_W

Bit 7 - Input Capture 1 Noise Canceler

impl W<u8, Reg<u8, _TIMSK>>

pub fn toie1(&mut self) -> TOIE1_W

Bit 2 - Timer/Counter1 Overflow Interrupt Enable

pub fn ocie1b(&mut self) -> OCIE1B_W

Bit 3 - Timer/Counter1 Output CompareB Match Interrupt Enable

pub fn ocie1a(&mut self) -> OCIE1A_W

Bit 4 - Timer/Counter1 Output CompareA Match Interrupt Enable

pub fn ticie1(&mut self) -> TICIE1_W

Bit 5 - Timer/Counter1 Input Capture Interrupt Enable

impl W<u8, Reg<u8, _ASSR>>

pub fn tcr2ub(&mut self) -> TCR2UB_W

Bit 0 - Timer/counter Control Register2 Update Busy

pub fn ocr2ub(&mut self) -> OCR2UB_W

Bit 1 - Output Compare Register2 Update Busy

pub fn tcn2ub(&mut self) -> TCN2UB_W

Bit 2 - Timer/Counter2 Update Busy

pub fn as2(&mut self) -> AS2_W

Bit 3 - Asynchronous Timer/counter2

impl W<u8, Reg<u8, _SFIOR>>

pub fn psr2(&mut self) -> PSR2_W

Bit 1 - Prescaler Reset Timer/Counter2

impl W<u8, Reg<u8, _TCCR2>>

pub fn cs2(&mut self) -> CS2_W

Bits 0:2 - Clock Select bits

pub fn wgm21(&mut self) -> WGM21_W

Bit 3 - Waveform Generation Mode

pub fn com2(&mut self) -> COM2_W

Bits 4:5 - Compare Output Mode bits

pub fn wgm20(&mut self) -> WGM20_W

Bit 6 - Waveform Genration Mode

pub fn foc2(&mut self) -> FOC2_W

Bit 7 - Force Output Compare

impl W<u8, Reg<u8, _TIMSK>>

pub fn toie2(&mut self) -> TOIE2_W

Bit 6 - Timer/Counter2 Overflow Interrupt Enable

pub fn ocie2(&mut self) -> OCIE2_W

Bit 7 - Timer/Counter2 Output Compare Match Interrupt Enable

impl W<u8, Reg<u8, _TWAR>>

pub fn twgce(&mut self) -> TWGCE_W

Bit 0 - TWI General Call Recognition Enable Bit

pub fn twa(&mut self) -> TWA_W

Bits 1:7 - TWI (Slave) Address register Bits

impl W<u8, Reg<u8, _TWSR>>

pub fn twps(&mut self) -> TWPS_W

Bits 0:1 - TWI Prescaler

pub fn tws(&mut self) -> TWS_W

Bits 3:7 - TWI Status

impl W<u8, Reg<u8, _UCSRB>>

pub fn txb8(&mut self) -> TXB8_W

Bit 0 - Transmit Data Bit 8

pub fn rxb8(&mut self) -> RXB8_W

Bit 1 - Receive Data Bit 8

pub fn ucsz2(&mut self) -> UCSZ2_W

Bit 2 - Character Size

pub fn txen(&mut self) -> TXEN_W

Bit 3 - Transmitter Enable

pub fn rxen(&mut self) -> RXEN_W

Bit 4 - Receiver Enable

pub fn udrie(&mut self) -> UDRIE_W

Bit 5 - USART Data register Empty Interrupt Enable

pub fn txcie(&mut self) -> TXCIE_W

Bit 6 - TX Complete Interrupt Enable

pub fn rxcie(&mut self) -> RXCIE_W

Bit 7 - RX Complete Interrupt Enable

impl W<u8, Reg<u8, _UCSRC>>

pub fn ucpol(&mut self) -> UCPOL_W

Bit 0 - Clock Polarity

pub fn ucsz(&mut self) -> UCSZ_W

Bits 1:2 - Character Size

pub fn usbs(&mut self) -> USBS_W

Bit 3 - Stop Bit Select

pub fn upm(&mut self) -> UPM_W

Bits 4:5 - Parity Mode Bits

pub fn umsel(&mut self) -> UMSEL_W

Bit 6 - USART Mode Select

pub fn ursel(&mut self) -> URSEL_W

Bit 7 - Register Select

impl W<u8, Reg<u8, _WDTCR>>

pub fn wdp(&mut self) -> WDP_W

Bits 0:2 - Watch Dog Timer Prescaler bits

pub fn wde(&mut self) -> WDE_W

Bit 3 - Watch Dog Enable

pub fn wdce(&mut self) -> WDCE_W

Bit 4 - Watchdog Change Enable

impl W<u8, Reg<u8, _ACSR>>

pub fn acis(&mut self) -> ACIS_W

Bits 0:1 - Analog Comparator Interrupt Mode Select

pub fn acic(&mut self) -> ACIC_W

Bit 2 - Analog Comparator Input Capture Enable

pub fn acie(&mut self) -> ACIE_W

Bit 3 - Analog Comparator Interrupt Enable

pub fn aci(&mut self) -> ACI_W

Bit 4 - Analog Comparator Interrupt Flag

pub fn acbg(&mut self) -> ACBG_W

Bit 6 - Analog Comparator Bandgap Select

pub fn acd(&mut self) -> ACD_W

Bit 7 - Analog Comparator Disable

impl W<u8, Reg<u8, _SFIOR>>

pub fn acme(&mut self) -> ACME_W

Bit 3 - Analog Comparator Multiplexer Enable

impl W<u8, Reg<u8, _ADCSRA>>

pub fn adps(&mut self) -> ADPS_W

Bits 0:2 - ADC Prescaler Select Bits

pub fn adie(&mut self) -> ADIE_W

Bit 3 - ADC Interrupt Enable

pub fn adif(&mut self) -> ADIF_W

Bit 4 - ADC Interrupt Flag

pub fn adate(&mut self) -> ADATE_W

Bit 5 - ADC Auto Trigger Enable

pub fn adsc(&mut self) -> ADSC_W

Bit 6 - ADC Start Conversion

pub fn aden(&mut self) -> ADEN_W

Bit 7 - ADC Enable

impl W<u8, Reg<u8, _ADCSRB>>

pub fn adts(&mut self) -> ADTS_W

Bits 0:2 - ADC Auto Trigger Source bits

impl W<u8, Reg<u8, _ADMUX>>

pub fn mux(&mut self) -> MUX_W

Bits 0:4 - Analog Channel and Gain Selection Bits

pub fn adlar(&mut self) -> ADLAR_W

Bit 5 - Left Adjust Result

pub fn refs(&mut self) -> REFS_W

Bits 6:7 - Reference Selection Bits

impl W<u8, Reg<u8, _SPMCSR>>

pub fn spmen(&mut self) -> SPMEN_W

Bit 0 - Store Program Memory Enable

pub fn pgers(&mut self) -> PGERS_W

Bit 1 - Page Erase

pub fn pgwrt(&mut self) -> PGWRT_W

Bit 2 - Page Write

pub fn blbset(&mut self) -> BLBSET_W

Bit 3 - Boot Lock Bit Set

pub fn rwwsre(&mut self) -> RWWSRE_W

Bit 4 - Read While Write section read enable

pub fn rwwsb(&mut self) -> RWWSB_W

Bit 6 - Read While Write Section Busy

pub fn spmie(&mut self) -> SPMIE_W

Bit 7 - SPM Interrupt Enable

impl W<u8, Reg<u8, _MCUCR>>

pub fn ivce(&mut self) -> IVCE_W

Bit 0 - Interrupt Vector Change Enable

pub fn ivsel(&mut self) -> IVSEL_W

Bit 1 - Interrupt Vector Select

pub fn sm2(&mut self) -> SM2_W

Bit 2 - Sleep Mode Select

pub fn sm(&mut self) -> SM_W

Bits 3:4 - Sleep Mode Select

pub fn se(&mut self) -> SE_W

Bit 5 - Sleep Enable

pub fn srw10(&mut self) -> SRW10_W

Bit 6 - External SRAM Wait State Select

pub fn sre(&mut self) -> SRE_W

Bit 7 - External SRAM Enable

impl W<u8, Reg<u8, _MCUCSR>>

pub fn porf(&mut self) -> PORF_W

Bit 0 - Power-on reset flag

pub fn extrf(&mut self) -> EXTRF_W

Bit 1 - External Reset Flag

pub fn borf(&mut self) -> BORF_W

Bit 2 - Brown-out Reset Flag

pub fn wdrf(&mut self) -> WDRF_W

Bit 3 - Watchdog Reset Flag

pub fn jtrf(&mut self) -> JTRF_W

Bit 4 - JTAG Reset Flag

pub fn jtd(&mut self) -> JTD_W

Bit 7 - JTAG Interface Disable

impl W<u8, Reg<u8, _OSCCAL>>

pub fn osccal(&mut self) -> OSCCAL_W

Bits 0:7 - Oscillator Calibration

impl W<u8, Reg<u8, _XDIV>>

pub fn xdiv(&mut self) -> XDIV_W

Bits 0:6 - XTAl Divide Select Bits

pub fn xdiven(&mut self) -> XDIVEN_W

Bit 7 - XTAL Divide Enable

impl W<u8, Reg<u8, _XMCRA>>

pub fn srw11(&mut self) -> SRW11_W

Bit 1 - Wait state select bit upper page

pub fn srw0(&mut self) -> SRW0_W

Bits 2:3 - Wait state select bit lower page

pub fn srl(&mut self) -> SRL_W

Bits 4:6 - Wait state page limit

impl W<u8, Reg<u8, _XMCRB>>

pub fn xmm(&mut self) -> XMM_W

Bits 0:2 - External Memory High Mask

pub fn xmbk(&mut self) -> XMBK_W

Bit 7 - External Memory Bus Keeper Enable

impl W<u8, Reg<u8, _EECR>>

pub fn eere(&mut self) -> EERE_W

Bit 0 - EEPROM Read Enable

pub fn eewe(&mut self) -> EEWE_W

Bit 1 - EEPROM Write Enable

pub fn eemwe(&mut self) -> EEMWE_W

Bit 2 - EEPROM Master Write Enable

pub fn eerie(&mut self) -> EERIE_W

Bit 3 - EEPROM Ready Interrupt Enable

impl W<u8, Reg<u8, _EICRA>>

pub fn isc0(&mut self) -> ISC0_W

Bits 0:1 - External Interrupt Sense Control Bit

pub fn isc1(&mut self) -> ISC1_W

Bits 2:3 - External Interrupt Sense Control Bit

pub fn isc2(&mut self) -> ISC2_W

Bits 4:5 - External Interrupt Sense Control Bit

pub fn isc3(&mut self) -> ISC3_W

Bits 6:7 - External Interrupt Sense Control Bit

impl W<u8, Reg<u8, _EICRB>>

pub fn isc4(&mut self) -> ISC4_W

Bits 0:1 - External Interrupt 7-4 Sense Control Bit

pub fn isc5(&mut self) -> ISC5_W

Bits 2:3 - External Interrupt 7-4 Sense Control Bit

pub fn isc6(&mut self) -> ISC6_W

Bits 4:5 - External Interrupt 7-4 Sense Control Bit

pub fn isc7(&mut self) -> ISC7_W

Bits 6:7 - External Interrupt 7-4 Sense Control Bit

impl W<u8, Reg<u8, _EIMSK>>

pub fn int(&mut self) -> INT_W

Bits 0:7 - External Interrupt Request 7 Enable

impl W<u8, Reg<u8, _EXTENDED>>

pub fn wdton(&mut self) -> WDTON_W

Bit 0 - Watchdog Timer always on

pub fn m103c(&mut self) -> M103C_W

Bit 1 - ATmega103 Compatibility Mode

impl W<u8, Reg<u8, _HIGH>>

pub fn bootrst(&mut self) -> BOOTRST_W

Bit 0 - Boot Reset vector Enabled

pub fn bootsz(&mut self) -> BOOTSZ_W

Bits 1:2 - Select Boot Size

pub fn eesave(&mut self) -> EESAVE_W

Bit 3 - Preserve EEPROM through the Chip Erase cycle

pub fn ckopt(&mut self) -> CKOPT_W

Bit 4 - CKOPT fuse (operation dependent of CKSEL fuses)

pub fn spien(&mut self) -> SPIEN_W

Bit 5 - Serial program downloading (SPI) enabled

pub fn jtagen(&mut self) -> JTAGEN_W

Bit 6 - JTAG Interface Enabled

pub fn ocden(&mut self) -> OCDEN_W

Bit 7 - On-Chip Debug Enabled

impl W<u8, Reg<u8, _LOW>>

pub fn sut_cksel(&mut self) -> SUT_CKSEL_W

Bits 0:5 - Select Clock Source

pub fn boden(&mut self) -> BODEN_W

Bit 6 - Brown-out detection enabled

pub fn bodlevel(&mut self) -> BODLEVEL_W

Bit 7 - Brownout detector trigger level

impl W<u8, Reg<u8, _MCUCSR>>

pub fn jtrf(&mut self) -> JTRF_W

Bit 4 - JTAG Reset Flag

pub fn jtd(&mut self) -> JTD_W

Bit 7 - JTAG Interface Disable

impl W<u8, Reg<u8, _OCDR>>

pub fn ocdr(&mut self) -> OCDR_W

Bits 0:7 - On-Chip Debug Register Bits

impl W<u8, Reg<u8, _LOCKBIT>>

pub fn lb(&mut self) -> LB_W

Bits 0:1 - Memory Lock

pub fn blb0(&mut self) -> BLB0_W

Bits 2:3 - Boot Loader Protection Mode

pub fn blb1(&mut self) -> BLB1_W

Bits 4:5 - Boot Loader Protection Mode

impl W<u8, Reg<u8, _SFIOR>>

pub fn psr321(&mut self) -> PSR321_W

Bit 0 - Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1

pub fn psr0(&mut self) -> PSR0_W

Bit 1 - Prescaler Reset Timer/Counter0

pub fn pud(&mut self) -> PUD_W

Bit 2 - Pull Up Disable

pub fn acme(&mut self) -> ACME_W

Bit 3 - Analog Comparator Multiplexer Enable

pub fn tsm(&mut self) -> TSM_W

Bit 7 - Timer/Counter Synchronization Mode

impl W<u8, Reg<u8, _DDRA>>

pub fn pa0(&mut self) -> PA0_W

Bit 0 - Pin A0

pub fn pa1(&mut self) -> PA1_W

Bit 1 - Pin A1

pub fn pa2(&mut self) -> PA2_W

Bit 2 - Pin A2

pub fn pa3(&mut self) -> PA3_W

Bit 3 - Pin A3

pub fn pa4(&mut self) -> PA4_W

Bit 4 - Pin A4

pub fn pa5(&mut self) -> PA5_W

Bit 5 - Pin A5

pub fn pa6(&mut self) -> PA6_W

Bit 6 - Pin A6

pub fn pa7(&mut self) -> PA7_W

Bit 7 - Pin A7

impl W<u8, Reg<u8, _PORTA>>

pub fn pa0(&mut self) -> PA0_W

Bit 0 - Pin A0

pub fn pa1(&mut self) -> PA1_W

Bit 1 - Pin A1

pub fn pa2(&mut self) -> PA2_W

Bit 2 - Pin A2

pub fn pa3(&mut self) -> PA3_W

Bit 3 - Pin A3

pub fn pa4(&mut self) -> PA4_W

Bit 4 - Pin A4

pub fn pa5(&mut self) -> PA5_W

Bit 5 - Pin A5

pub fn pa6(&mut self) -> PA6_W

Bit 6 - Pin A6

pub fn pa7(&mut self) -> PA7_W

Bit 7 - Pin A7

impl W<u8, Reg<u8, _DDRB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

pub fn pb6(&mut self) -> PB6_W

Bit 6 - Pin B6

pub fn pb7(&mut self) -> PB7_W

Bit 7 - Pin B7

impl W<u8, Reg<u8, _PORTB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

pub fn pb6(&mut self) -> PB6_W

Bit 6 - Pin B6

pub fn pb7(&mut self) -> PB7_W

Bit 7 - Pin B7

impl W<u8, Reg<u8, _DDRC>>

pub fn pc0(&mut self) -> PC0_W

Bit 0 - Pin C0

pub fn pc1(&mut self) -> PC1_W

Bit 1 - Pin C1

pub fn pc2(&mut self) -> PC2_W

Bit 2 - Pin C2

pub fn pc3(&mut self) -> PC3_W

Bit 3 - Pin C3

pub fn pc4(&mut self) -> PC4_W

Bit 4 - Pin C4

pub fn pc5(&mut self) -> PC5_W

Bit 5 - Pin C5

pub fn pc6(&mut self) -> PC6_W

Bit 6 - Pin C6

pub fn pc7(&mut self) -> PC7_W

Bit 7 - Pin C7

impl W<u8, Reg<u8, _PORTC>>

pub fn pc0(&mut self) -> PC0_W

Bit 0 - Pin C0

pub fn pc1(&mut self) -> PC1_W

Bit 1 - Pin C1

pub fn pc2(&mut self) -> PC2_W

Bit 2 - Pin C2

pub fn pc3(&mut self) -> PC3_W

Bit 3 - Pin C3

pub fn pc4(&mut self) -> PC4_W

Bit 4 - Pin C4

pub fn pc5(&mut self) -> PC5_W

Bit 5 - Pin C5

pub fn pc6(&mut self) -> PC6_W

Bit 6 - Pin C6

pub fn pc7(&mut self) -> PC7_W

Bit 7 - Pin C7

impl W<u8, Reg<u8, _DDRD>>

pub fn pd0(&mut self) -> PD0_W

Bit 0 - Pin D0

pub fn pd1(&mut self) -> PD1_W

Bit 1 - Pin D1

pub fn pd2(&mut self) -> PD2_W

Bit 2 - Pin D2

pub fn pd3(&mut self) -> PD3_W

Bit 3 - Pin D3

pub fn pd4(&mut self) -> PD4_W

Bit 4 - Pin D4

pub fn pd5(&mut self) -> PD5_W

Bit 5 - Pin D5

pub fn pd6(&mut self) -> PD6_W

Bit 6 - Pin D6

pub fn pd7(&mut self) -> PD7_W

Bit 7 - Pin D7

impl W<u8, Reg<u8, _PORTD>>

pub fn pd0(&mut self) -> PD0_W

Bit 0 - Pin D0

pub fn pd1(&mut self) -> PD1_W

Bit 1 - Pin D1

pub fn pd2(&mut self) -> PD2_W

Bit 2 - Pin D2

pub fn pd3(&mut self) -> PD3_W

Bit 3 - Pin D3

pub fn pd4(&mut self) -> PD4_W

Bit 4 - Pin D4

pub fn pd5(&mut self) -> PD5_W

Bit 5 - Pin D5

pub fn pd6(&mut self) -> PD6_W

Bit 6 - Pin D6

pub fn pd7(&mut self) -> PD7_W

Bit 7 - Pin D7

impl W<u8, Reg<u8, _DDRE>>

pub fn pe0(&mut self) -> PE0_W

Bit 0 - Pin E0

pub fn pe1(&mut self) -> PE1_W

Bit 1 - Pin E1

pub fn pe2(&mut self) -> PE2_W

Bit 2 - Pin E2

pub fn pe3(&mut self) -> PE3_W

Bit 3 - Pin E3

pub fn pe4(&mut self) -> PE4_W

Bit 4 - Pin E4

pub fn pe5(&mut self) -> PE5_W

Bit 5 - Pin E5

pub fn pe6(&mut self) -> PE6_W

Bit 6 - Pin E6

pub fn pe7(&mut self) -> PE7_W

Bit 7 - Pin E7

impl W<u8, Reg<u8, _PORTE>>

pub fn pe0(&mut self) -> PE0_W

Bit 0 - Pin E0

pub fn pe1(&mut self) -> PE1_W

Bit 1 - Pin E1

pub fn pe2(&mut self) -> PE2_W

Bit 2 - Pin E2

pub fn pe3(&mut self) -> PE3_W

Bit 3 - Pin E3

pub fn pe4(&mut self) -> PE4_W

Bit 4 - Pin E4

pub fn pe5(&mut self) -> PE5_W

Bit 5 - Pin E5

pub fn pe6(&mut self) -> PE6_W

Bit 6 - Pin E6

pub fn pe7(&mut self) -> PE7_W

Bit 7 - Pin E7

impl W<u8, Reg<u8, _DDRF>>

pub fn pf0(&mut self) -> PF0_W

Bit 0 - Pin F0

pub fn pf1(&mut self) -> PF1_W

Bit 1 - Pin F1

pub fn pf2(&mut self) -> PF2_W

Bit 2 - Pin F2

pub fn pf3(&mut self) -> PF3_W

Bit 3 - Pin F3

pub fn pf4(&mut self) -> PF4_W

Bit 4 - Pin F4

pub fn pf5(&mut self) -> PF5_W

Bit 5 - Pin F5

pub fn pf6(&mut self) -> PF6_W

Bit 6 - Pin F6

pub fn pf7(&mut self) -> PF7_W

Bit 7 - Pin F7

impl W<u8, Reg<u8, _PORTF>>

pub fn pf0(&mut self) -> PF0_W

Bit 0 - Pin F0

pub fn pf1(&mut self) -> PF1_W

Bit 1 - Pin F1

pub fn pf2(&mut self) -> PF2_W

Bit 2 - Pin F2

pub fn pf3(&mut self) -> PF3_W

Bit 3 - Pin F3

pub fn pf4(&mut self) -> PF4_W

Bit 4 - Pin F4

pub fn pf5(&mut self) -> PF5_W

Bit 5 - Pin F5

pub fn pf6(&mut self) -> PF6_W

Bit 6 - Pin F6

pub fn pf7(&mut self) -> PF7_W

Bit 7 - Pin F7

impl W<u8, Reg<u8, _DDRG>>

pub fn pg0(&mut self) -> PG0_W

Bit 0 - Pin G0

pub fn pg1(&mut self) -> PG1_W

Bit 1 - Pin G1

pub fn pg2(&mut self) -> PG2_W

Bit 2 - Pin G2

pub fn pg3(&mut self) -> PG3_W

Bit 3 - Pin G3

pub fn pg4(&mut self) -> PG4_W

Bit 4 - Pin G4

impl W<u8, Reg<u8, _PORTG>>

pub fn pg0(&mut self) -> PG0_W

Bit 0 - Pin G0

pub fn pg1(&mut self) -> PG1_W

Bit 1 - Pin G1

pub fn pg2(&mut self) -> PG2_W

Bit 2 - Pin G2

pub fn pg3(&mut self) -> PG3_W

Bit 3 - Pin G3

pub fn pg4(&mut self) -> PG4_W

Bit 4 - Pin G4

impl W<u8, Reg<u8, _SPCR>>

pub fn spr(&mut self) -> SPR_W

Bits 0:1 - SPI Clock Rate Selects

pub fn cpha(&mut self) -> CPHA_W

Bit 2 - Clock Phase

pub fn cpol(&mut self) -> CPOL_W

Bit 3 - Clock polarity

pub fn mstr(&mut self) -> MSTR_W

Bit 4 - Master/Slave Select

pub fn dord(&mut self) -> DORD_W

Bit 5 - Data Order

pub fn spe(&mut self) -> SPE_W

Bit 6 - SPI Enable

pub fn spie(&mut self) -> SPIE_W

Bit 7 - SPI Interrupt Enable

impl W<u8, Reg<u8, _SPSR>>

pub fn spi2x(&mut self) -> SPI2X_W

Bit 0 - Double SPI Speed Bit

impl W<u8, Reg<u8, _ASSR>>

pub fn tcr0ub(&mut self) -> TCR0UB_W

Bit 0 - Timer/Counter Control Register 0 Update Busy

pub fn ocr0ub(&mut self) -> OCR0UB_W

Bit 1 - Output Compare register 0 Busy

pub fn tcn0ub(&mut self) -> TCN0UB_W

Bit 2 - Timer/Counter0 Update Busy

pub fn as0(&mut self) -> AS0_W

Bit 3 - Asynchronus Timer/Counter 0

impl W<u8, Reg<u8, _SFIOR>>

pub fn psr0(&mut self) -> PSR0_W

Bit 1 - Prescaler Reset Timer/Counter0

pub fn tsm(&mut self) -> TSM_W

Bit 7 - Timer/Counter Synchronization Mode

impl W<u8, Reg<u8, _TCCR0>>

pub fn cs0(&mut self) -> CS0_W

Bits 0:2 - Clock Selects

pub fn wgm01(&mut self) -> WGM01_W

Bit 3 - Waveform Generation Mode 1

pub fn com0(&mut self) -> COM0_W

Bits 4:5 - Compare Match Output Modes

pub fn wgm00(&mut self) -> WGM00_W

Bit 6 - Waveform Generation Mode 0

pub fn foc0(&mut self) -> FOC0_W

Bit 7 - Force Output Compare

impl W<u8, Reg<u8, _TIMSK>>

pub fn toie0(&mut self) -> TOIE0_W

Bit 0 - Timer/Counter0 Overflow Interrupt Enable

pub fn ocie0(&mut self) -> OCIE0_W

Bit 1 - Timer/Counter0 Output Compare Match Interrupt register

impl W<u8, Reg<u8, _ETIMSK>>

pub fn ocie1c(&mut self) -> OCIE1C_W

Bit 0 - Timer/Counter 1, Output Compare Match C Interrupt Enable

impl W<u8, Reg<u8, _SFIOR>>

pub fn psr321(&mut self) -> PSR321_W

Bit 0 - Prescaler Reset, T/C3, T/C2, T/C1

pub fn tsm(&mut self) -> TSM_W

Bit 7 - Timer/Counter Synchronization Mode

impl W<u8, Reg<u8, _TCCR1A>>

pub fn wgm1(&mut self) -> WGM1_W

Bits 0:1 - Waveform Generation Mode Bits

pub fn com1c(&mut self) -> COM1C_W

Bits 2:3 - Compare Output Mode 1C, bits

pub fn com1b(&mut self) -> COM1B_W

Bits 4:5 - Compare Output Mode 1B, bits

pub fn com1a(&mut self) -> COM1A_W

Bits 6:7 - Compare Output Mode 1A, bits

impl W<u8, Reg<u8, _TCCR1B>>

pub fn cs1(&mut self) -> CS1_W

Bits 0:2 - Clock Select1 bits

pub fn wgm1(&mut self) -> WGM1_W

Bits 3:4 - Waveform Generation Mode

pub fn ices1(&mut self) -> ICES1_W

Bit 6 - Input Capture 1 Edge Select

pub fn icnc1(&mut self) -> ICNC1_W

Bit 7 - Input Capture 1 Noise Canceler

impl W<u8, Reg<u8, _TCCR1C>>

pub fn foc1c(&mut self) -> FOC1C_W

Bit 5 - Force Output Compare for channel C

pub fn foc1b(&mut self) -> FOC1B_W

Bit 6 - Force Output Compare for channel B

pub fn foc1a(&mut self) -> FOC1A_W

Bit 7 - Force Output Compare for channel A

impl W<u8, Reg<u8, _TIMSK>>

pub fn toie1(&mut self) -> TOIE1_W

Bit 2 - Timer/Counter1 Overflow Interrupt Enable

pub fn ocie1b(&mut self) -> OCIE1B_W

Bit 3 - Timer/Counter1 Output CompareB Match Interrupt Enable

pub fn ocie1a(&mut self) -> OCIE1A_W

Bit 4 - Timer/Counter1 Output CompareA Match Interrupt Enable

pub fn ticie1(&mut self) -> TICIE1_W

Bit 5 - Timer/Counter1 Input Capture Interrupt Enable

impl W<u8, Reg<u8, _TCCR2>>

pub fn cs2(&mut self) -> CS2_W

Bits 0:2 - Clock Select

pub fn wgm21(&mut self) -> WGM21_W

Bit 3 - Waveform Generation Mode

pub fn com2(&mut self) -> COM2_W

Bits 4:5 - Compare Match Output Mode

pub fn wgm20(&mut self) -> WGM20_W

Bit 6 - Wafeform Generation Mode

pub fn foc2(&mut self) -> FOC2_W

Bit 7 - Force Output Compare

impl W<u8, Reg<u8, _TIMSK>>

pub fn toie2(&mut self) -> TOIE2_W

Bit 6 -

pub fn ocie2(&mut self) -> OCIE2_W

Bit 7 -

impl W<u8, Reg<u8, _ETIMSK>>

pub fn ocie3c(&mut self) -> OCIE3C_W

Bit 1 - Timer/Counter3, Output Compare Match Interrupt Enable

pub fn toie3(&mut self) -> TOIE3_W

Bit 2 - Timer/Counter3 Overflow Interrupt Enable

pub fn ocie3b(&mut self) -> OCIE3B_W

Bit 3 - Timer/Counter3 Output CompareB Match Interrupt Enable

pub fn ocie3a(&mut self) -> OCIE3A_W

Bit 4 - Timer/Counter3 Output CompareA Match Interrupt Enable

pub fn ticie3(&mut self) -> TICIE3_W

Bit 5 - Timer/Counter3 Input Capture Interrupt Enable

impl W<u8, Reg<u8, _SFIOR>>

pub fn psr321(&mut self) -> PSR321_W

Bit 0 - Prescaler Reset, T/C3, T/C2, T/C1

pub fn tsm(&mut self) -> TSM_W

Bit 7 - Timer/Counter Synchronization Mode

impl W<u8, Reg<u8, _TCCR3A>>

pub fn wgm3(&mut self) -> WGM3_W

Bits 0:1 - Waveform Generation Mode Bits

pub fn com3c(&mut self) -> COM3C_W

Bits 2:3 - Compare Output Mode 3C, bits

pub fn com3b(&mut self) -> COM3B_W

Bits 4:5 - Compare Output Mode 3B, bits

pub fn com3a(&mut self) -> COM3A_W

Bits 6:7 - Compare Output Mode 3A, bits

impl W<u8, Reg<u8, _TCCR3B>>

pub fn cs3(&mut self) -> CS3_W

Bits 0:2 - Clock Select3 bits

pub fn wgm3(&mut self) -> WGM3_W

Bits 3:4 - Waveform Generation Mode

pub fn ices3(&mut self) -> ICES3_W

Bit 6 - Input Capture 3 Edge Select

pub fn icnc3(&mut self) -> ICNC3_W

Bit 7 - Input Capture 3 Noise Canceler

impl W<u8, Reg<u8, _TCCR3C>>

pub fn foc3c(&mut self) -> FOC3C_W

Bit 5 - Force Output Compare for channel C

pub fn foc3b(&mut self) -> FOC3B_W

Bit 6 - Force Output Compare for channel B

pub fn foc3a(&mut self) -> FOC3A_W

Bit 7 - Force Output Compare for channel A

impl W<u8, Reg<u8, _TWAR>>

pub fn twgce(&mut self) -> TWGCE_W

Bit 0 - TWI General Call Recognition Enable Bit

pub fn twa(&mut self) -> TWA_W

Bits 1:7 - TWI (Slave) Address register Bits

impl W<u8, Reg<u8, _TWSR>>

pub fn twps(&mut self) -> TWPS_W

Bits 0:1 - TWI Prescaler

pub fn tws(&mut self) -> TWS_W

Bits 3:7 - TWI Status

impl W<u8, Reg<u8, _UCSR0A>>

pub fn mpcm0(&mut self) -> MPCM0_W

Bit 0 - Multi-processor Communication Mode

pub fn u2x0(&mut self) -> U2X0_W

Bit 1 - Double the USART transmission speed

pub fn txc0(&mut self) -> TXC0_W

Bit 6 - USART Transmit Complete

impl W<u8, Reg<u8, _UCSR0B>>

pub fn txb80(&mut self) -> TXB80_W

Bit 0 - Transmit Data Bit 8

pub fn ucsz02(&mut self) -> UCSZ02_W

Bit 2 - Character Size

pub fn txen0(&mut self) -> TXEN0_W

Bit 3 - Transmitter Enable

pub fn rxen0(&mut self) -> RXEN0_W

Bit 4 - Receiver Enable

pub fn udrie0(&mut self) -> UDRIE0_W

Bit 5 - USART Data register Empty Interrupt Enable

pub fn txcie0(&mut self) -> TXCIE0_W

Bit 6 - TX Complete Interrupt Enable

pub fn rxcie0(&mut self) -> RXCIE0_W

Bit 7 - RX Complete Interrupt Enable

impl W<u8, Reg<u8, _UCSR0C>>

pub fn ucpol0(&mut self) -> UCPOL0_W

Bit 0 - Clock Polarity

pub fn ucsz0(&mut self) -> UCSZ0_W

Bits 1:2 - Character Size

pub fn usbs0(&mut self) -> USBS0_W

Bit 3 - Stop Bit Select

pub fn upm0(&mut self) -> UPM0_W

Bits 4:5 - Parity Mode Bits

pub fn umsel0(&mut self) -> UMSEL0_W

Bit 6 - USART Mode Select

impl W<u8, Reg<u8, _UCSR1A>>

pub fn mpcm1(&mut self) -> MPCM1_W

Bit 0 - Multi-processor Communication Mode

pub fn u2x1(&mut self) -> U2X1_W

Bit 1 - Double the USART transmission speed

pub fn txc1(&mut self) -> TXC1_W

Bit 6 - USART Transmit Complete

impl W<u8, Reg<u8, _UCSR1B>>

pub fn txb81(&mut self) -> TXB81_W

Bit 0 - Transmit Data Bit 8

pub fn ucsz12(&mut self) -> UCSZ12_W

Bit 2 - Character Size

pub fn txen1(&mut self) -> TXEN1_W

Bit 3 - Transmitter Enable

pub fn rxen1(&mut self) -> RXEN1_W

Bit 4 - Receiver Enable

pub fn udrie1(&mut self) -> UDRIE1_W

Bit 5 - USART Data register Empty Interrupt Enable

pub fn txcie1(&mut self) -> TXCIE1_W

Bit 6 - TX Complete Interrupt Enable

pub fn rxcie1(&mut self) -> RXCIE1_W

Bit 7 - RX Complete Interrupt Enable

impl W<u8, Reg<u8, _UCSR1C>>

pub fn ucpol1(&mut self) -> UCPOL1_W

Bit 0 - Clock Polarity

pub fn ucsz1(&mut self) -> UCSZ1_W

Bits 1:2 - Character Size

pub fn usbs1(&mut self) -> USBS1_W

Bit 3 - Stop Bit Select

pub fn upm1(&mut self) -> UPM1_W

Bits 4:5 - Parity Mode Bits

pub fn umsel1(&mut self) -> UMSEL1_W

Bit 6 - USART Mode Select

impl W<u8, Reg<u8, _WDTCR>>

pub fn wdp(&mut self) -> WDP_W

Bits 0:2 - Watch Dog Timer Prescaler bits

pub fn wde(&mut self) -> WDE_W

Bit 3 - Watch Dog Enable

pub fn wdce(&mut self) -> WDCE_W

Bit 4 - Watchdog Change Enable

impl W<u8, Reg<u8, _ACSR>>

pub fn acis(&mut self) -> ACIS_W

Bits 0:1 - Analog Comparator Interrupt Mode Select

pub fn acie(&mut self) -> ACIE_W

Bit 3 - Analog Comparator Interrupt Enable

pub fn aci(&mut self) -> ACI_W

Bit 4 - Analog Comparator Interrupt Flag

pub fn acbg(&mut self) -> ACBG_W

Bit 6 - Analog Comparator Bandgap Select

pub fn acd(&mut self) -> ACD_W

Bit 7 - Analog Comparator Disable

impl W<u8, Reg<u8, _ADCSRB>>

pub fn acme(&mut self) -> ACME_W

Bit 6 - Analog Comparator Multiplexer Enable

impl W<u8, Reg<u8, _DIDR0>>

pub fn ain0d(&mut self) -> AIN0D_W

Bit 0 - AIN0 Digital Input Disable

pub fn ain1d(&mut self) -> AIN1D_W

Bit 1 - AIN1 Digital Input Disable

impl W<u8, Reg<u8, _ADCSRA>>

pub fn adps(&mut self) -> ADPS_W

Bits 0:2 - ADC Prescaler Select Bits

pub fn adie(&mut self) -> ADIE_W

Bit 3 - ADC Interrupt Enable

pub fn adif(&mut self) -> ADIF_W

Bit 4 - ADC Interrupt Flag

pub fn adate(&mut self) -> ADATE_W

Bit 5 - ADC Auto Trigger Enable

pub fn adsc(&mut self) -> ADSC_W

Bit 6 - ADC Start Conversion

pub fn aden(&mut self) -> ADEN_W

Bit 7 - ADC Enable

impl W<u8, Reg<u8, _ADCSRB>>

pub fn adts(&mut self) -> ADTS_W

Bits 0:2 - ADC Auto Trigger Sources

pub fn ipr(&mut self) -> IPR_W

Bit 5 - Input Polarity Mode

pub fn bin(&mut self) -> BIN_W

Bit 7 - Bipolar Input Mode

impl W<u8, Reg<u8, _ADMUX>>

pub fn mux(&mut self) -> MUX_W

Bits 0:3 - Analog Channel and Gain Selection Bits

pub fn refs2(&mut self) -> REFS2_W

Bit 4 - Reference Selection Bit 2

pub fn adlar(&mut self) -> ADLAR_W

Bit 5 - Left Adjust Result

pub fn refs(&mut self) -> REFS_W

Bits 6:7 - Reference Selection Bits

impl W<u8, Reg<u8, _DIDR0>>

pub fn adc1d(&mut self) -> ADC1D_W

Bit 2 - ADC1 Digital input Disable

pub fn adc3d(&mut self) -> ADC3D_W

Bit 3 - ADC3 Digital input Disable

pub fn adc2d(&mut self) -> ADC2D_W

Bit 4 - ADC2 Digital input Disable

pub fn adc0d(&mut self) -> ADC0D_W

Bit 5 - ADC0 Digital input Disable

impl W<u8, Reg<u8, _MCUCR>>

pub fn isc0(&mut self) -> ISC0_W

Bits 0:1 - Interrupt Sense Control 0 bits

pub fn sm(&mut self) -> SM_W

Bits 3:4 - Sleep Mode Select Bits

pub fn se(&mut self) -> SE_W

Bit 5 - Sleep Enable

pub fn pud(&mut self) -> PUD_W

Bit 6 - Pull-up Disable

impl W<u8, Reg<u8, _PLLCSR>>

pub fn plock(&mut self) -> PLOCK_W

Bit 0 - PLL Lock detector

pub fn plle(&mut self) -> PLLE_W

Bit 1 - PLL Enable

pub fn pcke(&mut self) -> PCKE_W

Bit 2 - PCK Enable

pub fn lsm(&mut self) -> LSM_W

Bit 7 - Low speed mode

impl W<u8, Reg<u8, _PRR>>

pub fn pradc(&mut self) -> PRADC_W

Bit 0 - Power Reduction ADC

pub fn prusi(&mut self) -> PRUSI_W

Bit 1 - Power Reduction USI

pub fn prtim0(&mut self) -> PRTIM0_W

Bit 2 - Power Reduction Timer/Counter0

pub fn prtim1(&mut self) -> PRTIM1_W

Bit 3 - Power Reduction Timer/Counter1

impl W<u8, Reg<u8, _EECR>>

pub fn eere(&mut self) -> EERE_W

Bit 0 - EEPROM Read Enable

pub fn eepe(&mut self) -> EEPE_W

Bit 1 - EEPROM Write Enable

pub fn eempe(&mut self) -> EEMPE_W

Bit 2 - EEPROM Master Write Enable

pub fn eerie(&mut self) -> EERIE_W

Bit 3 - EEPROM Ready Interrupt Enable

pub fn eepm(&mut self) -> EEPM_W

Bits 4:5 - EEPROM Programming Mode Bits

impl W<u8, Reg<u8, _GIMSK>>

pub fn pcie(&mut self) -> PCIE_W

Bit 5 - Pin Change Interrupt Enable

pub fn int0(&mut self) -> INT0_W

Bit 6 - External Interrupt Request 0 Enable

impl W<u8, Reg<u8, _MCUCR>>

pub fn isc00(&mut self) -> ISC00_W

Bit 0 - Interrupt Sense Control 0 Bit 0

pub fn isc01(&mut self) -> ISC01_W

Bit 1 - Interrupt Sense Control 0 Bit 1

impl W<u8, Reg<u8, _EXTENDED>>

pub fn selfprgen(&mut self) -> SELFPRGEN_W

Bit 0 - Self Programming enable

impl W<u8, Reg<u8, _HIGH>>

pub fn bodlevel(&mut self) -> BODLEVEL_W

Bits 0:2 - Brown-out Detector trigger level

pub fn eesave(&mut self) -> EESAVE_W

Bit 3 - Preserve EEPROM through the Chip Erase cycle

pub fn wdton(&mut self) -> WDTON_W

Bit 4 - Watch-dog Timer always on

pub fn spien(&mut self) -> SPIEN_W

Bit 5 - Serial program downloading (SPI) enabled

pub fn dwen(&mut self) -> DWEN_W

Bit 6 - Debug Wire enable

pub fn rstdisbl(&mut self) -> RSTDISBL_W

Bit 7 - Reset Disabled (Enable PB5 as i/o pin)

impl W<u8, Reg<u8, _LOW>>

pub fn sut_cksel(&mut self) -> SUT_CKSEL_W

Bits 0:5 - Select Clock source

pub fn ckout(&mut self) -> CKOUT_W

Bit 6 - Clock output on PORTB4

pub fn ckdiv8(&mut self) -> CKDIV8_W

Bit 7 - Divide clock by 8 internally

impl W<u8, Reg<u8, _LOCKBIT>>

pub fn lb(&mut self) -> LB_W

Bits 0:1 - Memory Lock

impl W<u8, Reg<u8, _DDRB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

impl W<u8, Reg<u8, _PORTB>>

pub fn pb0(&mut self) -> PB0_W

Bit 0 - Pin B0

pub fn pb1(&mut self) -> PB1_W

Bit 1 - Pin B1

pub fn pb2(&mut self) -> PB2_W

Bit 2 - Pin B2

pub fn pb3(&mut self) -> PB3_W

Bit 3 - Pin B3

pub fn pb4(&mut self) -> PB4_W

Bit 4 - Pin B4

pub fn pb5(&mut self) -> PB5_W

Bit 5 - Pin B5

impl W<u8, Reg<u8, _GTCCR>>

pub fn psr0(&mut self) -> PSR0_W

Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0

pub fn tsm(&mut self) -> TSM_W

Bit 7 - Timer/Counter Synchronization Mode

impl W<u8, Reg<u8, _TCCR0A>>

pub fn wgm0(&mut self) -> WGM0_W

Bits 0:1 - Waveform Generation Mode

pub fn com0b(&mut self) -> COM0B_W

Bits 4:5 - Compare Output B Mode

pub fn com0a(&mut self) -> COM0A_W

Bits 6:7 - Compare Output A Mode

impl W<u8, Reg<u8, _TCCR0B>>

pub fn cs0(&mut self) -> CS0_W

Bits 0:2 - Clock Select

pub fn wgm02(&mut self) -> WGM02_W

Bit 3 - Waveform Generation Mode High Bit (Enable Top: OCRA for PWM modes)

pub fn foc0b(&mut self) -> FOC0B_W

Bit 6 - Force Output Compare B

pub fn foc0a(&mut self) -> FOC0A_W

Bit 7 - Force Output Compare A

impl W<u8, Reg<u8, _TIFR>>

pub fn tov0(&mut self) -> TOV0_W

Bit 1 - Timer/Counter0 Overflow Flag

pub fn ocf0b(&mut self) -> OCF0B_W

Bit 3 - Timer/Counter0 Output Compare Flag 0B

pub fn ocf0a(&mut self) -> OCF0A_W

Bit 4 - Timer/Counter0 Output Compare Flag 0A

impl W<u8, Reg<u8, _TIMSK>>

pub fn toie0(&mut self) -> TOIE0_W

Bit 1 - Timer/Counter0 Overflow Interrupt Enable

pub fn ocie0b(&mut self) -> OCIE0B_W

Bit 3 - Timer/Counter0 Output Compare Match B Interrupt Enable

pub fn ocie0a(&mut self) -> OCIE0A_W

Bit 4 - Timer/Counter0 Output Compare Match A Interrupt Enable

impl W<u8, Reg<u8, _DT1A>>

pub fn dtvl(&mut self) -> DTVL_W

Bits 0:3 -

pub fn dtvh(&mut self) -> DTVH_W

Bits 4:7 -

impl W<u8, Reg<u8, _DT1B>>

pub fn dtvl(&mut self) -> DTVL_W

Bits 0:3 -

pub fn dtvh(&mut self) -> DTVH_W

Bits 4:7 -

impl W<u8, Reg<u8, _DTPS>>

pub fn dtps(&mut self) -> DTPS_W

Bits 0:1 -

impl W<u8, Reg<u8, _GTCCR>>

pub fn psr1(&mut self) -> PSR1_W

Bit 1 - Prescaler Reset Timer/Counter1

pub fn foc1a(&mut self) -> FOC1A_W

Bit 2 - Force Output Compare 1A

pub fn foc1b(&mut self) -> FOC1B_W

Bit 3 - Force Output Compare Match 1B

pub fn com1b(&mut self) -> COM1B_W

Bits 4:5 - Comparator B Output Mode

pub fn pwm1b(&mut self) -> PWM1B_W

Bit 6 - Pulse Width Modulator B Enable

impl W<u8, Reg<u8, _TCCR1>>

pub fn cs1(&mut self) -> CS1_W

Bits 0:3 - Clock Select Bits

pub fn com1a(&mut self) -> COM1A_W

Bits 4:5 - Compare Output Mode, Bits

pub fn pwm1a(&mut self) -> PWM1A_W

Bit 6 - Pulse Width Modulator Enable

pub fn ctc1(&mut self) -> CTC1_W

Bit 7 - Clear Timer/Counter on Compare Match

impl W<u8, Reg<u8, _TIFR>>

pub fn tov1(&mut self) -> TOV1_W

Bit 2 - Timer/Counter1 Overflow Flag

pub fn ocf1b(&mut self) -> OCF1B_W

Bit 5 - Timer/Counter1 Output Compare Flag 1B

pub fn ocf1a(&mut self) -> OCF1A_W

Bit 6 - Timer/Counter1 Output Compare Flag 1A

impl W<u8, Reg<u8, _TIMSK>>

pub fn toie1(&mut self) -> TOIE1_W

Bit 2 - Timer/Counter1 Overflow Interrupt Enable

pub fn ocie1b(&mut self) -> OCIE1B_W

Bit 5 - OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable

pub fn ocie1a(&mut self) -> OCIE1A_W

Bit 6 - OCIE1A: Timer/Counter1 Output Compare Interrupt Enable

impl W<u8, Reg<u8, _USICR>>

pub fn usitc(&mut self) -> USITC_W

Bit 0 - Toggle Clock Port Pin

pub fn usiclk(&mut self) -> USICLK_W

Bit 1 - Clock Strobe

pub fn usics(&mut self) -> USICS_W

Bits 2:3 - USI Clock Source Select Bits

pub fn usiwm(&mut self) -> USIWM_W

Bits 4:5 - USI Wire Mode Bits

pub fn usioie(&mut self) -> USIOIE_W

Bit 6 - Counter Overflow Interrupt Enable

pub fn usisie(&mut self) -> USISIE_W

Bit 7 - Start Condition Interrupt Enable

impl W<u8, Reg<u8, _WDTCR>>

pub fn wde(&mut self) -> WDE_W

Bit 3 - Watch Dog Enable

pub fn wdce(&mut self) -> WDCE_W

Bit 4 - Watchdog Change Enable

pub fn wdie(&mut self) -> WDIE_W

Bit 6 - Watchdog Timeout Interrupt Enable

pub fn wdif(&mut self) -> WDIF_W

Bit 7 - Watchdog Timeout Interrupt Flag

pub fn wdpl(&mut self) -> WDPL_W

Bits 0:2 - Watchdog Timer Prescaler - Low Bits

pub fn wdph(&mut self) -> WDPH_W

Bit 5 - Watchdog Timer Prescaler - High Bit