[−][src]Struct avr_device::generic::R
Register/field reader.
Result of the read methods of registers. Also used as a closure argument in the modify
method.
Implementations
impl<U, T> R<U, T> where
U: Copy, [src]
U: Copy,
impl<FI> R<bool, FI>[src]
pub fn bit(&self) -> bool[src]
Value of the field as raw bits.
pub fn bit_is_clear(&self) -> bool[src]
Returns true if the bit is clear (0).
pub fn bit_is_set(&self) -> bool[src]
Returns true if the bit is set (1).
impl R<u8, ACIS_A>[src]
pub fn variant(&self) -> Variant<u8, ACIS_A>[src]
Get enumerated values variant
pub fn is_on_toggle(&self) -> bool[src]
Checks if the value of the field is ON_TOGGLE
pub fn is_on_falling_edge(&self) -> bool[src]
Checks if the value of the field is ON_FALLING_EDGE
pub fn is_on_rising_edge(&self) -> bool[src]
Checks if the value of the field is ON_RISING_EDGE
impl R<u8, Reg<u8, _ACSR>>[src]
pub fn acis(&self) -> ACIS_R[src]
Bits 0:1 - Analog Comparator Interrupt Mode Select
pub fn acic(&self) -> ACIC_R[src]
Bit 2 - Analog Comparator Input Capture Enable
pub fn acie(&self) -> ACIE_R[src]
Bit 3 - Analog Comparator Interrupt Enable
pub fn aci(&self) -> ACI_R[src]
Bit 4 - Analog Comparator Interrupt Flag
pub fn aco(&self) -> ACO_R[src]
Bit 5 - Analog Compare Output
pub fn acbg(&self) -> ACBG_R[src]
Bit 6 - Analog Comparator Bandgap Select
pub fn acd(&self) -> ACD_R[src]
Bit 7 - Analog Comparator Disable
impl R<u8, Reg<u8, _ADCSRB>>[src]
impl R<u8, Reg<u8, _DIDR1>>[src]
pub fn ain0d(&self) -> AIN0D_R[src]
Bit 0 - AIN0 Digital Input Disable
pub fn ain1d(&self) -> AIN1D_R[src]
Bit 1 - AIN1 Digital Input Disable
impl R<u8, ADPS_A>[src]
pub fn variant(&self) -> Variant<u8, ADPS_A>[src]
Get enumerated values variant
pub fn is_prescaler_2(&self) -> bool[src]
Checks if the value of the field is PRESCALER_2
pub fn is_prescaler_4(&self) -> bool[src]
Checks if the value of the field is PRESCALER_4
pub fn is_prescaler_8(&self) -> bool[src]
Checks if the value of the field is PRESCALER_8
pub fn is_prescaler_16(&self) -> bool[src]
Checks if the value of the field is PRESCALER_16
pub fn is_prescaler_32(&self) -> bool[src]
Checks if the value of the field is PRESCALER_32
pub fn is_prescaler_64(&self) -> bool[src]
Checks if the value of the field is PRESCALER_64
pub fn is_prescaler_128(&self) -> bool[src]
Checks if the value of the field is PRESCALER_128
impl R<u8, Reg<u8, _ADCSRA>>[src]
pub fn adps(&self) -> ADPS_R[src]
Bits 0:2 - ADC Prescaler Select Bits
pub fn adie(&self) -> ADIE_R[src]
Bit 3 - ADC Interrupt Enable
pub fn adif(&self) -> ADIF_R[src]
Bit 4 - ADC Interrupt Flag
pub fn adate(&self) -> ADATE_R[src]
Bit 5 - ADC Auto Trigger Enable
pub fn adsc(&self) -> ADSC_R[src]
Bit 6 - ADC Start Conversion
pub fn aden(&self) -> ADEN_R[src]
Bit 7 - ADC Enable
impl R<u8, ADTS_A>[src]
pub fn variant(&self) -> ADTS_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _ADCSRB>>[src]
pub fn adts(&self) -> ADTS_R[src]
Bits 0:2 - ADC Auto Trigger Source bits
pub fn mux5(&self) -> MUX5_R[src]
Bit 3 - Analog Channel and Gain Selection Bits
pub fn acme(&self) -> ACME_R[src]
Bit 6 -
impl R<u8, REFS_A>[src]
pub fn variant(&self) -> Variant<u8, REFS_A>[src]
Get enumerated values variant
pub fn is_aref(&self) -> bool[src]
Checks if the value of the field is AREF
pub fn is_avcc(&self) -> bool[src]
Checks if the value of the field is AVCC
pub fn is_internal(&self) -> bool[src]
Checks if the value of the field is INTERNAL
impl R<u8, Reg<u8, _ADMUX>>[src]
pub fn mux(&self) -> MUX_R[src]
Bits 0:4 - Analog Channel and Gain Selection Bits
pub fn adlar(&self) -> ADLAR_R[src]
Bit 5 - Left Adjust Result
pub fn refs(&self) -> REFS_R[src]
Bits 6:7 - Reference Selection Bits
impl R<u8, Reg<u8, _DIDR0>>[src]
pub fn adc0d(&self) -> ADC0D_R[src]
Bit 0 -
pub fn adc1d(&self) -> ADC1D_R[src]
Bit 1 -
pub fn adc2d(&self) -> ADC2D_R[src]
Bit 2 -
pub fn adc3d(&self) -> ADC3D_R[src]
Bit 3 -
pub fn adc4d(&self) -> ADC4D_R[src]
Bit 4 -
pub fn adc5d(&self) -> ADC5D_R[src]
Bit 5 -
pub fn adc6d(&self) -> ADC6D_R[src]
Bit 6 -
pub fn adc7d(&self) -> ADC7D_R[src]
Bit 7 -
impl R<u8, Reg<u8, _DIDR2>>[src]
pub fn adc8d(&self) -> ADC8D_R[src]
Bit 0 -
pub fn adc9d(&self) -> ADC9D_R[src]
Bit 1 -
pub fn adc10d(&self) -> ADC10D_R[src]
Bit 2 -
pub fn adc11d(&self) -> ADC11D_R[src]
Bit 3 -
pub fn adc12d(&self) -> ADC12D_R[src]
Bit 4 -
pub fn adc13d(&self) -> ADC13D_R[src]
Bit 5 -
pub fn adc14d(&self) -> ADC14D_R[src]
Bit 6 -
pub fn adc15d(&self) -> ADC15D_R[src]
Bit 7 -
impl R<u8, Reg<u8, _SPMCSR>>[src]
pub fn spmen(&self) -> SPMEN_R[src]
Bit 0 - Store Program Memory Enable
pub fn pgers(&self) -> PGERS_R[src]
Bit 1 - Page Erase
pub fn pgwrt(&self) -> PGWRT_R[src]
Bit 2 - Page Write
pub fn blbset(&self) -> BLBSET_R[src]
Bit 3 - Boot Lock Bit Set
pub fn rwwsre(&self) -> RWWSRE_R[src]
Bit 4 - Read While Write section read enable
pub fn sigrd(&self) -> SIGRD_R[src]
Bit 5 - Signature Row Read
pub fn rwwsb(&self) -> RWWSB_R[src]
Bit 6 - Read While Write Section Busy
pub fn spmie(&self) -> SPMIE_R[src]
Bit 7 - SPM Interrupt Enable
impl R<u8, CLKPS_A>[src]
pub fn variant(&self) -> Variant<u8, CLKPS_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
pub fn is_val_0x08(&self) -> bool[src]
Checks if the value of the field is VAL_0X08
impl R<u8, Reg<u8, _CLKPR>>[src]
impl R<u8, Reg<u8, _GPIOR0>>[src]
pub fn gpior00(&self) -> GPIOR00_R[src]
Bit 0 - General Purpose IO Register 0 bit 0
pub fn gpior01(&self) -> GPIOR01_R[src]
Bit 1 - General Purpose IO Register 0 bit 1
pub fn gpior02(&self) -> GPIOR02_R[src]
Bit 2 - General Purpose IO Register 0 bit 2
pub fn gpior03(&self) -> GPIOR03_R[src]
Bit 3 - General Purpose IO Register 0 bit 3
pub fn gpior04(&self) -> GPIOR04_R[src]
Bit 4 - General Purpose IO Register 0 bit 4
pub fn gpior05(&self) -> GPIOR05_R[src]
Bit 5 - General Purpose IO Register 0 bit 5
pub fn gpior06(&self) -> GPIOR06_R[src]
Bit 6 - General Purpose IO Register 0 bit 6
pub fn gpior07(&self) -> GPIOR07_R[src]
Bit 7 - General Purpose IO Register 0 bit 7
impl R<u8, Reg<u8, _GPIOR1>>[src]
impl R<u8, Reg<u8, _GPIOR2>>[src]
impl R<u8, Reg<u8, _MCUCR>>[src]
pub fn ivce(&self) -> IVCE_R[src]
Bit 0 - Interrupt Vector Change Enable
pub fn ivsel(&self) -> IVSEL_R[src]
Bit 1 - Interrupt Vector Select
pub fn pud(&self) -> PUD_R[src]
Bit 4 - Pull-up disable
pub fn jtd(&self) -> JTD_R[src]
Bit 7 - JTAG Interface Disable
impl R<u8, Reg<u8, _MCUSR>>[src]
pub fn porf(&self) -> PORF_R[src]
Bit 0 - Power-on reset flag
pub fn extrf(&self) -> EXTRF_R[src]
Bit 1 - External Reset Flag
pub fn borf(&self) -> BORF_R[src]
Bit 2 - Brown-out Reset Flag
pub fn wdrf(&self) -> WDRF_R[src]
Bit 3 - Watchdog Reset Flag
pub fn jtrf(&self) -> JTRF_R[src]
Bit 4 - JTAG Reset Flag
impl R<u8, Reg<u8, _OSCCAL>>[src]
impl R<u8, Reg<u8, _PRR0>>[src]
pub fn pradc(&self) -> PRADC_R[src]
Bit 0 - Power Reduction ADC
pub fn prusart0(&self) -> PRUSART0_R[src]
Bit 1 - Power Reduction USART0
pub fn prspi(&self) -> PRSPI_R[src]
Bit 2 - Power Reduction Serial Peripheral Interface
pub fn prtim1(&self) -> PRTIM1_R[src]
Bit 3 - Power Reduction Timer/Counter1
pub fn prtim0(&self) -> PRTIM0_R[src]
Bit 5 - Power Reduction Timer/Counter0
pub fn prtim2(&self) -> PRTIM2_R[src]
Bit 6 - Power Reduction Timer/Counter2
pub fn prtwi(&self) -> PRTWI_R[src]
Bit 7 - Power Reduction TWI
impl R<u8, Reg<u8, _PRR1>>[src]
pub fn prusart1(&self) -> PRUSART1_R[src]
Bit 0 - Power Reduction USART1
pub fn prusart2(&self) -> PRUSART2_R[src]
Bit 1 - Power Reduction USART2
pub fn prusart3(&self) -> PRUSART3_R[src]
Bit 2 - Power Reduction USART3
pub fn prtim3(&self) -> PRTIM3_R[src]
Bit 3 - Power Reduction Timer/Counter3
pub fn prtim4(&self) -> PRTIM4_R[src]
Bit 4 - Power Reduction Timer/Counter4
pub fn prtim5(&self) -> PRTIM5_R[src]
Bit 5 - Power Reduction Timer/Counter5
impl R<u8, SM_A>[src]
pub fn variant(&self) -> SM_A[src]
Get enumerated values variant
pub fn is_idle(&self) -> bool[src]
Checks if the value of the field is IDLE
pub fn is_adc(&self) -> bool[src]
Checks if the value of the field is ADC
pub fn is_pdown(&self) -> bool[src]
Checks if the value of the field is PDOWN
pub fn is_psave(&self) -> bool[src]
Checks if the value of the field is PSAVE
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_stdby(&self) -> bool[src]
Checks if the value of the field is STDBY
pub fn is_estdby(&self) -> bool[src]
Checks if the value of the field is ESTDBY
impl R<u8, Reg<u8, _SMCR>>[src]
pub fn se(&self) -> SE_R[src]
Bit 0 - Sleep Enable
pub fn sm(&self) -> SM_R[src]
Bits 1:3 - Sleep Mode Select bits
impl R<u8, SRW0_A>[src]
pub fn variant(&self) -> SRW0_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, SRW1_A>[src]
pub fn variant(&self) -> SRW1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, SRL_A>[src]
pub fn variant(&self) -> SRL_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _XMCRA>>[src]
pub fn srw0(&self) -> SRW0_R[src]
Bits 0:1 - Wait state select bit lower page
pub fn srw1(&self) -> SRW1_R[src]
Bits 2:3 - Wait state select bit upper page
pub fn srl(&self) -> SRL_R[src]
Bits 4:6 - Wait state page limit
pub fn sre(&self) -> SRE_R[src]
Bit 7 - External SRAM Enable
impl R<u8, Reg<u8, _XMCRB>>[src]
pub fn xmm(&self) -> XMM_R[src]
Bits 0:2 - External Memory High Mask
pub fn xmbk(&self) -> XMBK_R[src]
Bit 7 - External Memory Bus Keeper Enable
impl R<u8, EEPM_A>[src]
pub fn variant(&self) -> Variant<u8, EEPM_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
impl R<u8, Reg<u8, _EECR>>[src]
pub fn eere(&self) -> EERE_R[src]
Bit 0 - EEPROM Read Enable
pub fn eepe(&self) -> EEPE_R[src]
Bit 1 - EEPROM Write Enable
pub fn eempe(&self) -> EEMPE_R[src]
Bit 2 - EEPROM Master Write Enable
pub fn eerie(&self) -> EERIE_R[src]
Bit 3 - EEPROM Ready Interrupt Enable
pub fn eepm(&self) -> EEPM_R[src]
Bits 4:5 - EEPROM Programming Mode Bits
impl R<u8, ISC0_A>[src]
pub fn variant(&self) -> ISC0_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC1_A>[src]
pub fn variant(&self) -> ISC1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC2_A>[src]
pub fn variant(&self) -> ISC2_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC3_A>[src]
pub fn variant(&self) -> ISC3_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _EICRA>>[src]
pub fn isc0(&self) -> ISC0_R[src]
Bits 0:1 - External Interrupt Sense Control Bit
pub fn isc1(&self) -> ISC1_R[src]
Bits 2:3 - External Interrupt Sense Control Bit
pub fn isc2(&self) -> ISC2_R[src]
Bits 4:5 - External Interrupt Sense Control Bit
pub fn isc3(&self) -> ISC3_R[src]
Bits 6:7 - External Interrupt Sense Control Bit
impl R<u8, ISC4_A>[src]
pub fn variant(&self) -> ISC4_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC5_A>[src]
pub fn variant(&self) -> ISC5_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC6_A>[src]
pub fn variant(&self) -> ISC6_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC7_A>[src]
pub fn variant(&self) -> ISC7_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _EICRB>>[src]
pub fn isc4(&self) -> ISC4_R[src]
Bits 0:1 - External Interrupt 7-4 Sense Control Bit
pub fn isc5(&self) -> ISC5_R[src]
Bits 2:3 - External Interrupt 7-4 Sense Control Bit
pub fn isc6(&self) -> ISC6_R[src]
Bits 4:5 - External Interrupt 7-4 Sense Control Bit
pub fn isc7(&self) -> ISC7_R[src]
Bits 6:7 - External Interrupt 7-4 Sense Control Bit
impl R<u8, Reg<u8, _EIFR>>[src]
impl R<u8, Reg<u8, _EIMSK>>[src]
impl R<u8, Reg<u8, _PCICR>>[src]
impl R<u8, Reg<u8, _PCIFR>>[src]
impl R<u8, Reg<u8, _PCMSK0>>[src]
impl R<u8, Reg<u8, _PCMSK1>>[src]
impl R<u8, Reg<u8, _PCMSK2>>[src]
impl R<u8, BODLEVEL_A>[src]
pub fn variant(&self) -> Variant<u8, BODLEVEL_A>[src]
Get enumerated values variant
pub fn is_4v3(&self) -> bool[src]
Checks if the value of the field is _4V3
pub fn is_2v7(&self) -> bool[src]
Checks if the value of the field is _2V7
pub fn is_1v8(&self) -> bool[src]
Checks if the value of the field is _1V8
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<u8, Reg<u8, _EXTENDED>>[src]
pub fn bodlevel(&self) -> BODLEVEL_R[src]
Bits 0:2 - Brown-out Detector trigger level
impl R<u8, BOOTSZ_A>[src]
pub fn variant(&self) -> BOOTSZ_A[src]
Get enumerated values variant
pub fn is_4096w_f000(&self) -> bool[src]
Checks if the value of the field is _4096W_F000
pub fn is_2048w_f800(&self) -> bool[src]
Checks if the value of the field is _2048W_F800
pub fn is_1024w_fc00(&self) -> bool[src]
Checks if the value of the field is _1024W_FC00
pub fn is_512w_fe00(&self) -> bool[src]
Checks if the value of the field is _512W_FE00
impl R<u8, Reg<u8, _HIGH>>[src]
pub fn bootrst(&self) -> BOOTRST_R[src]
Bit 0 - Boot Reset vector Enabled
pub fn bootsz(&self) -> BOOTSZ_R[src]
Bits 1:2 - Select Boot Size
pub fn eesave(&self) -> EESAVE_R[src]
Bit 3 - Preserve EEPROM through the Chip Erase cycle
pub fn wdton(&self) -> WDTON_R[src]
Bit 4 - Watchdog timer always on
pub fn spien(&self) -> SPIEN_R[src]
Bit 5 - Serial program downloading (SPI) enabled
pub fn jtagen(&self) -> JTAGEN_R[src]
Bit 6 - JTAG Interface Enabled
pub fn ocden(&self) -> OCDEN_R[src]
Bit 7 - On-Chip Debug Enabled
impl R<u8, SUT_CKSEL_A>[src]
pub fn variant(&self) -> Variant<u8, SUT_CKSEL_A>[src]
Get enumerated values variant
pub fn is_extclk_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_0MS
pub fn is_intrcosc_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_6CK_0MS
pub fn is_intrcosc_128khz_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_128KHZ_6CK_0MS
pub fn is_extlofxtal_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_0MS
pub fn is_extlofxtal_32kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_0MS
pub fn is_fsosc_258ck_4ms1_cres_fastpwr(&self) -> bool[src]
Checks if the value of the field is FSOSC_258CK_4MS1_CRES_FASTPWR
pub fn is_fsosc_1kck_65ms_cres_slowpwr(&self) -> bool[src]
Checks if the value of the field is FSOSC_1KCK_65MS_CRES_SLOWPWR
pub fn is_extxosc_0mhz4_0mhz9_258ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1
pub fn is_extxosc_0mhz4_0mhz9_1kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS
pub fn is_extxosc_0mhz9_3mhz_258ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_258CK_4MS1
pub fn is_extxosc_0mhz9_3mhz_1kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_65MS
pub fn is_extxosc_3mhz_8mhz_258ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_258CK_4MS1
pub fn is_extxosc_3mhz_8mhz_1kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_65MS
pub fn is_extxosc_8mhz_xx_258ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_258CK_4MS1
pub fn is_extxosc_8mhz_xx_1kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_65MS
pub fn is_extclk_6ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_4MS1
pub fn is_intrcosc_6ck_4ms1(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_6CK_4MS1
pub fn is_intrcosc_128khz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_128KHZ_6CK_4MS
pub fn is_extlofxtal_1kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_4MS1
pub fn is_extlofxtal_32kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_4MS1
pub fn is_fsosc_258ck_65ms_cres_slowpwr(&self) -> bool[src]
Checks if the value of the field is FSOSC_258CK_65MS_CRES_SLOWPWR
pub fn is_fsosc_16kck_0ms_xosc_boden(&self) -> bool[src]
Checks if the value of the field is FSOSC_16KCK_0MS_XOSC_BODEN
pub fn is_extxosc_0mhz4_0mhz9_258ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_258CK_65MS
pub fn is_extxosc_0mhz4_0mhz9_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS
pub fn is_extxosc_0mhz9_3mhz_258ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_258CK_65MS
pub fn is_extxosc_0mhz9_3mhz_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_0MS
pub fn is_extxosc_3mhz_8mhz_258ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_258CK_65MS
pub fn is_extxosc_3mhz_8mhz_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_0MS
pub fn is_extxosc_8mhz_xx_258ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_258CK_65MS
pub fn is_extxosc_8mhz_xx_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_0MS
pub fn is_extclk_6ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_65MS
pub fn is_intrcosc_6ck_65ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_6CK_65MS
pub fn is_intrcosc_128khz_6ck_64ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_128KHZ_6CK_64MS
pub fn is_extlofxtal_1kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_65MS
pub fn is_extlofxtal_32kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_65MS
pub fn is_fsosc_1kck_0ms_cres_boden(&self) -> bool[src]
Checks if the value of the field is FSOSC_1KCK_0MS_CRES_BODEN
pub fn is_fsosc_16kck_4ms1_xosc_fastpwr(&self) -> bool[src]
Checks if the value of the field is FSOSC_16KCK_4MS1_XOSC_FASTPWR
pub fn is_extxosc_0mhz4_0mhz9_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS
pub fn is_extxosc_0mhz4_0mhz9_16kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1
pub fn is_extxosc_0mhz9_3mhz_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_0MS
pub fn is_extxosc_0mhz9_3mhz_16kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1
pub fn is_extxosc_3mhz_8mhz_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_0MS
pub fn is_extxosc_3mhz_8mhz_16kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_4MS1
pub fn is_extxosc_8mhz_xx_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_0MS
pub fn is_extxosc_8mhz_xx_16kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_4MS1
pub fn is_fsosc_1kck_4ms1_cres_fastpwr(&self) -> bool[src]
Checks if the value of the field is FSOSC_1KCK_4MS1_CRES_FASTPWR
pub fn is_fsosc_16kck_65ms_xosc_slowpwr(&self) -> bool[src]
Checks if the value of the field is FSOSC_16KCK_65MS_XOSC_SLOWPWR
pub fn is_extxosc_0mhz4_0mhz9_1kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1
pub fn is_extxosc_0mhz4_0mhz9_16kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS
pub fn is_extxosc_0mhz9_3mhz_1kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1
pub fn is_extxosc_0mhz9_3mhz_16kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_65MS
pub fn is_extxosc_3mhz_8mhz_1kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_4MS1
pub fn is_extxosc_3mhz_8mhz_16kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_65MS
pub fn is_extxosc_8mhz_xx_1kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_4MS1
pub fn is_extxosc_8mhz_xx_16kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_65MS
impl R<u8, Reg<u8, _LOW>>[src]
pub fn sut_cksel(&self) -> SUT_CKSEL_R[src]
Bits 0:5 - Select Clock Source
pub fn ckout(&self) -> CKOUT_R[src]
Bit 6 - Clock output on PORTE7
pub fn ckdiv8(&self) -> CKDIV8_R[src]
Bit 7 - Divide clock by 8 internally
impl R<u8, Reg<u8, _MCUCR>>[src]
impl R<u8, Reg<u8, _MCUSR>>[src]
impl R<u8, LB_A>[src]
pub fn variant(&self) -> Variant<u8, LB_A>[src]
Get enumerated values variant
pub fn is_prog_ver_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_VER_DISABLED
pub fn is_prog_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_DISABLED
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, BLB0_A>[src]
pub fn variant(&self) -> BLB0_A[src]
Get enumerated values variant
pub fn is_lpm_spm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_SPM_DISABLE
pub fn is_lpm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_DISABLE
pub fn is_spm_disable(&self) -> bool[src]
Checks if the value of the field is SPM_DISABLE
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, BLB1_A>[src]
pub fn variant(&self) -> BLB1_A[src]
Get enumerated values variant
pub fn is_lpm_spm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_SPM_DISABLE
pub fn is_lpm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_DISABLE
pub fn is_spm_disable(&self) -> bool[src]
Checks if the value of the field is SPM_DISABLE
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, Reg<u8, _LOCKBIT>>[src]
pub fn lb(&self) -> LB_R[src]
Bits 0:1 - Memory Lock
pub fn blb0(&self) -> BLB0_R[src]
Bits 2:3 - Boot Loader Protection Mode
pub fn blb1(&self) -> BLB1_R[src]
Bits 4:5 - Boot Loader Protection Mode
impl R<u8, Reg<u8, _DDRA>>[src]
pub fn pa0(&self) -> PA0_R[src]
Bit 0 - Pin A0
pub fn pa1(&self) -> PA1_R[src]
Bit 1 - Pin A1
pub fn pa2(&self) -> PA2_R[src]
Bit 2 - Pin A2
pub fn pa3(&self) -> PA3_R[src]
Bit 3 - Pin A3
pub fn pa4(&self) -> PA4_R[src]
Bit 4 - Pin A4
pub fn pa5(&self) -> PA5_R[src]
Bit 5 - Pin A5
pub fn pa6(&self) -> PA6_R[src]
Bit 6 - Pin A6
pub fn pa7(&self) -> PA7_R[src]
Bit 7 - Pin A7
impl R<u8, Reg<u8, _PINA>>[src]
pub fn pa0(&self) -> PA0_R[src]
Bit 0 - Pin A0
pub fn pa1(&self) -> PA1_R[src]
Bit 1 - Pin A1
pub fn pa2(&self) -> PA2_R[src]
Bit 2 - Pin A2
pub fn pa3(&self) -> PA3_R[src]
Bit 3 - Pin A3
pub fn pa4(&self) -> PA4_R[src]
Bit 4 - Pin A4
pub fn pa5(&self) -> PA5_R[src]
Bit 5 - Pin A5
pub fn pa6(&self) -> PA6_R[src]
Bit 6 - Pin A6
pub fn pa7(&self) -> PA7_R[src]
Bit 7 - Pin A7
impl R<u8, Reg<u8, _PORTA>>[src]
pub fn pa0(&self) -> PA0_R[src]
Bit 0 - Pin A0
pub fn pa1(&self) -> PA1_R[src]
Bit 1 - Pin A1
pub fn pa2(&self) -> PA2_R[src]
Bit 2 - Pin A2
pub fn pa3(&self) -> PA3_R[src]
Bit 3 - Pin A3
pub fn pa4(&self) -> PA4_R[src]
Bit 4 - Pin A4
pub fn pa5(&self) -> PA5_R[src]
Bit 5 - Pin A5
pub fn pa6(&self) -> PA6_R[src]
Bit 6 - Pin A6
pub fn pa7(&self) -> PA7_R[src]
Bit 7 - Pin A7
impl R<u8, Reg<u8, _DDRB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _PINB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _PORTB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _DDRC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
pub fn pc7(&self) -> PC7_R[src]
Bit 7 - Pin C7
impl R<u8, Reg<u8, _PINC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
pub fn pc7(&self) -> PC7_R[src]
Bit 7 - Pin C7
impl R<u8, Reg<u8, _PORTC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
pub fn pc7(&self) -> PC7_R[src]
Bit 7 - Pin C7
impl R<u8, Reg<u8, _DDRD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _PIND>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _PORTD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _DDRE>>[src]
pub fn pe0(&self) -> PE0_R[src]
Bit 0 - Pin E0
pub fn pe1(&self) -> PE1_R[src]
Bit 1 - Pin E1
pub fn pe2(&self) -> PE2_R[src]
Bit 2 - Pin E2
pub fn pe3(&self) -> PE3_R[src]
Bit 3 - Pin E3
pub fn pe4(&self) -> PE4_R[src]
Bit 4 - Pin E4
pub fn pe5(&self) -> PE5_R[src]
Bit 5 - Pin E5
pub fn pe6(&self) -> PE6_R[src]
Bit 6 - Pin E6
pub fn pe7(&self) -> PE7_R[src]
Bit 7 - Pin E7
impl R<u8, Reg<u8, _PINE>>[src]
pub fn pe0(&self) -> PE0_R[src]
Bit 0 - Pin E0
pub fn pe1(&self) -> PE1_R[src]
Bit 1 - Pin E1
pub fn pe2(&self) -> PE2_R[src]
Bit 2 - Pin E2
pub fn pe3(&self) -> PE3_R[src]
Bit 3 - Pin E3
pub fn pe4(&self) -> PE4_R[src]
Bit 4 - Pin E4
pub fn pe5(&self) -> PE5_R[src]
Bit 5 - Pin E5
pub fn pe6(&self) -> PE6_R[src]
Bit 6 - Pin E6
pub fn pe7(&self) -> PE7_R[src]
Bit 7 - Pin E7
impl R<u8, Reg<u8, _PORTE>>[src]
pub fn pe0(&self) -> PE0_R[src]
Bit 0 - Pin E0
pub fn pe1(&self) -> PE1_R[src]
Bit 1 - Pin E1
pub fn pe2(&self) -> PE2_R[src]
Bit 2 - Pin E2
pub fn pe3(&self) -> PE3_R[src]
Bit 3 - Pin E3
pub fn pe4(&self) -> PE4_R[src]
Bit 4 - Pin E4
pub fn pe5(&self) -> PE5_R[src]
Bit 5 - Pin E5
pub fn pe6(&self) -> PE6_R[src]
Bit 6 - Pin E6
pub fn pe7(&self) -> PE7_R[src]
Bit 7 - Pin E7
impl R<u8, Reg<u8, _DDRF>>[src]
pub fn pf0(&self) -> PF0_R[src]
Bit 0 - Pin F0
pub fn pf1(&self) -> PF1_R[src]
Bit 1 - Pin F1
pub fn pf2(&self) -> PF2_R[src]
Bit 2 - Pin F2
pub fn pf3(&self) -> PF3_R[src]
Bit 3 - Pin F3
pub fn pf4(&self) -> PF4_R[src]
Bit 4 - Pin F4
pub fn pf5(&self) -> PF5_R[src]
Bit 5 - Pin F5
pub fn pf6(&self) -> PF6_R[src]
Bit 6 - Pin F6
pub fn pf7(&self) -> PF7_R[src]
Bit 7 - Pin F7
impl R<u8, Reg<u8, _PINF>>[src]
pub fn pf0(&self) -> PF0_R[src]
Bit 0 - Pin F0
pub fn pf1(&self) -> PF1_R[src]
Bit 1 - Pin F1
pub fn pf2(&self) -> PF2_R[src]
Bit 2 - Pin F2
pub fn pf3(&self) -> PF3_R[src]
Bit 3 - Pin F3
pub fn pf4(&self) -> PF4_R[src]
Bit 4 - Pin F4
pub fn pf5(&self) -> PF5_R[src]
Bit 5 - Pin F5
pub fn pf6(&self) -> PF6_R[src]
Bit 6 - Pin F6
pub fn pf7(&self) -> PF7_R[src]
Bit 7 - Pin F7
impl R<u8, Reg<u8, _PORTF>>[src]
pub fn pf0(&self) -> PF0_R[src]
Bit 0 - Pin F0
pub fn pf1(&self) -> PF1_R[src]
Bit 1 - Pin F1
pub fn pf2(&self) -> PF2_R[src]
Bit 2 - Pin F2
pub fn pf3(&self) -> PF3_R[src]
Bit 3 - Pin F3
pub fn pf4(&self) -> PF4_R[src]
Bit 4 - Pin F4
pub fn pf5(&self) -> PF5_R[src]
Bit 5 - Pin F5
pub fn pf6(&self) -> PF6_R[src]
Bit 6 - Pin F6
pub fn pf7(&self) -> PF7_R[src]
Bit 7 - Pin F7
impl R<u8, Reg<u8, _DDRG>>[src]
pub fn pg0(&self) -> PG0_R[src]
Bit 0 - Pin G0
pub fn pg1(&self) -> PG1_R[src]
Bit 1 - Pin G1
pub fn pg2(&self) -> PG2_R[src]
Bit 2 - Pin G2
pub fn pg3(&self) -> PG3_R[src]
Bit 3 - Pin G3
pub fn pg4(&self) -> PG4_R[src]
Bit 4 - Pin G4
pub fn pg5(&self) -> PG5_R[src]
Bit 5 - Pin G5
pub fn pg6(&self) -> PG6_R[src]
Bit 6 - Pin G6
pub fn pg7(&self) -> PG7_R[src]
Bit 7 - Pin G7
impl R<u8, Reg<u8, _PING>>[src]
pub fn pg0(&self) -> PG0_R[src]
Bit 0 - Pin G0
pub fn pg1(&self) -> PG1_R[src]
Bit 1 - Pin G1
pub fn pg2(&self) -> PG2_R[src]
Bit 2 - Pin G2
pub fn pg3(&self) -> PG3_R[src]
Bit 3 - Pin G3
pub fn pg4(&self) -> PG4_R[src]
Bit 4 - Pin G4
pub fn pg5(&self) -> PG5_R[src]
Bit 5 - Pin G5
pub fn pg6(&self) -> PG6_R[src]
Bit 6 - Pin G6
pub fn pg7(&self) -> PG7_R[src]
Bit 7 - Pin G7
impl R<u8, Reg<u8, _PORTG>>[src]
pub fn pg0(&self) -> PG0_R[src]
Bit 0 - Pin G0
pub fn pg1(&self) -> PG1_R[src]
Bit 1 - Pin G1
pub fn pg2(&self) -> PG2_R[src]
Bit 2 - Pin G2
pub fn pg3(&self) -> PG3_R[src]
Bit 3 - Pin G3
pub fn pg4(&self) -> PG4_R[src]
Bit 4 - Pin G4
pub fn pg5(&self) -> PG5_R[src]
Bit 5 - Pin G5
pub fn pg6(&self) -> PG6_R[src]
Bit 6 - Pin G6
pub fn pg7(&self) -> PG7_R[src]
Bit 7 - Pin G7
impl R<u8, Reg<u8, _DDRH>>[src]
pub fn ph0(&self) -> PH0_R[src]
Bit 0 - Pin H0
pub fn ph1(&self) -> PH1_R[src]
Bit 1 - Pin H1
pub fn ph2(&self) -> PH2_R[src]
Bit 2 - Pin H2
pub fn ph3(&self) -> PH3_R[src]
Bit 3 - Pin H3
pub fn ph4(&self) -> PH4_R[src]
Bit 4 - Pin H4
pub fn ph5(&self) -> PH5_R[src]
Bit 5 - Pin H5
pub fn ph6(&self) -> PH6_R[src]
Bit 6 - Pin H6
pub fn ph7(&self) -> PH7_R[src]
Bit 7 - Pin H7
impl R<u8, Reg<u8, _PINH>>[src]
pub fn ph0(&self) -> PH0_R[src]
Bit 0 - Pin H0
pub fn ph1(&self) -> PH1_R[src]
Bit 1 - Pin H1
pub fn ph2(&self) -> PH2_R[src]
Bit 2 - Pin H2
pub fn ph3(&self) -> PH3_R[src]
Bit 3 - Pin H3
pub fn ph4(&self) -> PH4_R[src]
Bit 4 - Pin H4
pub fn ph5(&self) -> PH5_R[src]
Bit 5 - Pin H5
pub fn ph6(&self) -> PH6_R[src]
Bit 6 - Pin H6
pub fn ph7(&self) -> PH7_R[src]
Bit 7 - Pin H7
impl R<u8, Reg<u8, _PORTH>>[src]
pub fn ph0(&self) -> PH0_R[src]
Bit 0 - Pin H0
pub fn ph1(&self) -> PH1_R[src]
Bit 1 - Pin H1
pub fn ph2(&self) -> PH2_R[src]
Bit 2 - Pin H2
pub fn ph3(&self) -> PH3_R[src]
Bit 3 - Pin H3
pub fn ph4(&self) -> PH4_R[src]
Bit 4 - Pin H4
pub fn ph5(&self) -> PH5_R[src]
Bit 5 - Pin H5
pub fn ph6(&self) -> PH6_R[src]
Bit 6 - Pin H6
pub fn ph7(&self) -> PH7_R[src]
Bit 7 - Pin H7
impl R<u8, Reg<u8, _DDRJ>>[src]
pub fn pj0(&self) -> PJ0_R[src]
Bit 0 - Pin J0
pub fn pj1(&self) -> PJ1_R[src]
Bit 1 - Pin J1
pub fn pj2(&self) -> PJ2_R[src]
Bit 2 - Pin J2
pub fn pj3(&self) -> PJ3_R[src]
Bit 3 - Pin J3
pub fn pj4(&self) -> PJ4_R[src]
Bit 4 - Pin J4
pub fn pj5(&self) -> PJ5_R[src]
Bit 5 - Pin J5
pub fn pj6(&self) -> PJ6_R[src]
Bit 6 - Pin J6
pub fn pj7(&self) -> PJ7_R[src]
Bit 7 - Pin J7
impl R<u8, Reg<u8, _PINJ>>[src]
pub fn pj0(&self) -> PJ0_R[src]
Bit 0 - Pin J0
pub fn pj1(&self) -> PJ1_R[src]
Bit 1 - Pin J1
pub fn pj2(&self) -> PJ2_R[src]
Bit 2 - Pin J2
pub fn pj3(&self) -> PJ3_R[src]
Bit 3 - Pin J3
pub fn pj4(&self) -> PJ4_R[src]
Bit 4 - Pin J4
pub fn pj5(&self) -> PJ5_R[src]
Bit 5 - Pin J5
pub fn pj6(&self) -> PJ6_R[src]
Bit 6 - Pin J6
pub fn pj7(&self) -> PJ7_R[src]
Bit 7 - Pin J7
impl R<u8, Reg<u8, _PORTJ>>[src]
pub fn pj0(&self) -> PJ0_R[src]
Bit 0 - Pin J0
pub fn pj1(&self) -> PJ1_R[src]
Bit 1 - Pin J1
pub fn pj2(&self) -> PJ2_R[src]
Bit 2 - Pin J2
pub fn pj3(&self) -> PJ3_R[src]
Bit 3 - Pin J3
pub fn pj4(&self) -> PJ4_R[src]
Bit 4 - Pin J4
pub fn pj5(&self) -> PJ5_R[src]
Bit 5 - Pin J5
pub fn pj6(&self) -> PJ6_R[src]
Bit 6 - Pin J6
pub fn pj7(&self) -> PJ7_R[src]
Bit 7 - Pin J7
impl R<u8, Reg<u8, _DDRK>>[src]
pub fn pk0(&self) -> PK0_R[src]
Bit 0 - Pin K0
pub fn pk1(&self) -> PK1_R[src]
Bit 1 - Pin K1
pub fn pk2(&self) -> PK2_R[src]
Bit 2 - Pin K2
pub fn pk3(&self) -> PK3_R[src]
Bit 3 - Pin K3
pub fn pk4(&self) -> PK4_R[src]
Bit 4 - Pin K4
pub fn pk5(&self) -> PK5_R[src]
Bit 5 - Pin K5
pub fn pk6(&self) -> PK6_R[src]
Bit 6 - Pin K6
pub fn pk7(&self) -> PK7_R[src]
Bit 7 - Pin K7
impl R<u8, Reg<u8, _PINK>>[src]
pub fn pk0(&self) -> PK0_R[src]
Bit 0 - Pin K0
pub fn pk1(&self) -> PK1_R[src]
Bit 1 - Pin K1
pub fn pk2(&self) -> PK2_R[src]
Bit 2 - Pin K2
pub fn pk3(&self) -> PK3_R[src]
Bit 3 - Pin K3
pub fn pk4(&self) -> PK4_R[src]
Bit 4 - Pin K4
pub fn pk5(&self) -> PK5_R[src]
Bit 5 - Pin K5
pub fn pk6(&self) -> PK6_R[src]
Bit 6 - Pin K6
pub fn pk7(&self) -> PK7_R[src]
Bit 7 - Pin K7
impl R<u8, Reg<u8, _PORTK>>[src]
pub fn pk0(&self) -> PK0_R[src]
Bit 0 - Pin K0
pub fn pk1(&self) -> PK1_R[src]
Bit 1 - Pin K1
pub fn pk2(&self) -> PK2_R[src]
Bit 2 - Pin K2
pub fn pk3(&self) -> PK3_R[src]
Bit 3 - Pin K3
pub fn pk4(&self) -> PK4_R[src]
Bit 4 - Pin K4
pub fn pk5(&self) -> PK5_R[src]
Bit 5 - Pin K5
pub fn pk6(&self) -> PK6_R[src]
Bit 6 - Pin K6
pub fn pk7(&self) -> PK7_R[src]
Bit 7 - Pin K7
impl R<u8, Reg<u8, _DDRL>>[src]
pub fn pl0(&self) -> PL0_R[src]
Bit 0 - Pin L0
pub fn pl1(&self) -> PL1_R[src]
Bit 1 - Pin L1
pub fn pl2(&self) -> PL2_R[src]
Bit 2 - Pin L2
pub fn pl3(&self) -> PL3_R[src]
Bit 3 - Pin L3
pub fn pl4(&self) -> PL4_R[src]
Bit 4 - Pin L4
pub fn pl5(&self) -> PL5_R[src]
Bit 5 - Pin L5
pub fn pl6(&self) -> PL6_R[src]
Bit 6 - Pin L6
pub fn pl7(&self) -> PL7_R[src]
Bit 7 - Pin L7
impl R<u8, Reg<u8, _PINL>>[src]
pub fn pl0(&self) -> PL0_R[src]
Bit 0 - Pin L0
pub fn pl1(&self) -> PL1_R[src]
Bit 1 - Pin L1
pub fn pl2(&self) -> PL2_R[src]
Bit 2 - Pin L2
pub fn pl3(&self) -> PL3_R[src]
Bit 3 - Pin L3
pub fn pl4(&self) -> PL4_R[src]
Bit 4 - Pin L4
pub fn pl5(&self) -> PL5_R[src]
Bit 5 - Pin L5
pub fn pl6(&self) -> PL6_R[src]
Bit 6 - Pin L6
pub fn pl7(&self) -> PL7_R[src]
Bit 7 - Pin L7
impl R<u8, Reg<u8, _PORTL>>[src]
pub fn pl0(&self) -> PL0_R[src]
Bit 0 - Pin L0
pub fn pl1(&self) -> PL1_R[src]
Bit 1 - Pin L1
pub fn pl2(&self) -> PL2_R[src]
Bit 2 - Pin L2
pub fn pl3(&self) -> PL3_R[src]
Bit 3 - Pin L3
pub fn pl4(&self) -> PL4_R[src]
Bit 4 - Pin L4
pub fn pl5(&self) -> PL5_R[src]
Bit 5 - Pin L5
pub fn pl6(&self) -> PL6_R[src]
Bit 6 - Pin L6
pub fn pl7(&self) -> PL7_R[src]
Bit 7 - Pin L7
impl R<u8, SPR_A>[src]
pub fn variant(&self) -> Variant<u8, SPR_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _SPCR>>[src]
pub fn spr(&self) -> SPR_R[src]
Bits 0:1 - SPI Clock Rate Selects
pub fn cpha(&self) -> CPHA_R[src]
Bit 2 - Clock Phase
pub fn cpol(&self) -> CPOL_R[src]
Bit 3 - Clock polarity
pub fn mstr(&self) -> MSTR_R[src]
Bit 4 - Master/Slave Select
pub fn dord(&self) -> DORD_R[src]
Bit 5 - Data Order
pub fn spe(&self) -> SPE_R[src]
Bit 6 - SPI Enable
pub fn spie(&self) -> SPIE_R[src]
Bit 7 - SPI Interrupt Enable
impl R<u8, Reg<u8, _SPSR>>[src]
pub fn spi2x(&self) -> SPI2X_R[src]
Bit 0 - Double SPI Speed Bit
pub fn wcol(&self) -> WCOL_R[src]
Bit 6 - Write Collision Flag
pub fn spif(&self) -> SPIF_R[src]
Bit 7 - SPI Interrupt Flag
impl R<u8, Reg<u8, _GTCCR>>[src]
pub fn psrsync(&self) -> PSRSYNC_R[src]
Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0
pub fn tsm(&self) -> TSM_R[src]
Bit 7 - Timer/Counter Synchronization Mode
impl R<u8, Reg<u8, _TCCR0A>>[src]
pub fn wgm0(&self) -> WGM0_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn com0b(&self) -> COM0B_R[src]
Bits 4:5 - Compare Output Mode, Fast PWm
pub fn com0a(&self) -> COM0A_R[src]
Bits 6:7 - Compare Output Mode, Phase Correct PWM Mode
impl R<u8, CS0_A>[src]
pub fn variant(&self) -> CS0_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR0B>>[src]
pub fn cs0(&self) -> CS0_R[src]
Bits 0:2 - Clock Select
pub fn wgm02(&self) -> WGM02_R[src]
Bit 3 -
pub fn foc0b(&self) -> FOC0B_R[src]
Bit 6 - Force Output Compare B
pub fn foc0a(&self) -> FOC0A_R[src]
Bit 7 - Force Output Compare A
impl R<u8, Reg<u8, _TIFR0>>[src]
pub fn tov0(&self) -> TOV0_R[src]
Bit 0 - Timer/Counter0 Overflow Flag
pub fn ocf0a(&self) -> OCF0A_R[src]
Bit 1 - Timer/Counter0 Output Compare Flag 0A
pub fn ocf0b(&self) -> OCF0B_R[src]
Bit 2 - Timer/Counter0 Output Compare Flag 0B
impl R<u8, Reg<u8, _TIMSK0>>[src]
pub fn toie0(&self) -> TOIE0_R[src]
Bit 0 - Timer/Counter0 Overflow Interrupt Enable
pub fn ocie0a(&self) -> OCIE0A_R[src]
Bit 1 - Timer/Counter0 Output Compare Match A Interrupt Enable
pub fn ocie0b(&self) -> OCIE0B_R[src]
Bit 2 - Timer/Counter0 Output Compare Match B Interrupt Enable
impl R<u8, Reg<u8, _TCCR1A>>[src]
pub fn wgm1(&self) -> WGM1_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn com1c(&self) -> COM1C_R[src]
Bits 2:3 - Compare Output Mode 1C, bits
pub fn com1b(&self) -> COM1B_R[src]
Bits 4:5 - Compare Output Mode 1B, bits
pub fn com1a(&self) -> COM1A_R[src]
Bits 6:7 - Compare Output Mode 1A, bits
impl R<u8, CS1_A>[src]
pub fn variant(&self) -> CS1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR1B>>[src]
pub fn cs1(&self) -> CS1_R[src]
Bits 0:2 - Prescaler source of Timer/Counter 1
pub fn wgm1(&self) -> WGM1_R[src]
Bits 3:4 - Waveform Generation Mode
pub fn ices1(&self) -> ICES1_R[src]
Bit 6 - Input Capture 1 Edge Select
pub fn icnc1(&self) -> ICNC1_R[src]
Bit 7 - Input Capture 1 Noise Canceler
impl R<u8, Reg<u8, _TCCR1C>>[src]
pub fn foc1c(&self) -> FOC1C_R[src]
Bit 5 - Force Output Compare 1C
pub fn foc1b(&self) -> FOC1B_R[src]
Bit 6 - Force Output Compare 1B
pub fn foc1a(&self) -> FOC1A_R[src]
Bit 7 - Force Output Compare 1A
impl R<u8, Reg<u8, _TIFR1>>[src]
pub fn tov1(&self) -> TOV1_R[src]
Bit 0 - Timer/Counter1 Overflow Flag
pub fn ocf1a(&self) -> OCF1A_R[src]
Bit 1 - Output Compare Flag 1A
pub fn ocf1b(&self) -> OCF1B_R[src]
Bit 2 - Output Compare Flag 1B
pub fn ocf1c(&self) -> OCF1C_R[src]
Bit 3 - Output Compare Flag 1C
pub fn icf1(&self) -> ICF1_R[src]
Bit 5 - Input Capture Flag 1
impl R<u8, Reg<u8, _TIMSK1>>[src]
pub fn toie1(&self) -> TOIE1_R[src]
Bit 0 - Timer/Counter1 Overflow Interrupt Enable
pub fn ocie1a(&self) -> OCIE1A_R[src]
Bit 1 - Timer/Counter1 Output Compare A Match Interrupt Enable
pub fn ocie1b(&self) -> OCIE1B_R[src]
Bit 2 - Timer/Counter1 Output Compare B Match Interrupt Enable
pub fn ocie1c(&self) -> OCIE1C_R[src]
Bit 3 - Timer/Counter1 Output Compare C Match Interrupt Enable
pub fn icie1(&self) -> ICIE1_R[src]
Bit 5 - Timer/Counter1 Input Capture Interrupt Enable
impl R<u8, Reg<u8, _ASSR>>[src]
pub fn tcr2bub(&self) -> TCR2BUB_R[src]
Bit 0 - Timer/Counter Control Register2 Update Busy
pub fn tcr2aub(&self) -> TCR2AUB_R[src]
Bit 1 - Timer/Counter Control Register2 Update Busy
pub fn ocr2bub(&self) -> OCR2BUB_R[src]
Bit 2 - Output Compare Register 2 Update Busy
pub fn ocr2aub(&self) -> OCR2AUB_R[src]
Bit 3 - Output Compare Register2 Update Busy
pub fn tcn2ub(&self) -> TCN2UB_R[src]
Bit 4 - Timer/Counter2 Update Busy
pub fn as2(&self) -> AS2_R[src]
Bit 5 - Asynchronous Timer/Counter2
pub fn exclk(&self) -> EXCLK_R[src]
Bit 6 - Enable External Clock Input
impl R<u8, Reg<u8, _GTCCR>>[src]
pub fn psrasy(&self) -> PSRASY_R[src]
Bit 1 - Prescaler Reset Timer/Counter2
pub fn tsm(&self) -> TSM_R[src]
Bit 7 - Timer/Counter Synchronization Mode
impl R<u8, Reg<u8, _TCCR2A>>[src]
pub fn wgm2(&self) -> WGM2_R[src]
Bits 0:1 - Waveform Genration Mode
pub fn com2b(&self) -> COM2B_R[src]
Bits 4:5 - Compare Output Mode bits
pub fn com2a(&self) -> COM2A_R[src]
Bits 6:7 - Compare Output Mode bits
impl R<u8, CS2_A>[src]
pub fn variant(&self) -> CS2_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR2B>>[src]
pub fn cs2(&self) -> CS2_R[src]
Bits 0:2 - Clock Select bits
pub fn wgm22(&self) -> WGM22_R[src]
Bit 3 - Waveform Generation Mode
pub fn foc2b(&self) -> FOC2B_R[src]
Bit 6 - Force Output Compare B
pub fn foc2a(&self) -> FOC2A_R[src]
Bit 7 - Force Output Compare A
impl R<u8, Reg<u8, _TIFR2>>[src]
pub fn tov2(&self) -> TOV2_R[src]
Bit 0 - Timer/Counter2 Overflow Flag
pub fn ocf2a(&self) -> OCF2A_R[src]
Bit 1 - Output Compare Flag 2A
pub fn ocf2b(&self) -> OCF2B_R[src]
Bit 2 - Output Compare Flag 2B
impl R<u8, Reg<u8, _TIMSK2>>[src]
pub fn toie2(&self) -> TOIE2_R[src]
Bit 0 - Timer/Counter2 Overflow Interrupt Enable
pub fn ocie2a(&self) -> OCIE2A_R[src]
Bit 1 - Timer/Counter2 Output Compare Match A Interrupt Enable
pub fn ocie2b(&self) -> OCIE2B_R[src]
Bit 2 - Timer/Counter2 Output Compare Match B Interrupt Enable
impl R<u8, Reg<u8, _TCCR3A>>[src]
pub fn wgm3(&self) -> WGM3_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn com3c(&self) -> COM3C_R[src]
Bits 2:3 - Compare Output Mode 3C, bits
pub fn com3b(&self) -> COM3B_R[src]
Bits 4:5 - Compare Output Mode 3B, bits
pub fn com3a(&self) -> COM3A_R[src]
Bits 6:7 - Compare Output Mode 1A, bits
impl R<u8, CS3_A>[src]
pub fn variant(&self) -> CS3_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR3B>>[src]
pub fn cs3(&self) -> CS3_R[src]
Bits 0:2 - Prescaler source of Timer/Counter 3
pub fn wgm3(&self) -> WGM3_R[src]
Bits 3:4 - Waveform Generation Mode
pub fn ices3(&self) -> ICES3_R[src]
Bit 6 - Input Capture 3 Edge Select
pub fn icnc3(&self) -> ICNC3_R[src]
Bit 7 - Input Capture 3 Noise Canceler
impl R<u8, Reg<u8, _TCCR3C>>[src]
pub fn foc3c(&self) -> FOC3C_R[src]
Bit 5 - Force Output Compare 3C
pub fn foc3b(&self) -> FOC3B_R[src]
Bit 6 - Force Output Compare 3B
pub fn foc3a(&self) -> FOC3A_R[src]
Bit 7 - Force Output Compare 3A
impl R<u8, Reg<u8, _TIFR3>>[src]
pub fn tov3(&self) -> TOV3_R[src]
Bit 0 - Timer/Counter3 Overflow Flag
pub fn ocf3a(&self) -> OCF3A_R[src]
Bit 1 - Output Compare Flag 3A
pub fn ocf3b(&self) -> OCF3B_R[src]
Bit 2 - Output Compare Flag 3B
pub fn ocf3c(&self) -> OCF3C_R[src]
Bit 3 - Output Compare Flag 3C
pub fn icf3(&self) -> ICF3_R[src]
Bit 5 - Input Capture Flag 3
impl R<u8, Reg<u8, _TIMSK3>>[src]
pub fn toie3(&self) -> TOIE3_R[src]
Bit 0 - Timer/Counter3 Overflow Interrupt Enable
pub fn ocie3a(&self) -> OCIE3A_R[src]
Bit 1 - Timer/Counter3 Output Compare A Match Interrupt Enable
pub fn ocie3b(&self) -> OCIE3B_R[src]
Bit 2 - Timer/Counter3 Output Compare B Match Interrupt Enable
pub fn ocie3c(&self) -> OCIE3C_R[src]
Bit 3 - Timer/Counter3 Output Compare C Match Interrupt Enable
pub fn icie3(&self) -> ICIE3_R[src]
Bit 5 - Timer/Counter3 Input Capture Interrupt Enable
impl R<u8, Reg<u8, _TCCR4A>>[src]
pub fn wgm4(&self) -> WGM4_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn com4c(&self) -> COM4C_R[src]
Bits 2:3 - Compare Output Mode 4C, bits
pub fn com4b(&self) -> COM4B_R[src]
Bits 4:5 - Compare Output Mode 4B, bits
pub fn com4a(&self) -> COM4A_R[src]
Bits 6:7 - Compare Output Mode 1A, bits
impl R<u8, CS4_A>[src]
pub fn variant(&self) -> CS4_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR4B>>[src]
pub fn cs4(&self) -> CS4_R[src]
Bits 0:2 - Prescaler source of Timer/Counter 4
pub fn wgm4(&self) -> WGM4_R[src]
Bits 3:4 - Waveform Generation Mode
pub fn ices4(&self) -> ICES4_R[src]
Bit 6 - Input Capture 4 Edge Select
pub fn icnc4(&self) -> ICNC4_R[src]
Bit 7 - Input Capture 4 Noise Canceler
impl R<u8, Reg<u8, _TCCR4C>>[src]
pub fn foc4c(&self) -> FOC4C_R[src]
Bit 5 - Force Output Compare 4C
pub fn foc4b(&self) -> FOC4B_R[src]
Bit 6 - Force Output Compare 4B
pub fn foc4a(&self) -> FOC4A_R[src]
Bit 7 - Force Output Compare 4A
impl R<u8, Reg<u8, _TIFR4>>[src]
pub fn tov4(&self) -> TOV4_R[src]
Bit 0 - Timer/Counter4 Overflow Flag
pub fn ocf4a(&self) -> OCF4A_R[src]
Bit 1 - Output Compare Flag 4A
pub fn ocf4b(&self) -> OCF4B_R[src]
Bit 2 - Output Compare Flag 4B
pub fn ocf4c(&self) -> OCF4C_R[src]
Bit 3 - Output Compare Flag 4C
pub fn icf4(&self) -> ICF4_R[src]
Bit 5 - Input Capture Flag 4
impl R<u8, Reg<u8, _TIMSK4>>[src]
pub fn toie4(&self) -> TOIE4_R[src]
Bit 0 - Timer/Counter4 Overflow Interrupt Enable
pub fn ocie4a(&self) -> OCIE4A_R[src]
Bit 1 - Timer/Counter4 Output Compare A Match Interrupt Enable
pub fn ocie4b(&self) -> OCIE4B_R[src]
Bit 2 - Timer/Counter4 Output Compare B Match Interrupt Enable
pub fn ocie4c(&self) -> OCIE4C_R[src]
Bit 3 - Timer/Counter4 Output Compare C Match Interrupt Enable
pub fn icie4(&self) -> ICIE4_R[src]
Bit 5 - Timer/Counter4 Input Capture Interrupt Enable
impl R<u8, Reg<u8, _TCCR5A>>[src]
pub fn wgm5(&self) -> WGM5_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn com5c(&self) -> COM5C_R[src]
Bits 2:3 - Compare Output Mode 5C, bits
pub fn com5b(&self) -> COM5B_R[src]
Bits 4:5 - Compare Output Mode 5B, bits
pub fn com5a(&self) -> COM5A_R[src]
Bits 6:7 - Compare Output Mode 1A, bits
impl R<u8, CS5_A>[src]
pub fn variant(&self) -> CS5_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR5B>>[src]
pub fn cs5(&self) -> CS5_R[src]
Bits 0:2 - Prescaler source of Timer/Counter 5
pub fn wgm5(&self) -> WGM5_R[src]
Bits 3:4 - Waveform Generation Mode
pub fn ices5(&self) -> ICES5_R[src]
Bit 6 - Input Capture 5 Edge Select
pub fn icnc5(&self) -> ICNC5_R[src]
Bit 7 - Input Capture 5 Noise Canceler
impl R<u8, Reg<u8, _TCCR5C>>[src]
pub fn foc5c(&self) -> FOC5C_R[src]
Bit 5 - Force Output Compare 5C
pub fn foc5b(&self) -> FOC5B_R[src]
Bit 6 - Force Output Compare 5B
pub fn foc5a(&self) -> FOC5A_R[src]
Bit 7 - Force Output Compare 5A
impl R<u8, Reg<u8, _TIFR5>>[src]
pub fn tov5(&self) -> TOV5_R[src]
Bit 0 - Timer/Counter5 Overflow Flag
pub fn ocf5a(&self) -> OCF5A_R[src]
Bit 1 - Output Compare Flag 5A
pub fn ocf5b(&self) -> OCF5B_R[src]
Bit 2 - Output Compare Flag 5B
pub fn ocf5c(&self) -> OCF5C_R[src]
Bit 3 - Output Compare Flag 5C
pub fn icf5(&self) -> ICF5_R[src]
Bit 5 - Input Capture Flag 5
impl R<u8, Reg<u8, _TIMSK5>>[src]
pub fn toie5(&self) -> TOIE5_R[src]
Bit 0 - Timer/Counter5 Overflow Interrupt Enable
pub fn ocie5a(&self) -> OCIE5A_R[src]
Bit 1 - Timer/Counter5 Output Compare A Match Interrupt Enable
pub fn ocie5b(&self) -> OCIE5B_R[src]
Bit 2 - Timer/Counter5 Output Compare B Match Interrupt Enable
pub fn ocie5c(&self) -> OCIE5C_R[src]
Bit 3 - Timer/Counter5 Output Compare C Match Interrupt Enable
pub fn icie5(&self) -> ICIE5_R[src]
Bit 5 - Timer/Counter5 Input Capture Interrupt Enable
impl R<u8, Reg<u8, _TWAMR>>[src]
impl R<u8, Reg<u8, _TWAR>>[src]
pub fn twgce(&self) -> TWGCE_R[src]
Bit 0 - TWI General Call Recognition Enable Bit
pub fn twa(&self) -> TWA_R[src]
Bits 1:7 - TWI (Slave) Address register Bits
impl R<u8, Reg<u8, _TWCR>>[src]
pub fn twie(&self) -> TWIE_R[src]
Bit 0 - TWI Interrupt Enable
pub fn twen(&self) -> TWEN_R[src]
Bit 2 - TWI Enable Bit
pub fn twwc(&self) -> TWWC_R[src]
Bit 3 - TWI Write Collition Flag
pub fn twsto(&self) -> TWSTO_R[src]
Bit 4 - TWI Stop Condition Bit
pub fn twsta(&self) -> TWSTA_R[src]
Bit 5 - TWI Start Condition Bit
pub fn twea(&self) -> TWEA_R[src]
Bit 6 - TWI Enable Acknowledge Bit
pub fn twint(&self) -> TWINT_R[src]
Bit 7 - TWI Interrupt Flag
impl R<u8, TWPS_A>[src]
pub fn variant(&self) -> TWPS_A[src]
Get enumerated values variant
pub fn is_prescaler_1(&self) -> bool[src]
Checks if the value of the field is PRESCALER_1
pub fn is_prescaler_4(&self) -> bool[src]
Checks if the value of the field is PRESCALER_4
pub fn is_prescaler_16(&self) -> bool[src]
Checks if the value of the field is PRESCALER_16
pub fn is_prescaler_64(&self) -> bool[src]
Checks if the value of the field is PRESCALER_64
impl R<u8, Reg<u8, _TWSR>>[src]
pub fn twps(&self) -> TWPS_R[src]
Bits 0:1 - TWI Prescaler
pub fn tws(&self) -> TWS_R[src]
Bits 3:7 - TWI Status
impl R<u8, Reg<u8, _UCSR0A>>[src]
pub fn mpcm0(&self) -> MPCM0_R[src]
Bit 0 - Multi-processor Communication Mode
pub fn u2x0(&self) -> U2X0_R[src]
Bit 1 - Double the USART transmission speed
pub fn upe0(&self) -> UPE0_R[src]
Bit 2 - Parity Error
pub fn dor0(&self) -> DOR0_R[src]
Bit 3 - Data overRun
pub fn fe0(&self) -> FE0_R[src]
Bit 4 - Framing Error
pub fn udre0(&self) -> UDRE0_R[src]
Bit 5 - USART Data Register Empty
pub fn txc0(&self) -> TXC0_R[src]
Bit 6 - USART Transmit Complete
pub fn rxc0(&self) -> RXC0_R[src]
Bit 7 - USART Receive Complete
impl R<u8, Reg<u8, _UCSR0B>>[src]
pub fn txb80(&self) -> TXB80_R[src]
Bit 0 - Transmit Data Bit 8
pub fn rxb80(&self) -> RXB80_R[src]
Bit 1 - Receive Data Bit 8
pub fn ucsz02(&self) -> UCSZ02_R[src]
Bit 2 - Character Size
pub fn txen0(&self) -> TXEN0_R[src]
Bit 3 - Transmitter Enable
pub fn rxen0(&self) -> RXEN0_R[src]
Bit 4 - Receiver Enable
pub fn udrie0(&self) -> UDRIE0_R[src]
Bit 5 - USART Data register Empty Interrupt Enable
pub fn txcie0(&self) -> TXCIE0_R[src]
Bit 6 - TX Complete Interrupt Enable
pub fn rxcie0(&self) -> RXCIE0_R[src]
Bit 7 - RX Complete Interrupt Enable
impl R<bool, UCPOL0_A>[src]
pub fn variant(&self) -> UCPOL0_A[src]
Get enumerated values variant
pub fn is_rising_edge(&self) -> bool[src]
Checks if the value of the field is RISING_EDGE
pub fn is_falling_edge(&self) -> bool[src]
Checks if the value of the field is FALLING_EDGE
impl R<u8, UCSZ0_A>[src]
pub fn variant(&self) -> UCSZ0_A[src]
Get enumerated values variant
pub fn is_chr5(&self) -> bool[src]
Checks if the value of the field is CHR5
pub fn is_chr6(&self) -> bool[src]
Checks if the value of the field is CHR6
pub fn is_chr7(&self) -> bool[src]
Checks if the value of the field is CHR7
pub fn is_chr8(&self) -> bool[src]
Checks if the value of the field is CHR8
impl R<bool, USBS0_A>[src]
pub fn variant(&self) -> USBS0_A[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool[src]
Checks if the value of the field is STOP2
impl R<u8, UPM0_A>[src]
pub fn variant(&self) -> Variant<u8, UPM0_A>[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_parity_even(&self) -> bool[src]
Checks if the value of the field is PARITY_EVEN
pub fn is_parity_odd(&self) -> bool[src]
Checks if the value of the field is PARITY_ODD
impl R<u8, UMSEL0_A>[src]
pub fn variant(&self) -> Variant<u8, UMSEL0_A>[src]
Get enumerated values variant
pub fn is_usart_async(&self) -> bool[src]
Checks if the value of the field is USART_ASYNC
pub fn is_usart_sync(&self) -> bool[src]
Checks if the value of the field is USART_SYNC
pub fn is_spi_master(&self) -> bool[src]
Checks if the value of the field is SPI_MASTER
impl R<u8, Reg<u8, _UCSR0C>>[src]
pub fn ucpol0(&self) -> UCPOL0_R[src]
Bit 0 - Clock Polarity
pub fn ucsz0(&self) -> UCSZ0_R[src]
Bits 1:2 - Character Size
pub fn usbs0(&self) -> USBS0_R[src]
Bit 3 - Stop Bit Select
pub fn upm0(&self) -> UPM0_R[src]
Bits 4:5 - Parity Mode Bits
pub fn umsel0(&self) -> UMSEL0_R[src]
Bits 6:7 - USART Mode Select
impl R<u8, Reg<u8, _UCSR1A>>[src]
pub fn mpcm1(&self) -> MPCM1_R[src]
Bit 0 - Multi-processor Communication Mode
pub fn u2x1(&self) -> U2X1_R[src]
Bit 1 - Double the USART transmission speed
pub fn upe1(&self) -> UPE1_R[src]
Bit 2 - Parity Error
pub fn dor1(&self) -> DOR1_R[src]
Bit 3 - Data overRun
pub fn fe1(&self) -> FE1_R[src]
Bit 4 - Framing Error
pub fn udre1(&self) -> UDRE1_R[src]
Bit 5 - USART Data Register Empty
pub fn txc1(&self) -> TXC1_R[src]
Bit 6 - USART Transmit Complete
pub fn rxc1(&self) -> RXC1_R[src]
Bit 7 - USART Receive Complete
impl R<u8, Reg<u8, _UCSR1B>>[src]
pub fn txb81(&self) -> TXB81_R[src]
Bit 0 - Transmit Data Bit 8
pub fn rxb81(&self) -> RXB81_R[src]
Bit 1 - Receive Data Bit 8
pub fn ucsz12(&self) -> UCSZ12_R[src]
Bit 2 - Character Size
pub fn txen1(&self) -> TXEN1_R[src]
Bit 3 - Transmitter Enable
pub fn rxen1(&self) -> RXEN1_R[src]
Bit 4 - Receiver Enable
pub fn udrie1(&self) -> UDRIE1_R[src]
Bit 5 - USART Data register Empty Interrupt Enable
pub fn txcie1(&self) -> TXCIE1_R[src]
Bit 6 - TX Complete Interrupt Enable
pub fn rxcie1(&self) -> RXCIE1_R[src]
Bit 7 - RX Complete Interrupt Enable
impl R<bool, UCPOL1_A>[src]
pub fn variant(&self) -> UCPOL1_A[src]
Get enumerated values variant
pub fn is_rising_edge(&self) -> bool[src]
Checks if the value of the field is RISING_EDGE
pub fn is_falling_edge(&self) -> bool[src]
Checks if the value of the field is FALLING_EDGE
impl R<u8, UCSZ1_A>[src]
pub fn variant(&self) -> UCSZ1_A[src]
Get enumerated values variant
pub fn is_chr5(&self) -> bool[src]
Checks if the value of the field is CHR5
pub fn is_chr6(&self) -> bool[src]
Checks if the value of the field is CHR6
pub fn is_chr7(&self) -> bool[src]
Checks if the value of the field is CHR7
pub fn is_chr8(&self) -> bool[src]
Checks if the value of the field is CHR8
impl R<bool, USBS1_A>[src]
pub fn variant(&self) -> USBS1_A[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool[src]
Checks if the value of the field is STOP2
impl R<u8, UPM1_A>[src]
pub fn variant(&self) -> Variant<u8, UPM1_A>[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_parity_even(&self) -> bool[src]
Checks if the value of the field is PARITY_EVEN
pub fn is_parity_odd(&self) -> bool[src]
Checks if the value of the field is PARITY_ODD
impl R<u8, UMSEL1_A>[src]
pub fn variant(&self) -> Variant<u8, UMSEL1_A>[src]
Get enumerated values variant
pub fn is_usart_async(&self) -> bool[src]
Checks if the value of the field is USART_ASYNC
pub fn is_usart_sync(&self) -> bool[src]
Checks if the value of the field is USART_SYNC
pub fn is_spi_master(&self) -> bool[src]
Checks if the value of the field is SPI_MASTER
impl R<u8, Reg<u8, _UCSR1C>>[src]
pub fn ucpol1(&self) -> UCPOL1_R[src]
Bit 0 - Clock Polarity
pub fn ucsz1(&self) -> UCSZ1_R[src]
Bits 1:2 - Character Size
pub fn usbs1(&self) -> USBS1_R[src]
Bit 3 - Stop Bit Select
pub fn upm1(&self) -> UPM1_R[src]
Bits 4:5 - Parity Mode Bits
pub fn umsel1(&self) -> UMSEL1_R[src]
Bits 6:7 - USART Mode Select
impl R<u8, Reg<u8, _UCSR2A>>[src]
pub fn mpcm2(&self) -> MPCM2_R[src]
Bit 0 - Multi-processor Communication Mode
pub fn u2x2(&self) -> U2X2_R[src]
Bit 1 - Double the USART transmission speed
pub fn upe2(&self) -> UPE2_R[src]
Bit 2 - Parity Error
pub fn dor2(&self) -> DOR2_R[src]
Bit 3 - Data overRun
pub fn fe2(&self) -> FE2_R[src]
Bit 4 - Framing Error
pub fn udre2(&self) -> UDRE2_R[src]
Bit 5 - USART Data Register Empty
pub fn txc2(&self) -> TXC2_R[src]
Bit 6 - USART Transmit Complete
pub fn rxc2(&self) -> RXC2_R[src]
Bit 7 - USART Receive Complete
impl R<u8, Reg<u8, _UCSR2B>>[src]
pub fn txb82(&self) -> TXB82_R[src]
Bit 0 - Transmit Data Bit 8
pub fn rxb82(&self) -> RXB82_R[src]
Bit 1 - Receive Data Bit 8
pub fn ucsz22(&self) -> UCSZ22_R[src]
Bit 2 - Character Size
pub fn txen2(&self) -> TXEN2_R[src]
Bit 3 - Transmitter Enable
pub fn rxen2(&self) -> RXEN2_R[src]
Bit 4 - Receiver Enable
pub fn udrie2(&self) -> UDRIE2_R[src]
Bit 5 - USART Data register Empty Interrupt Enable
pub fn txcie2(&self) -> TXCIE2_R[src]
Bit 6 - TX Complete Interrupt Enable
pub fn rxcie2(&self) -> RXCIE2_R[src]
Bit 7 - RX Complete Interrupt Enable
impl R<bool, UCPOL2_A>[src]
pub fn variant(&self) -> UCPOL2_A[src]
Get enumerated values variant
pub fn is_rising_edge(&self) -> bool[src]
Checks if the value of the field is RISING_EDGE
pub fn is_falling_edge(&self) -> bool[src]
Checks if the value of the field is FALLING_EDGE
impl R<u8, UCSZ2_A>[src]
pub fn variant(&self) -> UCSZ2_A[src]
Get enumerated values variant
pub fn is_chr5(&self) -> bool[src]
Checks if the value of the field is CHR5
pub fn is_chr6(&self) -> bool[src]
Checks if the value of the field is CHR6
pub fn is_chr7(&self) -> bool[src]
Checks if the value of the field is CHR7
pub fn is_chr8(&self) -> bool[src]
Checks if the value of the field is CHR8
impl R<bool, USBS2_A>[src]
pub fn variant(&self) -> USBS2_A[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool[src]
Checks if the value of the field is STOP2
impl R<u8, UPM2_A>[src]
pub fn variant(&self) -> Variant<u8, UPM2_A>[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_parity_even(&self) -> bool[src]
Checks if the value of the field is PARITY_EVEN
pub fn is_parity_odd(&self) -> bool[src]
Checks if the value of the field is PARITY_ODD
impl R<u8, UMSEL2_A>[src]
pub fn variant(&self) -> Variant<u8, UMSEL2_A>[src]
Get enumerated values variant
pub fn is_usart_async(&self) -> bool[src]
Checks if the value of the field is USART_ASYNC
pub fn is_usart_sync(&self) -> bool[src]
Checks if the value of the field is USART_SYNC
pub fn is_spi_master(&self) -> bool[src]
Checks if the value of the field is SPI_MASTER
impl R<u8, Reg<u8, _UCSR2C>>[src]
pub fn ucpol2(&self) -> UCPOL2_R[src]
Bit 0 - Clock Polarity
pub fn ucsz2(&self) -> UCSZ2_R[src]
Bits 1:2 - Character Size
pub fn usbs2(&self) -> USBS2_R[src]
Bit 3 - Stop Bit Select
pub fn upm2(&self) -> UPM2_R[src]
Bits 4:5 - Parity Mode Bits
pub fn umsel2(&self) -> UMSEL2_R[src]
Bits 6:7 - USART Mode Select
impl R<u8, Reg<u8, _UCSR3A>>[src]
pub fn mpcm3(&self) -> MPCM3_R[src]
Bit 0 - Multi-processor Communication Mode
pub fn u2x3(&self) -> U2X3_R[src]
Bit 1 - Double the USART transmission speed
pub fn upe3(&self) -> UPE3_R[src]
Bit 2 - Parity Error
pub fn dor3(&self) -> DOR3_R[src]
Bit 3 - Data overRun
pub fn fe3(&self) -> FE3_R[src]
Bit 4 - Framing Error
pub fn udre3(&self) -> UDRE3_R[src]
Bit 5 - USART Data Register Empty
pub fn txc3(&self) -> TXC3_R[src]
Bit 6 - USART Transmit Complete
pub fn rxc3(&self) -> RXC3_R[src]
Bit 7 - USART Receive Complete
impl R<u8, Reg<u8, _UCSR3B>>[src]
pub fn txb83(&self) -> TXB83_R[src]
Bit 0 - Transmit Data Bit 8
pub fn rxb83(&self) -> RXB83_R[src]
Bit 1 - Receive Data Bit 8
pub fn ucsz32(&self) -> UCSZ32_R[src]
Bit 2 - Character Size
pub fn txen3(&self) -> TXEN3_R[src]
Bit 3 - Transmitter Enable
pub fn rxen3(&self) -> RXEN3_R[src]
Bit 4 - Receiver Enable
pub fn udrie3(&self) -> UDRIE3_R[src]
Bit 5 - USART Data register Empty Interrupt Enable
pub fn txcie3(&self) -> TXCIE3_R[src]
Bit 6 - TX Complete Interrupt Enable
pub fn rxcie3(&self) -> RXCIE3_R[src]
Bit 7 - RX Complete Interrupt Enable
impl R<bool, UCPOL3_A>[src]
pub fn variant(&self) -> UCPOL3_A[src]
Get enumerated values variant
pub fn is_rising_edge(&self) -> bool[src]
Checks if the value of the field is RISING_EDGE
pub fn is_falling_edge(&self) -> bool[src]
Checks if the value of the field is FALLING_EDGE
impl R<u8, UCSZ3_A>[src]
pub fn variant(&self) -> UCSZ3_A[src]
Get enumerated values variant
pub fn is_chr5(&self) -> bool[src]
Checks if the value of the field is CHR5
pub fn is_chr6(&self) -> bool[src]
Checks if the value of the field is CHR6
pub fn is_chr7(&self) -> bool[src]
Checks if the value of the field is CHR7
pub fn is_chr8(&self) -> bool[src]
Checks if the value of the field is CHR8
impl R<bool, USBS3_A>[src]
pub fn variant(&self) -> USBS3_A[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool[src]
Checks if the value of the field is STOP2
impl R<u8, UPM3_A>[src]
pub fn variant(&self) -> Variant<u8, UPM3_A>[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_parity_even(&self) -> bool[src]
Checks if the value of the field is PARITY_EVEN
pub fn is_parity_odd(&self) -> bool[src]
Checks if the value of the field is PARITY_ODD
impl R<u8, UMSEL3_A>[src]
pub fn variant(&self) -> Variant<u8, UMSEL3_A>[src]
Get enumerated values variant
pub fn is_usart_async(&self) -> bool[src]
Checks if the value of the field is USART_ASYNC
pub fn is_usart_sync(&self) -> bool[src]
Checks if the value of the field is USART_SYNC
pub fn is_spi_master(&self) -> bool[src]
Checks if the value of the field is SPI_MASTER
impl R<u8, Reg<u8, _UCSR3C>>[src]
pub fn ucpol3(&self) -> UCPOL3_R[src]
Bit 0 - Clock Polarity
pub fn ucsz3(&self) -> UCSZ3_R[src]
Bits 1:2 - Character Size
pub fn usbs3(&self) -> USBS3_R[src]
Bit 3 - Stop Bit Select
pub fn upm3(&self) -> UPM3_R[src]
Bits 4:5 - Parity Mode Bits
pub fn umsel3(&self) -> UMSEL3_R[src]
Bits 6:7 - USART Mode Select
impl R<u8, WDPL_A>[src]
pub fn variant(&self) -> WDPL_A[src]
Get enumerated values variant
pub fn is_cycles_2k_512k(&self) -> bool[src]
Checks if the value of the field is CYCLES_2K_512K
pub fn is_cycles_4k_1024k(&self) -> bool[src]
Checks if the value of the field is CYCLES_4K_1024K
pub fn is_cycles_8k(&self) -> bool[src]
Checks if the value of the field is CYCLES_8K
pub fn is_cycles_16k(&self) -> bool[src]
Checks if the value of the field is CYCLES_16K
pub fn is_cycles_32k(&self) -> bool[src]
Checks if the value of the field is CYCLES_32K
pub fn is_cycles_64k(&self) -> bool[src]
Checks if the value of the field is CYCLES_64K
pub fn is_cycles_128k(&self) -> bool[src]
Checks if the value of the field is CYCLES_128K
pub fn is_cycles_256k(&self) -> bool[src]
Checks if the value of the field is CYCLES_256K
impl R<u8, Reg<u8, _WDTCSR>>[src]
pub fn wde(&self) -> WDE_R[src]
Bit 3 - Watch Dog Enable
pub fn wdce(&self) -> WDCE_R[src]
Bit 4 - Watchdog Change Enable
pub fn wdie(&self) -> WDIE_R[src]
Bit 6 - Watchdog Timeout Interrupt Enable
pub fn wdif(&self) -> WDIF_R[src]
Bit 7 - Watchdog Timeout Interrupt Flag
pub fn wdpl(&self) -> WDPL_R[src]
Bits 0:2 - Watchdog Timer Prescaler - Low Bits
pub fn wdph(&self) -> WDPH_R[src]
Bit 5 - Watchdog Timer Prescaler - High Bit
impl R<u8, ACIS_A>[src]
pub fn variant(&self) -> Variant<u8, ACIS_A>[src]
Get enumerated values variant
pub fn is_on_toggle(&self) -> bool[src]
Checks if the value of the field is ON_TOGGLE
pub fn is_on_falling_edge(&self) -> bool[src]
Checks if the value of the field is ON_FALLING_EDGE
pub fn is_on_rising_edge(&self) -> bool[src]
Checks if the value of the field is ON_RISING_EDGE
impl R<u8, Reg<u8, _ACSR>>[src]
pub fn acis(&self) -> ACIS_R[src]
Bits 0:1 - Analog Comparator Interrupt Mode Select
pub fn acic(&self) -> ACIC_R[src]
Bit 2 - Analog Comparator Input Capture Enable
pub fn acie(&self) -> ACIE_R[src]
Bit 3 - Analog Comparator Interrupt Enable
pub fn aci(&self) -> ACI_R[src]
Bit 4 - Analog Comparator Interrupt Flag
pub fn aco(&self) -> ACO_R[src]
Bit 5 - Analog Compare Output
pub fn acbg(&self) -> ACBG_R[src]
Bit 6 - Analog Comparator Bandgap Select
pub fn acd(&self) -> ACD_R[src]
Bit 7 - Analog Comparator Disable
impl R<u8, Reg<u8, _DIDR1>>[src]
pub fn ain0d(&self) -> AIN0D_R[src]
Bit 0 - AIN0 Digital Input Disable
pub fn ain1d(&self) -> AIN1D_R[src]
Bit 1 - AIN1 Digital Input Disable
impl R<u8, ADPS_A>[src]
pub fn variant(&self) -> Variant<u8, ADPS_A>[src]
Get enumerated values variant
pub fn is_prescaler_2(&self) -> bool[src]
Checks if the value of the field is PRESCALER_2
pub fn is_prescaler_4(&self) -> bool[src]
Checks if the value of the field is PRESCALER_4
pub fn is_prescaler_8(&self) -> bool[src]
Checks if the value of the field is PRESCALER_8
pub fn is_prescaler_16(&self) -> bool[src]
Checks if the value of the field is PRESCALER_16
pub fn is_prescaler_32(&self) -> bool[src]
Checks if the value of the field is PRESCALER_32
pub fn is_prescaler_64(&self) -> bool[src]
Checks if the value of the field is PRESCALER_64
pub fn is_prescaler_128(&self) -> bool[src]
Checks if the value of the field is PRESCALER_128
impl R<u8, Reg<u8, _ADCSRA>>[src]
pub fn adps(&self) -> ADPS_R[src]
Bits 0:2 - ADC Prescaler Select Bits
pub fn adie(&self) -> ADIE_R[src]
Bit 3 - ADC Interrupt Enable
pub fn adif(&self) -> ADIF_R[src]
Bit 4 - ADC Interrupt Flag
pub fn adate(&self) -> ADATE_R[src]
Bit 5 - ADC Auto Trigger Enable
pub fn adsc(&self) -> ADSC_R[src]
Bit 6 - ADC Start Conversion
pub fn aden(&self) -> ADEN_R[src]
Bit 7 - ADC Enable
impl R<u8, ADTS_A>[src]
pub fn variant(&self) -> ADTS_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _ADCSRB>>[src]
pub fn adts(&self) -> ADTS_R[src]
Bits 0:2 - ADC Auto Trigger Source bits
pub fn acme(&self) -> ACME_R[src]
Bit 6 -
impl R<u8, MUX_A>[src]
pub fn variant(&self) -> Variant<u8, MUX_A>[src]
Get enumerated values variant
pub fn is_adc0(&self) -> bool[src]
Checks if the value of the field is ADC0
pub fn is_adc1(&self) -> bool[src]
Checks if the value of the field is ADC1
pub fn is_adc2(&self) -> bool[src]
Checks if the value of the field is ADC2
pub fn is_adc3(&self) -> bool[src]
Checks if the value of the field is ADC3
pub fn is_adc4(&self) -> bool[src]
Checks if the value of the field is ADC4
pub fn is_adc5(&self) -> bool[src]
Checks if the value of the field is ADC5
pub fn is_adc6(&self) -> bool[src]
Checks if the value of the field is ADC6
pub fn is_adc7(&self) -> bool[src]
Checks if the value of the field is ADC7
pub fn is_tempsens(&self) -> bool[src]
Checks if the value of the field is TEMPSENS
pub fn is_adc_vbg(&self) -> bool[src]
Checks if the value of the field is ADC_VBG
pub fn is_adc_gnd(&self) -> bool[src]
Checks if the value of the field is ADC_GND
impl R<u8, REFS_A>[src]
pub fn variant(&self) -> Variant<u8, REFS_A>[src]
Get enumerated values variant
pub fn is_aref(&self) -> bool[src]
Checks if the value of the field is AREF
pub fn is_avcc(&self) -> bool[src]
Checks if the value of the field is AVCC
pub fn is_internal(&self) -> bool[src]
Checks if the value of the field is INTERNAL
impl R<u8, Reg<u8, _ADMUX>>[src]
pub fn mux(&self) -> MUX_R[src]
Bits 0:3 - Analog Channel Selection Bits
pub fn adlar(&self) -> ADLAR_R[src]
Bit 5 - Left Adjust Result
pub fn refs(&self) -> REFS_R[src]
Bits 6:7 - Reference Selection Bits
impl R<u8, Reg<u8, _DIDR0>>[src]
pub fn adc0d(&self) -> ADC0D_R[src]
Bit 0 -
pub fn adc1d(&self) -> ADC1D_R[src]
Bit 1 -
pub fn adc2d(&self) -> ADC2D_R[src]
Bit 2 -
pub fn adc3d(&self) -> ADC3D_R[src]
Bit 3 -
pub fn adc4d(&self) -> ADC4D_R[src]
Bit 4 -
pub fn adc5d(&self) -> ADC5D_R[src]
Bit 5 -
impl R<u8, CLKPS_A>[src]
pub fn variant(&self) -> Variant<u8, CLKPS_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
pub fn is_val_0x08(&self) -> bool[src]
Checks if the value of the field is VAL_0X08
impl R<u8, Reg<u8, _CLKPR>>[src]
pub fn clkps(&self) -> CLKPS_R[src]
Bits 0:3 - Clock Prescaler Select Bits
pub fn clkpce(&self) -> CLKPCE_R[src]
Bit 7 - Clock Prescaler Change Enable
impl R<u8, Reg<u8, _MCUCR>>[src]
pub fn ivce(&self) -> IVCE_R[src]
Bit 0 -
pub fn ivsel(&self) -> IVSEL_R[src]
Bit 1 -
pub fn pud(&self) -> PUD_R[src]
Bit 4 -
pub fn bodse(&self) -> BODSE_R[src]
Bit 5 - BOD Sleep Enable
pub fn bods(&self) -> BODS_R[src]
Bit 6 - BOD Sleep
impl R<u8, Reg<u8, _MCUSR>>[src]
pub fn porf(&self) -> PORF_R[src]
Bit 0 - Power-on reset flag
pub fn extrf(&self) -> EXTRF_R[src]
Bit 1 - External Reset Flag
pub fn borf(&self) -> BORF_R[src]
Bit 2 - Brown-out Reset Flag
pub fn wdrf(&self) -> WDRF_R[src]
Bit 3 - Watchdog Reset Flag
impl R<u8, Reg<u8, _OSCCAL>>[src]
impl R<u8, Reg<u8, _PRR>>[src]
pub fn pradc(&self) -> PRADC_R[src]
Bit 0 - Power Reduction ADC
pub fn prusart0(&self) -> PRUSART0_R[src]
Bit 1 - Power Reduction USART
pub fn prspi(&self) -> PRSPI_R[src]
Bit 2 - Power Reduction Serial Peripheral Interface
pub fn prtim1(&self) -> PRTIM1_R[src]
Bit 3 - Power Reduction Timer/Counter1
pub fn prtim0(&self) -> PRTIM0_R[src]
Bit 5 - Power Reduction Timer/Counter0
pub fn prtim2(&self) -> PRTIM2_R[src]
Bit 6 - Power Reduction Timer/Counter2
pub fn prtwi(&self) -> PRTWI_R[src]
Bit 7 - Power Reduction TWI
impl R<u8, SM_A>[src]
pub fn variant(&self) -> SM_A[src]
Get enumerated values variant
pub fn is_idle(&self) -> bool[src]
Checks if the value of the field is IDLE
pub fn is_adc(&self) -> bool[src]
Checks if the value of the field is ADC
pub fn is_pdown(&self) -> bool[src]
Checks if the value of the field is PDOWN
pub fn is_psave(&self) -> bool[src]
Checks if the value of the field is PSAVE
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_stdby(&self) -> bool[src]
Checks if the value of the field is STDBY
pub fn is_estdby(&self) -> bool[src]
Checks if the value of the field is ESTDBY
impl R<u8, Reg<u8, _SMCR>>[src]
pub fn se(&self) -> SE_R[src]
Bit 0 - Sleep Enable
pub fn sm(&self) -> SM_R[src]
Bits 1:3 - Sleep Mode Select Bits
impl R<u8, Reg<u8, _SPMCSR>>[src]
pub fn spmen(&self) -> SPMEN_R[src]
Bit 0 - Store Program Memory
pub fn pgers(&self) -> PGERS_R[src]
Bit 1 - Page Erase
pub fn pgwrt(&self) -> PGWRT_R[src]
Bit 2 - Page Write
pub fn blbset(&self) -> BLBSET_R[src]
Bit 3 - Boot Lock Bit Set
pub fn rwwsre(&self) -> RWWSRE_R[src]
Bit 4 - Read-While-Write section read enable
pub fn sigrd(&self) -> SIGRD_R[src]
Bit 5 - Signature Row Read
pub fn rwwsb(&self) -> RWWSB_R[src]
Bit 6 - Read-While-Write Section Busy
pub fn spmie(&self) -> SPMIE_R[src]
Bit 7 - SPM Interrupt Enable
impl R<u8, EEPM_A>[src]
pub fn variant(&self) -> Variant<u8, EEPM_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
impl R<u8, Reg<u8, _EECR>>[src]
pub fn eere(&self) -> EERE_R[src]
Bit 0 - EEPROM Read Enable
pub fn eepe(&self) -> EEPE_R[src]
Bit 1 - EEPROM Write Enable
pub fn eempe(&self) -> EEMPE_R[src]
Bit 2 - EEPROM Master Write Enable
pub fn eerie(&self) -> EERIE_R[src]
Bit 3 - EEPROM Ready Interrupt Enable
pub fn eepm(&self) -> EEPM_R[src]
Bits 4:5 - EEPROM Programming Mode Bits
impl R<u8, ISC0_A>[src]
pub fn variant(&self) -> ISC0_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC1_A>[src]
pub fn variant(&self) -> ISC1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _EICRA>>[src]
pub fn isc0(&self) -> ISC0_R[src]
Bits 0:1 - External Interrupt Sense Control 0 Bits
pub fn isc1(&self) -> ISC1_R[src]
Bits 2:3 - External Interrupt Sense Control 1 Bits
impl R<u8, Reg<u8, _EIFR>>[src]
impl R<u8, Reg<u8, _EIMSK>>[src]
impl R<u8, Reg<u8, _PCICR>>[src]
impl R<u8, Reg<u8, _PCIFR>>[src]
impl R<u8, Reg<u8, _PCMSK0>>[src]
impl R<u8, Reg<u8, _PCMSK1>>[src]
impl R<u8, Reg<u8, _PCMSK2>>[src]
impl R<u8, BODLEVEL_A>[src]
pub fn variant(&self) -> Variant<u8, BODLEVEL_A>[src]
Get enumerated values variant
pub fn is_4v3(&self) -> bool[src]
Checks if the value of the field is _4V3
pub fn is_2v7(&self) -> bool[src]
Checks if the value of the field is _2V7
pub fn is_1v8(&self) -> bool[src]
Checks if the value of the field is _1V8
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<u8, Reg<u8, _EXTENDED>>[src]
pub fn bodlevel(&self) -> BODLEVEL_R[src]
Bits 0:2 - Brown-out Detector trigger level
impl R<u8, BOOTSZ_A>[src]
pub fn variant(&self) -> BOOTSZ_A[src]
Get enumerated values variant
pub fn is_2048w_3800(&self) -> bool[src]
Checks if the value of the field is _2048W_3800
pub fn is_1024w_3c00(&self) -> bool[src]
Checks if the value of the field is _1024W_3C00
pub fn is_512w_3e00(&self) -> bool[src]
Checks if the value of the field is _512W_3E00
pub fn is_256w_3f00(&self) -> bool[src]
Checks if the value of the field is _256W_3F00
impl R<u8, Reg<u8, _HIGH>>[src]
pub fn bootrst(&self) -> BOOTRST_R[src]
Bit 0 - Boot Reset vector Enabled
pub fn bootsz(&self) -> BOOTSZ_R[src]
Bits 1:2 - Select boot size
pub fn eesave(&self) -> EESAVE_R[src]
Bit 3 - Preserve EEPROM through the Chip Erase cycle
pub fn wdton(&self) -> WDTON_R[src]
Bit 4 - Watch-dog Timer always on
pub fn spien(&self) -> SPIEN_R[src]
Bit 5 - Serial program downloading (SPI) enabled
pub fn dwen(&self) -> DWEN_R[src]
Bit 6 - Debug Wire enable
pub fn rstdisbl(&self) -> RSTDISBL_R[src]
Bit 7 - Reset Disabled (Enable PC6 as i/o pin)
impl R<u8, SUT_CKSEL_A>[src]
pub fn variant(&self) -> Variant<u8, SUT_CKSEL_A>[src]
Get enumerated values variant
pub fn is_extclk_6ck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_14CK_0MS
pub fn is_intrcosc_8mhz_6ck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_14CK_0MS
pub fn is_intrcosc_128khz_6ck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_128KHZ_6CK_14CK_0MS
pub fn is_extlofxtal_1kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_14CK_0MS
pub fn is_extlofxtal_32kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_14CK_0MS
pub fn is_extfsxtal_258ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTFSXTAL_258CK_14CK_4MS1
pub fn is_extfsxtal_1kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTFSXTAL_1KCK_14CK_65MS
pub fn is_extxosc_0mhz4_0mhz9_258ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1
pub fn is_extxosc_0mhz4_0mhz9_1kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS
pub fn is_extxosc_0mhz9_3mhz_258ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1
pub fn is_extxosc_0mhz9_3mhz_1kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS
pub fn is_extxosc_3mhz_8mhz_258ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1
pub fn is_extxosc_3mhz_8mhz_1kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS
pub fn is_extxosc_8mhz_xx_258ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_258CK_14CK_4MS1
pub fn is_extxosc_8mhz_xx_1kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_14CK_65MS
pub fn is_extclk_6ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_14CK_4MS1
pub fn is_intrcosc_8mhz_6ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_14CK_4MS1
pub fn is_intrcosc_128khz_6ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_128KHZ_6CK_14CK_4MS1
pub fn is_extlofxtal_1kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_14CK_4MS1
pub fn is_extlofxtal_32kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_14CK_4MS1
pub fn is_extfsxtal_258ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTFSXTAL_258CK_14CK_65MS
pub fn is_extfsxtal_16kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTFSXTAL_16KCK_14CK_0MS
pub fn is_extxosc_0mhz4_0mhz9_258ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS
pub fn is_extxosc_0mhz4_0mhz9_16kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS
pub fn is_extxosc_0mhz9_3mhz_258ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS
pub fn is_extxosc_0mhz9_3mhz_16kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS
pub fn is_extxosc_3mhz_8mhz_258ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS
pub fn is_extxosc_3mhz_8mhz_16kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS
pub fn is_extxosc_8mhz_xx_258ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_258CK_14CK_65MS
pub fn is_extxosc_8mhz_xx_16kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_14CK_0MS
pub fn is_extclk_6ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_14CK_65MS
pub fn is_intrcosc_8mhz_6ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_14CK_65MS
pub fn is_intrcosc_128khz_6ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_128KHZ_6CK_14CK_65MS
pub fn is_extlofxtal_1kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_14CK_65MS
pub fn is_extlofxtal_32kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_14CK_65MS
pub fn is_extfsxtal_1kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTFSXTAL_1KCK_14CK_0MS
pub fn is_extfsxtal_16kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTFSXTAL_16KCK_14CK_4MS1
pub fn is_extxosc_0mhz4_0mhz9_1kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS
pub fn is_extxosc_0mhz4_0mhz9_16kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1
pub fn is_extxosc_0mhz9_3mhz_1kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS
pub fn is_extxosc_0mhz9_3mhz_16kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1
pub fn is_extxosc_3mhz_8mhz_1kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS
pub fn is_extxosc_3mhz_8mhz_16kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1
pub fn is_extxosc_8mhz_xx_1kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_14CK_0MS
pub fn is_extxosc_8mhz_xx_16kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1
pub fn is_extfsxtal_1kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTFSXTAL_1KCK_14CK_4MS1
pub fn is_extfsxtal_16kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTFSXTAL_16KCK_14CK_65MS
pub fn is_extxosc_0mhz4_0mhz9_1kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1
pub fn is_extxosc_0mhz4_0mhz9_16kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS
pub fn is_extxosc_0mhz9_3mhz_1kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1
pub fn is_extxosc_0mhz9_3mhz_16kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS
pub fn is_extxosc_3mhz_8mhz_1kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1
pub fn is_extxosc_3mhz_8mhz_16kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS
pub fn is_extxosc_8mhz_xx_1kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1
pub fn is_extxosc_8mhz_xx_16kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_14CK_65MS
impl R<u8, Reg<u8, _LOW>>[src]
pub fn sut_cksel(&self) -> SUT_CKSEL_R[src]
Bits 0:5 - Select Clock Source
pub fn ckout(&self) -> CKOUT_R[src]
Bit 6 - Clock output on PORTB0
pub fn ckdiv8(&self) -> CKDIV8_R[src]
Bit 7 - Divide clock by 8 internally
impl R<u8, LB_A>[src]
pub fn variant(&self) -> Variant<u8, LB_A>[src]
Get enumerated values variant
pub fn is_prog_ver_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_VER_DISABLED
pub fn is_prog_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_DISABLED
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, BLB0_A>[src]
pub fn variant(&self) -> BLB0_A[src]
Get enumerated values variant
pub fn is_lpm_spm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_SPM_DISABLE
pub fn is_lpm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_DISABLE
pub fn is_spm_disable(&self) -> bool[src]
Checks if the value of the field is SPM_DISABLE
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, BLB1_A>[src]
pub fn variant(&self) -> BLB1_A[src]
Get enumerated values variant
pub fn is_lpm_spm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_SPM_DISABLE
pub fn is_lpm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_DISABLE
pub fn is_spm_disable(&self) -> bool[src]
Checks if the value of the field is SPM_DISABLE
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, Reg<u8, _LOCKBIT>>[src]
pub fn lb(&self) -> LB_R[src]
Bits 0:1 - Memory Lock
pub fn blb0(&self) -> BLB0_R[src]
Bits 2:3 - Boot Loader Protection Mode
pub fn blb1(&self) -> BLB1_R[src]
Bits 4:5 - Boot Loader Protection Mode
impl R<u8, Reg<u8, _DDRB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _PINB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _PORTB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _DDRC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
impl R<u8, Reg<u8, _PINC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
impl R<u8, Reg<u8, _PORTC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
impl R<u8, Reg<u8, _DDRD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _PIND>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _PORTD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, SPR_A>[src]
pub fn variant(&self) -> Variant<u8, SPR_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _SPCR>>[src]
pub fn spr(&self) -> SPR_R[src]
Bits 0:1 - SPI Clock Rate Selects
pub fn cpha(&self) -> CPHA_R[src]
Bit 2 - Clock Phase
pub fn cpol(&self) -> CPOL_R[src]
Bit 3 - Clock polarity
pub fn mstr(&self) -> MSTR_R[src]
Bit 4 - Master/Slave Select
pub fn dord(&self) -> DORD_R[src]
Bit 5 - Data Order
pub fn spe(&self) -> SPE_R[src]
Bit 6 - SPI Enable
pub fn spie(&self) -> SPIE_R[src]
Bit 7 - SPI Interrupt Enable
impl R<u8, Reg<u8, _SPSR>>[src]
pub fn spi2x(&self) -> SPI2X_R[src]
Bit 0 - Double SPI Speed Bit
pub fn wcol(&self) -> WCOL_R[src]
Bit 6 - Write Collision Flag
pub fn spif(&self) -> SPIF_R[src]
Bit 7 - SPI Interrupt Flag
impl R<u8, Reg<u8, _GTCCR>>[src]
pub fn psrsync(&self) -> PSRSYNC_R[src]
Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0
pub fn tsm(&self) -> TSM_R[src]
Bit 7 - Timer/Counter Synchronization Mode
impl R<u8, WGM0_A>[src]
pub fn variant(&self) -> WGM0_A[src]
Get enumerated values variant
pub fn is_normal_top(&self) -> bool[src]
Checks if the value of the field is NORMAL_TOP
pub fn is_pwm_phase(&self) -> bool[src]
Checks if the value of the field is PWM_PHASE
pub fn is_ctc(&self) -> bool[src]
Checks if the value of the field is CTC
pub fn is_pwm_fast(&self) -> bool[src]
Checks if the value of the field is PWM_FAST
impl R<u8, COM0B_A>[src]
pub fn variant(&self) -> COM0B_A[src]
Get enumerated values variant
pub fn is_disconnected(&self) -> bool[src]
Checks if the value of the field is DISCONNECTED
pub fn is_match_toggle(&self) -> bool[src]
Checks if the value of the field is MATCH_TOGGLE
pub fn is_match_clear(&self) -> bool[src]
Checks if the value of the field is MATCH_CLEAR
pub fn is_match_set(&self) -> bool[src]
Checks if the value of the field is MATCH_SET
impl R<u8, COM0A_A>[src]
pub fn variant(&self) -> COM0A_A[src]
Get enumerated values variant
pub fn is_disconnected(&self) -> bool[src]
Checks if the value of the field is DISCONNECTED
pub fn is_match_toggle(&self) -> bool[src]
Checks if the value of the field is MATCH_TOGGLE
pub fn is_match_clear(&self) -> bool[src]
Checks if the value of the field is MATCH_CLEAR
pub fn is_match_set(&self) -> bool[src]
Checks if the value of the field is MATCH_SET
impl R<u8, Reg<u8, _TCCR0A>>[src]
pub fn wgm0(&self) -> WGM0_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn com0b(&self) -> COM0B_R[src]
Bits 4:5 - Compare Output B Mode
pub fn com0a(&self) -> COM0A_R[src]
Bits 6:7 - Compare Output A Mode
impl R<u8, CS0_A>[src]
pub fn variant(&self) -> CS0_A[src]
Get enumerated values variant
pub fn is_no_clock(&self) -> bool[src]
Checks if the value of the field is NO_CLOCK
pub fn is_direct(&self) -> bool[src]
Checks if the value of the field is DIRECT
pub fn is_prescale_8(&self) -> bool[src]
Checks if the value of the field is PRESCALE_8
pub fn is_prescale_64(&self) -> bool[src]
Checks if the value of the field is PRESCALE_64
pub fn is_prescale_256(&self) -> bool[src]
Checks if the value of the field is PRESCALE_256
pub fn is_prescale_1024(&self) -> bool[src]
Checks if the value of the field is PRESCALE_1024
pub fn is_ext_falling(&self) -> bool[src]
Checks if the value of the field is EXT_FALLING
pub fn is_ext_rising(&self) -> bool[src]
Checks if the value of the field is EXT_RISING
impl R<u8, Reg<u8, _TCCR0B>>[src]
pub fn cs0(&self) -> CS0_R[src]
Bits 0:2 - Clock Select
pub fn wgm02(&self) -> WGM02_R[src]
Bit 3 - Waveform Generation Mode High Bit (Enable Top: OCRA for PWM modes)
impl R<u8, Reg<u8, _TIFR0>>[src]
pub fn tov0(&self) -> TOV0_R[src]
Bit 0 - Timer/Counter0 Overflow Flag
pub fn ocf0a(&self) -> OCF0A_R[src]
Bit 1 - Timer/Counter0 Output Compare Flag 0A
pub fn ocf0b(&self) -> OCF0B_R[src]
Bit 2 - Timer/Counter0 Output Compare Flag 0B
impl R<u8, Reg<u8, _TIMSK0>>[src]
pub fn toie0(&self) -> TOIE0_R[src]
Bit 0 - Timer/Counter0 Overflow Interrupt Enable
pub fn ocie0a(&self) -> OCIE0A_R[src]
Bit 1 - Timer/Counter0 Output Compare Match A Interrupt Enable
pub fn ocie0b(&self) -> OCIE0B_R[src]
Bit 2 - Timer/Counter0 Output Compare Match B Interrupt Enable
impl R<u8, Reg<u8, _GTCCR>>[src]
pub fn psrsync(&self) -> PSRSYNC_R[src]
Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0
pub fn tsm(&self) -> TSM_R[src]
Bit 7 - Timer/Counter Synchronization Mode
impl R<u8, Reg<u8, _TCCR1A>>[src]
pub fn wgm1(&self) -> WGM1_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn com1b(&self) -> COM1B_R[src]
Bits 4:5 - Compare Output Mode 1B, bits
pub fn com1a(&self) -> COM1A_R[src]
Bits 6:7 - Compare Output Mode 1A, bits
impl R<u8, CS1_A>[src]
pub fn variant(&self) -> CS1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR1B>>[src]
pub fn cs1(&self) -> CS1_R[src]
Bits 0:2 - Prescaler source of Timer/Counter 1
pub fn wgm1(&self) -> WGM1_R[src]
Bits 3:4 - Waveform Generation Mode
pub fn ices1(&self) -> ICES1_R[src]
Bit 6 - Input Capture 1 Edge Select
pub fn icnc1(&self) -> ICNC1_R[src]
Bit 7 - Input Capture 1 Noise Canceler
impl R<u8, Reg<u8, _TCCR1C>>[src]
impl R<u8, Reg<u8, _TIFR1>>[src]
pub fn tov1(&self) -> TOV1_R[src]
Bit 0 - Timer/Counter1 Overflow Flag
pub fn ocf1a(&self) -> OCF1A_R[src]
Bit 1 - Output Compare Flag 1A
pub fn ocf1b(&self) -> OCF1B_R[src]
Bit 2 - Output Compare Flag 1B
pub fn icf1(&self) -> ICF1_R[src]
Bit 5 - Input Capture Flag 1
impl R<u8, Reg<u8, _TIMSK1>>[src]
pub fn toie1(&self) -> TOIE1_R[src]
Bit 0 - Timer/Counter1 Overflow Interrupt Enable
pub fn ocie1a(&self) -> OCIE1A_R[src]
Bit 1 - Timer/Counter1 Output CompareA Match Interrupt Enable
pub fn ocie1b(&self) -> OCIE1B_R[src]
Bit 2 - Timer/Counter1 Output CompareB Match Interrupt Enable
pub fn icie1(&self) -> ICIE1_R[src]
Bit 5 - Timer/Counter1 Input Capture Interrupt Enable
impl R<u8, Reg<u8, _ASSR>>[src]
pub fn tcr2bub(&self) -> TCR2BUB_R[src]
Bit 0 - Timer/Counter Control Register2 Update Busy
pub fn tcr2aub(&self) -> TCR2AUB_R[src]
Bit 1 - Timer/Counter Control Register2 Update Busy
pub fn ocr2bub(&self) -> OCR2BUB_R[src]
Bit 2 - Output Compare Register 2 Update Busy
pub fn ocr2aub(&self) -> OCR2AUB_R[src]
Bit 3 - Output Compare Register2 Update Busy
pub fn tcn2ub(&self) -> TCN2UB_R[src]
Bit 4 - Timer/Counter2 Update Busy
pub fn as2(&self) -> AS2_R[src]
Bit 5 - Asynchronous Timer/Counter2
pub fn exclk(&self) -> EXCLK_R[src]
Bit 6 - Enable External Clock Input
impl R<u8, Reg<u8, _GTCCR>>[src]
pub fn psrasy(&self) -> PSRASY_R[src]
Bit 1 - Prescaler Reset Timer/Counter2
pub fn tsm(&self) -> TSM_R[src]
Bit 7 - Timer/Counter Synchronization Mode
impl R<u8, Reg<u8, _TCCR2A>>[src]
pub fn wgm2(&self) -> WGM2_R[src]
Bits 0:1 - Waveform Genration Mode
pub fn com2b(&self) -> COM2B_R[src]
Bits 4:5 - Compare Output Mode bits
pub fn com2a(&self) -> COM2A_R[src]
Bits 6:7 - Compare Output Mode bits
impl R<u8, CS2_A>[src]
pub fn variant(&self) -> CS2_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR2B>>[src]
pub fn cs2(&self) -> CS2_R[src]
Bits 0:2 - Clock Select bits
pub fn wgm22(&self) -> WGM22_R[src]
Bit 3 - Waveform Generation Mode
pub fn foc2b(&self) -> FOC2B_R[src]
Bit 6 - Force Output Compare B
pub fn foc2a(&self) -> FOC2A_R[src]
Bit 7 - Force Output Compare A
impl R<u8, Reg<u8, _TIFR2>>[src]
pub fn tov2(&self) -> TOV2_R[src]
Bit 0 - Timer/Counter2 Overflow Flag
pub fn ocf2a(&self) -> OCF2A_R[src]
Bit 1 - Output Compare Flag 2A
pub fn ocf2b(&self) -> OCF2B_R[src]
Bit 2 - Output Compare Flag 2B
impl R<u8, Reg<u8, _TIMSK2>>[src]
pub fn toie2(&self) -> TOIE2_R[src]
Bit 0 - Timer/Counter2 Overflow Interrupt Enable
pub fn ocie2a(&self) -> OCIE2A_R[src]
Bit 1 - Timer/Counter2 Output Compare Match A Interrupt Enable
pub fn ocie2b(&self) -> OCIE2B_R[src]
Bit 2 - Timer/Counter2 Output Compare Match B Interrupt Enable
impl R<u8, Reg<u8, _TWAMR>>[src]
impl R<u8, Reg<u8, _TWAR>>[src]
pub fn twgce(&self) -> TWGCE_R[src]
Bit 0 - TWI General Call Recognition Enable Bit
pub fn twa(&self) -> TWA_R[src]
Bits 1:7 - TWI (Slave) Address register Bits
impl R<u8, Reg<u8, _TWCR>>[src]
pub fn twie(&self) -> TWIE_R[src]
Bit 0 - TWI Interrupt Enable
pub fn twen(&self) -> TWEN_R[src]
Bit 2 - TWI Enable Bit
pub fn twwc(&self) -> TWWC_R[src]
Bit 3 - TWI Write Collition Flag
pub fn twsto(&self) -> TWSTO_R[src]
Bit 4 - TWI Stop Condition Bit
pub fn twsta(&self) -> TWSTA_R[src]
Bit 5 - TWI Start Condition Bit
pub fn twea(&self) -> TWEA_R[src]
Bit 6 - TWI Enable Acknowledge Bit
pub fn twint(&self) -> TWINT_R[src]
Bit 7 - TWI Interrupt Flag
impl R<u8, TWPS_A>[src]
pub fn variant(&self) -> TWPS_A[src]
Get enumerated values variant
pub fn is_prescaler_1(&self) -> bool[src]
Checks if the value of the field is PRESCALER_1
pub fn is_prescaler_4(&self) -> bool[src]
Checks if the value of the field is PRESCALER_4
pub fn is_prescaler_16(&self) -> bool[src]
Checks if the value of the field is PRESCALER_16
pub fn is_prescaler_64(&self) -> bool[src]
Checks if the value of the field is PRESCALER_64
impl R<u8, Reg<u8, _TWSR>>[src]
pub fn twps(&self) -> TWPS_R[src]
Bits 0:1 - TWI Prescaler
pub fn tws(&self) -> TWS_R[src]
Bits 3:7 - TWI Status
impl R<u8, Reg<u8, _UCSR0A>>[src]
pub fn mpcm0(&self) -> MPCM0_R[src]
Bit 0 - Multi-processor Communication Mode
pub fn u2x0(&self) -> U2X0_R[src]
Bit 1 - Double the USART transmission speed
pub fn upe0(&self) -> UPE0_R[src]
Bit 2 - Parity Error
pub fn dor0(&self) -> DOR0_R[src]
Bit 3 - Data overRun
pub fn fe0(&self) -> FE0_R[src]
Bit 4 - Framing Error
pub fn udre0(&self) -> UDRE0_R[src]
Bit 5 - USART Data Register Empty
pub fn txc0(&self) -> TXC0_R[src]
Bit 6 - USART Transmit Complete
pub fn rxc0(&self) -> RXC0_R[src]
Bit 7 - USART Receive Complete
impl R<u8, Reg<u8, _UCSR0B>>[src]
pub fn txb80(&self) -> TXB80_R[src]
Bit 0 - Transmit Data Bit 8
pub fn rxb80(&self) -> RXB80_R[src]
Bit 1 - Receive Data Bit 8
pub fn ucsz02(&self) -> UCSZ02_R[src]
Bit 2 - Character Size
pub fn txen0(&self) -> TXEN0_R[src]
Bit 3 - Transmitter Enable
pub fn rxen0(&self) -> RXEN0_R[src]
Bit 4 - Receiver Enable
pub fn udrie0(&self) -> UDRIE0_R[src]
Bit 5 - USART Data register Empty Interrupt Enable
pub fn txcie0(&self) -> TXCIE0_R[src]
Bit 6 - TX Complete Interrupt Enable
pub fn rxcie0(&self) -> RXCIE0_R[src]
Bit 7 - RX Complete Interrupt Enable
impl R<bool, UCPOL0_A>[src]
pub fn variant(&self) -> UCPOL0_A[src]
Get enumerated values variant
pub fn is_rising_edge(&self) -> bool[src]
Checks if the value of the field is RISING_EDGE
pub fn is_falling_edge(&self) -> bool[src]
Checks if the value of the field is FALLING_EDGE
impl R<u8, UCSZ0_A>[src]
pub fn variant(&self) -> UCSZ0_A[src]
Get enumerated values variant
pub fn is_chr5(&self) -> bool[src]
Checks if the value of the field is CHR5
pub fn is_chr6(&self) -> bool[src]
Checks if the value of the field is CHR6
pub fn is_chr7(&self) -> bool[src]
Checks if the value of the field is CHR7
pub fn is_chr8(&self) -> bool[src]
Checks if the value of the field is CHR8
impl R<bool, USBS0_A>[src]
pub fn variant(&self) -> USBS0_A[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool[src]
Checks if the value of the field is STOP2
impl R<u8, UPM0_A>[src]
pub fn variant(&self) -> Variant<u8, UPM0_A>[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_parity_even(&self) -> bool[src]
Checks if the value of the field is PARITY_EVEN
pub fn is_parity_odd(&self) -> bool[src]
Checks if the value of the field is PARITY_ODD
impl R<u8, UMSEL0_A>[src]
pub fn variant(&self) -> Variant<u8, UMSEL0_A>[src]
Get enumerated values variant
pub fn is_usart_async(&self) -> bool[src]
Checks if the value of the field is USART_ASYNC
pub fn is_usart_sync(&self) -> bool[src]
Checks if the value of the field is USART_SYNC
pub fn is_spi_master(&self) -> bool[src]
Checks if the value of the field is SPI_MASTER
impl R<u8, Reg<u8, _UCSR0C>>[src]
pub fn ucpol0(&self) -> UCPOL0_R[src]
Bit 0 - Clock Polarity
pub fn ucsz0(&self) -> UCSZ0_R[src]
Bits 1:2 - Character Size
pub fn usbs0(&self) -> USBS0_R[src]
Bit 3 - Stop Bit Select
pub fn upm0(&self) -> UPM0_R[src]
Bits 4:5 - Parity Mode Bits
pub fn umsel0(&self) -> UMSEL0_R[src]
Bits 6:7 - USART Mode Select
impl R<u8, WDPL_A>[src]
pub fn variant(&self) -> WDPL_A[src]
Get enumerated values variant
pub fn is_cycles_2k_512k(&self) -> bool[src]
Checks if the value of the field is CYCLES_2K_512K
pub fn is_cycles_4k_1024k(&self) -> bool[src]
Checks if the value of the field is CYCLES_4K_1024K
pub fn is_cycles_8k(&self) -> bool[src]
Checks if the value of the field is CYCLES_8K
pub fn is_cycles_16k(&self) -> bool[src]
Checks if the value of the field is CYCLES_16K
pub fn is_cycles_32k(&self) -> bool[src]
Checks if the value of the field is CYCLES_32K
pub fn is_cycles_64k(&self) -> bool[src]
Checks if the value of the field is CYCLES_64K
pub fn is_cycles_128k(&self) -> bool[src]
Checks if the value of the field is CYCLES_128K
pub fn is_cycles_256k(&self) -> bool[src]
Checks if the value of the field is CYCLES_256K
impl R<u8, Reg<u8, _WDTCSR>>[src]
pub fn wde(&self) -> WDE_R[src]
Bit 3 - Watch Dog Enable
pub fn wdce(&self) -> WDCE_R[src]
Bit 4 - Watchdog Change Enable
pub fn wdie(&self) -> WDIE_R[src]
Bit 6 - Watchdog Timeout Interrupt Enable
pub fn wdif(&self) -> WDIF_R[src]
Bit 7 - Watchdog Timeout Interrupt Flag
pub fn wdpl(&self) -> WDPL_R[src]
Bits 0:2 - Watchdog Timer Prescaler - Low Bits
pub fn wdph(&self) -> WDPH_R[src]
Bit 5 - Watchdog Timer Prescaler - High Bit
impl R<u8, ACIS_A>[src]
pub fn variant(&self) -> Variant<u8, ACIS_A>[src]
Get enumerated values variant
pub fn is_on_toggle(&self) -> bool[src]
Checks if the value of the field is ON_TOGGLE
pub fn is_on_falling_edge(&self) -> bool[src]
Checks if the value of the field is ON_FALLING_EDGE
pub fn is_on_rising_edge(&self) -> bool[src]
Checks if the value of the field is ON_RISING_EDGE
impl R<u8, Reg<u8, _ACSR>>[src]
pub fn acis(&self) -> ACIS_R[src]
Bits 0:1 - Analog Comparator Interrupt Mode Select
pub fn acic(&self) -> ACIC_R[src]
Bit 2 - Analog Comparator Input Capture Enable
pub fn acie(&self) -> ACIE_R[src]
Bit 3 - Analog Comparator Interrupt Enable
pub fn aci(&self) -> ACI_R[src]
Bit 4 - Analog Comparator Interrupt Flag
pub fn aco(&self) -> ACO_R[src]
Bit 5 - Analog Compare Output
pub fn acbg(&self) -> ACBG_R[src]
Bit 6 - Analog Comparator Bandgap Select
pub fn acd(&self) -> ACD_R[src]
Bit 7 - Analog Comparator Disable
impl R<u8, Reg<u8, _ADCSRB>>[src]
impl R<u8, Reg<u8, _DIDR1>>[src]
pub fn ain0d(&self) -> AIN0D_R[src]
Bit 0 - AIN0 Digital Input Disable
pub fn ain1d(&self) -> AIN1D_R[src]
Bit 1 - AIN1 Digital Input Disable
impl R<u8, ADPS_A>[src]
pub fn variant(&self) -> Variant<u8, ADPS_A>[src]
Get enumerated values variant
pub fn is_prescaler_2(&self) -> bool[src]
Checks if the value of the field is PRESCALER_2
pub fn is_prescaler_4(&self) -> bool[src]
Checks if the value of the field is PRESCALER_4
pub fn is_prescaler_8(&self) -> bool[src]
Checks if the value of the field is PRESCALER_8
pub fn is_prescaler_16(&self) -> bool[src]
Checks if the value of the field is PRESCALER_16
pub fn is_prescaler_32(&self) -> bool[src]
Checks if the value of the field is PRESCALER_32
pub fn is_prescaler_64(&self) -> bool[src]
Checks if the value of the field is PRESCALER_64
pub fn is_prescaler_128(&self) -> bool[src]
Checks if the value of the field is PRESCALER_128
impl R<u8, Reg<u8, _ADCSRA>>[src]
pub fn adps(&self) -> ADPS_R[src]
Bits 0:2 - ADC Prescaler Select Bits
pub fn adie(&self) -> ADIE_R[src]
Bit 3 - ADC Interrupt Enable
pub fn adif(&self) -> ADIF_R[src]
Bit 4 - ADC Interrupt Flag
pub fn adate(&self) -> ADATE_R[src]
Bit 5 - ADC Auto Trigger Enable
pub fn adsc(&self) -> ADSC_R[src]
Bit 6 - ADC Start Conversion
pub fn aden(&self) -> ADEN_R[src]
Bit 7 - ADC Enable
impl R<u8, ADTS_A>[src]
pub fn variant(&self) -> Variant<u8, ADTS_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _ADCSRB>>[src]
pub fn adts(&self) -> ADTS_R[src]
Bits 0:4 - ADC Auto Trigger Sources
pub fn mux5(&self) -> MUX5_R[src]
Bit 5 - Analog Channel and Gain Selection Bits
pub fn adhsm(&self) -> ADHSM_R[src]
Bit 7 - ADC High Speed Mode
impl R<u8, REFS_A>[src]
pub fn variant(&self) -> Variant<u8, REFS_A>[src]
Get enumerated values variant
pub fn is_aref(&self) -> bool[src]
Checks if the value of the field is AREF
pub fn is_avcc(&self) -> bool[src]
Checks if the value of the field is AVCC
pub fn is_internal(&self) -> bool[src]
Checks if the value of the field is INTERNAL
impl R<u8, Reg<u8, _ADMUX>>[src]
pub fn mux(&self) -> MUX_R[src]
Bits 0:4 - Analog Channel and Gain Selection Bits
pub fn adlar(&self) -> ADLAR_R[src]
Bit 5 - Left Adjust Result
pub fn refs(&self) -> REFS_R[src]
Bits 6:7 - Reference Selection Bits
impl R<u8, Reg<u8, _DIDR0>>[src]
pub fn adc0d(&self) -> ADC0D_R[src]
Bit 0 - ADC0 Digital input Disable
pub fn adc1d(&self) -> ADC1D_R[src]
Bit 1 - ADC1 Digital input Disable
pub fn adc2d(&self) -> ADC2D_R[src]
Bit 2 - ADC2 Digital input Disable
pub fn adc3d(&self) -> ADC3D_R[src]
Bit 3 - ADC3 Digital input Disable
pub fn adc4d(&self) -> ADC4D_R[src]
Bit 4 - ADC4 Digital input Disable
pub fn adc5d(&self) -> ADC5D_R[src]
Bit 5 - ADC5 Digital input Disable
pub fn adc6d(&self) -> ADC6D_R[src]
Bit 6 - ADC6 Digital input Disable
pub fn adc7d(&self) -> ADC7D_R[src]
Bit 7 - ADC7 Digital input Disable
impl R<u8, Reg<u8, _DIDR2>>[src]
pub fn adc8d(&self) -> ADC8D_R[src]
Bit 0 - ADC8 Digital input Disable
pub fn adc9d(&self) -> ADC9D_R[src]
Bit 1 - ADC9 Digital input Disable
pub fn adc10d(&self) -> ADC10D_R[src]
Bit 2 - ADC10 Digital input Disable
pub fn adc11d(&self) -> ADC11D_R[src]
Bit 3 - ADC11 Digital input Disable
pub fn adc12d(&self) -> ADC12D_R[src]
Bit 4 - ADC12 Digital input Disable
pub fn adc13d(&self) -> ADC13D_R[src]
Bit 5 - ADC13 Digital input Disable
impl R<u8, Reg<u8, _SPMCSR>>[src]
pub fn spmen(&self) -> SPMEN_R[src]
Bit 0 - Store Program Memory Enable
pub fn pgers(&self) -> PGERS_R[src]
Bit 1 - Page Erase
pub fn pgwrt(&self) -> PGWRT_R[src]
Bit 2 - Page Write
pub fn blbset(&self) -> BLBSET_R[src]
Bit 3 - Boot Lock Bit Set
pub fn rwwsre(&self) -> RWWSRE_R[src]
Bit 4 - Read While Write section read enable
pub fn sigrd(&self) -> SIGRD_R[src]
Bit 5 - Signature Row Read
pub fn rwwsb(&self) -> RWWSB_R[src]
Bit 6 - Read While Write Section Busy
pub fn spmie(&self) -> SPMIE_R[src]
Bit 7 - SPM Interrupt Enable
impl R<u8, CLKPS_A>[src]
pub fn variant(&self) -> Variant<u8, CLKPS_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
pub fn is_val_0x08(&self) -> bool[src]
Checks if the value of the field is VAL_0X08
impl R<u8, Reg<u8, _CLKPR>>[src]
impl R<u8, Reg<u8, _CLKSEL0>>[src]
pub fn clks(&self) -> CLKS_R[src]
Bit 0 -
pub fn exte(&self) -> EXTE_R[src]
Bit 2 -
pub fn rce(&self) -> RCE_R[src]
Bit 3 -
pub fn exsut(&self) -> EXSUT_R[src]
Bits 4:5 -
pub fn rcsut(&self) -> RCSUT_R[src]
Bits 6:7 -
impl R<u8, Reg<u8, _CLKSEL1>>[src]
impl R<u8, Reg<u8, _CLKSTA>>[src]
impl R<u8, Reg<u8, _GPIOR0>>[src]
pub fn gpior00(&self) -> GPIOR00_R[src]
Bit 0 - General Purpose IO Register 0 bit 0
pub fn gpior01(&self) -> GPIOR01_R[src]
Bit 1 - General Purpose IO Register 0 bit 1
pub fn gpior02(&self) -> GPIOR02_R[src]
Bit 2 - General Purpose IO Register 0 bit 2
pub fn gpior03(&self) -> GPIOR03_R[src]
Bit 3 - General Purpose IO Register 0 bit 3
pub fn gpior04(&self) -> GPIOR04_R[src]
Bit 4 - General Purpose IO Register 0 bit 4
pub fn gpior05(&self) -> GPIOR05_R[src]
Bit 5 - General Purpose IO Register 0 bit 5
pub fn gpior06(&self) -> GPIOR06_R[src]
Bit 6 - General Purpose IO Register 0 bit 6
pub fn gpior07(&self) -> GPIOR07_R[src]
Bit 7 - General Purpose IO Register 0 bit 7
impl R<u8, Reg<u8, _GPIOR1>>[src]
impl R<u8, Reg<u8, _GPIOR2>>[src]
impl R<u8, Reg<u8, _MCUCR>>[src]
pub fn ivce(&self) -> IVCE_R[src]
Bit 0 - Interrupt Vector Change Enable
pub fn ivsel(&self) -> IVSEL_R[src]
Bit 1 - Interrupt Vector Select
pub fn pud(&self) -> PUD_R[src]
Bit 4 - Pull-up disable
pub fn jtd(&self) -> JTD_R[src]
Bit 7 - JTAG Interface Disable
impl R<u8, Reg<u8, _MCUSR>>[src]
pub fn porf(&self) -> PORF_R[src]
Bit 0 - Power-on reset flag
pub fn extrf(&self) -> EXTRF_R[src]
Bit 1 - External Reset Flag
pub fn borf(&self) -> BORF_R[src]
Bit 2 - Brown-out Reset Flag
pub fn wdrf(&self) -> WDRF_R[src]
Bit 3 - Watchdog Reset Flag
pub fn jtrf(&self) -> JTRF_R[src]
Bit 4 - JTAG Reset Flag
impl R<u8, Reg<u8, _OSCCAL>>[src]
impl R<u8, Reg<u8, _PRR0>>[src]
pub fn pradc(&self) -> PRADC_R[src]
Bit 0 - Power Reduction ADC
pub fn prusart0(&self) -> PRUSART0_R[src]
Bit 1 - Power Reduction USART
pub fn prspi(&self) -> PRSPI_R[src]
Bit 2 - Power Reduction Serial Peripheral Interface
pub fn prtim1(&self) -> PRTIM1_R[src]
Bit 3 - Power Reduction Timer/Counter1
pub fn prtim0(&self) -> PRTIM0_R[src]
Bit 5 - Power Reduction Timer/Counter0
pub fn prtim2(&self) -> PRTIM2_R[src]
Bit 6 - Power Reduction Timer/Counter2
pub fn prtwi(&self) -> PRTWI_R[src]
Bit 7 - Power Reduction TWI
impl R<u8, Reg<u8, _PRR1>>[src]
pub fn prusart1(&self) -> PRUSART1_R[src]
Bit 0 - Power Reduction USART1
pub fn prtim3(&self) -> PRTIM3_R[src]
Bit 3 - Power Reduction Timer/Counter3
pub fn prtim4(&self) -> PRTIM4_R[src]
Bit 4 - Power Reduction Timer/Counter4
pub fn prusb(&self) -> PRUSB_R[src]
Bit 7 - Power Reduction USB
impl R<u8, RAMPZ_A>[src]
pub fn variant(&self) -> Variant<u8, RAMPZ_A>[src]
Get enumerated values variant
pub fn is_val_0(&self) -> bool[src]
Checks if the value of the field is VAL_0
impl R<u8, Reg<u8, _RAMPZ>>[src]
pub fn rampz(&self) -> RAMPZ_R[src]
Bits 0:1 - Extended Z-Pointer Value
pub fn res(&self) -> RES_R[src]
Bits 2:7 - Reserved
impl R<u8, Reg<u8, _RCCTRL>>[src]
impl R<u8, SM_A>[src]
pub fn variant(&self) -> SM_A[src]
Get enumerated values variant
pub fn is_idle(&self) -> bool[src]
Checks if the value of the field is IDLE
pub fn is_adc(&self) -> bool[src]
Checks if the value of the field is ADC
pub fn is_pdown(&self) -> bool[src]
Checks if the value of the field is PDOWN
pub fn is_psave(&self) -> bool[src]
Checks if the value of the field is PSAVE
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_stdby(&self) -> bool[src]
Checks if the value of the field is STDBY
pub fn is_estdby(&self) -> bool[src]
Checks if the value of the field is ESTDBY
impl R<u8, Reg<u8, _SMCR>>[src]
pub fn se(&self) -> SE_R[src]
Bit 0 - Sleep Enable
pub fn sm(&self) -> SM_R[src]
Bits 1:3 - Sleep Mode Select bits
impl R<u8, EEPM_A>[src]
pub fn variant(&self) -> Variant<u8, EEPM_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
impl R<u8, Reg<u8, _EECR>>[src]
pub fn eere(&self) -> EERE_R[src]
Bit 0 - EEPROM Read Enable
pub fn eepe(&self) -> EEPE_R[src]
Bit 1 - EEPROM Write Enable
pub fn eempe(&self) -> EEMPE_R[src]
Bit 2 - EEPROM Master Write Enable
pub fn eerie(&self) -> EERIE_R[src]
Bit 3 - EEPROM Ready Interrupt Enable
pub fn eepm(&self) -> EEPM_R[src]
Bits 4:5 - EEPROM Programming Mode Bits
impl R<u8, ISC0_A>[src]
pub fn variant(&self) -> ISC0_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC1_A>[src]
pub fn variant(&self) -> ISC1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC2_A>[src]
pub fn variant(&self) -> ISC2_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC3_A>[src]
pub fn variant(&self) -> ISC3_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _EICRA>>[src]
pub fn isc0(&self) -> ISC0_R[src]
Bits 0:1 - External Interrupt Sense Control Bit
pub fn isc1(&self) -> ISC1_R[src]
Bits 2:3 - External Interrupt Sense Control Bit
pub fn isc2(&self) -> ISC2_R[src]
Bits 4:5 - External Interrupt Sense Control Bit
pub fn isc3(&self) -> ISC3_R[src]
Bits 6:7 - External Interrupt Sense Control Bit
impl R<u8, ISC4_A>[src]
pub fn variant(&self) -> ISC4_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC5_A>[src]
pub fn variant(&self) -> ISC5_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC6_A>[src]
pub fn variant(&self) -> ISC6_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC7_A>[src]
pub fn variant(&self) -> ISC7_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _EICRB>>[src]
pub fn isc4(&self) -> ISC4_R[src]
Bits 0:1 - External Interrupt 7-4 Sense Control Bit
pub fn isc5(&self) -> ISC5_R[src]
Bits 2:3 - External Interrupt 7-4 Sense Control Bit
pub fn isc6(&self) -> ISC6_R[src]
Bits 4:5 - External Interrupt 7-4 Sense Control Bit
pub fn isc7(&self) -> ISC7_R[src]
Bits 6:7 - External Interrupt 7-4 Sense Control Bit
impl R<u8, Reg<u8, _EIFR>>[src]
impl R<u8, Reg<u8, _EIMSK>>[src]
impl R<u8, Reg<u8, _PCICR>>[src]
impl R<u8, Reg<u8, _PCIFR>>[src]
impl R<u8, BODLEVEL_A>[src]
pub fn variant(&self) -> BODLEVEL_A[src]
Get enumerated values variant
pub fn is_4v3(&self) -> bool[src]
Checks if the value of the field is _4V3
pub fn is_3v5(&self) -> bool[src]
Checks if the value of the field is _3V5
pub fn is_3v4(&self) -> bool[src]
Checks if the value of the field is _3V4
pub fn is_2v6(&self) -> bool[src]
Checks if the value of the field is _2V6
pub fn is_2v4(&self) -> bool[src]
Checks if the value of the field is _2V4
pub fn is_2v2(&self) -> bool[src]
Checks if the value of the field is _2V2
pub fn is_2v0(&self) -> bool[src]
Checks if the value of the field is _2V0
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<u8, Reg<u8, _EXTENDED>>[src]
pub fn bodlevel(&self) -> BODLEVEL_R[src]
Bits 0:2 - Brown-out Detector trigger level
pub fn hwbe(&self) -> HWBE_R[src]
Bit 3 - Hardware Boot Enable
impl R<u8, BOOTSZ_A>[src]
pub fn variant(&self) -> BOOTSZ_A[src]
Get enumerated values variant
pub fn is_2048w_3800(&self) -> bool[src]
Checks if the value of the field is _2048W_3800
pub fn is_1024w_3c00(&self) -> bool[src]
Checks if the value of the field is _1024W_3C00
pub fn is_512w_3e00(&self) -> bool[src]
Checks if the value of the field is _512W_3E00
pub fn is_256w_3f00(&self) -> bool[src]
Checks if the value of the field is _256W_3F00
impl R<u8, Reg<u8, _HIGH>>[src]
pub fn bootrst(&self) -> BOOTRST_R[src]
Bit 0 - Boot Reset vector Enabled
pub fn bootsz(&self) -> BOOTSZ_R[src]
Bits 1:2 - Select Boot Size
pub fn eesave(&self) -> EESAVE_R[src]
Bit 3 - Preserve EEPROM through the Chip Erase cycle
pub fn wdton(&self) -> WDTON_R[src]
Bit 4 - Watchdog timer always on
pub fn spien(&self) -> SPIEN_R[src]
Bit 5 - Serial program downloading (SPI) enabled
pub fn jtagen(&self) -> JTAGEN_R[src]
Bit 6 - JTAG Interface Enabled
pub fn ocden(&self) -> OCDEN_R[src]
Bit 7 - On-Chip Debug Enabled
impl R<u8, SUT_CKSEL_A>[src]
pub fn variant(&self) -> Variant<u8, SUT_CKSEL_A>[src]
Get enumerated values variant
pub fn is_extclk_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_0MS
pub fn is_intrcosc_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_6CK_0MS
pub fn is_extlofxtal_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_0MS
pub fn is_extlofxtal_32kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_0MS
pub fn is_extlofxtal_1kck_0ms_intcap(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_0MS_INTCAP
pub fn is_extlofxtal_32kck_0ms_intcap(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_0MS_INTCAP
pub fn is_extxosc_0mhz4_0mhz9_258ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1
pub fn is_extxosc_0mhz4_0mhz9_1kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS
pub fn is_extxosc_0mhz9_3mhz_258ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_258CK_4MS1
pub fn is_extxosc_0mhz9_3mhz_1kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_65MS
pub fn is_extxosc_3mhz_8mhz_258ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_258CK_4MS1
pub fn is_extxosc_3mhz_8mhz_1kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_65MS
pub fn is_extxosc_8mhz_xx_258ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_258CK_4MS1
pub fn is_extxosc_8mhz_xx_1kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_65MS
pub fn is_extclk_6ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_4MS1
pub fn is_intrcosc_6ck_4ms1(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_6CK_4MS1
pub fn is_extlofxtal_1kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_4MS1
pub fn is_extlofxtal_32kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_4MS1
pub fn is_extlofxtal_1kck_4ms1_intcap(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_4MS1_INTCAP
pub fn is_extlofxtal_32kck_4ms1_intcap(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_4MS1_INTCAP
pub fn is_extxosc_0mhz4_0mhz9_258ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_258CK_65MS
pub fn is_extxosc_0mhz4_0mhz9_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS
pub fn is_extxosc_0mhz9_3mhz_258ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_258CK_65MS
pub fn is_extxosc_0mhz9_3mhz_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_0MS
pub fn is_extxosc_3mhz_8mhz_258ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_258CK_65MS
pub fn is_extxosc_3mhz_8mhz_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_0MS
pub fn is_extxosc_8mhz_xx_258ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_258CK_65MS
pub fn is_extxosc_8mhz_xx_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_0MS
pub fn is_extclk_6ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_65MS
pub fn is_intrcosc_6ck_65ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_6CK_65MS
pub fn is_extlofxtal_1kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_65MS
pub fn is_extlofxtal_32kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_65MS
pub fn is_extlofxtal_1kck_65ms_intcap(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_65MS_INTCAP
pub fn is_extlofxtal_32kck_65ms_intcap(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_65MS_INTCAP
pub fn is_extxosc_0mhz4_0mhz9_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS
pub fn is_extxosc_0mhz4_0mhz9_16kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1
pub fn is_extxosc_0mhz9_3mhz_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_0MS
pub fn is_extxosc_0mhz9_3mhz_16kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1
pub fn is_extxosc_3mhz_8mhz_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_0MS
pub fn is_extxosc_3mhz_8mhz_16kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_4MS1
pub fn is_extxosc_8mhz_xx_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_0MS
pub fn is_extxosc_8mhz_xx_16kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_4MS1
pub fn is_extxosc_0mhz4_0mhz9_1kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1
pub fn is_extxosc_0mhz4_0mhz9_16kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS
pub fn is_extxosc_0mhz9_3mhz_1kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1
pub fn is_extxosc_0mhz9_3mhz_16kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_65MS
pub fn is_extxosc_3mhz_8mhz_1kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_4MS1
pub fn is_extxosc_3mhz_8mhz_16kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_65MS
pub fn is_extxosc_8mhz_xx_1kck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_4MS1
pub fn is_extxosc_8mhz_xx_16kck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_65MS
impl R<u8, Reg<u8, _LOW>>[src]
pub fn sut_cksel(&self) -> SUT_CKSEL_R[src]
Bits 0:5 - Select Clock Source
pub fn ckout(&self) -> CKOUT_R[src]
Bit 6 - Clock output on PORTC7
pub fn ckdiv8(&self) -> CKDIV8_R[src]
Bit 7 - Divide clock by 8 internally
impl R<u8, Reg<u8, _MCUCR>>[src]
impl R<u8, Reg<u8, _MCUSR>>[src]
impl R<u8, LB_A>[src]
pub fn variant(&self) -> Variant<u8, LB_A>[src]
Get enumerated values variant
pub fn is_prog_ver_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_VER_DISABLED
pub fn is_prog_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_DISABLED
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, BLB0_A>[src]
pub fn variant(&self) -> BLB0_A[src]
Get enumerated values variant
pub fn is_lpm_spm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_SPM_DISABLE
pub fn is_lpm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_DISABLE
pub fn is_spm_disable(&self) -> bool[src]
Checks if the value of the field is SPM_DISABLE
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, BLB1_A>[src]
pub fn variant(&self) -> BLB1_A[src]
Get enumerated values variant
pub fn is_lpm_spm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_SPM_DISABLE
pub fn is_lpm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_DISABLE
pub fn is_spm_disable(&self) -> bool[src]
Checks if the value of the field is SPM_DISABLE
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, Reg<u8, _LOCKBIT>>[src]
pub fn lb(&self) -> LB_R[src]
Bits 0:1 - Memory Lock
pub fn blb0(&self) -> BLB0_R[src]
Bits 2:3 - Boot Loader Protection Mode
pub fn blb1(&self) -> BLB1_R[src]
Bits 4:5 - Boot Loader Protection Mode
impl R<u8, Reg<u8, _PLLCSR>>[src]
pub fn plock(&self) -> PLOCK_R[src]
Bit 0 - PLL Lock Status Bit
pub fn plle(&self) -> PLLE_R[src]
Bit 1 - PLL Enable Bit
pub fn pindiv(&self) -> PINDIV_R[src]
Bit 4 - PLL prescaler Bit 2
impl R<u8, PDIV_A>[src]
pub fn variant(&self) -> Variant<u8, PDIV_A>[src]
Get enumerated values variant
pub fn is_mhz40(&self) -> bool[src]
Checks if the value of the field is MHZ40
pub fn is_mhz48(&self) -> bool[src]
Checks if the value of the field is MHZ48
pub fn is_mhz56(&self) -> bool[src]
Checks if the value of the field is MHZ56
pub fn is_mhz72(&self) -> bool[src]
Checks if the value of the field is MHZ72
pub fn is_mhz80(&self) -> bool[src]
Checks if the value of the field is MHZ80
pub fn is_mhz88(&self) -> bool[src]
Checks if the value of the field is MHZ88
pub fn is_mhz96(&self) -> bool[src]
Checks if the value of the field is MHZ96
impl R<u8, PLLTM_A>[src]
pub fn variant(&self) -> PLLTM_A[src]
Get enumerated values variant
pub fn is_disconnected(&self) -> bool[src]
Checks if the value of the field is DISCONNECTED
pub fn is_factor_1(&self) -> bool[src]
Checks if the value of the field is FACTOR_1
pub fn is_factor_15(&self) -> bool[src]
Checks if the value of the field is FACTOR_15
pub fn is_factor_2(&self) -> bool[src]
Checks if the value of the field is FACTOR_2
impl R<u8, Reg<u8, _PLLFRQ>>[src]
pub fn pdiv(&self) -> PDIV_R[src]
Bits 0:3 - PLL Lock Frequency
pub fn plltm(&self) -> PLLTM_R[src]
Bits 4:5 - PLL Postscaler for High Speed Timer
pub fn pllusb(&self) -> PLLUSB_R[src]
Bit 6 - PLL Postscaler for USB Peripheral
pub fn pinmux(&self) -> PINMUX_R[src]
Bit 7 - PLL Input Multiplexer
impl R<u8, Reg<u8, _DDRB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _PINB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _PORTB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _DDRC>>[src]
impl R<u8, Reg<u8, _PINC>>[src]
impl R<u8, Reg<u8, _PORTC>>[src]
impl R<u8, Reg<u8, _DDRD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _PIND>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _PORTD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _DDRE>>[src]
impl R<u8, Reg<u8, _PINE>>[src]
impl R<u8, Reg<u8, _PORTE>>[src]
impl R<u8, Reg<u8, _DDRF>>[src]
pub fn pf0(&self) -> PF0_R[src]
Bit 0 - Pin F0
pub fn pf1(&self) -> PF1_R[src]
Bit 1 - Pin F1
pub fn pf4(&self) -> PF4_R[src]
Bit 4 - Pin F4
pub fn pf5(&self) -> PF5_R[src]
Bit 5 - Pin F5
pub fn pf6(&self) -> PF6_R[src]
Bit 6 - Pin F6
impl R<u8, Reg<u8, _PINF>>[src]
pub fn pf0(&self) -> PF0_R[src]
Bit 0 - Pin F0
pub fn pf1(&self) -> PF1_R[src]
Bit 1 - Pin F1
pub fn pf4(&self) -> PF4_R[src]
Bit 4 - Pin F4
pub fn pf5(&self) -> PF5_R[src]
Bit 5 - Pin F5
pub fn pf6(&self) -> PF6_R[src]
Bit 6 - Pin F6
impl R<u8, Reg<u8, _PORTF>>[src]
pub fn pf0(&self) -> PF0_R[src]
Bit 0 - Pin F0
pub fn pf1(&self) -> PF1_R[src]
Bit 1 - Pin F1
pub fn pf4(&self) -> PF4_R[src]
Bit 4 - Pin F4
pub fn pf5(&self) -> PF5_R[src]
Bit 5 - Pin F5
pub fn pf6(&self) -> PF6_R[src]
Bit 6 - Pin F6
impl R<u8, SPR_A>[src]
pub fn variant(&self) -> Variant<u8, SPR_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _SPCR>>[src]
pub fn spr(&self) -> SPR_R[src]
Bits 0:1 - SPI Clock Rate Selects
pub fn cpha(&self) -> CPHA_R[src]
Bit 2 - Clock Phase
pub fn cpol(&self) -> CPOL_R[src]
Bit 3 - Clock polarity
pub fn mstr(&self) -> MSTR_R[src]
Bit 4 - Master/Slave Select
pub fn dord(&self) -> DORD_R[src]
Bit 5 - Data Order
pub fn spe(&self) -> SPE_R[src]
Bit 6 - SPI Enable
pub fn spie(&self) -> SPIE_R[src]
Bit 7 - SPI Interrupt Enable
impl R<u8, Reg<u8, _SPSR>>[src]
pub fn spi2x(&self) -> SPI2X_R[src]
Bit 0 - Double SPI Speed Bit
pub fn wcol(&self) -> WCOL_R[src]
Bit 6 - Write Collision Flag
pub fn spif(&self) -> SPIF_R[src]
Bit 7 - SPI Interrupt Flag
impl R<u8, Reg<u8, _GTCCR>>[src]
pub fn psrsync(&self) -> PSRSYNC_R[src]
Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0
pub fn tsm(&self) -> TSM_R[src]
Bit 7 - Timer/Counter Synchronization Mode
impl R<u8, WGM0_A>[src]
pub fn variant(&self) -> WGM0_A[src]
Get enumerated values variant
pub fn is_normal_top(&self) -> bool[src]
Checks if the value of the field is NORMAL_TOP
pub fn is_pwm_phase(&self) -> bool[src]
Checks if the value of the field is PWM_PHASE
pub fn is_ctc(&self) -> bool[src]
Checks if the value of the field is CTC
pub fn is_pwm_fast(&self) -> bool[src]
Checks if the value of the field is PWM_FAST
impl R<u8, COM0B_A>[src]
pub fn variant(&self) -> COM0B_A[src]
Get enumerated values variant
pub fn is_disconnected(&self) -> bool[src]
Checks if the value of the field is DISCONNECTED
pub fn is_match_toggle(&self) -> bool[src]
Checks if the value of the field is MATCH_TOGGLE
pub fn is_match_clear(&self) -> bool[src]
Checks if the value of the field is MATCH_CLEAR
pub fn is_match_set(&self) -> bool[src]
Checks if the value of the field is MATCH_SET
impl R<u8, COM0A_A>[src]
pub fn variant(&self) -> COM0A_A[src]
Get enumerated values variant
pub fn is_disconnected(&self) -> bool[src]
Checks if the value of the field is DISCONNECTED
pub fn is_match_toggle(&self) -> bool[src]
Checks if the value of the field is MATCH_TOGGLE
pub fn is_match_clear(&self) -> bool[src]
Checks if the value of the field is MATCH_CLEAR
pub fn is_match_set(&self) -> bool[src]
Checks if the value of the field is MATCH_SET
impl R<u8, Reg<u8, _TCCR0A>>[src]
pub fn wgm0(&self) -> WGM0_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn com0b(&self) -> COM0B_R[src]
Bits 4:5 - Compare Output B Mode
pub fn com0a(&self) -> COM0A_R[src]
Bits 6:7 - Compare Output A Mode
impl R<u8, CS0_A>[src]
pub fn variant(&self) -> CS0_A[src]
Get enumerated values variant
pub fn is_no_clock(&self) -> bool[src]
Checks if the value of the field is NO_CLOCK
pub fn is_direct(&self) -> bool[src]
Checks if the value of the field is DIRECT
pub fn is_prescale_8(&self) -> bool[src]
Checks if the value of the field is PRESCALE_8
pub fn is_prescale_64(&self) -> bool[src]
Checks if the value of the field is PRESCALE_64
pub fn is_prescale_256(&self) -> bool[src]
Checks if the value of the field is PRESCALE_256
pub fn is_prescale_1024(&self) -> bool[src]
Checks if the value of the field is PRESCALE_1024
pub fn is_ext_falling(&self) -> bool[src]
Checks if the value of the field is EXT_FALLING
pub fn is_ext_rising(&self) -> bool[src]
Checks if the value of the field is EXT_RISING
impl R<u8, Reg<u8, _TCCR0B>>[src]
pub fn cs0(&self) -> CS0_R[src]
Bits 0:2 - Clock Select
pub fn wgm02(&self) -> WGM02_R[src]
Bit 3 - Waveform Generation Mode High Bit (Enable Top: OCRA for PWM modes)
impl R<u8, Reg<u8, _TIFR0>>[src]
pub fn tov0(&self) -> TOV0_R[src]
Bit 0 - Timer/Counter0 Overflow Flag
pub fn ocf0a(&self) -> OCF0A_R[src]
Bit 1 - Timer/Counter0 Output Compare Flag 0A
pub fn ocf0b(&self) -> OCF0B_R[src]
Bit 2 - Timer/Counter0 Output Compare Flag 0B
impl R<u8, Reg<u8, _TIMSK0>>[src]
pub fn toie0(&self) -> TOIE0_R[src]
Bit 0 - Timer/Counter0 Overflow Interrupt Enable
pub fn ocie0a(&self) -> OCIE0A_R[src]
Bit 1 - Timer/Counter0 Output Compare Match A Interrupt Enable
pub fn ocie0b(&self) -> OCIE0B_R[src]
Bit 2 - Timer/Counter0 Output Compare Match B Interrupt Enable
impl R<u8, Reg<u8, _TCCR1A>>[src]
pub fn wgm1(&self) -> WGM1_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn com1c(&self) -> COM1C_R[src]
Bits 2:3 - Compare Output Mode 1C, bits
pub fn com1b(&self) -> COM1B_R[src]
Bits 4:5 - Compare Output Mode 1B, bits
pub fn com1a(&self) -> COM1A_R[src]
Bits 6:7 - Compare Output Mode 1A, bits
impl R<u8, CS1_A>[src]
pub fn variant(&self) -> CS1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR1B>>[src]
pub fn cs1(&self) -> CS1_R[src]
Bits 0:2 - Prescaler source of Timer/Counter 1
pub fn wgm1(&self) -> WGM1_R[src]
Bits 3:4 - Waveform Generation Mode
pub fn ices1(&self) -> ICES1_R[src]
Bit 6 - Input Capture 1 Edge Select
pub fn icnc1(&self) -> ICNC1_R[src]
Bit 7 - Input Capture 1 Noise Canceler
impl R<u8, Reg<u8, _TCCR1C>>[src]
pub fn foc1c(&self) -> FOC1C_R[src]
Bit 5 - Force Output Compare 1C
pub fn foc1b(&self) -> FOC1B_R[src]
Bit 6 - Force Output Compare 1B
pub fn foc1a(&self) -> FOC1A_R[src]
Bit 7 - Force Output Compare 1A
impl R<u8, Reg<u8, _TIFR1>>[src]
pub fn tov1(&self) -> TOV1_R[src]
Bit 0 - Timer/Counter1 Overflow Flag
pub fn ocf1a(&self) -> OCF1A_R[src]
Bit 1 - Output Compare Flag 1A
pub fn ocf1b(&self) -> OCF1B_R[src]
Bit 2 - Output Compare Flag 1B
pub fn ocf1c(&self) -> OCF1C_R[src]
Bit 3 - Output Compare Flag 1C
pub fn icf1(&self) -> ICF1_R[src]
Bit 5 - Input Capture Flag 1
impl R<u8, Reg<u8, _TIMSK1>>[src]
pub fn toie1(&self) -> TOIE1_R[src]
Bit 0 - Timer/Counter1 Overflow Interrupt Enable
pub fn ocie1a(&self) -> OCIE1A_R[src]
Bit 1 - Timer/Counter1 Output Compare A Match Interrupt Enable
pub fn ocie1b(&self) -> OCIE1B_R[src]
Bit 2 - Timer/Counter1 Output Compare B Match Interrupt Enable
pub fn ocie1c(&self) -> OCIE1C_R[src]
Bit 3 - Timer/Counter1 Output Compare C Match Interrupt Enable
pub fn icie1(&self) -> ICIE1_R[src]
Bit 5 - Timer/Counter1 Input Capture Interrupt Enable
impl R<u8, Reg<u8, _TCCR3A>>[src]
pub fn wgm3(&self) -> WGM3_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn com3c(&self) -> COM3C_R[src]
Bits 2:3 - Compare Output Mode 3C, bits
pub fn com3b(&self) -> COM3B_R[src]
Bits 4:5 - Compare Output Mode 3B, bits
pub fn com3a(&self) -> COM3A_R[src]
Bits 6:7 - Compare Output Mode 1A, bits
impl R<u8, CS3_A>[src]
pub fn variant(&self) -> CS3_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR3B>>[src]
pub fn cs3(&self) -> CS3_R[src]
Bits 0:2 - Prescaler source of Timer/Counter 3
pub fn wgm3(&self) -> WGM3_R[src]
Bits 3:4 - Waveform Generation Mode
pub fn ices3(&self) -> ICES3_R[src]
Bit 6 - Input Capture 3 Edge Select
pub fn icnc3(&self) -> ICNC3_R[src]
Bit 7 - Input Capture 3 Noise Canceler
impl R<u8, Reg<u8, _TCCR3C>>[src]
pub fn foc3c(&self) -> FOC3C_R[src]
Bit 5 - Force Output Compare 3C
pub fn foc3b(&self) -> FOC3B_R[src]
Bit 6 - Force Output Compare 3B
pub fn foc3a(&self) -> FOC3A_R[src]
Bit 7 - Force Output Compare 3A
impl R<u8, Reg<u8, _TIFR3>>[src]
pub fn tov3(&self) -> TOV3_R[src]
Bit 0 - Timer/Counter3 Overflow Flag
pub fn ocf3a(&self) -> OCF3A_R[src]
Bit 1 - Output Compare Flag 3A
pub fn ocf3b(&self) -> OCF3B_R[src]
Bit 2 - Output Compare Flag 3B
pub fn ocf3c(&self) -> OCF3C_R[src]
Bit 3 - Output Compare Flag 3C
pub fn icf3(&self) -> ICF3_R[src]
Bit 5 - Input Capture Flag 3
impl R<u8, Reg<u8, _TIMSK3>>[src]
pub fn toie3(&self) -> TOIE3_R[src]
Bit 0 - Timer/Counter3 Overflow Interrupt Enable
pub fn ocie3a(&self) -> OCIE3A_R[src]
Bit 1 - Timer/Counter3 Output Compare A Match Interrupt Enable
pub fn ocie3b(&self) -> OCIE3B_R[src]
Bit 2 - Timer/Counter3 Output Compare B Match Interrupt Enable
pub fn ocie3c(&self) -> OCIE3C_R[src]
Bit 3 - Timer/Counter3 Output Compare C Match Interrupt Enable
pub fn icie3(&self) -> ICIE3_R[src]
Bit 5 - Timer/Counter3 Input Capture Interrupt Enable
impl R<u8, Reg<u8, _DT4>>[src]
impl R<u8, Reg<u8, _TCCR4A>>[src]
pub fn pwm4b(&self) -> PWM4B_R[src]
Bit 0 -
pub fn pwm4a(&self) -> PWM4A_R[src]
Bit 1 -
pub fn foc4b(&self) -> FOC4B_R[src]
Bit 2 - Force Output Compare Match 4B
pub fn foc4a(&self) -> FOC4A_R[src]
Bit 3 - Force Output Compare Match 4A
pub fn com4b(&self) -> COM4B_R[src]
Bits 4:5 - Compare Output Mode 4B, bits
pub fn com4a(&self) -> COM4A_R[src]
Bits 6:7 - Compare Output Mode 1A, bits
impl R<u8, Reg<u8, _TCCR4B>>[src]
pub fn cs4(&self) -> CS4_R[src]
Bits 0:3 - Clock Select Bits
pub fn dtps4(&self) -> DTPS4_R[src]
Bits 4:5 - Dead Time Prescaler Bits
pub fn psr4(&self) -> PSR4_R[src]
Bit 6 - Prescaler Reset Timer/Counter 4
pub fn pwm4x(&self) -> PWM4X_R[src]
Bit 7 - PWM Inversion Mode
impl R<u8, Reg<u8, _TCCR4C>>[src]
pub fn pwm4d(&self) -> PWM4D_R[src]
Bit 0 - Pulse Width Modulator D Enable
pub fn foc4d(&self) -> FOC4D_R[src]
Bit 1 - Force Output Compare Match 4D
pub fn com4d(&self) -> COM4D_R[src]
Bits 2:3 - Comparator D Output Mode
pub fn com4b0s(&self) -> COM4B0S_R[src]
Bit 4 - Comparator B Output Mode
pub fn com4b1s(&self) -> COM4B1S_R[src]
Bit 5 - Comparator B Output Mode
pub fn com4a0s(&self) -> COM4A0S_R[src]
Bit 6 - Comparator A Output Mode
pub fn com4a1s(&self) -> COM4A1S_R[src]
Bit 7 - Comparator A Output Mode
impl R<u8, Reg<u8, _TCCR4D>>[src]
pub fn wgm4(&self) -> WGM4_R[src]
Bits 0:1 - Waveform Generation Mode bits
pub fn fpf4(&self) -> FPF4_R[src]
Bit 2 - Fault Protection Interrupt Flag
pub fn fpac4(&self) -> FPAC4_R[src]
Bit 3 - Fault Protection Analog Comparator Enable
pub fn fpes4(&self) -> FPES4_R[src]
Bit 4 - Fault Protection Edge Select
pub fn fpnc4(&self) -> FPNC4_R[src]
Bit 5 - Fault Protection Noise Canceler
pub fn fpen4(&self) -> FPEN4_R[src]
Bit 6 - Fault Protection Mode Enable
pub fn fpie4(&self) -> FPIE4_R[src]
Bit 7 - Fault Protection Interrupt Enable
impl R<u8, Reg<u8, _TCCR4E>>[src]
pub fn oc4oe(&self) -> OC4OE_R[src]
Bits 0:5 - Output Compare Override Enable bit
pub fn enhc4(&self) -> ENHC4_R[src]
Bit 6 - Enhanced Compare/PWM Mode
pub fn tlock4(&self) -> TLOCK4_R[src]
Bit 7 - Register Update Lock
impl R<u8, Reg<u8, _TIFR4>>[src]
pub fn tov4(&self) -> TOV4_R[src]
Bit 2 - Timer/Counter4 Overflow Flag
pub fn ocf4b(&self) -> OCF4B_R[src]
Bit 5 - Output Compare Flag 4B
pub fn ocf4a(&self) -> OCF4A_R[src]
Bit 6 - Output Compare Flag 4A
pub fn ocf4d(&self) -> OCF4D_R[src]
Bit 7 - Output Compare Flag 4D
impl R<u8, Reg<u8, _TIMSK4>>[src]
pub fn toie4(&self) -> TOIE4_R[src]
Bit 2 - Timer/Counter4 Overflow Interrupt Enable
pub fn ocie4b(&self) -> OCIE4B_R[src]
Bit 5 - Timer/Counter4 Output Compare B Match Interrupt Enable
pub fn ocie4a(&self) -> OCIE4A_R[src]
Bit 6 - Timer/Counter4 Output Compare A Match Interrupt Enable
pub fn ocie4d(&self) -> OCIE4D_R[src]
Bit 7 - Timer/Counter4 Output Compare D Match Interrupt Enable
impl R<u8, Reg<u8, _TWAMR>>[src]
impl R<u8, Reg<u8, _TWAR>>[src]
pub fn twgce(&self) -> TWGCE_R[src]
Bit 0 - TWI General Call Recognition Enable Bit
pub fn twa(&self) -> TWA_R[src]
Bits 1:7 - TWI (Slave) Address register Bits
impl R<u8, Reg<u8, _TWCR>>[src]
pub fn twie(&self) -> TWIE_R[src]
Bit 0 - TWI Interrupt Enable
pub fn twen(&self) -> TWEN_R[src]
Bit 2 - TWI Enable Bit
pub fn twwc(&self) -> TWWC_R[src]
Bit 3 - TWI Write Collition Flag
pub fn twsto(&self) -> TWSTO_R[src]
Bit 4 - TWI Stop Condition Bit
pub fn twsta(&self) -> TWSTA_R[src]
Bit 5 - TWI Start Condition Bit
pub fn twea(&self) -> TWEA_R[src]
Bit 6 - TWI Enable Acknowledge Bit
pub fn twint(&self) -> TWINT_R[src]
Bit 7 - TWI Interrupt Flag
impl R<u8, TWPS_A>[src]
pub fn variant(&self) -> TWPS_A[src]
Get enumerated values variant
pub fn is_prescaler_1(&self) -> bool[src]
Checks if the value of the field is PRESCALER_1
pub fn is_prescaler_4(&self) -> bool[src]
Checks if the value of the field is PRESCALER_4
pub fn is_prescaler_16(&self) -> bool[src]
Checks if the value of the field is PRESCALER_16
pub fn is_prescaler_64(&self) -> bool[src]
Checks if the value of the field is PRESCALER_64
impl R<u8, Reg<u8, _TWSR>>[src]
pub fn twps(&self) -> TWPS_R[src]
Bits 0:1 - TWI Prescaler
pub fn tws(&self) -> TWS_R[src]
Bits 3:7 - TWI Status
impl R<u8, Reg<u8, _UCSR1A>>[src]
pub fn mpcm1(&self) -> MPCM1_R[src]
Bit 0 - Multi-processor Communication Mode
pub fn u2x1(&self) -> U2X1_R[src]
Bit 1 - Double the USART transmission speed
pub fn upe1(&self) -> UPE1_R[src]
Bit 2 - Parity Error
pub fn dor1(&self) -> DOR1_R[src]
Bit 3 - Data overRun
pub fn fe1(&self) -> FE1_R[src]
Bit 4 - Framing Error
pub fn udre1(&self) -> UDRE1_R[src]
Bit 5 - USART Data Register Empty
pub fn txc1(&self) -> TXC1_R[src]
Bit 6 - USART Transmit Complete
pub fn rxc1(&self) -> RXC1_R[src]
Bit 7 - USART Receive Complete
impl R<u8, Reg<u8, _UCSR1B>>[src]
pub fn txb81(&self) -> TXB81_R[src]
Bit 0 - Transmit Data Bit 8
pub fn rxb81(&self) -> RXB81_R[src]
Bit 1 - Receive Data Bit 8
pub fn ucsz12(&self) -> UCSZ12_R[src]
Bit 2 - Character Size
pub fn txen1(&self) -> TXEN1_R[src]
Bit 3 - Transmitter Enable
pub fn rxen1(&self) -> RXEN1_R[src]
Bit 4 - Receiver Enable
pub fn udrie1(&self) -> UDRIE1_R[src]
Bit 5 - USART Data register Empty Interrupt Enable
pub fn txcie1(&self) -> TXCIE1_R[src]
Bit 6 - TX Complete Interrupt Enable
pub fn rxcie1(&self) -> RXCIE1_R[src]
Bit 7 - RX Complete Interrupt Enable
impl R<bool, UCPOL1_A>[src]
pub fn variant(&self) -> UCPOL1_A[src]
Get enumerated values variant
pub fn is_rising_edge(&self) -> bool[src]
Checks if the value of the field is RISING_EDGE
pub fn is_falling_edge(&self) -> bool[src]
Checks if the value of the field is FALLING_EDGE
impl R<u8, UCSZ1_A>[src]
pub fn variant(&self) -> UCSZ1_A[src]
Get enumerated values variant
pub fn is_chr5(&self) -> bool[src]
Checks if the value of the field is CHR5
pub fn is_chr6(&self) -> bool[src]
Checks if the value of the field is CHR6
pub fn is_chr7(&self) -> bool[src]
Checks if the value of the field is CHR7
pub fn is_chr8(&self) -> bool[src]
Checks if the value of the field is CHR8
impl R<bool, USBS1_A>[src]
pub fn variant(&self) -> USBS1_A[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool[src]
Checks if the value of the field is STOP2
impl R<u8, UPM1_A>[src]
pub fn variant(&self) -> Variant<u8, UPM1_A>[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_parity_even(&self) -> bool[src]
Checks if the value of the field is PARITY_EVEN
pub fn is_parity_odd(&self) -> bool[src]
Checks if the value of the field is PARITY_ODD
impl R<u8, UMSEL1_A>[src]
pub fn variant(&self) -> Variant<u8, UMSEL1_A>[src]
Get enumerated values variant
pub fn is_usart_async(&self) -> bool[src]
Checks if the value of the field is USART_ASYNC
pub fn is_usart_sync(&self) -> bool[src]
Checks if the value of the field is USART_SYNC
pub fn is_spi_master(&self) -> bool[src]
Checks if the value of the field is SPI_MASTER
impl R<u8, Reg<u8, _UCSR1C>>[src]
pub fn ucpol1(&self) -> UCPOL1_R[src]
Bit 0 - Clock Polarity
pub fn ucsz1(&self) -> UCSZ1_R[src]
Bits 1:2 - Character Size
pub fn usbs1(&self) -> USBS1_R[src]
Bit 3 - Stop Bit Select
pub fn upm1(&self) -> UPM1_R[src]
Bits 4:5 - Parity Mode Bits
pub fn umsel1(&self) -> UMSEL1_R[src]
Bits 6:7 - USART Mode Select
impl R<u8, Reg<u8, _UCSR1D>>[src]
pub fn rtsen(&self) -> RTSEN_R[src]
Bit 0 - RTS Enable
pub fn ctsen(&self) -> CTSEN_R[src]
Bit 1 - CTS Enable
impl R<u8, Reg<u8, _UDADDR>>[src]
impl R<u8, Reg<u8, _UDCON>>[src]
pub fn detach(&self) -> DETACH_R[src]
Bit 0 -
pub fn rmwkup(&self) -> RMWKUP_R[src]
Bit 1 -
pub fn lsm(&self) -> LSM_R[src]
Bit 2 - USB low speed mode
pub fn rstcpu(&self) -> RSTCPU_R[src]
Bit 3 -
impl R<u8, Reg<u8, _UDIEN>>[src]
pub fn suspe(&self) -> SUSPE_R[src]
Bit 0 -
pub fn sofe(&self) -> SOFE_R[src]
Bit 2 -
pub fn eorste(&self) -> EORSTE_R[src]
Bit 3 -
pub fn wakeupe(&self) -> WAKEUPE_R[src]
Bit 4 -
pub fn eorsme(&self) -> EORSME_R[src]
Bit 5 -
pub fn uprsme(&self) -> UPRSME_R[src]
Bit 6 -
impl R<u8, Reg<u8, _UDINT>>[src]
pub fn suspi(&self) -> SUSPI_R[src]
Bit 0 -
pub fn sofi(&self) -> SOFI_R[src]
Bit 2 -
pub fn eorsti(&self) -> EORSTI_R[src]
Bit 3 -
pub fn wakeupi(&self) -> WAKEUPI_R[src]
Bit 4 -
pub fn eorsmi(&self) -> EORSMI_R[src]
Bit 5 -
pub fn uprsmi(&self) -> UPRSMI_R[src]
Bit 6 -
impl R<u8, Reg<u8, _UDMFN>>[src]
impl R<u8, Reg<u8, _UECFG0X>>[src]
impl R<u8, Reg<u8, _UECFG1X>>[src]
pub fn alloc(&self) -> ALLOC_R[src]
Bit 1 -
pub fn epbk(&self) -> EPBK_R[src]
Bits 2:3 -
pub fn epsize(&self) -> EPSIZE_R[src]
Bits 4:6 -
impl R<u8, Reg<u8, _UECONX>>[src]
pub fn epen(&self) -> EPEN_R[src]
Bit 0 -
pub fn rstdt(&self) -> RSTDT_R[src]
Bit 3 -
pub fn stallrqc(&self) -> STALLRQC_R[src]
Bit 4 -
pub fn stallrq(&self) -> STALLRQ_R[src]
Bit 5 -
impl R<u8, Reg<u8, _UEDATX>>[src]
impl R<u8, Reg<u8, _UEIENX>>[src]
pub fn txine(&self) -> TXINE_R[src]
Bit 0 -
pub fn stallede(&self) -> STALLEDE_R[src]
Bit 1 -
pub fn rxoute(&self) -> RXOUTE_R[src]
Bit 2 -
pub fn rxstpe(&self) -> RXSTPE_R[src]
Bit 3 -
pub fn nakoute(&self) -> NAKOUTE_R[src]
Bit 4 -
pub fn nakine(&self) -> NAKINE_R[src]
Bit 6 -
pub fn flerre(&self) -> FLERRE_R[src]
Bit 7 -
impl R<u8, Reg<u8, _UEINTX>>[src]
pub fn txini(&self) -> TXINI_R[src]
Bit 0 -
pub fn stalledi(&self) -> STALLEDI_R[src]
Bit 1 -
pub fn rxouti(&self) -> RXOUTI_R[src]
Bit 2 -
pub fn rxstpi(&self) -> RXSTPI_R[src]
Bit 3 -
pub fn nakouti(&self) -> NAKOUTI_R[src]
Bit 4 -
pub fn rwal(&self) -> RWAL_R[src]
Bit 5 -
pub fn nakini(&self) -> NAKINI_R[src]
Bit 6 -
pub fn fifocon(&self) -> FIFOCON_R[src]
Bit 7 -
impl R<u8, Reg<u8, _UERST>>[src]
impl R<u8, Reg<u8, _UESTA0X>>[src]
pub fn nbusybk(&self) -> NBUSYBK_R[src]
Bits 0:1 -
pub fn dtseq(&self) -> DTSEQ_R[src]
Bits 2:3 -
pub fn underfi(&self) -> UNDERFI_R[src]
Bit 5 -
pub fn overfi(&self) -> OVERFI_R[src]
Bit 6 -
pub fn cfgok(&self) -> CFGOK_R[src]
Bit 7 -
impl R<u8, Reg<u8, _UESTA1X>>[src]
impl R<u8, Reg<u8, _UHWCON>>[src]
impl R<u8, Reg<u8, _USBCON>>[src]
pub fn vbuste(&self) -> VBUSTE_R[src]
Bit 0 -
pub fn otgpade(&self) -> OTGPADE_R[src]
Bit 4 -
pub fn frzclk(&self) -> FRZCLK_R[src]
Bit 5 -
pub fn usbe(&self) -> USBE_R[src]
Bit 7 -
impl R<u8, Reg<u8, _USBINT>>[src]
impl R<u8, Reg<u8, _USBSTA>>[src]
impl R<u8, WDPL_A>[src]
pub fn variant(&self) -> WDPL_A[src]
Get enumerated values variant
pub fn is_cycles_2k_512k(&self) -> bool[src]
Checks if the value of the field is CYCLES_2K_512K
pub fn is_cycles_4k_1024k(&self) -> bool[src]
Checks if the value of the field is CYCLES_4K_1024K
pub fn is_cycles_8k(&self) -> bool[src]
Checks if the value of the field is CYCLES_8K
pub fn is_cycles_16k(&self) -> bool[src]
Checks if the value of the field is CYCLES_16K
pub fn is_cycles_32k(&self) -> bool[src]
Checks if the value of the field is CYCLES_32K
pub fn is_cycles_64k(&self) -> bool[src]
Checks if the value of the field is CYCLES_64K
pub fn is_cycles_128k(&self) -> bool[src]
Checks if the value of the field is CYCLES_128K
pub fn is_cycles_256k(&self) -> bool[src]
Checks if the value of the field is CYCLES_256K
impl R<u8, Reg<u8, _WDTCSR>>[src]
pub fn wde(&self) -> WDE_R[src]
Bit 3 - Watch Dog Enable
pub fn wdce(&self) -> WDCE_R[src]
Bit 4 - Watchdog Change Enable
pub fn wdie(&self) -> WDIE_R[src]
Bit 6 - Watchdog Timeout Interrupt Enable
pub fn wdif(&self) -> WDIF_R[src]
Bit 7 - Watchdog Timeout Interrupt Flag
pub fn wdpl(&self) -> WDPL_R[src]
Bits 0:2 - Watchdog Timer Prescaler - Low Bits
pub fn wdph(&self) -> WDPH_R[src]
Bit 5 - Watchdog Timer Prescaler - High Bit
impl R<u8, ACIS_A>[src]
pub fn variant(&self) -> ACIS_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _ACSR>>[src]
pub fn acis(&self) -> ACIS_R[src]
Bits 0:1 - Analog Comparator Interrupt Mode Select bits
pub fn acic(&self) -> ACIC_R[src]
Bit 2 - Analog Comparator Input Capture Enable
pub fn acie(&self) -> ACIE_R[src]
Bit 3 - Analog Comparator Interrupt Enable
pub fn aci(&self) -> ACI_R[src]
Bit 4 - Analog Comparator Interrupt Flag
pub fn aco(&self) -> ACO_R[src]
Bit 5 - Analog Compare Output
pub fn acbg(&self) -> ACBG_R[src]
Bit 6 - Analog Comparator Bandgap Select
pub fn acd(&self) -> ACD_R[src]
Bit 7 - Analog Comparator Disable
impl R<u8, Reg<u8, _SFIOR>>[src]
impl R<u8, ADPS_A>[src]
pub fn variant(&self) -> ADPS_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _ADCSRA>>[src]
pub fn adps(&self) -> ADPS_R[src]
Bits 0:2 - ADC Prescaler Select Bits
pub fn adie(&self) -> ADIE_R[src]
Bit 3 - ADC Interrupt Enable
pub fn adif(&self) -> ADIF_R[src]
Bit 4 - ADC Interrupt Flag
pub fn adfr(&self) -> ADFR_R[src]
Bit 5 - ADC Free Running Select
pub fn adsc(&self) -> ADSC_R[src]
Bit 6 - ADC Start Conversion
pub fn aden(&self) -> ADEN_R[src]
Bit 7 - ADC Enable
impl R<u8, REFS_A>[src]
pub fn variant(&self) -> REFS_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _ADMUX>>[src]
pub fn mux(&self) -> MUX_R[src]
Bits 0:3 - Analog Channel and Gain Selection Bits
pub fn adlar(&self) -> ADLAR_R[src]
Bit 5 - Left Adjust Result
pub fn refs(&self) -> REFS_R[src]
Bits 6:7 - Reference Selection Bits
impl R<u8, ISC0_A>[src]
pub fn variant(&self) -> ISC0_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC1_A>[src]
pub fn variant(&self) -> ISC1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, SM_A>[src]
pub fn variant(&self) -> SM_A[src]
Get enumerated values variant
pub fn is_idle(&self) -> bool[src]
Checks if the value of the field is IDLE
pub fn is_adc(&self) -> bool[src]
Checks if the value of the field is ADC
pub fn is_pdown(&self) -> bool[src]
Checks if the value of the field is PDOWN
pub fn is_psave(&self) -> bool[src]
Checks if the value of the field is PSAVE
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_stdby(&self) -> bool[src]
Checks if the value of the field is STDBY
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _MCUCR>>[src]
pub fn isc0(&self) -> ISC0_R[src]
Bits 0:1 - Interrupt Sense Control 0 Bits
pub fn isc1(&self) -> ISC1_R[src]
Bits 2:3 - Interrupt Sense Control 1 Bits
pub fn sm(&self) -> SM_R[src]
Bits 4:6 - Sleep Mode Select
pub fn se(&self) -> SE_R[src]
Bit 7 - Sleep Enable
impl R<u8, Reg<u8, _MCUCSR>>[src]
pub fn porf(&self) -> PORF_R[src]
Bit 0 - Power-on reset flag
pub fn extrf(&self) -> EXTRF_R[src]
Bit 1 - External Reset Flag
pub fn borf(&self) -> BORF_R[src]
Bit 2 - Brown-out Reset Flag
pub fn wdrf(&self) -> WDRF_R[src]
Bit 3 - Watchdog Reset Flag
impl R<u8, Reg<u8, _OSCCAL>>[src]
impl R<u8, Reg<u8, _SFIOR>>[src]
pub fn psr10(&self) -> PSR10_R[src]
Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0
pub fn pud(&self) -> PUD_R[src]
Bit 2 - Pull-up Disable
pub fn adhsm(&self) -> ADHSM_R[src]
Bit 4 - ADC High Speed Mode
impl R<u8, Reg<u8, _SPMCR>>[src]
pub fn spmen(&self) -> SPMEN_R[src]
Bit 0 - Store Program Memory Enable
pub fn pgers(&self) -> PGERS_R[src]
Bit 1 - Page Erase
pub fn pgwrt(&self) -> PGWRT_R[src]
Bit 2 - Page Write
pub fn blbset(&self) -> BLBSET_R[src]
Bit 3 - Boot Lock Bit Set
pub fn rwwsre(&self) -> RWWSRE_R[src]
Bit 4 - Read-While-Write Section Read Enable
pub fn rwwsb(&self) -> RWWSB_R[src]
Bit 6 - Read-While-Write Section Busy
pub fn spmie(&self) -> SPMIE_R[src]
Bit 7 - SPM Interrupt Enable
impl R<u8, Reg<u8, _EECR>>[src]
pub fn eere(&self) -> EERE_R[src]
Bit 0 - EEPROM Read Enable
pub fn eewe(&self) -> EEWE_R[src]
Bit 1 - EEPROM Write Enable
pub fn eemwe(&self) -> EEMWE_R[src]
Bit 2 - EEPROM Master Write Enable
pub fn eerie(&self) -> EERIE_R[src]
Bit 3 - EEPROM Ready Interrupt Enable
impl R<u8, Reg<u8, _GICR>>[src]
pub fn ivce(&self) -> IVCE_R[src]
Bit 0 - Interrupt Vector Change Enable
pub fn ivsel(&self) -> IVSEL_R[src]
Bit 1 - Interrupt Vector Select
pub fn int(&self) -> INT_R[src]
Bits 6:7 - External Interrupt Request 1 Enable
impl R<u8, Reg<u8, _GIFR>>[src]
impl R<u8, ISC0_A>[src]
pub fn variant(&self) -> ISC0_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC1_A>[src]
pub fn variant(&self) -> ISC1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _MCUCR>>[src]
pub fn isc0(&self) -> ISC0_R[src]
Bits 0:1 - Interrupt Sense Control 0 Bits
pub fn isc1(&self) -> ISC1_R[src]
Bits 2:3 - Interrupt Sense Control 1 Bits
impl R<u8, BOOTSZ_A>[src]
pub fn variant(&self) -> BOOTSZ_A[src]
Get enumerated values variant
pub fn is_1024w_0c00(&self) -> bool[src]
Checks if the value of the field is _1024W_0C00
pub fn is_512w_0e00(&self) -> bool[src]
Checks if the value of the field is _512W_0E00
pub fn is_256w_0f00(&self) -> bool[src]
Checks if the value of the field is _256W_0F00
pub fn is_128w_0f80(&self) -> bool[src]
Checks if the value of the field is _128W_0F80
impl R<u8, Reg<u8, _HIGH>>[src]
pub fn bootrst(&self) -> BOOTRST_R[src]
Bit 0 - Boot Reset vector Enabled
pub fn bootsz(&self) -> BOOTSZ_R[src]
Bits 1:2 - Select Boot Size
pub fn eesave(&self) -> EESAVE_R[src]
Bit 3 - Preserve EEPROM through the Chip Erase cycle
pub fn ckopt(&self) -> CKOPT_R[src]
Bit 4 - CKOPT fuse (operation dependent of CKSEL fuses)
pub fn spien(&self) -> SPIEN_R[src]
Bit 5 - Serial program downloading (SPI) enabled
pub fn wdton(&self) -> WDTON_R[src]
Bit 6 - Watch-dog Timer always on
pub fn rstdisbl(&self) -> RSTDISBL_R[src]
Bit 7 - Reset Disabled (Enable PC6 as i/o pin)
impl R<u8, SUT_CKSEL_A>[src]
pub fn variant(&self) -> Variant<u8, SUT_CKSEL_A>[src]
Get enumerated values variant
pub fn is_extclk_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_0MS
pub fn is_intrcosc_1mhz_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_1MHZ_6CK_0MS
pub fn is_intrcosc_2mhz_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_2MHZ_6CK_0MS
pub fn is_intrcosc_4mhz_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_4MHZ_6CK_0MS
pub fn is_intrcosc_8mhz_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_0MS
pub fn is_extrcosc_xx_0mhz9_18ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_XX_0MHZ9_18CK_0MS
pub fn is_extrcosc_0mhz9_3mhz_18ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_0MHZ9_3MHZ_18CK_0MS
pub fn is_extrcosc_3mhz_8mhz_18ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_3MHZ_8MHZ_18CK_0MS
pub fn is_extrcosc_8mhz_12mhz_18ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_8MHZ_12MHZ_18CK_0MS
pub fn is_extlofxtal_1kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_4MS
pub fn is_extlofxtalres_258ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_258CK_4MS
pub fn is_extlofxtalres_1kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_1KCK_64MS
pub fn is_extmedfxtalres_258ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_258CK_4MS
pub fn is_extmedfxtalres_1kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_1KCK_64MS
pub fn is_exthifxtalres_258ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_258CK_4MS
pub fn is_exthifxtalres_1kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_1KCK_64MS
pub fn is_extclk_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_4MS
pub fn is_intrcosc_1mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_1MHZ_6CK_4MS
pub fn is_intrcosc_2mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_2MHZ_6CK_4MS
pub fn is_intrcosc_4mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_4MHZ_6CK_4MS
pub fn is_intrcosc_8mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_4MS
pub fn is_extrcosc_xx_0mhz9_18ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_XX_0MHZ9_18CK_4MS
pub fn is_extrcosc_0mhz9_3mhz_18ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_0MHZ9_3MHZ_18CK_4MS
pub fn is_extrcosc_3mhz_8mhz_18ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_3MHZ_8MHZ_18CK_4MS
pub fn is_extrcosc_8mhz_12mhz_18ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_8MHZ_12MHZ_18CK_4MS
pub fn is_extlofxtal_1kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_64MS
pub fn is_extlofxtalres_258ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_258CK_64MS
pub fn is_extlofxtalres_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_16KCK_0MS
pub fn is_extmedfxtalres_258ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_258CK_64MS
pub fn is_extmedfxtalres_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_16KCK_0MS
pub fn is_exthifxtalres_258ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_258CK_64MS
pub fn is_exthifxtalres_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_16KCK_0MS
pub fn is_extclk_6ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_64MS
pub fn is_intrcosc_1mhz_6ck_64ms_default(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_1MHZ_6CK_64MS_DEFAULT
pub fn is_intrcosc_2mhz_6ck_64ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_2MHZ_6CK_64MS
pub fn is_intrcosc_4mhz_6ck_64ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_4MHZ_6CK_64MS
pub fn is_intrcosc_8mhz_6ck_64ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_64MS
pub fn is_extrcosc_xx_0mhz9_18ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_XX_0MHZ9_18CK_64MS
pub fn is_extrcosc_0mhz9_3mhz_18ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_0MHZ9_3MHZ_18CK_64MS
pub fn is_extrcosc_3mhz_8mhz_18ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_3MHZ_8MHZ_18CK_64MS
pub fn is_extrcosc_8mhz_12mhz_18ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_8MHZ_12MHZ_18CK_64MS
pub fn is_extlofxtal_32kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_64MS
pub fn is_extlofxtalres_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_1KCK_0MS
pub fn is_extlofxtalres_16kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_16KCK_4MS
pub fn is_extmedfxtalres_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_1KCK_0MS
pub fn is_extmedfxtalres_16kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_16KCK_4MS
pub fn is_exthifxtalres_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_1KCK_0MS
pub fn is_exthifxtalres_16kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_16KCK_4MS
pub fn is_extrcosc_xx_0mhz9_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_XX_0MHZ9_6CK_4MS
pub fn is_extrcosc_0mhz9_3mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_0MHZ9_3MHZ_6CK_4MS
pub fn is_extrcosc_3mhz_8mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_3MHZ_8MHZ_6CK_4MS
pub fn is_extrcosc_8mhz_12mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_8MHZ_12MHZ_6CK_4MS
pub fn is_extlofxtalres_1kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_1KCK_4MS
pub fn is_extlofxtalres_16kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_16KCK_64MS
pub fn is_extmedfxtalres_1kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_1KCK_4MS
pub fn is_extmedfxtalres_16kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_16KCK_64MS
pub fn is_exthifxtalres_1kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_1KCK_4MS
pub fn is_exthifxtalres_16kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_16KCK_64MS
impl R<bool, BODLEVEL_A>[src]
pub fn variant(&self) -> BODLEVEL_A[src]
Get enumerated values variant
pub fn is_4v0(&self) -> bool[src]
Checks if the value of the field is _4V0
pub fn is_2v7(&self) -> bool[src]
Checks if the value of the field is _2V7
impl R<u8, Reg<u8, _LOW>>[src]
pub fn sut_cksel(&self) -> SUT_CKSEL_R[src]
Bits 0:5 - Select Clock Source
pub fn boden(&self) -> BODEN_R[src]
Bit 6 - Brown-out detection enabled
pub fn bodlevel(&self) -> BODLEVEL_R[src]
Bit 7 - Brownout detector trigger level
impl R<u8, LB_A>[src]
pub fn variant(&self) -> Variant<u8, LB_A>[src]
Get enumerated values variant
pub fn is_prog_ver_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_VER_DISABLED
pub fn is_prog_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_DISABLED
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, BLB0_A>[src]
pub fn variant(&self) -> BLB0_A[src]
Get enumerated values variant
pub fn is_lpm_spm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_SPM_DISABLE
pub fn is_lpm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_DISABLE
pub fn is_spm_disable(&self) -> bool[src]
Checks if the value of the field is SPM_DISABLE
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, BLB1_A>[src]
pub fn variant(&self) -> BLB1_A[src]
Get enumerated values variant
pub fn is_lpm_spm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_SPM_DISABLE
pub fn is_lpm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_DISABLE
pub fn is_spm_disable(&self) -> bool[src]
Checks if the value of the field is SPM_DISABLE
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, Reg<u8, _LOCKBIT>>[src]
pub fn lb(&self) -> LB_R[src]
Bits 0:1 - Memory Lock
pub fn blb0(&self) -> BLB0_R[src]
Bits 2:3 - Boot Loader Protection Mode
pub fn blb1(&self) -> BLB1_R[src]
Bits 4:5 - Boot Loader Protection Mode
impl R<u8, Reg<u8, _DDRB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _PINB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _PORTB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _DDRC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
impl R<u8, Reg<u8, _PINC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
impl R<u8, Reg<u8, _PORTC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
impl R<u8, Reg<u8, _DDRD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _PIND>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _PORTD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, SPR_A>[src]
pub fn variant(&self) -> Variant<u8, SPR_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _SPCR>>[src]
pub fn spr(&self) -> SPR_R[src]
Bits 0:1 - SPI Clock Rate Selects
pub fn cpha(&self) -> CPHA_R[src]
Bit 2 - Clock Phase
pub fn cpol(&self) -> CPOL_R[src]
Bit 3 - Clock polarity
pub fn mstr(&self) -> MSTR_R[src]
Bit 4 - Master/Slave Select
pub fn dord(&self) -> DORD_R[src]
Bit 5 - Data Order
pub fn spe(&self) -> SPE_R[src]
Bit 6 - SPI Enable
pub fn spie(&self) -> SPIE_R[src]
Bit 7 - SPI Interrupt Enable
impl R<u8, Reg<u8, _SPSR>>[src]
pub fn spi2x(&self) -> SPI2X_R[src]
Bit 0 - Double SPI Speed Bit
pub fn wcol(&self) -> WCOL_R[src]
Bit 6 - Write Collision Flag
pub fn spif(&self) -> SPIF_R[src]
Bit 7 - SPI Interrupt Flag
impl R<bool, CS00_A>[src]
pub fn variant(&self) -> Variant<bool, CS00_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR0>>[src]
pub fn cs00(&self) -> CS00_R[src]
Bit 0 - Clock Select0 bit 0
pub fn cs01(&self) -> CS01_R[src]
Bit 1 - Clock Select0 bit 1
pub fn cs02(&self) -> CS02_R[src]
Bit 2 - Clock Select0 bit 2
impl R<u8, Reg<u8, _TIFR>>[src]
impl R<u8, Reg<u8, _TIMSK>>[src]
impl R<u8, Reg<u8, _TCCR1A>>[src]
pub fn wgm1(&self) -> WGM1_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn foc1b(&self) -> FOC1B_R[src]
Bit 2 - Force Output Compare 1B
pub fn foc1a(&self) -> FOC1A_R[src]
Bit 3 - Force Output Compare 1A
pub fn com1b(&self) -> COM1B_R[src]
Bits 4:5 - Compare Output Mode 1B, bits
pub fn com1a(&self) -> COM1A_R[src]
Bits 6:7 - Compare Output Mode 1A, bits
impl R<u8, CS1_A>[src]
pub fn variant(&self) -> CS1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR1B>>[src]
pub fn cs1(&self) -> CS1_R[src]
Bits 0:2 - Prescaler source of Timer/Counter 1
pub fn wgm1(&self) -> WGM1_R[src]
Bits 3:4 - Waveform Generation Mode
pub fn ices1(&self) -> ICES1_R[src]
Bit 6 - Input Capture 1 Edge Select
pub fn icnc1(&self) -> ICNC1_R[src]
Bit 7 - Input Capture 1 Noise Canceler
impl R<u8, Reg<u8, _TIFR>>[src]
pub fn tov1(&self) -> TOV1_R[src]
Bit 2 - Timer/Counter1 Overflow Flag
pub fn ocf1b(&self) -> OCF1B_R[src]
Bit 3 - Output Compare Flag 1B
pub fn ocf1a(&self) -> OCF1A_R[src]
Bit 4 - Output Compare Flag 1A
pub fn icf1(&self) -> ICF1_R[src]
Bit 5 - Input Capture Flag 1
impl R<u8, Reg<u8, _TIMSK>>[src]
pub fn toie1(&self) -> TOIE1_R[src]
Bit 2 - Timer/Counter1 Overflow Interrupt Enable
pub fn ocie1b(&self) -> OCIE1B_R[src]
Bit 3 - Timer/Counter1 Output CompareB Match Interrupt Enable
pub fn ocie1a(&self) -> OCIE1A_R[src]
Bit 4 - Timer/Counter1 Output CompareA Match Interrupt Enable
pub fn ticie1(&self) -> TICIE1_R[src]
Bit 5 - Timer/Counter1 Input Capture Interrupt Enable
impl R<u8, Reg<u8, _ASSR>>[src]
pub fn tcr2ub(&self) -> TCR2UB_R[src]
Bit 0 - Timer/counter Control Register2 Update Busy
pub fn ocr2ub(&self) -> OCR2UB_R[src]
Bit 1 - Output Compare Register2 Update Busy
pub fn tcn2ub(&self) -> TCN2UB_R[src]
Bit 2 - Timer/Counter2 Update Busy
pub fn as2(&self) -> AS2_R[src]
Bit 3 - Asynchronous Timer/counter2
impl R<u8, Reg<u8, _SFIOR>>[src]
impl R<u8, CS2_A>[src]
pub fn variant(&self) -> CS2_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<bool, WGM20_A>[src]
pub fn variant(&self) -> Variant<bool, WGM20_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _TCCR2>>[src]
pub fn cs2(&self) -> CS2_R[src]
Bits 0:2 - Clock Select bits
pub fn wgm21(&self) -> WGM21_R[src]
Bit 3 - Waveform Generation Mode
pub fn com2(&self) -> COM2_R[src]
Bits 4:5 - Compare Output Mode bits
pub fn wgm20(&self) -> WGM20_R[src]
Bit 6 - Waveform Genration Mode
pub fn foc2(&self) -> FOC2_R[src]
Bit 7 - Force Output Compare
impl R<u8, Reg<u8, _TIFR>>[src]
pub fn tov2(&self) -> TOV2_R[src]
Bit 6 - Timer/Counter2 Overflow Flag
pub fn ocf2(&self) -> OCF2_R[src]
Bit 7 - Output Compare Flag 2
impl R<u8, Reg<u8, _TIMSK>>[src]
pub fn toie2(&self) -> TOIE2_R[src]
Bit 6 - Timer/Counter2 Overflow Interrupt Enable
pub fn ocie2(&self) -> OCIE2_R[src]
Bit 7 - Timer/Counter2 Output Compare Match Interrupt Enable
impl R<u8, Reg<u8, _TWAR>>[src]
pub fn twgce(&self) -> TWGCE_R[src]
Bit 0 - TWI General Call Recognition Enable Bit
pub fn twa(&self) -> TWA_R[src]
Bits 1:7 - TWI (Slave) Address register Bits
impl R<u8, Reg<u8, _TWCR>>[src]
pub fn twie(&self) -> TWIE_R[src]
Bit 0 - TWI Interrupt Enable
pub fn twen(&self) -> TWEN_R[src]
Bit 2 - TWI Enable Bit
pub fn twwc(&self) -> TWWC_R[src]
Bit 3 - TWI Write Collition Flag
pub fn twsto(&self) -> TWSTO_R[src]
Bit 4 - TWI Stop Condition Bit
pub fn twsta(&self) -> TWSTA_R[src]
Bit 5 - TWI Start Condition Bit
pub fn twea(&self) -> TWEA_R[src]
Bit 6 - TWI Enable Acknowledge Bit
pub fn twint(&self) -> TWINT_R[src]
Bit 7 - TWI Interrupt Flag
impl R<u8, TWPS_A>[src]
pub fn variant(&self) -> TWPS_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _TWSR>>[src]
pub fn twps(&self) -> TWPS_R[src]
Bits 0:1 - TWI Prescaler
pub fn tws(&self) -> TWS_R[src]
Bits 3:7 - TWI Status
impl R<u8, Reg<u8, _UCSRA>>[src]
pub fn mpcm(&self) -> MPCM_R[src]
Bit 0 - Multi-processor Communication Mode
pub fn u2x(&self) -> U2X_R[src]
Bit 1 - Double the USART transmission speed
pub fn upe(&self) -> UPE_R[src]
Bit 2 - Parity Error
pub fn dor(&self) -> DOR_R[src]
Bit 3 - Data overRun
pub fn fe(&self) -> FE_R[src]
Bit 4 - Framing Error
pub fn udre(&self) -> UDRE_R[src]
Bit 5 - USART Data Register Empty
pub fn txc(&self) -> TXC_R[src]
Bit 6 - USART Transmitt Complete
pub fn rxc(&self) -> RXC_R[src]
Bit 7 - USART Receive Complete
impl R<u8, Reg<u8, _UCSRB>>[src]
pub fn txb8(&self) -> TXB8_R[src]
Bit 0 - Transmit Data Bit 8
pub fn rxb8(&self) -> RXB8_R[src]
Bit 1 - Receive Data Bit 8
pub fn ucsz2(&self) -> UCSZ2_R[src]
Bit 2 - Character Size
pub fn txen(&self) -> TXEN_R[src]
Bit 3 - Transmitter Enable
pub fn rxen(&self) -> RXEN_R[src]
Bit 4 - Receiver Enable
pub fn udrie(&self) -> UDRIE_R[src]
Bit 5 - USART Data register Empty Interrupt Enable
pub fn txcie(&self) -> TXCIE_R[src]
Bit 6 - TX Complete Interrupt Enable
pub fn rxcie(&self) -> RXCIE_R[src]
Bit 7 - RX Complete Interrupt Enable
impl R<bool, USBS_A>[src]
pub fn variant(&self) -> USBS_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
impl R<u8, UPM_A>[src]
pub fn variant(&self) -> UPM_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<bool, UMSEL_A>[src]
pub fn variant(&self) -> UMSEL_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
impl R<u8, Reg<u8, _UCSRC>>[src]
pub fn ucpol(&self) -> UCPOL_R[src]
Bit 0 - Clock Polarity
pub fn ucsz(&self) -> UCSZ_R[src]
Bits 1:2 - Character Size
pub fn usbs(&self) -> USBS_R[src]
Bit 3 - Stop Bit Select
pub fn upm(&self) -> UPM_R[src]
Bits 4:5 - Parity Mode Bits
pub fn umsel(&self) -> UMSEL_R[src]
Bit 6 - USART Mode Select
pub fn ursel(&self) -> URSEL_R[src]
Bit 7 - Register Select
impl R<u8, WDP_A>[src]
pub fn variant(&self) -> WDP_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _WDTCR>>[src]
pub fn wdp(&self) -> WDP_R[src]
Bits 0:2 - Watch Dog Timer Prescaler bits
pub fn wde(&self) -> WDE_R[src]
Bit 3 - Watch Dog Enable
pub fn wdce(&self) -> WDCE_R[src]
Bit 4 - Watchdog Change Enable
impl R<u8, ACIS_A>[src]
pub fn variant(&self) -> Variant<u8, ACIS_A>[src]
Get enumerated values variant
pub fn is_on_toggle(&self) -> bool[src]
Checks if the value of the field is ON_TOGGLE
pub fn is_on_falling_edge(&self) -> bool[src]
Checks if the value of the field is ON_FALLING_EDGE
pub fn is_on_rising_edge(&self) -> bool[src]
Checks if the value of the field is ON_RISING_EDGE
impl R<u8, Reg<u8, _ACSR>>[src]
pub fn acis(&self) -> ACIS_R[src]
Bits 0:1 - Analog Comparator Interrupt Mode Select
pub fn acic(&self) -> ACIC_R[src]
Bit 2 - Analog Comparator Input Capture Enable
pub fn acie(&self) -> ACIE_R[src]
Bit 3 - Analog Comparator Interrupt Enable
pub fn aci(&self) -> ACI_R[src]
Bit 4 - Analog Comparator Interrupt Flag
pub fn aco(&self) -> ACO_R[src]
Bit 5 - Analog Compare Output
pub fn acbg(&self) -> ACBG_R[src]
Bit 6 - Analog Comparator Bandgap Select
pub fn acd(&self) -> ACD_R[src]
Bit 7 - Analog Comparator Disable
impl R<u8, Reg<u8, _SFIOR>>[src]
impl R<u8, ADPS_A>[src]
pub fn variant(&self) -> Variant<u8, ADPS_A>[src]
Get enumerated values variant
pub fn is_prescaler_2(&self) -> bool[src]
Checks if the value of the field is PRESCALER_2
pub fn is_prescaler_4(&self) -> bool[src]
Checks if the value of the field is PRESCALER_4
pub fn is_prescaler_8(&self) -> bool[src]
Checks if the value of the field is PRESCALER_8
pub fn is_prescaler_16(&self) -> bool[src]
Checks if the value of the field is PRESCALER_16
pub fn is_prescaler_32(&self) -> bool[src]
Checks if the value of the field is PRESCALER_32
pub fn is_prescaler_64(&self) -> bool[src]
Checks if the value of the field is PRESCALER_64
pub fn is_prescaler_128(&self) -> bool[src]
Checks if the value of the field is PRESCALER_128
impl R<u8, Reg<u8, _ADCSRA>>[src]
pub fn adps(&self) -> ADPS_R[src]
Bits 0:2 - ADC Prescaler Select Bits
pub fn adie(&self) -> ADIE_R[src]
Bit 3 - ADC Interrupt Enable
pub fn adif(&self) -> ADIF_R[src]
Bit 4 - ADC Interrupt Flag
pub fn adate(&self) -> ADATE_R[src]
Bit 5 - ADC Auto Trigger Enable
pub fn adsc(&self) -> ADSC_R[src]
Bit 6 - ADC Start Conversion
pub fn aden(&self) -> ADEN_R[src]
Bit 7 - ADC Enable
impl R<u8, ADTS_A>[src]
pub fn variant(&self) -> ADTS_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _ADCSRB>>[src]
impl R<u8, REFS_A>[src]
pub fn variant(&self) -> Variant<u8, REFS_A>[src]
Get enumerated values variant
pub fn is_aref(&self) -> bool[src]
Checks if the value of the field is AREF
pub fn is_avcc(&self) -> bool[src]
Checks if the value of the field is AVCC
pub fn is_internal(&self) -> bool[src]
Checks if the value of the field is INTERNAL
impl R<u8, Reg<u8, _ADMUX>>[src]
pub fn mux(&self) -> MUX_R[src]
Bits 0:4 - Analog Channel and Gain Selection Bits
pub fn adlar(&self) -> ADLAR_R[src]
Bit 5 - Left Adjust Result
pub fn refs(&self) -> REFS_R[src]
Bits 6:7 - Reference Selection Bits
impl R<u8, Reg<u8, _SPMCSR>>[src]
pub fn spmen(&self) -> SPMEN_R[src]
Bit 0 - Store Program Memory Enable
pub fn pgers(&self) -> PGERS_R[src]
Bit 1 - Page Erase
pub fn pgwrt(&self) -> PGWRT_R[src]
Bit 2 - Page Write
pub fn blbset(&self) -> BLBSET_R[src]
Bit 3 - Boot Lock Bit Set
pub fn rwwsre(&self) -> RWWSRE_R[src]
Bit 4 - Read While Write section read enable
pub fn rwwsb(&self) -> RWWSB_R[src]
Bit 6 - Read While Write Section Busy
pub fn spmie(&self) -> SPMIE_R[src]
Bit 7 - SPM Interrupt Enable
impl R<bool, SM2_A>[src]
pub fn variant(&self) -> Variant<bool, SM2_A>[src]
Get enumerated values variant
pub fn is_idle(&self) -> bool[src]
Checks if the value of the field is IDLE
pub fn is_adc(&self) -> bool[src]
Checks if the value of the field is ADC
pub fn is_pdown(&self) -> bool[src]
Checks if the value of the field is PDOWN
pub fn is_stdby(&self) -> bool[src]
Checks if the value of the field is STDBY
pub fn is_psave(&self) -> bool[src]
Checks if the value of the field is PSAVE
pub fn is_estdby(&self) -> bool[src]
Checks if the value of the field is ESTDBY
impl R<u8, Reg<u8, _MCUCR>>[src]
pub fn ivce(&self) -> IVCE_R[src]
Bit 0 - Interrupt Vector Change Enable
pub fn ivsel(&self) -> IVSEL_R[src]
Bit 1 - Interrupt Vector Select
pub fn sm2(&self) -> SM2_R[src]
Bit 2 - Sleep Mode Select
pub fn sm(&self) -> SM_R[src]
Bits 3:4 - Sleep Mode Select
pub fn se(&self) -> SE_R[src]
Bit 5 - Sleep Enable
pub fn srw10(&self) -> SRW10_R[src]
Bit 6 - External SRAM Wait State Select
pub fn sre(&self) -> SRE_R[src]
Bit 7 - External SRAM Enable
impl R<u8, Reg<u8, _MCUCSR>>[src]
pub fn porf(&self) -> PORF_R[src]
Bit 0 - Power-on reset flag
pub fn extrf(&self) -> EXTRF_R[src]
Bit 1 - External Reset Flag
pub fn borf(&self) -> BORF_R[src]
Bit 2 - Brown-out Reset Flag
pub fn wdrf(&self) -> WDRF_R[src]
Bit 3 - Watchdog Reset Flag
pub fn jtrf(&self) -> JTRF_R[src]
Bit 4 - JTAG Reset Flag
pub fn jtd(&self) -> JTD_R[src]
Bit 7 - JTAG Interface Disable
impl R<u8, Reg<u8, _OSCCAL>>[src]
impl R<u8, Reg<u8, _XDIV>>[src]
pub fn xdiv(&self) -> XDIV_R[src]
Bits 0:6 - XTAl Divide Select Bits
pub fn xdiven(&self) -> XDIVEN_R[src]
Bit 7 - XTAL Divide Enable
impl R<u8, SRW0_A>[src]
pub fn variant(&self) -> SRW0_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, SRL_A>[src]
pub fn variant(&self) -> SRL_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _XMCRA>>[src]
pub fn srw11(&self) -> SRW11_R[src]
Bit 1 - Wait state select bit upper page
pub fn srw0(&self) -> SRW0_R[src]
Bits 2:3 - Wait state select bit lower page
pub fn srl(&self) -> SRL_R[src]
Bits 4:6 - Wait state page limit
impl R<u8, Reg<u8, _XMCRB>>[src]
pub fn xmm(&self) -> XMM_R[src]
Bits 0:2 - External Memory High Mask
pub fn xmbk(&self) -> XMBK_R[src]
Bit 7 - External Memory Bus Keeper Enable
impl R<u8, Reg<u8, _EECR>>[src]
pub fn eere(&self) -> EERE_R[src]
Bit 0 - EEPROM Read Enable
pub fn eewe(&self) -> EEWE_R[src]
Bit 1 - EEPROM Write Enable
pub fn eemwe(&self) -> EEMWE_R[src]
Bit 2 - EEPROM Master Write Enable
pub fn eerie(&self) -> EERIE_R[src]
Bit 3 - EEPROM Ready Interrupt Enable
impl R<u8, ISC0_A>[src]
pub fn variant(&self) -> ISC0_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC1_A>[src]
pub fn variant(&self) -> ISC1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC2_A>[src]
pub fn variant(&self) -> ISC2_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC3_A>[src]
pub fn variant(&self) -> ISC3_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _EICRA>>[src]
pub fn isc0(&self) -> ISC0_R[src]
Bits 0:1 - External Interrupt Sense Control Bit
pub fn isc1(&self) -> ISC1_R[src]
Bits 2:3 - External Interrupt Sense Control Bit
pub fn isc2(&self) -> ISC2_R[src]
Bits 4:5 - External Interrupt Sense Control Bit
pub fn isc3(&self) -> ISC3_R[src]
Bits 6:7 - External Interrupt Sense Control Bit
impl R<u8, ISC4_A>[src]
pub fn variant(&self) -> ISC4_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC5_A>[src]
pub fn variant(&self) -> ISC5_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC6_A>[src]
pub fn variant(&self) -> ISC6_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, ISC7_A>[src]
pub fn variant(&self) -> ISC7_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _EICRB>>[src]
pub fn isc4(&self) -> ISC4_R[src]
Bits 0:1 - External Interrupt 7-4 Sense Control Bit
pub fn isc5(&self) -> ISC5_R[src]
Bits 2:3 - External Interrupt 7-4 Sense Control Bit
pub fn isc6(&self) -> ISC6_R[src]
Bits 4:5 - External Interrupt 7-4 Sense Control Bit
pub fn isc7(&self) -> ISC7_R[src]
Bits 6:7 - External Interrupt 7-4 Sense Control Bit
impl R<u8, Reg<u8, _EIFR>>[src]
impl R<u8, Reg<u8, _EIMSK>>[src]
impl R<u8, Reg<u8, _EXTENDED>>[src]
pub fn wdton(&self) -> WDTON_R[src]
Bit 0 - Watchdog Timer always on
pub fn m103c(&self) -> M103C_R[src]
Bit 1 - ATmega103 Compatibility Mode
impl R<u8, BOOTSZ_A>[src]
pub fn variant(&self) -> BOOTSZ_A[src]
Get enumerated values variant
pub fn is_4096w_7000(&self) -> bool[src]
Checks if the value of the field is _4096W_7000
pub fn is_2048w_7800(&self) -> bool[src]
Checks if the value of the field is _2048W_7800
pub fn is_1024w_7c00(&self) -> bool[src]
Checks if the value of the field is _1024W_7C00
pub fn is_512w_7e00(&self) -> bool[src]
Checks if the value of the field is _512W_7E00
impl R<u8, Reg<u8, _HIGH>>[src]
pub fn bootrst(&self) -> BOOTRST_R[src]
Bit 0 - Boot Reset vector Enabled
pub fn bootsz(&self) -> BOOTSZ_R[src]
Bits 1:2 - Select Boot Size
pub fn eesave(&self) -> EESAVE_R[src]
Bit 3 - Preserve EEPROM through the Chip Erase cycle
pub fn ckopt(&self) -> CKOPT_R[src]
Bit 4 - CKOPT fuse (operation dependent of CKSEL fuses)
pub fn spien(&self) -> SPIEN_R[src]
Bit 5 - Serial program downloading (SPI) enabled
pub fn jtagen(&self) -> JTAGEN_R[src]
Bit 6 - JTAG Interface Enabled
pub fn ocden(&self) -> OCDEN_R[src]
Bit 7 - On-Chip Debug Enabled
impl R<u8, SUT_CKSEL_A>[src]
pub fn variant(&self) -> Variant<u8, SUT_CKSEL_A>[src]
Get enumerated values variant
pub fn is_extclk_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_0MS
pub fn is_intrcosc_1mhz_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_1MHZ_6CK_0MS
pub fn is_intrcosc_2mhz_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_2MHZ_6CK_0MS
pub fn is_intrcosc_4mhz_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_4MHZ_6CK_0MS
pub fn is_intrcosc_8mhz_6ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_0MS
pub fn is_extrcosc_xx_0mhz9_18ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_XX_0MHZ9_18CK_0MS
pub fn is_extrcosc_0mhz9_3mhz_18ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_0MHZ9_3MHZ_18CK_0MS
pub fn is_extrcosc_3mhz_8mhz_18ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_3MHZ_8MHZ_18CK_0MS
pub fn is_extrcosc_8mhz_12mhz_18ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_8MHZ_12MHZ_18CK_0MS
pub fn is_extlofxtal_1kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_4MS
pub fn is_extlofxtalres_258ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_258CK_4MS
pub fn is_extlofxtalres_1kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_1KCK_64MS
pub fn is_extmedfxtalres_258ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_258CK_4MS
pub fn is_extmedfxtalres_1kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_1KCK_64MS
pub fn is_exthifxtalres_258ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_258CK_4MS
pub fn is_exthifxtalres_1kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_1KCK_64MS
pub fn is_extclk_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_4MS
pub fn is_intrcosc_1mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_1MHZ_6CK_4MS
pub fn is_intrcosc_2mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_2MHZ_6CK_4MS
pub fn is_intrcosc_4mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_4MHZ_6CK_4MS
pub fn is_intrcosc_8mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_4MS
pub fn is_extrcosc_xx_0mhz9_18ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_XX_0MHZ9_18CK_4MS
pub fn is_extrcosc_0mhz9_3mhz_18ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_0MHZ9_3MHZ_18CK_4MS
pub fn is_extrcosc_3mhz_8mhz_18ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_3MHZ_8MHZ_18CK_4MS
pub fn is_extrcosc_8mhz_12mhz_18ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_8MHZ_12MHZ_18CK_4MS
pub fn is_extlofxtal_1kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_64MS
pub fn is_extlofxtalres_258ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_258CK_64MS
pub fn is_extlofxtalres_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_16KCK_0MS
pub fn is_extmedfxtalres_258ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_258CK_64MS
pub fn is_extmedfxtalres_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_16KCK_0MS
pub fn is_exthifxtalres_258ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_258CK_64MS
pub fn is_exthifxtalres_16kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_16KCK_0MS
pub fn is_extclk_6ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_64MS
pub fn is_intrcosc_1mhz_6ck_64ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_1MHZ_6CK_64MS
pub fn is_intrcosc_2mhz_6ck_64ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_2MHZ_6CK_64MS
pub fn is_intrcosc_4mhz_6ck_64ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_4MHZ_6CK_64MS
pub fn is_intrcosc_8mhz_6ck_64ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_64MS
pub fn is_extrcosc_xx_0mhz9_18ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_XX_0MHZ9_18CK_64MS
pub fn is_extrcosc_0mhz9_3mhz_18ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_0MHZ9_3MHZ_18CK_64MS
pub fn is_extrcosc_3mhz_8mhz_18ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_3MHZ_8MHZ_18CK_64MS
pub fn is_extrcosc_8mhz_12mhz_18ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_8MHZ_12MHZ_18CK_64MS
pub fn is_extlofxtal_32kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_64MS
pub fn is_extlofxtalres_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_1KCK_0MS
pub fn is_extlofxtalres_16kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_16KCK_4MS
pub fn is_extmedfxtalres_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_1KCK_0MS
pub fn is_extmedfxtalres_16kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_16KCK_4MS
pub fn is_exthifxtalres_1kck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_1KCK_0MS
pub fn is_exthifxtalres_16kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_16KCK_4MS
pub fn is_extrcosc_xx_0mhz9_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_XX_0MHZ9_6CK_4MS
pub fn is_extrcosc_0mhz9_3mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_0MHZ9_3MHZ_6CK_4MS
pub fn is_extrcosc_3mhz_8mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_3MHZ_8MHZ_6CK_4MS
pub fn is_extrcosc_8mhz_12mhz_6ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTRCOSC_8MHZ_12MHZ_6CK_4MS
pub fn is_extlofxtalres_1kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_1KCK_4MS
pub fn is_extlofxtalres_16kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTALRES_16KCK_64MS
pub fn is_extmedfxtalres_1kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_1KCK_4MS
pub fn is_extmedfxtalres_16kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTMEDFXTALRES_16KCK_64MS
pub fn is_exthifxtalres_1kck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_1KCK_4MS
pub fn is_exthifxtalres_16kck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTHIFXTALRES_16KCK_64MS
impl R<bool, BODLEVEL_A>[src]
pub fn variant(&self) -> BODLEVEL_A[src]
Get enumerated values variant
pub fn is_4v0(&self) -> bool[src]
Checks if the value of the field is _4V0
pub fn is_2v7(&self) -> bool[src]
Checks if the value of the field is _2V7
impl R<u8, Reg<u8, _LOW>>[src]
pub fn sut_cksel(&self) -> SUT_CKSEL_R[src]
Bits 0:5 - Select Clock Source
pub fn boden(&self) -> BODEN_R[src]
Bit 6 - Brown-out detection enabled
pub fn bodlevel(&self) -> BODLEVEL_R[src]
Bit 7 - Brownout detector trigger level
impl R<u8, Reg<u8, _MCUCSR>>[src]
pub fn jtrf(&self) -> JTRF_R[src]
Bit 4 - JTAG Reset Flag
pub fn jtd(&self) -> JTD_R[src]
Bit 7 - JTAG Interface Disable
impl R<u8, Reg<u8, _OCDR>>[src]
impl R<u8, LB_A>[src]
pub fn variant(&self) -> Variant<u8, LB_A>[src]
Get enumerated values variant
pub fn is_prog_ver_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_VER_DISABLED
pub fn is_prog_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_DISABLED
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, BLB0_A>[src]
pub fn variant(&self) -> BLB0_A[src]
Get enumerated values variant
pub fn is_lpm_spm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_SPM_DISABLE
pub fn is_lpm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_DISABLE
pub fn is_spm_disable(&self) -> bool[src]
Checks if the value of the field is SPM_DISABLE
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, BLB1_A>[src]
pub fn variant(&self) -> BLB1_A[src]
Get enumerated values variant
pub fn is_lpm_spm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_SPM_DISABLE
pub fn is_lpm_disable(&self) -> bool[src]
Checks if the value of the field is LPM_DISABLE
pub fn is_spm_disable(&self) -> bool[src]
Checks if the value of the field is SPM_DISABLE
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, Reg<u8, _LOCKBIT>>[src]
pub fn lb(&self) -> LB_R[src]
Bits 0:1 - Memory Lock
pub fn blb0(&self) -> BLB0_R[src]
Bits 2:3 - Boot Loader Protection Mode
pub fn blb1(&self) -> BLB1_R[src]
Bits 4:5 - Boot Loader Protection Mode
impl R<u8, Reg<u8, _SFIOR>>[src]
pub fn psr321(&self) -> PSR321_R[src]
Bit 0 - Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1
pub fn psr0(&self) -> PSR0_R[src]
Bit 1 - Prescaler Reset Timer/Counter0
pub fn pud(&self) -> PUD_R[src]
Bit 2 - Pull Up Disable
pub fn acme(&self) -> ACME_R[src]
Bit 3 - Analog Comparator Multiplexer Enable
pub fn tsm(&self) -> TSM_R[src]
Bit 7 - Timer/Counter Synchronization Mode
impl R<u8, Reg<u8, _DDRA>>[src]
pub fn pa0(&self) -> PA0_R[src]
Bit 0 - Pin A0
pub fn pa1(&self) -> PA1_R[src]
Bit 1 - Pin A1
pub fn pa2(&self) -> PA2_R[src]
Bit 2 - Pin A2
pub fn pa3(&self) -> PA3_R[src]
Bit 3 - Pin A3
pub fn pa4(&self) -> PA4_R[src]
Bit 4 - Pin A4
pub fn pa5(&self) -> PA5_R[src]
Bit 5 - Pin A5
pub fn pa6(&self) -> PA6_R[src]
Bit 6 - Pin A6
pub fn pa7(&self) -> PA7_R[src]
Bit 7 - Pin A7
impl R<u8, Reg<u8, _PINA>>[src]
pub fn pa0(&self) -> PA0_R[src]
Bit 0 - Pin A0
pub fn pa1(&self) -> PA1_R[src]
Bit 1 - Pin A1
pub fn pa2(&self) -> PA2_R[src]
Bit 2 - Pin A2
pub fn pa3(&self) -> PA3_R[src]
Bit 3 - Pin A3
pub fn pa4(&self) -> PA4_R[src]
Bit 4 - Pin A4
pub fn pa5(&self) -> PA5_R[src]
Bit 5 - Pin A5
pub fn pa6(&self) -> PA6_R[src]
Bit 6 - Pin A6
pub fn pa7(&self) -> PA7_R[src]
Bit 7 - Pin A7
impl R<u8, Reg<u8, _PORTA>>[src]
pub fn pa0(&self) -> PA0_R[src]
Bit 0 - Pin A0
pub fn pa1(&self) -> PA1_R[src]
Bit 1 - Pin A1
pub fn pa2(&self) -> PA2_R[src]
Bit 2 - Pin A2
pub fn pa3(&self) -> PA3_R[src]
Bit 3 - Pin A3
pub fn pa4(&self) -> PA4_R[src]
Bit 4 - Pin A4
pub fn pa5(&self) -> PA5_R[src]
Bit 5 - Pin A5
pub fn pa6(&self) -> PA6_R[src]
Bit 6 - Pin A6
pub fn pa7(&self) -> PA7_R[src]
Bit 7 - Pin A7
impl R<u8, Reg<u8, _DDRB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _PINB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _PORTB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
pub fn pb6(&self) -> PB6_R[src]
Bit 6 - Pin B6
pub fn pb7(&self) -> PB7_R[src]
Bit 7 - Pin B7
impl R<u8, Reg<u8, _DDRC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
pub fn pc7(&self) -> PC7_R[src]
Bit 7 - Pin C7
impl R<u8, Reg<u8, _PINC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
pub fn pc7(&self) -> PC7_R[src]
Bit 7 - Pin C7
impl R<u8, Reg<u8, _PORTC>>[src]
pub fn pc0(&self) -> PC0_R[src]
Bit 0 - Pin C0
pub fn pc1(&self) -> PC1_R[src]
Bit 1 - Pin C1
pub fn pc2(&self) -> PC2_R[src]
Bit 2 - Pin C2
pub fn pc3(&self) -> PC3_R[src]
Bit 3 - Pin C3
pub fn pc4(&self) -> PC4_R[src]
Bit 4 - Pin C4
pub fn pc5(&self) -> PC5_R[src]
Bit 5 - Pin C5
pub fn pc6(&self) -> PC6_R[src]
Bit 6 - Pin C6
pub fn pc7(&self) -> PC7_R[src]
Bit 7 - Pin C7
impl R<u8, Reg<u8, _DDRD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _PIND>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _PORTD>>[src]
pub fn pd0(&self) -> PD0_R[src]
Bit 0 - Pin D0
pub fn pd1(&self) -> PD1_R[src]
Bit 1 - Pin D1
pub fn pd2(&self) -> PD2_R[src]
Bit 2 - Pin D2
pub fn pd3(&self) -> PD3_R[src]
Bit 3 - Pin D3
pub fn pd4(&self) -> PD4_R[src]
Bit 4 - Pin D4
pub fn pd5(&self) -> PD5_R[src]
Bit 5 - Pin D5
pub fn pd6(&self) -> PD6_R[src]
Bit 6 - Pin D6
pub fn pd7(&self) -> PD7_R[src]
Bit 7 - Pin D7
impl R<u8, Reg<u8, _DDRE>>[src]
pub fn pe0(&self) -> PE0_R[src]
Bit 0 - Pin E0
pub fn pe1(&self) -> PE1_R[src]
Bit 1 - Pin E1
pub fn pe2(&self) -> PE2_R[src]
Bit 2 - Pin E2
pub fn pe3(&self) -> PE3_R[src]
Bit 3 - Pin E3
pub fn pe4(&self) -> PE4_R[src]
Bit 4 - Pin E4
pub fn pe5(&self) -> PE5_R[src]
Bit 5 - Pin E5
pub fn pe6(&self) -> PE6_R[src]
Bit 6 - Pin E6
pub fn pe7(&self) -> PE7_R[src]
Bit 7 - Pin E7
impl R<u8, Reg<u8, _PINE>>[src]
pub fn pe0(&self) -> PE0_R[src]
Bit 0 - Pin E0
pub fn pe1(&self) -> PE1_R[src]
Bit 1 - Pin E1
pub fn pe2(&self) -> PE2_R[src]
Bit 2 - Pin E2
pub fn pe3(&self) -> PE3_R[src]
Bit 3 - Pin E3
pub fn pe4(&self) -> PE4_R[src]
Bit 4 - Pin E4
pub fn pe5(&self) -> PE5_R[src]
Bit 5 - Pin E5
pub fn pe6(&self) -> PE6_R[src]
Bit 6 - Pin E6
pub fn pe7(&self) -> PE7_R[src]
Bit 7 - Pin E7
impl R<u8, Reg<u8, _PORTE>>[src]
pub fn pe0(&self) -> PE0_R[src]
Bit 0 - Pin E0
pub fn pe1(&self) -> PE1_R[src]
Bit 1 - Pin E1
pub fn pe2(&self) -> PE2_R[src]
Bit 2 - Pin E2
pub fn pe3(&self) -> PE3_R[src]
Bit 3 - Pin E3
pub fn pe4(&self) -> PE4_R[src]
Bit 4 - Pin E4
pub fn pe5(&self) -> PE5_R[src]
Bit 5 - Pin E5
pub fn pe6(&self) -> PE6_R[src]
Bit 6 - Pin E6
pub fn pe7(&self) -> PE7_R[src]
Bit 7 - Pin E7
impl R<u8, Reg<u8, _DDRF>>[src]
pub fn pf0(&self) -> PF0_R[src]
Bit 0 - Pin F0
pub fn pf1(&self) -> PF1_R[src]
Bit 1 - Pin F1
pub fn pf2(&self) -> PF2_R[src]
Bit 2 - Pin F2
pub fn pf3(&self) -> PF3_R[src]
Bit 3 - Pin F3
pub fn pf4(&self) -> PF4_R[src]
Bit 4 - Pin F4
pub fn pf5(&self) -> PF5_R[src]
Bit 5 - Pin F5
pub fn pf6(&self) -> PF6_R[src]
Bit 6 - Pin F6
pub fn pf7(&self) -> PF7_R[src]
Bit 7 - Pin F7
impl R<u8, Reg<u8, _PINF>>[src]
pub fn pf0(&self) -> PF0_R[src]
Bit 0 - Pin F0
pub fn pf1(&self) -> PF1_R[src]
Bit 1 - Pin F1
pub fn pf2(&self) -> PF2_R[src]
Bit 2 - Pin F2
pub fn pf3(&self) -> PF3_R[src]
Bit 3 - Pin F3
pub fn pf4(&self) -> PF4_R[src]
Bit 4 - Pin F4
pub fn pf5(&self) -> PF5_R[src]
Bit 5 - Pin F5
pub fn pf6(&self) -> PF6_R[src]
Bit 6 - Pin F6
pub fn pf7(&self) -> PF7_R[src]
Bit 7 - Pin F7
impl R<u8, Reg<u8, _PORTF>>[src]
pub fn pf0(&self) -> PF0_R[src]
Bit 0 - Pin F0
pub fn pf1(&self) -> PF1_R[src]
Bit 1 - Pin F1
pub fn pf2(&self) -> PF2_R[src]
Bit 2 - Pin F2
pub fn pf3(&self) -> PF3_R[src]
Bit 3 - Pin F3
pub fn pf4(&self) -> PF4_R[src]
Bit 4 - Pin F4
pub fn pf5(&self) -> PF5_R[src]
Bit 5 - Pin F5
pub fn pf6(&self) -> PF6_R[src]
Bit 6 - Pin F6
pub fn pf7(&self) -> PF7_R[src]
Bit 7 - Pin F7
impl R<u8, Reg<u8, _DDRG>>[src]
pub fn pg0(&self) -> PG0_R[src]
Bit 0 - Pin G0
pub fn pg1(&self) -> PG1_R[src]
Bit 1 - Pin G1
pub fn pg2(&self) -> PG2_R[src]
Bit 2 - Pin G2
pub fn pg3(&self) -> PG3_R[src]
Bit 3 - Pin G3
pub fn pg4(&self) -> PG4_R[src]
Bit 4 - Pin G4
impl R<u8, Reg<u8, _PING>>[src]
pub fn pg0(&self) -> PG0_R[src]
Bit 0 - Pin G0
pub fn pg1(&self) -> PG1_R[src]
Bit 1 - Pin G1
pub fn pg2(&self) -> PG2_R[src]
Bit 2 - Pin G2
pub fn pg3(&self) -> PG3_R[src]
Bit 3 - Pin G3
pub fn pg4(&self) -> PG4_R[src]
Bit 4 - Pin G4
impl R<u8, Reg<u8, _PORTG>>[src]
pub fn pg0(&self) -> PG0_R[src]
Bit 0 - Pin G0
pub fn pg1(&self) -> PG1_R[src]
Bit 1 - Pin G1
pub fn pg2(&self) -> PG2_R[src]
Bit 2 - Pin G2
pub fn pg3(&self) -> PG3_R[src]
Bit 3 - Pin G3
pub fn pg4(&self) -> PG4_R[src]
Bit 4 - Pin G4
impl R<u8, SPR_A>[src]
pub fn variant(&self) -> Variant<u8, SPR_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _SPCR>>[src]
pub fn spr(&self) -> SPR_R[src]
Bits 0:1 - SPI Clock Rate Selects
pub fn cpha(&self) -> CPHA_R[src]
Bit 2 - Clock Phase
pub fn cpol(&self) -> CPOL_R[src]
Bit 3 - Clock polarity
pub fn mstr(&self) -> MSTR_R[src]
Bit 4 - Master/Slave Select
pub fn dord(&self) -> DORD_R[src]
Bit 5 - Data Order
pub fn spe(&self) -> SPE_R[src]
Bit 6 - SPI Enable
pub fn spie(&self) -> SPIE_R[src]
Bit 7 - SPI Interrupt Enable
impl R<u8, Reg<u8, _SPSR>>[src]
pub fn spi2x(&self) -> SPI2X_R[src]
Bit 0 - Double SPI Speed Bit
pub fn wcol(&self) -> WCOL_R[src]
Bit 6 - Write Collision Flag
pub fn spif(&self) -> SPIF_R[src]
Bit 7 - SPI Interrupt Flag
impl R<u8, Reg<u8, _ASSR>>[src]
pub fn tcr0ub(&self) -> TCR0UB_R[src]
Bit 0 - Timer/Counter Control Register 0 Update Busy
pub fn ocr0ub(&self) -> OCR0UB_R[src]
Bit 1 - Output Compare register 0 Busy
pub fn tcn0ub(&self) -> TCN0UB_R[src]
Bit 2 - Timer/Counter0 Update Busy
pub fn as0(&self) -> AS0_R[src]
Bit 3 - Asynchronus Timer/Counter 0
impl R<u8, Reg<u8, _SFIOR>>[src]
pub fn psr0(&self) -> PSR0_R[src]
Bit 1 - Prescaler Reset Timer/Counter0
pub fn tsm(&self) -> TSM_R[src]
Bit 7 - Timer/Counter Synchronization Mode
impl R<u8, CS0_A>[src]
pub fn variant(&self) -> CS0_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<bool, WGM00_A>[src]
pub fn variant(&self) -> Variant<bool, WGM00_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _TCCR0>>[src]
pub fn cs0(&self) -> CS0_R[src]
Bits 0:2 - Clock Selects
pub fn wgm01(&self) -> WGM01_R[src]
Bit 3 - Waveform Generation Mode 1
pub fn com0(&self) -> COM0_R[src]
Bits 4:5 - Compare Match Output Modes
pub fn wgm00(&self) -> WGM00_R[src]
Bit 6 - Waveform Generation Mode 0
pub fn foc0(&self) -> FOC0_R[src]
Bit 7 - Force Output Compare
impl R<u8, Reg<u8, _TIFR>>[src]
pub fn tov0(&self) -> TOV0_R[src]
Bit 0 - Timer/Counter0 Overflow Flag
pub fn ocf0(&self) -> OCF0_R[src]
Bit 1 - Output Compare Flag 0
impl R<u8, Reg<u8, _TIMSK>>[src]
pub fn toie0(&self) -> TOIE0_R[src]
Bit 0 - Timer/Counter0 Overflow Interrupt Enable
pub fn ocie0(&self) -> OCIE0_R[src]
Bit 1 - Timer/Counter0 Output Compare Match Interrupt register
impl R<u8, Reg<u8, _ETIFR>>[src]
impl R<u8, Reg<u8, _ETIMSK>>[src]
pub fn ocie1c(&self) -> OCIE1C_R[src]
Bit 0 - Timer/Counter 1, Output Compare Match C Interrupt Enable
impl R<u8, Reg<u8, _SFIOR>>[src]
pub fn psr321(&self) -> PSR321_R[src]
Bit 0 - Prescaler Reset, T/C3, T/C2, T/C1
pub fn tsm(&self) -> TSM_R[src]
Bit 7 - Timer/Counter Synchronization Mode
impl R<u8, Reg<u8, _TCCR1A>>[src]
pub fn wgm1(&self) -> WGM1_R[src]
Bits 0:1 - Waveform Generation Mode Bits
pub fn com1c(&self) -> COM1C_R[src]
Bits 2:3 - Compare Output Mode 1C, bits
pub fn com1b(&self) -> COM1B_R[src]
Bits 4:5 - Compare Output Mode 1B, bits
pub fn com1a(&self) -> COM1A_R[src]
Bits 6:7 - Compare Output Mode 1A, bits
impl R<u8, CS1_A>[src]
pub fn variant(&self) -> CS1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR1B>>[src]
pub fn cs1(&self) -> CS1_R[src]
Bits 0:2 - Clock Select1 bits
pub fn wgm1(&self) -> WGM1_R[src]
Bits 3:4 - Waveform Generation Mode
pub fn ices1(&self) -> ICES1_R[src]
Bit 6 - Input Capture 1 Edge Select
pub fn icnc1(&self) -> ICNC1_R[src]
Bit 7 - Input Capture 1 Noise Canceler
impl R<u8, Reg<u8, _TCCR1C>>[src]
pub fn foc1c(&self) -> FOC1C_R[src]
Bit 5 - Force Output Compare for channel C
pub fn foc1b(&self) -> FOC1B_R[src]
Bit 6 - Force Output Compare for channel B
pub fn foc1a(&self) -> FOC1A_R[src]
Bit 7 - Force Output Compare for channel A
impl R<u8, Reg<u8, _TIFR>>[src]
pub fn tov1(&self) -> TOV1_R[src]
Bit 2 - Timer/Counter1 Overflow Flag
pub fn ocf1b(&self) -> OCF1B_R[src]
Bit 3 - Output Compare Flag 1B
pub fn ocf1a(&self) -> OCF1A_R[src]
Bit 4 - Output Compare Flag 1A
pub fn icf1(&self) -> ICF1_R[src]
Bit 5 - Input Capture Flag 1
impl R<u8, Reg<u8, _TIMSK>>[src]
pub fn toie1(&self) -> TOIE1_R[src]
Bit 2 - Timer/Counter1 Overflow Interrupt Enable
pub fn ocie1b(&self) -> OCIE1B_R[src]
Bit 3 - Timer/Counter1 Output CompareB Match Interrupt Enable
pub fn ocie1a(&self) -> OCIE1A_R[src]
Bit 4 - Timer/Counter1 Output CompareA Match Interrupt Enable
pub fn ticie1(&self) -> TICIE1_R[src]
Bit 5 - Timer/Counter1 Input Capture Interrupt Enable
impl R<u8, CS2_A>[src]
pub fn variant(&self) -> CS2_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<bool, WGM20_A>[src]
pub fn variant(&self) -> Variant<bool, WGM20_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _TCCR2>>[src]
pub fn cs2(&self) -> CS2_R[src]
Bits 0:2 - Clock Select
pub fn wgm21(&self) -> WGM21_R[src]
Bit 3 - Waveform Generation Mode
pub fn com2(&self) -> COM2_R[src]
Bits 4:5 - Compare Match Output Mode
pub fn wgm20(&self) -> WGM20_R[src]
Bit 6 - Wafeform Generation Mode
pub fn foc2(&self) -> FOC2_R[src]
Bit 7 - Force Output Compare
impl R<u8, Reg<u8, _TIFR>>[src]
pub fn tov2(&self) -> TOV2_R[src]
Bit 6 - Timer/Counter2 Overflow Flag
pub fn ocf2(&self) -> OCF2_R[src]
Bit 7 - Output Compare Flag 2
impl R<u8, Reg<u8, _TIMSK>>[src]
impl R<u8, Reg<u8, _ETIFR>>[src]
pub fn ocf3c(&self) -> OCF3C_R[src]
Bit 1 - Timer/Counter3 Output Compare C Match Flag
pub fn tov3(&self) -> TOV3_R[src]
Bit 2 - Timer/Counter3 Overflow Flag
pub fn ocf3b(&self) -> OCF3B_R[src]
Bit 3 - Output Compare Flag 3B
pub fn ocf3a(&self) -> OCF3A_R[src]
Bit 4 - Output Compare Flag 3A
pub fn icf3(&self) -> ICF3_R[src]
Bit 5 - Input Capture Flag 3
impl R<u8, Reg<u8, _ETIMSK>>[src]
pub fn ocie3c(&self) -> OCIE3C_R[src]
Bit 1 - Timer/Counter3, Output Compare Match Interrupt Enable
pub fn toie3(&self) -> TOIE3_R[src]
Bit 2 - Timer/Counter3 Overflow Interrupt Enable
pub fn ocie3b(&self) -> OCIE3B_R[src]
Bit 3 - Timer/Counter3 Output CompareB Match Interrupt Enable
pub fn ocie3a(&self) -> OCIE3A_R[src]
Bit 4 - Timer/Counter3 Output CompareA Match Interrupt Enable
pub fn ticie3(&self) -> TICIE3_R[src]
Bit 5 - Timer/Counter3 Input Capture Interrupt Enable
impl R<u8, Reg<u8, _SFIOR>>[src]
pub fn psr321(&self) -> PSR321_R[src]
Bit 0 - Prescaler Reset, T/C3, T/C2, T/C1
pub fn tsm(&self) -> TSM_R[src]
Bit 7 - Timer/Counter Synchronization Mode
impl R<u8, Reg<u8, _TCCR3A>>[src]
pub fn wgm3(&self) -> WGM3_R[src]
Bits 0:1 - Waveform Generation Mode Bits
pub fn com3c(&self) -> COM3C_R[src]
Bits 2:3 - Compare Output Mode 3C, bits
pub fn com3b(&self) -> COM3B_R[src]
Bits 4:5 - Compare Output Mode 3B, bits
pub fn com3a(&self) -> COM3A_R[src]
Bits 6:7 - Compare Output Mode 3A, bits
impl R<u8, CS3_A>[src]
pub fn variant(&self) -> CS3_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _TCCR3B>>[src]
pub fn cs3(&self) -> CS3_R[src]
Bits 0:2 - Clock Select3 bits
pub fn wgm3(&self) -> WGM3_R[src]
Bits 3:4 - Waveform Generation Mode
pub fn ices3(&self) -> ICES3_R[src]
Bit 6 - Input Capture 3 Edge Select
pub fn icnc3(&self) -> ICNC3_R[src]
Bit 7 - Input Capture 3 Noise Canceler
impl R<u8, Reg<u8, _TCCR3C>>[src]
pub fn foc3c(&self) -> FOC3C_R[src]
Bit 5 - Force Output Compare for channel C
pub fn foc3b(&self) -> FOC3B_R[src]
Bit 6 - Force Output Compare for channel B
pub fn foc3a(&self) -> FOC3A_R[src]
Bit 7 - Force Output Compare for channel A
impl R<u8, Reg<u8, _TWAR>>[src]
pub fn twgce(&self) -> TWGCE_R[src]
Bit 0 - TWI General Call Recognition Enable Bit
pub fn twa(&self) -> TWA_R[src]
Bits 1:7 - TWI (Slave) Address register Bits
impl R<u8, Reg<u8, _TWCR>>[src]
pub fn twie(&self) -> TWIE_R[src]
Bit 0 - TWI Interrupt Enable
pub fn twen(&self) -> TWEN_R[src]
Bit 2 - TWI Enable Bit
pub fn twwc(&self) -> TWWC_R[src]
Bit 3 - TWI Write Collition Flag
pub fn twsto(&self) -> TWSTO_R[src]
Bit 4 - TWI Stop Condition Bit
pub fn twsta(&self) -> TWSTA_R[src]
Bit 5 - TWI Start Condition Bit
pub fn twea(&self) -> TWEA_R[src]
Bit 6 - TWI Enable Acknowledge Bit
pub fn twint(&self) -> TWINT_R[src]
Bit 7 - TWI Interrupt Flag
impl R<u8, TWPS_A>[src]
pub fn variant(&self) -> TWPS_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _TWSR>>[src]
pub fn twps(&self) -> TWPS_R[src]
Bits 0:1 - TWI Prescaler
pub fn tws(&self) -> TWS_R[src]
Bits 3:7 - TWI Status
impl R<u8, Reg<u8, _UCSR0A>>[src]
pub fn mpcm0(&self) -> MPCM0_R[src]
Bit 0 - Multi-processor Communication Mode
pub fn u2x0(&self) -> U2X0_R[src]
Bit 1 - Double the USART transmission speed
pub fn upe0(&self) -> UPE0_R[src]
Bit 2 - Parity Error
pub fn dor0(&self) -> DOR0_R[src]
Bit 3 - Data overRun
pub fn fe0(&self) -> FE0_R[src]
Bit 4 - Framing Error
pub fn udre0(&self) -> UDRE0_R[src]
Bit 5 - USART Data Register Empty
pub fn txc0(&self) -> TXC0_R[src]
Bit 6 - USART Transmit Complete
pub fn rxc0(&self) -> RXC0_R[src]
Bit 7 - USART Receive Complete
impl R<u8, Reg<u8, _UCSR0B>>[src]
pub fn txb80(&self) -> TXB80_R[src]
Bit 0 - Transmit Data Bit 8
pub fn rxb80(&self) -> RXB80_R[src]
Bit 1 - Receive Data Bit 8
pub fn ucsz02(&self) -> UCSZ02_R[src]
Bit 2 - Character Size
pub fn txen0(&self) -> TXEN0_R[src]
Bit 3 - Transmitter Enable
pub fn rxen0(&self) -> RXEN0_R[src]
Bit 4 - Receiver Enable
pub fn udrie0(&self) -> UDRIE0_R[src]
Bit 5 - USART Data register Empty Interrupt Enable
pub fn txcie0(&self) -> TXCIE0_R[src]
Bit 6 - TX Complete Interrupt Enable
pub fn rxcie0(&self) -> RXCIE0_R[src]
Bit 7 - RX Complete Interrupt Enable
impl R<bool, UCPOL0_A>[src]
pub fn variant(&self) -> UCPOL0_A[src]
Get enumerated values variant
pub fn is_rising_edge(&self) -> bool[src]
Checks if the value of the field is RISING_EDGE
pub fn is_falling_edge(&self) -> bool[src]
Checks if the value of the field is FALLING_EDGE
impl R<u8, UCSZ0_A>[src]
pub fn variant(&self) -> UCSZ0_A[src]
Get enumerated values variant
pub fn is_chr5(&self) -> bool[src]
Checks if the value of the field is CHR5
pub fn is_chr6(&self) -> bool[src]
Checks if the value of the field is CHR6
pub fn is_chr7(&self) -> bool[src]
Checks if the value of the field is CHR7
pub fn is_chr8(&self) -> bool[src]
Checks if the value of the field is CHR8
impl R<bool, USBS0_A>[src]
pub fn variant(&self) -> USBS0_A[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool[src]
Checks if the value of the field is STOP2
impl R<u8, UPM0_A>[src]
pub fn variant(&self) -> Variant<u8, UPM0_A>[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_parity_even(&self) -> bool[src]
Checks if the value of the field is PARITY_EVEN
pub fn is_parity_odd(&self) -> bool[src]
Checks if the value of the field is PARITY_ODD
impl R<bool, UMSEL0_A>[src]
pub fn variant(&self) -> Variant<bool, UMSEL0_A>[src]
Get enumerated values variant
pub fn is_usart_async(&self) -> bool[src]
Checks if the value of the field is USART_ASYNC
pub fn is_usart_sync(&self) -> bool[src]
Checks if the value of the field is USART_SYNC
pub fn is_spi_master(&self) -> bool[src]
Checks if the value of the field is SPI_MASTER
impl R<u8, Reg<u8, _UCSR0C>>[src]
pub fn ucpol0(&self) -> UCPOL0_R[src]
Bit 0 - Clock Polarity
pub fn ucsz0(&self) -> UCSZ0_R[src]
Bits 1:2 - Character Size
pub fn usbs0(&self) -> USBS0_R[src]
Bit 3 - Stop Bit Select
pub fn upm0(&self) -> UPM0_R[src]
Bits 4:5 - Parity Mode Bits
pub fn umsel0(&self) -> UMSEL0_R[src]
Bit 6 - USART Mode Select
impl R<u8, Reg<u8, _UCSR1A>>[src]
pub fn mpcm1(&self) -> MPCM1_R[src]
Bit 0 - Multi-processor Communication Mode
pub fn u2x1(&self) -> U2X1_R[src]
Bit 1 - Double the USART transmission speed
pub fn upe1(&self) -> UPE1_R[src]
Bit 2 - Parity Error
pub fn dor1(&self) -> DOR1_R[src]
Bit 3 - Data overRun
pub fn fe1(&self) -> FE1_R[src]
Bit 4 - Framing Error
pub fn udre1(&self) -> UDRE1_R[src]
Bit 5 - USART Data Register Empty
pub fn txc1(&self) -> TXC1_R[src]
Bit 6 - USART Transmit Complete
pub fn rxc1(&self) -> RXC1_R[src]
Bit 7 - USART Receive Complete
impl R<u8, Reg<u8, _UCSR1B>>[src]
pub fn txb81(&self) -> TXB81_R[src]
Bit 0 - Transmit Data Bit 8
pub fn rxb81(&self) -> RXB81_R[src]
Bit 1 - Receive Data Bit 8
pub fn ucsz12(&self) -> UCSZ12_R[src]
Bit 2 - Character Size
pub fn txen1(&self) -> TXEN1_R[src]
Bit 3 - Transmitter Enable
pub fn rxen1(&self) -> RXEN1_R[src]
Bit 4 - Receiver Enable
pub fn udrie1(&self) -> UDRIE1_R[src]
Bit 5 - USART Data register Empty Interrupt Enable
pub fn txcie1(&self) -> TXCIE1_R[src]
Bit 6 - TX Complete Interrupt Enable
pub fn rxcie1(&self) -> RXCIE1_R[src]
Bit 7 - RX Complete Interrupt Enable
impl R<bool, UCPOL1_A>[src]
pub fn variant(&self) -> UCPOL1_A[src]
Get enumerated values variant
pub fn is_rising_edge(&self) -> bool[src]
Checks if the value of the field is RISING_EDGE
pub fn is_falling_edge(&self) -> bool[src]
Checks if the value of the field is FALLING_EDGE
impl R<u8, UCSZ1_A>[src]
pub fn variant(&self) -> UCSZ1_A[src]
Get enumerated values variant
pub fn is_chr5(&self) -> bool[src]
Checks if the value of the field is CHR5
pub fn is_chr6(&self) -> bool[src]
Checks if the value of the field is CHR6
pub fn is_chr7(&self) -> bool[src]
Checks if the value of the field is CHR7
pub fn is_chr8(&self) -> bool[src]
Checks if the value of the field is CHR8
impl R<bool, USBS1_A>[src]
pub fn variant(&self) -> USBS1_A[src]
Get enumerated values variant
pub fn is_stop1(&self) -> bool[src]
Checks if the value of the field is STOP1
pub fn is_stop2(&self) -> bool[src]
Checks if the value of the field is STOP2
impl R<u8, UPM1_A>[src]
pub fn variant(&self) -> Variant<u8, UPM1_A>[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_parity_even(&self) -> bool[src]
Checks if the value of the field is PARITY_EVEN
pub fn is_parity_odd(&self) -> bool[src]
Checks if the value of the field is PARITY_ODD
impl R<bool, UMSEL1_A>[src]
pub fn variant(&self) -> Variant<bool, UMSEL1_A>[src]
Get enumerated values variant
pub fn is_usart_async(&self) -> bool[src]
Checks if the value of the field is USART_ASYNC
pub fn is_usart_sync(&self) -> bool[src]
Checks if the value of the field is USART_SYNC
pub fn is_spi_master(&self) -> bool[src]
Checks if the value of the field is SPI_MASTER
impl R<u8, Reg<u8, _UCSR1C>>[src]
pub fn ucpol1(&self) -> UCPOL1_R[src]
Bit 0 - Clock Polarity
pub fn ucsz1(&self) -> UCSZ1_R[src]
Bits 1:2 - Character Size
pub fn usbs1(&self) -> USBS1_R[src]
Bit 3 - Stop Bit Select
pub fn upm1(&self) -> UPM1_R[src]
Bits 4:5 - Parity Mode Bits
pub fn umsel1(&self) -> UMSEL1_R[src]
Bit 6 - USART Mode Select
impl R<u8, WDP_A>[src]
pub fn variant(&self) -> WDP_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _WDTCR>>[src]
pub fn wdp(&self) -> WDP_R[src]
Bits 0:2 - Watch Dog Timer Prescaler bits
pub fn wde(&self) -> WDE_R[src]
Bit 3 - Watch Dog Enable
pub fn wdce(&self) -> WDCE_R[src]
Bit 4 - Watchdog Change Enable
impl R<u8, ACIS_A>[src]
pub fn variant(&self) -> Variant<u8, ACIS_A>[src]
Get enumerated values variant
pub fn is_on_toggle(&self) -> bool[src]
Checks if the value of the field is ON_TOGGLE
pub fn is_on_falling_edge(&self) -> bool[src]
Checks if the value of the field is ON_FALLING_EDGE
pub fn is_on_rising_edge(&self) -> bool[src]
Checks if the value of the field is ON_RISING_EDGE
impl R<u8, Reg<u8, _ACSR>>[src]
pub fn acis(&self) -> ACIS_R[src]
Bits 0:1 - Analog Comparator Interrupt Mode Select
pub fn acie(&self) -> ACIE_R[src]
Bit 3 - Analog Comparator Interrupt Enable
pub fn aci(&self) -> ACI_R[src]
Bit 4 - Analog Comparator Interrupt Flag
pub fn aco(&self) -> ACO_R[src]
Bit 5 - Analog Compare Output
pub fn acbg(&self) -> ACBG_R[src]
Bit 6 - Analog Comparator Bandgap Select
pub fn acd(&self) -> ACD_R[src]
Bit 7 - Analog Comparator Disable
impl R<u8, Reg<u8, _ADCSRB>>[src]
impl R<u8, Reg<u8, _DIDR0>>[src]
pub fn ain0d(&self) -> AIN0D_R[src]
Bit 0 - AIN0 Digital Input Disable
pub fn ain1d(&self) -> AIN1D_R[src]
Bit 1 - AIN1 Digital Input Disable
impl R<u8, ADPS_A>[src]
pub fn variant(&self) -> ADPS_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _ADCSRA>>[src]
pub fn adps(&self) -> ADPS_R[src]
Bits 0:2 - ADC Prescaler Select Bits
pub fn adie(&self) -> ADIE_R[src]
Bit 3 - ADC Interrupt Enable
pub fn adif(&self) -> ADIF_R[src]
Bit 4 - ADC Interrupt Flag
pub fn adate(&self) -> ADATE_R[src]
Bit 5 - ADC Auto Trigger Enable
pub fn adsc(&self) -> ADSC_R[src]
Bit 6 - ADC Start Conversion
pub fn aden(&self) -> ADEN_R[src]
Bit 7 - ADC Enable
impl R<u8, ADTS_A>[src]
pub fn variant(&self) -> ADTS_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
impl R<u8, Reg<u8, _ADCSRB>>[src]
pub fn adts(&self) -> ADTS_R[src]
Bits 0:2 - ADC Auto Trigger Sources
pub fn ipr(&self) -> IPR_R[src]
Bit 5 - Input Polarity Mode
pub fn bin(&self) -> BIN_R[src]
Bit 7 - Bipolar Input Mode
impl R<u8, Reg<u8, _ADMUX>>[src]
pub fn mux(&self) -> MUX_R[src]
Bits 0:3 - Analog Channel and Gain Selection Bits
pub fn refs2(&self) -> REFS2_R[src]
Bit 4 - Reference Selection Bit 2
pub fn adlar(&self) -> ADLAR_R[src]
Bit 5 - Left Adjust Result
pub fn refs(&self) -> REFS_R[src]
Bits 6:7 - Reference Selection Bits
impl R<u8, Reg<u8, _DIDR0>>[src]
pub fn adc1d(&self) -> ADC1D_R[src]
Bit 2 - ADC1 Digital input Disable
pub fn adc3d(&self) -> ADC3D_R[src]
Bit 3 - ADC3 Digital input Disable
pub fn adc2d(&self) -> ADC2D_R[src]
Bit 4 - ADC2 Digital input Disable
pub fn adc0d(&self) -> ADC0D_R[src]
Bit 5 - ADC0 Digital input Disable
impl R<u8, Reg<u8, _SPMCSR>>[src]
pub fn spmen(&self) -> SPMEN_R[src]
Bit 0 - Store Program Memory Enable
pub fn pgers(&self) -> PGERS_R[src]
Bit 1 - Page Erase
pub fn pgwrt(&self) -> PGWRT_R[src]
Bit 2 - Page Write
pub fn rflb(&self) -> RFLB_R[src]
Bit 3 - Read fuse and lock bits
pub fn ctpb(&self) -> CTPB_R[src]
Bit 4 - Clear temporary page buffer
pub fn rsig(&self) -> RSIG_R[src]
Bit 5 - Read Device Signature Imprint Table
impl R<u8, CLKPS_A>[src]
pub fn variant(&self) -> Variant<u8, CLKPS_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
pub fn is_val_0x08(&self) -> bool[src]
Checks if the value of the field is VAL_0X08
impl R<u8, Reg<u8, _CLKPR>>[src]
pub fn clkps(&self) -> CLKPS_R[src]
Bits 0:3 - Clock Prescaler Select Bits
pub fn clkpce(&self) -> CLKPCE_R[src]
Bit 7 - Clock Prescaler Change Enable
impl R<u8, ISC0_A>[src]
pub fn variant(&self) -> ISC0_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, SM_A>[src]
pub fn variant(&self) -> SM_A[src]
Get enumerated values variant
pub fn is_idle(&self) -> bool[src]
Checks if the value of the field is IDLE
pub fn is_adc(&self) -> bool[src]
Checks if the value of the field is ADC
pub fn is_pdown(&self) -> bool[src]
Checks if the value of the field is PDOWN
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _MCUCR>>[src]
pub fn isc0(&self) -> ISC0_R[src]
Bits 0:1 - Interrupt Sense Control 0 bits
pub fn sm(&self) -> SM_R[src]
Bits 3:4 - Sleep Mode Select Bits
pub fn se(&self) -> SE_R[src]
Bit 5 - Sleep Enable
pub fn pud(&self) -> PUD_R[src]
Bit 6 - Pull-up Disable
impl R<u8, Reg<u8, _MCUSR>>[src]
pub fn porf(&self) -> PORF_R[src]
Bit 0 - Power-On Reset Flag
pub fn extrf(&self) -> EXTRF_R[src]
Bit 1 - External Reset Flag
pub fn borf(&self) -> BORF_R[src]
Bit 2 - Brown-out Reset Flag
pub fn wdrf(&self) -> WDRF_R[src]
Bit 3 - Watchdog Reset Flag
impl R<u8, Reg<u8, _OSCCAL>>[src]
impl R<u8, Reg<u8, _PLLCSR>>[src]
pub fn plock(&self) -> PLOCK_R[src]
Bit 0 - PLL Lock detector
pub fn plle(&self) -> PLLE_R[src]
Bit 1 - PLL Enable
pub fn pcke(&self) -> PCKE_R[src]
Bit 2 - PCK Enable
pub fn lsm(&self) -> LSM_R[src]
Bit 7 - Low speed mode
impl R<u8, Reg<u8, _PRR>>[src]
pub fn pradc(&self) -> PRADC_R[src]
Bit 0 - Power Reduction ADC
pub fn prusi(&self) -> PRUSI_R[src]
Bit 1 - Power Reduction USI
pub fn prtim0(&self) -> PRTIM0_R[src]
Bit 2 - Power Reduction Timer/Counter0
pub fn prtim1(&self) -> PRTIM1_R[src]
Bit 3 - Power Reduction Timer/Counter1
impl R<u8, EEPM_A>[src]
pub fn variant(&self) -> Variant<u8, EEPM_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
impl R<u8, Reg<u8, _EECR>>[src]
pub fn eere(&self) -> EERE_R[src]
Bit 0 - EEPROM Read Enable
pub fn eepe(&self) -> EEPE_R[src]
Bit 1 - EEPROM Write Enable
pub fn eempe(&self) -> EEMPE_R[src]
Bit 2 - EEPROM Master Write Enable
pub fn eerie(&self) -> EERIE_R[src]
Bit 3 - EEPROM Ready Interrupt Enable
pub fn eepm(&self) -> EEPM_R[src]
Bits 4:5 - EEPROM Programming Mode Bits
impl R<u8, Reg<u8, _GIFR>>[src]
pub fn pcif(&self) -> PCIF_R[src]
Bit 5 - Pin Change Interrupt Flag
pub fn intf0(&self) -> INTF0_R[src]
Bit 6 - External Interrupt Flag 0
impl R<u8, Reg<u8, _GIMSK>>[src]
pub fn pcie(&self) -> PCIE_R[src]
Bit 5 - Pin Change Interrupt Enable
pub fn int0(&self) -> INT0_R[src]
Bit 6 - External Interrupt Request 0 Enable
impl R<bool, ISC00_A>[src]
pub fn variant(&self) -> Variant<bool, ISC00_A>[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _MCUCR>>[src]
pub fn isc00(&self) -> ISC00_R[src]
Bit 0 - Interrupt Sense Control 0 Bit 0
pub fn isc01(&self) -> ISC01_R[src]
Bit 1 - Interrupt Sense Control 0 Bit 1
impl R<u8, Reg<u8, _EXTENDED>>[src]
pub fn selfprgen(&self) -> SELFPRGEN_R[src]
Bit 0 - Self Programming enable
impl R<u8, BODLEVEL_A>[src]
pub fn variant(&self) -> Variant<u8, BODLEVEL_A>[src]
Get enumerated values variant
pub fn is_4v3(&self) -> bool[src]
Checks if the value of the field is _4V3
pub fn is_2v7(&self) -> bool[src]
Checks if the value of the field is _2V7
pub fn is_1v8(&self) -> bool[src]
Checks if the value of the field is _1V8
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
impl R<u8, Reg<u8, _HIGH>>[src]
pub fn bodlevel(&self) -> BODLEVEL_R[src]
Bits 0:2 - Brown-out Detector trigger level
pub fn eesave(&self) -> EESAVE_R[src]
Bit 3 - Preserve EEPROM through the Chip Erase cycle
pub fn wdton(&self) -> WDTON_R[src]
Bit 4 - Watch-dog Timer always on
pub fn spien(&self) -> SPIEN_R[src]
Bit 5 - Serial program downloading (SPI) enabled
pub fn dwen(&self) -> DWEN_R[src]
Bit 6 - Debug Wire enable
pub fn rstdisbl(&self) -> RSTDISBL_R[src]
Bit 7 - Reset Disabled (Enable PB5 as i/o pin)
impl R<u8, SUT_CKSEL_A>[src]
pub fn variant(&self) -> Variant<u8, SUT_CKSEL_A>[src]
Get enumerated values variant
pub fn is_extclk_6ck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_14CK_0MS
pub fn is_pllclk_1kck_14ck_4ms(&self) -> bool[src]
Checks if the value of the field is PLLCLK_1KCK_14CK_4MS
pub fn is_intrcosc_8mhz_6ck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_14CK_0MS
pub fn is_intrcosc_6mhz4_6ck_14ck_64ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_6MHZ4_6CK_14CK_64MS
pub fn is_wdosc_128khz_6ck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is WDOSC_128KHZ_6CK_14CK_0MS
pub fn is_extlofxtal_1kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_14CK_0MS
pub fn is_extxosc_0mhz4_0mhz9_258ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1
pub fn is_extxosc_0mhz4_0mhz9_1kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS
pub fn is_extxosc_0mhz9_3mhz_258ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1
pub fn is_extxosc_0mhz9_3mhz_1kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS
pub fn is_extxosc_3mhz_8mhz_258ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1
pub fn is_extxosc_3mhz_8mhz_1kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS
pub fn is_extxosc_8mhz_xx_258ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_258CK_14CK_4MS1
pub fn is_extxosc_8mhz_xx_1kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_14CK_65MS
pub fn is_extclk_6ck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_14CK_4MS1
pub fn is_pllclk_16kck_14ck_4ms(&self) -> bool[src]
Checks if the value of the field is PLLCLK_16KCK_14CK_4MS
pub fn is_intrcosc_8mhz_6ck_14ck_4ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_14CK_4MS
pub fn is_wdosc_128khz_6ck_14ck_4ms(&self) -> bool[src]
Checks if the value of the field is WDOSC_128KHZ_6CK_14CK_4MS
pub fn is_extlofxtal_1kck_14ck_4ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_1KCK_14CK_4MS
pub fn is_extxosc_0mhz4_0mhz9_258ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS
pub fn is_extxosc_0mhz4_0mhz9_16kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS
pub fn is_extxosc_0mhz9_3mhz_258ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS
pub fn is_extxosc_0mhz9_3mhz_16kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS
pub fn is_extxosc_3mhz_8mhz_258ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS
pub fn is_extxosc_3mhz_8mhz_16kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS
pub fn is_extxosc_8mhz_xx_258ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_258CK_14CK_65MS
pub fn is_extxosc_8mhz_xx_16kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_14CK_0MS
pub fn is_extclk_6ck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTCLK_6CK_14CK_65MS
pub fn is_pllclk_1kck_14ck_64ms(&self) -> bool[src]
Checks if the value of the field is PLLCLK_1KCK_14CK_64MS
pub fn is_intrcosc_8mhz_6ck_14ck_64ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_8MHZ_6CK_14CK_64MS
pub fn is_intrcosc_6mhz4_6ck_14ck_4ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_6MHZ4_6CK_14CK_4MS
pub fn is_wdosc_128khz_6ck_14ck_64ms(&self) -> bool[src]
Checks if the value of the field is WDOSC_128KHZ_6CK_14CK_64MS
pub fn is_extlofxtal_32kck_14ck_64ms(&self) -> bool[src]
Checks if the value of the field is EXTLOFXTAL_32KCK_14CK_64MS
pub fn is_extxosc_0mhz4_0mhz9_1kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS
pub fn is_extxosc_0mhz4_0mhz9_16kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1
pub fn is_extxosc_0mhz9_3mhz_1kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS
pub fn is_extxosc_0mhz9_3mhz_16kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1
pub fn is_extxosc_3mhz_8mhz_1kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS
pub fn is_extxosc_3mhz_8mhz_16kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1
pub fn is_extxosc_8mhz_xx_1kck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_14CK_0MS
pub fn is_extxosc_8mhz_xx_16kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1
pub fn is_pllclk_16kck_14ck_64ms(&self) -> bool[src]
Checks if the value of the field is PLLCLK_16KCK_14CK_64MS
pub fn is_intrcosc_6mhz4_1ck_14ck_0ms(&self) -> bool[src]
Checks if the value of the field is INTRCOSC_6MHZ4_1CK_14CK_0MS
pub fn is_extxosc_0mhz4_0mhz9_1kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1
pub fn is_extxosc_0mhz4_0mhz9_16kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS
pub fn is_extxosc_0mhz9_3mhz_1kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1
pub fn is_extxosc_0mhz9_3mhz_16kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS
pub fn is_extxosc_3mhz_8mhz_1kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1
pub fn is_extxosc_3mhz_8mhz_16kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS
pub fn is_extxosc_8mhz_xx_1kck_14ck_4ms1(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1
pub fn is_extxosc_8mhz_xx_16kck_14ck_65ms(&self) -> bool[src]
Checks if the value of the field is EXTXOSC_8MHZ_XX_16KCK_14CK_65MS
impl R<u8, Reg<u8, _LOW>>[src]
pub fn sut_cksel(&self) -> SUT_CKSEL_R[src]
Bits 0:5 - Select Clock source
pub fn ckout(&self) -> CKOUT_R[src]
Bit 6 - Clock output on PORTB4
pub fn ckdiv8(&self) -> CKDIV8_R[src]
Bit 7 - Divide clock by 8 internally
impl R<u8, LB_A>[src]
pub fn variant(&self) -> Variant<u8, LB_A>[src]
Get enumerated values variant
pub fn is_prog_ver_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_VER_DISABLED
pub fn is_prog_disabled(&self) -> bool[src]
Checks if the value of the field is PROG_DISABLED
pub fn is_no_lock(&self) -> bool[src]
Checks if the value of the field is NO_LOCK
impl R<u8, Reg<u8, _LOCKBIT>>[src]
impl R<u8, Reg<u8, _DDRB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
impl R<u8, Reg<u8, _PINB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
impl R<u8, Reg<u8, _PORTB>>[src]
pub fn pb0(&self) -> PB0_R[src]
Bit 0 - Pin B0
pub fn pb1(&self) -> PB1_R[src]
Bit 1 - Pin B1
pub fn pb2(&self) -> PB2_R[src]
Bit 2 - Pin B2
pub fn pb3(&self) -> PB3_R[src]
Bit 3 - Pin B3
pub fn pb4(&self) -> PB4_R[src]
Bit 4 - Pin B4
pub fn pb5(&self) -> PB5_R[src]
Bit 5 - Pin B5
impl R<u8, Reg<u8, _GTCCR>>[src]
pub fn psr0(&self) -> PSR0_R[src]
Bit 0 - Prescaler Reset Timer/Counter1 and Timer/Counter0
pub fn tsm(&self) -> TSM_R[src]
Bit 7 - Timer/Counter Synchronization Mode
impl R<u8, WGM0_A>[src]
pub fn variant(&self) -> WGM0_A[src]
Get enumerated values variant
pub fn is_normal_top(&self) -> bool[src]
Checks if the value of the field is NORMAL_TOP
pub fn is_pwm_phase(&self) -> bool[src]
Checks if the value of the field is PWM_PHASE
pub fn is_ctc(&self) -> bool[src]
Checks if the value of the field is CTC
pub fn is_pwm_fast(&self) -> bool[src]
Checks if the value of the field is PWM_FAST
impl R<u8, COM0B_A>[src]
pub fn variant(&self) -> COM0B_A[src]
Get enumerated values variant
pub fn is_disconnected(&self) -> bool[src]
Checks if the value of the field is DISCONNECTED
pub fn is_match_toggle(&self) -> bool[src]
Checks if the value of the field is MATCH_TOGGLE
pub fn is_match_clear(&self) -> bool[src]
Checks if the value of the field is MATCH_CLEAR
pub fn is_match_set(&self) -> bool[src]
Checks if the value of the field is MATCH_SET
impl R<u8, COM0A_A>[src]
pub fn variant(&self) -> COM0A_A[src]
Get enumerated values variant
pub fn is_disconnected(&self) -> bool[src]
Checks if the value of the field is DISCONNECTED
pub fn is_match_toggle(&self) -> bool[src]
Checks if the value of the field is MATCH_TOGGLE
pub fn is_match_clear(&self) -> bool[src]
Checks if the value of the field is MATCH_CLEAR
pub fn is_match_set(&self) -> bool[src]
Checks if the value of the field is MATCH_SET
impl R<u8, Reg<u8, _TCCR0A>>[src]
pub fn wgm0(&self) -> WGM0_R[src]
Bits 0:1 - Waveform Generation Mode
pub fn com0b(&self) -> COM0B_R[src]
Bits 4:5 - Compare Output B Mode
pub fn com0a(&self) -> COM0A_R[src]
Bits 6:7 - Compare Output A Mode
impl R<u8, CS0_A>[src]
pub fn variant(&self) -> CS0_A[src]
Get enumerated values variant
pub fn is_no_clock(&self) -> bool[src]
Checks if the value of the field is NO_CLOCK
pub fn is_direct(&self) -> bool[src]
Checks if the value of the field is DIRECT
pub fn is_prescale_8(&self) -> bool[src]
Checks if the value of the field is PRESCALE_8
pub fn is_prescale_64(&self) -> bool[src]
Checks if the value of the field is PRESCALE_64
pub fn is_prescale_256(&self) -> bool[src]
Checks if the value of the field is PRESCALE_256
pub fn is_prescale_1024(&self) -> bool[src]
Checks if the value of the field is PRESCALE_1024
pub fn is_ext_falling(&self) -> bool[src]
Checks if the value of the field is EXT_FALLING
pub fn is_ext_rising(&self) -> bool[src]
Checks if the value of the field is EXT_RISING
impl R<u8, Reg<u8, _TCCR0B>>[src]
pub fn cs0(&self) -> CS0_R[src]
Bits 0:2 - Clock Select
pub fn wgm02(&self) -> WGM02_R[src]
Bit 3 - Waveform Generation Mode High Bit (Enable Top: OCRA for PWM modes)
impl R<u8, Reg<u8, _TIFR>>[src]
pub fn tov0(&self) -> TOV0_R[src]
Bit 1 - Timer/Counter0 Overflow Flag
pub fn ocf0b(&self) -> OCF0B_R[src]
Bit 3 - Timer/Counter0 Output Compare Flag 0B
pub fn ocf0a(&self) -> OCF0A_R[src]
Bit 4 - Timer/Counter0 Output Compare Flag 0A
impl R<u8, Reg<u8, _TIMSK>>[src]
pub fn toie0(&self) -> TOIE0_R[src]
Bit 1 - Timer/Counter0 Overflow Interrupt Enable
pub fn ocie0b(&self) -> OCIE0B_R[src]
Bit 3 - Timer/Counter0 Output Compare Match B Interrupt Enable
pub fn ocie0a(&self) -> OCIE0A_R[src]
Bit 4 - Timer/Counter0 Output Compare Match A Interrupt Enable
impl R<u8, Reg<u8, _DT1A>>[src]
impl R<u8, Reg<u8, _DT1B>>[src]
impl R<u8, Reg<u8, _DTPS>>[src]
impl R<u8, Reg<u8, _GTCCR>>[src]
pub fn psr1(&self) -> PSR1_R[src]
Bit 1 - Prescaler Reset Timer/Counter1
pub fn foc1a(&self) -> FOC1A_R[src]
Bit 2 - Force Output Compare 1A
pub fn foc1b(&self) -> FOC1B_R[src]
Bit 3 - Force Output Compare Match 1B
pub fn com1b(&self) -> COM1B_R[src]
Bits 4:5 - Comparator B Output Mode
pub fn pwm1b(&self) -> PWM1B_R[src]
Bit 6 - Pulse Width Modulator B Enable
impl R<u8, CS1_A>[src]
pub fn variant(&self) -> CS1_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
pub fn is_val_0x04(&self) -> bool[src]
Checks if the value of the field is VAL_0X04
pub fn is_val_0x05(&self) -> bool[src]
Checks if the value of the field is VAL_0X05
pub fn is_val_0x06(&self) -> bool[src]
Checks if the value of the field is VAL_0X06
pub fn is_val_0x07(&self) -> bool[src]
Checks if the value of the field is VAL_0X07
pub fn is_val_0x08(&self) -> bool[src]
Checks if the value of the field is VAL_0X08
pub fn is_val_0x09(&self) -> bool[src]
Checks if the value of the field is VAL_0X09
pub fn is_val_0x0a(&self) -> bool[src]
Checks if the value of the field is VAL_0X0A
pub fn is_val_0x0b(&self) -> bool[src]
Checks if the value of the field is VAL_0X0B
pub fn is_val_0x0c(&self) -> bool[src]
Checks if the value of the field is VAL_0X0C
pub fn is_val_0x0d(&self) -> bool[src]
Checks if the value of the field is VAL_0X0D
pub fn is_val_0x0e(&self) -> bool[src]
Checks if the value of the field is VAL_0X0E
pub fn is_val_0x0f(&self) -> bool[src]
Checks if the value of the field is VAL_0X0F
impl R<u8, COM1A_A>[src]
pub fn variant(&self) -> COM1A_A[src]
Get enumerated values variant
pub fn is_val_0x00(&self) -> bool[src]
Checks if the value of the field is VAL_0X00
pub fn is_val_0x01(&self) -> bool[src]
Checks if the value of the field is VAL_0X01
pub fn is_val_0x02(&self) -> bool[src]
Checks if the value of the field is VAL_0X02
pub fn is_val_0x03(&self) -> bool[src]
Checks if the value of the field is VAL_0X03
impl R<u8, Reg<u8, _TCCR1>>[src]
pub fn cs1(&self) -> CS1_R[src]
Bits 0:3 - Clock Select Bits
pub fn com1a(&self) -> COM1A_R[src]
Bits 4:5 - Compare Output Mode, Bits
pub fn pwm1a(&self) -> PWM1A_R[src]
Bit 6 - Pulse Width Modulator Enable
pub fn ctc1(&self) -> CTC1_R[src]
Bit 7 - Clear Timer/Counter on Compare Match
impl R<u8, Reg<u8, _TIFR>>[src]
pub fn tov1(&self) -> TOV1_R[src]
Bit 2 - Timer/Counter1 Overflow Flag
pub fn ocf1b(&self) -> OCF1B_R[src]
Bit 5 - Timer/Counter1 Output Compare Flag 1B
pub fn ocf1a(&self) -> OCF1A_R[src]
Bit 6 - Timer/Counter1 Output Compare Flag 1A
impl R<u8, Reg<u8, _TIMSK>>[src]
pub fn toie1(&self) -> TOIE1_R[src]
Bit 2 - Timer/Counter1 Overflow Interrupt Enable
pub fn ocie1b(&self) -> OCIE1B_R[src]
Bit 5 - OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable
pub fn ocie1a(&self) -> OCIE1A_R[src]
Bit 6 - OCIE1A: Timer/Counter1 Output Compare Interrupt Enable
impl R<u8, USICS_A>[src]
pub fn variant(&self) -> USICS_A[src]
Get enumerated values variant
pub fn is_no_clock(&self) -> bool[src]
Checks if the value of the field is NO_CLOCK
pub fn is_tc0(&self) -> bool[src]
Checks if the value of the field is TC0
pub fn is_ext_pos(&self) -> bool[src]
Checks if the value of the field is EXT_POS
pub fn is_ext_neg(&self) -> bool[src]
Checks if the value of the field is EXT_NEG
impl R<u8, USIWM_A>[src]
pub fn variant(&self) -> USIWM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_three_wire(&self) -> bool[src]
Checks if the value of the field is THREE_WIRE
pub fn is_two_wire_slave(&self) -> bool[src]
Checks if the value of the field is TWO_WIRE_SLAVE
pub fn is_two_wire_master(&self) -> bool[src]
Checks if the value of the field is TWO_WIRE_MASTER
impl R<u8, Reg<u8, _USICR>>[src]
pub fn usics(&self) -> USICS_R[src]
Bits 2:3 - USI Clock Source Select Bits
pub fn usiwm(&self) -> USIWM_R[src]
Bits 4:5 - USI Wire Mode Bits
pub fn usioie(&self) -> USIOIE_R[src]
Bit 6 - Counter Overflow Interrupt Enable
pub fn usisie(&self) -> USISIE_R[src]
Bit 7 - Start Condition Interrupt Enable
impl R<u8, Reg<u8, _USISR>>[src]
pub fn usicnt(&self) -> USICNT_R[src]
Bits 0:3 - USI Counter Value Bits
pub fn usidc(&self) -> USIDC_R[src]
Bit 4 - Data Output Collision
pub fn usipf(&self) -> USIPF_R[src]
Bit 5 - Stop Condition Flag
pub fn usioif(&self) -> USIOIF_R[src]
Bit 6 - Counter Overflow Interrupt Flag
pub fn usisif(&self) -> USISIF_R[src]
Bit 7 - Start Condition Interrupt Flag
impl R<u8, WDPL_A>[src]
pub fn variant(&self) -> WDPL_A[src]
Get enumerated values variant
pub fn is_cycles_2k_512k(&self) -> bool[src]
Checks if the value of the field is CYCLES_2K_512K
pub fn is_cycles_4k_1024k(&self) -> bool[src]
Checks if the value of the field is CYCLES_4K_1024K
pub fn is_cycles_8k(&self) -> bool[src]
Checks if the value of the field is CYCLES_8K
pub fn is_cycles_16k(&self) -> bool[src]
Checks if the value of the field is CYCLES_16K
pub fn is_cycles_32k(&self) -> bool[src]
Checks if the value of the field is CYCLES_32K
pub fn is_cycles_64k(&self) -> bool[src]
Checks if the value of the field is CYCLES_64K
pub fn is_cycles_128k(&self) -> bool[src]
Checks if the value of the field is CYCLES_128K
pub fn is_cycles_256k(&self) -> bool[src]
Checks if the value of the field is CYCLES_256K
impl R<u8, Reg<u8, _WDTCR>>[src]
pub fn wde(&self) -> WDE_R[src]
Bit 3 - Watch Dog Enable
pub fn wdce(&self) -> WDCE_R[src]
Bit 4 - Watchdog Change Enable
pub fn wdie(&self) -> WDIE_R[src]
Bit 6 - Watchdog Timeout Interrupt Enable
pub fn wdif(&self) -> WDIF_R[src]
Bit 7 - Watchdog Timeout Interrupt Flag
pub fn wdpl(&self) -> WDPL_R[src]
Bits 0:2 - Watchdog Timer Prescaler - Low Bits
pub fn wdph(&self) -> WDPH_R[src]
Bit 5 - Watchdog Timer Prescaler - High Bit
Trait Implementations
Auto Trait Implementations
impl<U, T> Send for R<U, T> where
T: Send,
U: Send,
T: Send,
U: Send,
impl<U, T> Sync for R<U, T> where
T: Sync,
U: Sync,
T: Sync,
U: Sync,
impl<U, T> Unpin for R<U, T> where
T: Unpin,
U: Unpin,
T: Unpin,
U: Unpin,
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized, [src]
T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized, [src]
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized, [src]
T: ?Sized,
fn borrow_mut(&mut self) -> &mut T[src]
impl<T> From<T> for T[src]
impl<T, U> Into<U> for T where
U: From<T>, [src]
U: From<T>,
impl<T, U> TryFrom<U> for T where
U: Into<T>, [src]
U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>[src]
impl<T, U> TryInto<U> for T where
U: TryFrom<T>, [src]
U: TryFrom<T>,