Constantsยง
- ADDR_
CTL_ FLAG - ADDR_
DEBUG_ VALU E0_ 0 - ADDR_
DEBUG_ VALU E0_ 1 - ADDR_
DEBUG_ VALU E0_ 2 - ADDR_
DEBUG_ VALU E0_ 3 - ADDR_
DEBUG_ VALU E1_ 0 - ADDR_
DEBUG_ VALU E1_ 1 - ADDR_
DEBUG_ VALU E1_ 2 - ADDR_
DEBUG_ VALU E1_ 3 - ADDR_
DEBUG_ VALU E2_ 0 - ADDR_
DEBUG_ VALU E2_ 1 - ADDR_
DEBUG_ VALU E2_ 2 - ADDR_
DEBUG_ VALU E2_ 3 - ADDR_
DEBUG_ VALU E3_ 0 - ADDR_
DEBUG_ VALU E3_ 1 - ADDR_
DEBUG_ VALU E3_ 2 - ADDR_
DEBUG_ VALU E3_ 3 - ADDR_
ECAT_ SYNC_ TIME_ 0 - ADDR_
ECAT_ SYNC_ TIME_ 1 - ADDR_
ECAT_ SYNC_ TIME_ 2 - ADDR_
ECAT_ SYNC_ TIME_ 3 - ADDR_
FPGA_ STATE - ADDR_
MOD_ CYCL E0 - ADDR_
MOD_ CYCL E1 - ADDR_
MOD_ FREQ_ DIV0 - ADDR_
MOD_ FREQ_ DIV1 - ADDR_
MOD_ MEM_ WR_ SEGMENT - ADDR_
MOD_ REP0 - ADDR_
MOD_ REP1 - ADDR_
MOD_ REQ_ RD_ SEGMENT - ADDR_
MOD_ TRANSITION_ MODE - ADDR_
MOD_ TRANSITION_ VALUE_ 0 - ADDR_
MOD_ TRANSITION_ VALUE_ 1 - ADDR_
MOD_ TRANSITION_ VALUE_ 2 - ADDR_
MOD_ TRANSITION_ VALUE_ 3 - ADDR_
SILENCER_ COMPLETION_ STEPS_ INTENSITY - ADDR_
SILENCER_ COMPLETION_ STEPS_ PHASE - ADDR_
SILENCER_ FLAG - ADDR_
SILENCER_ UPDATE_ RATE_ INTENSITY - ADDR_
SILENCER_ UPDATE_ RATE_ PHASE - ADDR_
STM_ CYCL E0 - ADDR_
STM_ CYCL E1 - ADDR_
STM_ FREQ_ DIV0 - ADDR_
STM_ FREQ_ DIV1 - ADDR_
STM_ MEM_ WR_ PAGE - ADDR_
STM_ MEM_ WR_ SEGMENT - ADDR_
STM_ MODE0 - ADDR_
STM_ MODE1 - ADDR_
STM_ NUM_ FOCI0 - ADDR_
STM_ NUM_ FOCI1 - ADDR_
STM_ REP0 - ADDR_
STM_ REP1 - ADDR_
STM_ REQ_ RD_ SEGMENT - ADDR_
STM_ SOUND_ SPEE D0 - ADDR_
STM_ SOUND_ SPEE D1 - ADDR_
STM_ TRANSITION_ MODE - ADDR_
STM_ TRANSITION_ VALUE_ 0 - ADDR_
STM_ TRANSITION_ VALUE_ 1 - ADDR_
STM_ TRANSITION_ VALUE_ 2 - ADDR_
STM_ TRANSITION_ VALUE_ 3 - ADDR_
VERSION_ NUM_ MAJOR - ADDR_
VERSION_ NUM_ MINOR - BRAM_
CNT_ SELECT_ CLOCK - BRAM_
CNT_ SEL_ MAIN - BRAM_
CNT_ SEL_ PHASE_ CORR - BRAM_
SELECT_ CONTROLLER - BRAM_
SELECT_ MOD - BRAM_
SELECT_ PWE_ TABLE - BRAM_
SELECT_ STM - CLK_
FLAG_ BEGIN - CLK_
FLAG_ END - CPU_
VERSION_ MAJOR - CPU_
VERSION_ MINOR - CTL_
FLAG_ BIT_ GPIO_ IN_ 0 - CTL_
FLAG_ BIT_ GPIO_ IN_ 1 - CTL_
FLAG_ BIT_ GPIO_ IN_ 2 - CTL_
FLAG_ BIT_ GPIO_ IN_ 3 - CTL_
FLAG_ DEBUG_ SET - CTL_
FLAG_ DEBUG_ SET_ BIT - CTL_
FLAG_ FORCE_ FAN - CTL_
FLAG_ FORCE_ FAN_ BIT - CTL_
FLAG_ GPIO_ IN_ 0 - CTL_
FLAG_ GPIO_ IN_ 1 - CTL_
FLAG_ GPIO_ IN_ 2 - CTL_
FLAG_ GPIO_ IN_ 3 - CTL_
FLAG_ MOD_ SET - CTL_
FLAG_ MOD_ SET_ BIT - CTL_
FLAG_ SILENCER_ SET - CTL_
FLAG_ SILENCER_ SET_ BIT - CTL_
FLAG_ STM_ SET - CTL_
FLAG_ STM_ SET_ BIT - CTL_
FLAG_ SYNC_ SET - CTL_
FLAG_ SYNC_ SET_ BIT - ERR_BIT
- ERR_
CLK_ INCOMPLETE_ DATA - ERR_
INVALID_ GAIN_ STM_ MODE - ERR_
INVALID_ INFO_ TYPE - ERR_
INVALID_ MODE - ERR_
INVALID_ MSG_ ID - ERR_
INVALID_ PWE_ DATA_ SIZE - ERR_
INVALID_ SEGMENT_ TRANSITION - ERR_
INVALID_ SILENCER_ SETTING - ERR_
INVALID_ TRANSITION_ MODE - ERR_
MISS_ TRANSITION_ TIME - ERR_
NOT_ SUPPORTED_ TAG - FOCI_
STM_ FLAG_ BEGIN - FOCI_
STM_ FLAG_ END - FOCI_
STM_ FLAG_ UPDATE - FPGA_
STATE_ BIT_ READS_ FPGA_ STATE_ ENABLED - FPGA_
STATE_ READS_ FPGA_ STATE_ ENABLED - GAIN_
FLAG_ UPDATE - GAIN_
STM_ FLAG_ BEGIN - GAIN_
STM_ FLAG_ END - GAIN_
STM_ FLAG_ SEGMENT - GAIN_
STM_ FLAG_ UPDATE - GAIN_
STM_ MODE_ INTENSITY_ PHASE_ FULL - GAIN_
STM_ MODE_ PHASE_ FULL - GAIN_
STM_ MODE_ PHASE_ HALF - GPIO_
IN_ FLAG_ 0 - GPIO_
IN_ FLAG_ 1 - GPIO_
IN_ FLAG_ 2 - GPIO_
IN_ FLAG_ 3 - INFO_
TYPE_ CLEAR - INFO_
TYPE_ CPU_ VERSION_ MAJOR - INFO_
TYPE_ CPU_ VERSION_ MINOR - INFO_
TYPE_ FPGA_ FUNCTIONS - INFO_
TYPE_ FPGA_ VERSION_ MAJOR - INFO_
TYPE_ FPGA_ VERSION_ MINOR - MICROSECONDS
- MILLISECONDS
- MODULATION_
FLAG_ BEGIN - MODULATION_
FLAG_ END - MODULATION_
FLAG_ SEGMENT - MODULATION_
FLAG_ UPDATE - NANOSECONDS
- NO_ERR
- SILENCER_
FLAG_ BIT_ FIXED_ UPDATE_ RATE_ MODE - SILENCER_
FLAG_ BIT_ PULSE_ WIDTH - SILENCER_
FLAG_ FIXED_ UPDATE_ RATE_ MODE - SILENCER_
FLAG_ PULSE_ WIDTH - SILENCER_
FLAG_ STRICT_ MODE - STM_
MODE_ FOCUS - STM_
MODE_ GAIN - SYS_
TIME_ TRANSITION_ MARGIN - TAG_
CLEAR - TAG_
CONFIG_ FPGA_ CLK - TAG_
CONFIG_ PULSE_ WIDTH_ ENCODER - TAG_
CPU_ GPIO_ OUT - TAG_
DEBUG - TAG_
EMULATE_ GPIO_ IN - TAG_
FIRM_ INFO - TAG_
FOCI_ STM - TAG_
FOCI_ STM_ CHANGE_ SEGMENT - TAG_
FORCE_ FAN - TAG_
GAIN - TAG_
GAIN_ CHANGE_ SEGMENT - TAG_
GAIN_ STM - TAG_
GAIN_ STM_ CHANGE_ SEGMENT - TAG_
MODULATION - TAG_
MODULATION_ CHANGE_ SEGMENT - TAG_
PHASE_ CORRECTION - TAG_
READS_ FPGA_ STATE - TAG_
SILENCER - TAG_
SYNC - TRANSITION_
MODE_ EXT - TRANSITION_
MODE_ GPIO - TRANSITION_
MODE_ IMMEDIATE - TRANSITION_
MODE_ NONE - TRANSITION_
MODE_ SYNC_ IDX - TRANSITION_
MODE_ SYS_ TIME - TRANS_
NUM