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RegisterBlock

atsamv71j21::tc0

Struct RegisterBlock 

Source 
pub struct RegisterBlock {
    pub tc_channel0: TC_CHANNEL,
    pub tc_channel1: TC_CHANNEL,
    pub tc_channel2: TC_CHANNEL,
    pub tc_bcr: Reg<TC_BCR_SPEC>,
    pub tc_bmr: Reg<TC_BMR_SPEC>,
    pub tc_qier: Reg<TC_QIER_SPEC>,
    pub tc_qidr: Reg<TC_QIDR_SPEC>,
    pub tc_qimr: Reg<TC_QIMR_SPEC>,
    pub tc_qisr: Reg<TC_QISR_SPEC>,
    pub tc_fmr: Reg<TC_FMR_SPEC>,
    pub tc_wpmr: Reg<TC_WPMR_SPEC>,
    pub tc_ver: Reg<TC_VER_SPEC>,
    /* private fields */
}
Expand description

Register block

Fields§

§tc_channel0: TC_CHANNEL

0x00..0x34 - Channel Control Register (channel = 0)

§tc_channel1: TC_CHANNEL

0x40..0x74 - Channel Control Register (channel = 0)

§tc_channel2: TC_CHANNEL

0x80..0xb4 - Channel Control Register (channel = 0)

§tc_bcr: Reg<TC_BCR_SPEC>

0xc0 - Block Control Register

§tc_bmr: Reg<TC_BMR_SPEC>

0xc4 - Block Mode Register

§tc_qier: Reg<TC_QIER_SPEC>

0xc8 - QDEC Interrupt Enable Register

§tc_qidr: Reg<TC_QIDR_SPEC>

0xcc - QDEC Interrupt Disable Register

§tc_qimr: Reg<TC_QIMR_SPEC>

0xd0 - QDEC Interrupt Mask Register

§tc_qisr: Reg<TC_QISR_SPEC>

0xd4 - QDEC Interrupt Status Register

§tc_fmr: Reg<TC_FMR_SPEC>

0xd8 - Fault Mode Register

§tc_wpmr: Reg<TC_WPMR_SPEC>

0xe4 - Write Protection Mode Register

§tc_ver: Reg<TC_VER_SPEC>

0xfc - Version Register

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