pub struct RegisterBlock {Show 46 fields
pub pwm_clk: Reg<PWM_CLK_SPEC>,
pub pwm_ena: Reg<PWM_ENA_SPEC>,
pub pwm_dis: Reg<PWM_DIS_SPEC>,
pub pwm_sr: Reg<PWM_SR_SPEC>,
pub pwm_ier1: Reg<PWM_IER1_SPEC>,
pub pwm_idr1: Reg<PWM_IDR1_SPEC>,
pub pwm_imr1: Reg<PWM_IMR1_SPEC>,
pub pwm_isr1: Reg<PWM_ISR1_SPEC>,
pub pwm_scm: Reg<PWM_SCM_SPEC>,
pub pwm_dmar: Reg<PWM_DMAR_SPEC>,
pub pwm_scuc: Reg<PWM_SCUC_SPEC>,
pub pwm_scup: Reg<PWM_SCUP_SPEC>,
pub pwm_scupupd: Reg<PWM_SCUPUPD_SPEC>,
pub pwm_ier2: Reg<PWM_IER2_SPEC>,
pub pwm_idr2: Reg<PWM_IDR2_SPEC>,
pub pwm_imr2: Reg<PWM_IMR2_SPEC>,
pub pwm_isr2: Reg<PWM_ISR2_SPEC>,
pub pwm_oov: Reg<PWM_OOV_SPEC>,
pub pwm_os: Reg<PWM_OS_SPEC>,
pub pwm_oss: Reg<PWM_OSS_SPEC>,
pub pwm_osc: Reg<PWM_OSC_SPEC>,
pub pwm_ossupd: Reg<PWM_OSSUPD_SPEC>,
pub pwm_oscupd: Reg<PWM_OSCUPD_SPEC>,
pub pwm_fmr: Reg<PWM_FMR_SPEC>,
pub pwm_fsr: Reg<PWM_FSR_SPEC>,
pub pwm_fcr: Reg<PWM_FCR_SPEC>,
pub pwm_fpv1: Reg<PWM_FPV1_SPEC>,
pub pwm_fpe: Reg<PWM_FPE_SPEC>,
pub pwm_elmr: [Reg<PWM_ELMR_SPEC>; 2],
pub pwm_sspr: Reg<PWM_SSPR_SPEC>,
pub pwm_sspup: Reg<PWM_SSPUP_SPEC>,
pub pwm_smmr: Reg<PWM_SMMR_SPEC>,
pub pwm_fpv2: Reg<PWM_FPV2_SPEC>,
pub pwm_wpcr: Reg<PWM_WPCR_SPEC>,
pub pwm_wpsr: Reg<PWM_WPSR_SPEC>,
pub pwm_version: Reg<PWM_VERSION_SPEC>,
pub pwm_cmp: [PWM_CMP; 8],
pub pwm_ch_num: [PWM_CH_NUM; 4],
pub pwm_cmupd0: Reg<PWM_CMUPD0_SPEC>,
pub pwm_cmupd1: Reg<PWM_CMUPD1_SPEC>,
pub pwm_etrg1: Reg<PWM_ETRG1_SPEC>,
pub pwm_lebr1: Reg<PWM_LEBR1_SPEC>,
pub pwm_cmupd2: Reg<PWM_CMUPD2_SPEC>,
pub pwm_etrg2: Reg<PWM_ETRG2_SPEC>,
pub pwm_lebr2: Reg<PWM_LEBR2_SPEC>,
pub pwm_cmupd3: Reg<PWM_CMUPD3_SPEC>,
/* private fields */
}Expand description
Register block
Fields§
§pwm_clk: Reg<PWM_CLK_SPEC>0x00 - PWM Clock Register
pwm_ena: Reg<PWM_ENA_SPEC>0x04 - PWM Enable Register
pwm_dis: Reg<PWM_DIS_SPEC>0x08 - PWM Disable Register
pwm_sr: Reg<PWM_SR_SPEC>0x0c - PWM Status Register
pwm_ier1: Reg<PWM_IER1_SPEC>0x10 - PWM Interrupt Enable Register 1
pwm_idr1: Reg<PWM_IDR1_SPEC>0x14 - PWM Interrupt Disable Register 1
pwm_imr1: Reg<PWM_IMR1_SPEC>0x18 - PWM Interrupt Mask Register 1
pwm_isr1: Reg<PWM_ISR1_SPEC>0x1c - PWM Interrupt Status Register 1
pwm_scm: Reg<PWM_SCM_SPEC>0x20 - PWM Sync Channels Mode Register
pwm_dmar: Reg<PWM_DMAR_SPEC>0x24 - PWM DMA Register
pwm_scuc: Reg<PWM_SCUC_SPEC>0x28 - PWM Sync Channels Update Control Register
pwm_scup: Reg<PWM_SCUP_SPEC>0x2c - PWM Sync Channels Update Period Register
pwm_scupupd: Reg<PWM_SCUPUPD_SPEC>0x30 - PWM Sync Channels Update Period Update Register
pwm_ier2: Reg<PWM_IER2_SPEC>0x34 - PWM Interrupt Enable Register 2
pwm_idr2: Reg<PWM_IDR2_SPEC>0x38 - PWM Interrupt Disable Register 2
pwm_imr2: Reg<PWM_IMR2_SPEC>0x3c - PWM Interrupt Mask Register 2
pwm_isr2: Reg<PWM_ISR2_SPEC>0x40 - PWM Interrupt Status Register 2
pwm_oov: Reg<PWM_OOV_SPEC>0x44 - PWM Output Override Value Register
pwm_os: Reg<PWM_OS_SPEC>0x48 - PWM Output Selection Register
pwm_oss: Reg<PWM_OSS_SPEC>0x4c - PWM Output Selection Set Register
pwm_osc: Reg<PWM_OSC_SPEC>0x50 - PWM Output Selection Clear Register
pwm_ossupd: Reg<PWM_OSSUPD_SPEC>0x54 - PWM Output Selection Set Update Register
pwm_oscupd: Reg<PWM_OSCUPD_SPEC>0x58 - PWM Output Selection Clear Update Register
pwm_fmr: Reg<PWM_FMR_SPEC>0x5c - PWM Fault Mode Register
pwm_fsr: Reg<PWM_FSR_SPEC>0x60 - PWM Fault Status Register
pwm_fcr: Reg<PWM_FCR_SPEC>0x64 - PWM Fault Clear Register
pwm_fpv1: Reg<PWM_FPV1_SPEC>0x68 - PWM Fault Protection Value Register 1
pwm_fpe: Reg<PWM_FPE_SPEC>0x6c - PWM Fault Protection Enable Register
pwm_elmr: [Reg<PWM_ELMR_SPEC>; 2]0x7c..0x84 - PWM Event Line 0 Mode Register 0
pwm_sspr: Reg<PWM_SSPR_SPEC>0xa0 - PWM Spread Spectrum Register
pwm_sspup: Reg<PWM_SSPUP_SPEC>0xa4 - PWM Spread Spectrum Update Register
pwm_smmr: Reg<PWM_SMMR_SPEC>0xb0 - PWM Stepper Motor Mode Register
pwm_fpv2: Reg<PWM_FPV2_SPEC>0xc0 - PWM Fault Protection Value 2 Register
pwm_wpcr: Reg<PWM_WPCR_SPEC>0xe4 - PWM Write Protection Control Register
pwm_wpsr: Reg<PWM_WPSR_SPEC>0xe8 - PWM Write Protection Status Register
pwm_version: Reg<PWM_VERSION_SPEC>0xfc - Version Register
pwm_cmp: [PWM_CMP; 8]0x130..0x1b0 - PWM Comparison 0 Value Register
pwm_ch_num: [PWM_CH_NUM; 4]0x200..0x280 - PWM Channel Mode Register (ch_num = 0)
pwm_cmupd0: Reg<PWM_CMUPD0_SPEC>0x400 - PWM Channel Mode Update Register (ch_num = 0)
pwm_cmupd1: Reg<PWM_CMUPD1_SPEC>0x420 - PWM Channel Mode Update Register (ch_num = 1)
pwm_etrg1: Reg<PWM_ETRG1_SPEC>0x42c - PWM External Trigger Register (trg_num = 1)
pwm_lebr1: Reg<PWM_LEBR1_SPEC>0x430 - PWM Leading-Edge Blanking Register (trg_num = 1)
pwm_cmupd2: Reg<PWM_CMUPD2_SPEC>0x440 - PWM Channel Mode Update Register (ch_num = 2)
pwm_etrg2: Reg<PWM_ETRG2_SPEC>0x44c - PWM External Trigger Register (trg_num = 2)
pwm_lebr2: Reg<PWM_LEBR2_SPEC>0x450 - PWM Leading-Edge Blanking Register (trg_num = 2)
pwm_cmupd3: Reg<PWM_CMUPD3_SPEC>0x460 - PWM Channel Mode Update Register (ch_num = 3)