[−][src]Type Definition atsame70q21b::isi::ISI_DMA_CHDR
type ISI_DMA_CHDR = Reg<u32, _ISI_DMA_CHDR>;
DMA Channel Disable Register
This register you can reset
, write
, write_with_zero
. See API.
For information about available fields see isi_dma_chdr module
Trait Implementations
impl ResetValue for ISI_DMA_CHDR
[src]
Register ISI_DMA_CHDR reset()
's with value 0
impl Writable for ISI_DMA_CHDR
[src]
write(|w| ..)
method takes isi_dma_chdr::W writer structure