Struct atsame70n21b::pmc::RegisterBlock
source · #[repr(C)]pub struct RegisterBlock {Show 37 fields
pub scer: SCER,
pub scdr: SCDR,
pub scsr: SCSR,
pub pcer0: PCER0,
pub pcdr0: PCDR0,
pub pcsr0: PCSR0,
pub ckgr_uckr: CKGR_UCKR,
pub ckgr_mor: CKGR_MOR,
pub ckgr_mcfr: CKGR_MCFR,
pub ckgr_pllar: CKGR_PLLAR,
pub mckr: MCKR,
pub usb: USB,
pub pck: [PCK; 8],
pub ier: IER,
pub idr: IDR,
pub sr: SR,
pub imr: IMR,
pub fsmr: FSMR,
pub fspr: FSPR,
pub focr: FOCR,
pub wpmr: WPMR,
pub wpsr: WPSR,
pub pcer1: PCER1,
pub pcdr1: PCDR1,
pub pcsr1: PCSR1,
pub pcr: PCR,
pub ocr: OCR,
pub slpwk_er0: SLPWK_ER0,
pub slpwk_dr0: SLPWK_DR0,
pub slpwk_sr0: SLPWK_SR0,
pub slpwk_asr0: SLPWK_ASR0,
pub pmmr: PMMR,
pub slpwk_er1: SLPWK_ER1,
pub slpwk_dr1: SLPWK_DR1,
pub slpwk_sr1: SLPWK_SR1,
pub slpwk_asr1: SLPWK_ASR1,
pub slpwk_aipr: SLPWK_AIPR,
/* private fields */
}
Expand description
Register block
Fields§
§scer: SCER
0x00 - System Clock Enable Register
scdr: SCDR
0x04 - System Clock Disable Register
scsr: SCSR
0x08 - System Clock Status Register
pcer0: PCER0
0x10 - Peripheral Clock Enable Register 0
pcdr0: PCDR0
0x14 - Peripheral Clock Disable Register 0
pcsr0: PCSR0
0x18 - Peripheral Clock Status Register 0
ckgr_uckr: CKGR_UCKR
0x1c - UTMI Clock Register
ckgr_mor: CKGR_MOR
0x20 - Main Oscillator Register
ckgr_mcfr: CKGR_MCFR
0x24 - Main Clock Frequency Register
ckgr_pllar: CKGR_PLLAR
0x28 - PLLA Register
mckr: MCKR
0x30 - Master Clock Register
usb: USB
0x38 - USB Clock Register
pck: [PCK; 8]
0x40..0x60 - Programmable Clock Register
ier: IER
0x60 - Interrupt Enable Register
idr: IDR
0x64 - Interrupt Disable Register
sr: SR
0x68 - Status Register
imr: IMR
0x6c - Interrupt Mask Register
fsmr: FSMR
0x70 - Fast Startup Mode Register
fspr: FSPR
0x74 - Fast Startup Polarity Register
focr: FOCR
0x78 - Fault Output Clear Register
wpmr: WPMR
0xe4 - Write Protection Mode Register
wpsr: WPSR
0xe8 - Write Protection Status Register
pcer1: PCER1
0x100 - Peripheral Clock Enable Register 1
pcdr1: PCDR1
0x104 - Peripheral Clock Disable Register 1
pcsr1: PCSR1
0x108 - Peripheral Clock Status Register 1
pcr: PCR
0x10c - Peripheral Control Register
ocr: OCR
0x110 - Oscillator Calibration Register
slpwk_er0: SLPWK_ER0
0x114 - SleepWalking Enable Register 0
slpwk_dr0: SLPWK_DR0
0x118 - SleepWalking Disable Register 0
slpwk_sr0: SLPWK_SR0
0x11c - SleepWalking Status Register 0
slpwk_asr0: SLPWK_ASR0
0x120 - SleepWalking Activity Status Register 0
pmmr: PMMR
0x130 - PLL Maximum Multiplier Value Register
slpwk_er1: SLPWK_ER1
0x134 - SleepWalking Enable Register 1
slpwk_dr1: SLPWK_DR1
0x138 - SleepWalking Disable Register 1
slpwk_sr1: SLPWK_SR1
0x13c - SleepWalking Status Register 1
slpwk_asr1: SLPWK_ASR1
0x140 - SleepWalking Activity Status Register 1
slpwk_aipr: SLPWK_AIPR
0x144 - SleepWalking Activity In Progress Register