[][src]Type Definition atsame70j21b::twihs0::twihs_smr::W

type W = W<u32, TWIHS_SMR>;

Writer for register TWIHS_SMR

Implementations

impl W[src]

pub fn nacken(&mut self) -> NACKEN_W[src]

Bit 0 - Slave Receiver Data Phase NACK enable

pub fn smda(&mut self) -> SMDA_W[src]

Bit 2 - SMBus Default Address

pub fn smhh(&mut self) -> SMHH_W[src]

Bit 3 - SMBus Host Header

pub fn sclwsdis(&mut self) -> SCLWSDIS_W[src]

Bit 6 - Clock Wait State Disable

pub fn mask(&mut self) -> MASK_W[src]

Bits 8:14 - Slave Address Mask

pub fn sadr(&mut self) -> SADR_W[src]

Bits 16:22 - Slave Address

pub fn sadr1en(&mut self) -> SADR1EN_W[src]

Bit 28 - Slave Address 1 Enable

pub fn sadr2en(&mut self) -> SADR2EN_W[src]

Bit 29 - Slave Address 2 Enable

pub fn sadr3en(&mut self) -> SADR3EN_W[src]

Bit 30 - Slave Address 3 Enable

pub fn datamen(&mut self) -> DATAMEN_W[src]

Bit 31 - Data Matching Enable