Struct atsame70j21b::generic::W

pub struct W<U, REG> { /* fields omitted */ }

Register writer

Used as an argument to the closures in the write and modify methods of the register

Implementations

impl<U, REG> W<U, REG>

pub unsafe fn bits(&mut self, bits: U) -> &mut Self

Writes raw bits to the register

impl W<u32, Reg<u32, _ACC_CR>>

pub fn swrst(&mut self) -> SWRST_W

Bit 0 - Software Reset

impl W<u32, Reg<u32, _ACC_MR>>

pub fn selminus(&mut self) -> SELMINUS_W

Bits 0:2 - Selection for Minus Comparator Input

pub fn selplus(&mut self) -> SELPLUS_W

Bits 4:6 - Selection For Plus Comparator Input

pub fn acen(&mut self) -> ACEN_W

Bit 8 - Analog Comparator Enable

pub fn edgetyp(&mut self) -> EDGETYP_W

Bits 9:10 - Edge Type

pub fn inv(&mut self) -> INV_W

Bit 12 - Invert Comparator Output

pub fn selfs(&mut self) -> SELFS_W

Bit 13 - Selection Of Fault Source

pub fn fe(&mut self) -> FE_W

Bit 14 - Fault Enable

impl W<u32, Reg<u32, _ACC_IER>>

pub fn ce(&mut self) -> CE_W

Bit 0 - Comparison Edge

impl W<u32, Reg<u32, _ACC_IDR>>

pub fn ce(&mut self) -> CE_W

Bit 0 - Comparison Edge

impl W<u32, Reg<u32, _ACC_ACR>>

pub fn isel(&mut self) -> ISEL_W

Bit 0 - Current Selection

pub fn hyst(&mut self) -> HYST_W

Bits 1:2 - Hysteresis Selection

impl W<u32, Reg<u32, _ACC_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _AES_CR>>

pub fn start(&mut self) -> START_W

Bit 0 - Start Processing

pub fn swrst(&mut self) -> SWRST_W

Bit 8 - Software Reset

pub fn loadseed(&mut self) -> LOADSEED_W

Bit 16 - Random Number Generator Seed Loading

impl W<u32, Reg<u32, _AES_MR>>

pub fn cipher(&mut self) -> CIPHER_W

Bit 0 - Processing Mode

pub fn gtagen(&mut self) -> GTAGEN_W

Bit 1 - GCM Automatic Tag Generation Enable

pub fn dualbuff(&mut self) -> DUALBUFF_W

Bit 3 - Dual Input Buffer

pub fn procdly(&mut self) -> PROCDLY_W

Bits 4:7 - Processing Delay

pub fn smod(&mut self) -> SMOD_W

Bits 8:9 - Start Mode

pub fn keysize(&mut self) -> KEYSIZE_W

Bits 10:11 - Key Size

pub fn opmod(&mut self) -> OPMOD_W

Bits 12:14 - Operating Mode

pub fn lod(&mut self) -> LOD_W

Bit 15 - Last Output Data Mode

pub fn cfbs(&mut self) -> CFBS_W

Bits 16:18 - Cipher Feedback Data Size

pub fn ckey(&mut self) -> CKEY_W

Bits 20:23 - Countermeasure Key

impl W<u32, Reg<u32, _AES_IER>>

pub fn datrdy(&mut self) -> DATRDY_W

Bit 0 - Data Ready Interrupt Enable

pub fn urad(&mut self) -> URAD_W

Bit 8 - Unspecified Register Access Detection Interrupt Enable

pub fn tagrdy(&mut self) -> TAGRDY_W

Bit 16 - GCM Tag Ready Interrupt Enable

impl W<u32, Reg<u32, _AES_IDR>>

pub fn datrdy(&mut self) -> DATRDY_W

Bit 0 - Data Ready Interrupt Disable

pub fn urad(&mut self) -> URAD_W

Bit 8 - Unspecified Register Access Detection Interrupt Disable

pub fn tagrdy(&mut self) -> TAGRDY_W

Bit 16 - GCM Tag Ready Interrupt Disable

impl W<u32, Reg<u32, _AES_KEYWR>>

pub fn keyw(&mut self) -> KEYW_W

Bits 0:31 - Key Word

impl W<u32, Reg<u32, _AES_IDATAR>>

pub fn idata(&mut self) -> IDATA_W

Bits 0:31 - Input Data Word

impl W<u32, Reg<u32, _AES_IVR>>

pub fn iv(&mut self) -> IV_W

Bits 0:31 - Initialization Vector

impl W<u32, Reg<u32, _AES_AADLENR>>

pub fn aadlen(&mut self) -> AADLEN_W

Bits 0:31 - Additional Authenticated Data Length

impl W<u32, Reg<u32, _AES_CLENR>>

pub fn clen(&mut self) -> CLEN_W

Bits 0:31 - Plaintext/Ciphertext Length

impl W<u32, Reg<u32, _AES_GHASHR>>

pub fn ghash(&mut self) -> GHASH_W

Bits 0:31 - Intermediate GCM Hash Word x

impl W<u32, Reg<u32, _AES_GCMHR>>

pub fn h(&mut self) -> H_W

Bits 0:31 - GCM H Word x

impl W<u32, Reg<u32, _AFEC_CR>>

pub fn swrst(&mut self) -> SWRST_W

Bit 0 - Software Reset

pub fn start(&mut self) -> START_W

Bit 1 - Start Conversion

impl W<u32, Reg<u32, _AFEC_MR>>

pub fn trgen(&mut self) -> TRGEN_W

Bit 0 - Trigger Enable

pub fn trgsel(&mut self) -> TRGSEL_W

Bits 1:3 - Trigger Selection

pub fn sleep(&mut self) -> SLEEP_W

Bit 5 - Sleep Mode

pub fn fwup(&mut self) -> FWUP_W

Bit 6 - Fast Wake-up

pub fn freerun(&mut self) -> FREERUN_W

Bit 7 - Free Run Mode

pub fn prescal(&mut self) -> PRESCAL_W

Bits 8:15 - Prescaler Rate Selection

pub fn startup(&mut self) -> STARTUP_W

Bits 16:19 - Start-up Time

pub fn one(&mut self) -> ONE_W

Bit 23 - One

pub fn tracktim(&mut self) -> TRACKTIM_W

Bits 24:27 - Tracking Time

pub fn transfer(&mut self) -> TRANSFER_W

Bits 28:29 - Transfer Period

pub fn useq(&mut self) -> USEQ_W

Bit 31 - User Sequence Enable

impl W<u32, Reg<u32, _AFEC_EMR>>

pub fn cmpmode(&mut self) -> CMPMODE_W

Bits 0:1 - Comparison Mode

pub fn cmpsel(&mut self) -> CMPSEL_W

Bits 3:7 - Comparison Selected Channel

pub fn cmpall(&mut self) -> CMPALL_W

Bit 9 - Compare All Channels

pub fn cmpfilter(&mut self) -> CMPFILTER_W

Bits 12:13 - Compare Event Filtering

pub fn res(&mut self) -> RES_W

Bits 16:18 - Resolution

pub fn tag(&mut self) -> TAG_W

Bit 24 - TAG of the AFEC_LDCR

pub fn stm(&mut self) -> STM_W

Bit 25 - Single Trigger Mode

pub fn signmode(&mut self) -> SIGNMODE_W

Bits 28:29 - Sign Mode

impl W<u32, Reg<u32, _AFEC_SEQ1R>>

pub fn usch0(&mut self) -> USCH0_W

Bits 0:3 - User Sequence Number 0

pub fn usch1(&mut self) -> USCH1_W

Bits 4:7 - User Sequence Number 1

pub fn usch2(&mut self) -> USCH2_W

Bits 8:11 - User Sequence Number 2

pub fn usch3(&mut self) -> USCH3_W

Bits 12:15 - User Sequence Number 3

pub fn usch4(&mut self) -> USCH4_W

Bits 16:19 - User Sequence Number 4

pub fn usch5(&mut self) -> USCH5_W

Bits 20:23 - User Sequence Number 5

pub fn usch6(&mut self) -> USCH6_W

Bits 24:27 - User Sequence Number 6

pub fn usch7(&mut self) -> USCH7_W

Bits 28:31 - User Sequence Number 7

impl W<u32, Reg<u32, _AFEC_SEQ2R>>

pub fn usch8(&mut self) -> USCH8_W

Bits 0:3 - User Sequence Number 8

pub fn usch9(&mut self) -> USCH9_W

Bits 4:7 - User Sequence Number 9

pub fn usch10(&mut self) -> USCH10_W

Bits 8:11 - User Sequence Number 10

pub fn usch11(&mut self) -> USCH11_W

Bits 12:15 - User Sequence Number 11

impl W<u32, Reg<u32, _AFEC_CHER>>

pub fn ch0(&mut self) -> CH0_W

Bit 0 - Channel 0 Enable

pub fn ch1(&mut self) -> CH1_W

Bit 1 - Channel 1 Enable

pub fn ch2(&mut self) -> CH2_W

Bit 2 - Channel 2 Enable

pub fn ch3(&mut self) -> CH3_W

Bit 3 - Channel 3 Enable

pub fn ch4(&mut self) -> CH4_W

Bit 4 - Channel 4 Enable

pub fn ch5(&mut self) -> CH5_W

Bit 5 - Channel 5 Enable

pub fn ch6(&mut self) -> CH6_W

Bit 6 - Channel 6 Enable

pub fn ch7(&mut self) -> CH7_W

Bit 7 - Channel 7 Enable

pub fn ch8(&mut self) -> CH8_W

Bit 8 - Channel 8 Enable

pub fn ch9(&mut self) -> CH9_W

Bit 9 - Channel 9 Enable

pub fn ch10(&mut self) -> CH10_W

Bit 10 - Channel 10 Enable

pub fn ch11(&mut self) -> CH11_W

Bit 11 - Channel 11 Enable

impl W<u32, Reg<u32, _AFEC_CHDR>>

pub fn ch0(&mut self) -> CH0_W

Bit 0 - Channel 0 Disable

pub fn ch1(&mut self) -> CH1_W

Bit 1 - Channel 1 Disable

pub fn ch2(&mut self) -> CH2_W

Bit 2 - Channel 2 Disable

pub fn ch3(&mut self) -> CH3_W

Bit 3 - Channel 3 Disable

pub fn ch4(&mut self) -> CH4_W

Bit 4 - Channel 4 Disable

pub fn ch5(&mut self) -> CH5_W

Bit 5 - Channel 5 Disable

pub fn ch6(&mut self) -> CH6_W

Bit 6 - Channel 6 Disable

pub fn ch7(&mut self) -> CH7_W

Bit 7 - Channel 7 Disable

pub fn ch8(&mut self) -> CH8_W

Bit 8 - Channel 8 Disable

pub fn ch9(&mut self) -> CH9_W

Bit 9 - Channel 9 Disable

pub fn ch10(&mut self) -> CH10_W

Bit 10 - Channel 10 Disable

pub fn ch11(&mut self) -> CH11_W

Bit 11 - Channel 11 Disable

impl W<u32, Reg<u32, _AFEC_IER>>

pub fn eoc0(&mut self) -> EOC0_W

Bit 0 - End of Conversion Interrupt Enable 0

pub fn eoc1(&mut self) -> EOC1_W

Bit 1 - End of Conversion Interrupt Enable 1

pub fn eoc2(&mut self) -> EOC2_W

Bit 2 - End of Conversion Interrupt Enable 2

pub fn eoc3(&mut self) -> EOC3_W

Bit 3 - End of Conversion Interrupt Enable 3

pub fn eoc4(&mut self) -> EOC4_W

Bit 4 - End of Conversion Interrupt Enable 4

pub fn eoc5(&mut self) -> EOC5_W

Bit 5 - End of Conversion Interrupt Enable 5

pub fn eoc6(&mut self) -> EOC6_W

Bit 6 - End of Conversion Interrupt Enable 6

pub fn eoc7(&mut self) -> EOC7_W

Bit 7 - End of Conversion Interrupt Enable 7

pub fn eoc8(&mut self) -> EOC8_W

Bit 8 - End of Conversion Interrupt Enable 8

pub fn eoc9(&mut self) -> EOC9_W

Bit 9 - End of Conversion Interrupt Enable 9

pub fn eoc10(&mut self) -> EOC10_W

Bit 10 - End of Conversion Interrupt Enable 10

pub fn eoc11(&mut self) -> EOC11_W

Bit 11 - End of Conversion Interrupt Enable 11

pub fn drdy(&mut self) -> DRDY_W

Bit 24 - Data Ready Interrupt Enable

pub fn govre(&mut self) -> GOVRE_W

Bit 25 - General Overrun Error Interrupt Enable

pub fn compe(&mut self) -> COMPE_W

Bit 26 - Comparison Event Interrupt Enable

pub fn tempchg(&mut self) -> TEMPCHG_W

Bit 30 - Temperature Change Interrupt Enable

impl W<u32, Reg<u32, _AFEC_IDR>>

pub fn eoc0(&mut self) -> EOC0_W

Bit 0 - End of Conversion Interrupt Disable 0

pub fn eoc1(&mut self) -> EOC1_W

Bit 1 - End of Conversion Interrupt Disable 1

pub fn eoc2(&mut self) -> EOC2_W

Bit 2 - End of Conversion Interrupt Disable 2

pub fn eoc3(&mut self) -> EOC3_W

Bit 3 - End of Conversion Interrupt Disable 3

pub fn eoc4(&mut self) -> EOC4_W

Bit 4 - End of Conversion Interrupt Disable 4

pub fn eoc5(&mut self) -> EOC5_W

Bit 5 - End of Conversion Interrupt Disable 5

pub fn eoc6(&mut self) -> EOC6_W

Bit 6 - End of Conversion Interrupt Disable 6

pub fn eoc7(&mut self) -> EOC7_W

Bit 7 - End of Conversion Interrupt Disable 7

pub fn eoc8(&mut self) -> EOC8_W

Bit 8 - End of Conversion Interrupt Disable 8

pub fn eoc9(&mut self) -> EOC9_W

Bit 9 - End of Conversion Interrupt Disable 9

pub fn eoc10(&mut self) -> EOC10_W

Bit 10 - End of Conversion Interrupt Disable 10

pub fn eoc11(&mut self) -> EOC11_W

Bit 11 - End of Conversion Interrupt Disable 11

pub fn drdy(&mut self) -> DRDY_W

Bit 24 - Data Ready Interrupt Disable

pub fn govre(&mut self) -> GOVRE_W

Bit 25 - General Overrun Error Interrupt Disable

pub fn compe(&mut self) -> COMPE_W

Bit 26 - Comparison Event Interrupt Disable

pub fn tempchg(&mut self) -> TEMPCHG_W

Bit 30 - Temperature Change Interrupt Disable

impl W<u32, Reg<u32, _AFEC_CWR>>

pub fn lowthres(&mut self) -> LOWTHRES_W

Bits 0:15 - Low Threshold

pub fn highthres(&mut self) -> HIGHTHRES_W

Bits 16:31 - High Threshold

impl W<u32, Reg<u32, _AFEC_CGR>>

pub fn gain0(&mut self) -> GAIN0_W

Bits 0:1 - Gain for Channel 0

pub fn gain1(&mut self) -> GAIN1_W

Bits 2:3 - Gain for Channel 1

pub fn gain2(&mut self) -> GAIN2_W

Bits 4:5 - Gain for Channel 2

pub fn gain3(&mut self) -> GAIN3_W

Bits 6:7 - Gain for Channel 3

pub fn gain4(&mut self) -> GAIN4_W

Bits 8:9 - Gain for Channel 4

pub fn gain5(&mut self) -> GAIN5_W

Bits 10:11 - Gain for Channel 5

pub fn gain6(&mut self) -> GAIN6_W

Bits 12:13 - Gain for Channel 6

pub fn gain7(&mut self) -> GAIN7_W

Bits 14:15 - Gain for Channel 7

pub fn gain8(&mut self) -> GAIN8_W

Bits 16:17 - Gain for Channel 8

pub fn gain9(&mut self) -> GAIN9_W

Bits 18:19 - Gain for Channel 9

pub fn gain10(&mut self) -> GAIN10_W

Bits 20:21 - Gain for Channel 10

pub fn gain11(&mut self) -> GAIN11_W

Bits 22:23 - Gain for Channel 11

impl W<u32, Reg<u32, _AFEC_DIFFR>>

pub fn diff0(&mut self) -> DIFF0_W

Bit 0 - Differential inputs for channel 0

pub fn diff1(&mut self) -> DIFF1_W

Bit 1 - Differential inputs for channel 1

pub fn diff2(&mut self) -> DIFF2_W

Bit 2 - Differential inputs for channel 2

pub fn diff3(&mut self) -> DIFF3_W

Bit 3 - Differential inputs for channel 3

pub fn diff4(&mut self) -> DIFF4_W

Bit 4 - Differential inputs for channel 4

pub fn diff5(&mut self) -> DIFF5_W

Bit 5 - Differential inputs for channel 5

pub fn diff6(&mut self) -> DIFF6_W

Bit 6 - Differential inputs for channel 6

pub fn diff7(&mut self) -> DIFF7_W

Bit 7 - Differential inputs for channel 7

pub fn diff8(&mut self) -> DIFF8_W

Bit 8 - Differential inputs for channel 8

pub fn diff9(&mut self) -> DIFF9_W

Bit 9 - Differential inputs for channel 9

pub fn diff10(&mut self) -> DIFF10_W

Bit 10 - Differential inputs for channel 10

pub fn diff11(&mut self) -> DIFF11_W

Bit 11 - Differential inputs for channel 11

impl W<u32, Reg<u32, _AFEC_CSELR>>

pub fn csel(&mut self) -> CSEL_W

Bits 0:3 - Channel Selection

impl W<u32, Reg<u32, _AFEC_COCR>>

pub fn aoff(&mut self) -> AOFF_W

Bits 0:9 - Analog Offset

impl W<u32, Reg<u32, _AFEC_TEMPMR>>

pub fn rtct(&mut self) -> RTCT_W

Bit 0 - Temperature Sensor RTC Trigger Mode

pub fn tempcmpmod(&mut self) -> TEMPCMPMOD_W

Bits 4:5 - Temperature Comparison Mode

impl W<u32, Reg<u32, _AFEC_TEMPCWR>>

pub fn tlowthres(&mut self) -> TLOWTHRES_W

Bits 0:15 - Temperature Low Threshold

pub fn thighthres(&mut self) -> THIGHTHRES_W

Bits 16:31 - Temperature High Threshold

impl W<u32, Reg<u32, _AFEC_ACR>>

pub fn pga0en(&mut self) -> PGA0EN_W

Bit 2 - PGA0 Enable

pub fn pga1en(&mut self) -> PGA1EN_W

Bit 3 - PGA1 Enable

pub fn ibctl(&mut self) -> IBCTL_W

Bits 8:9 - AFE Bias Current Control

impl W<u32, Reg<u32, _AFEC_SHMR>>

pub fn dual0(&mut self) -> DUAL0_W

Bit 0 - Dual Sample & Hold for channel 0

pub fn dual1(&mut self) -> DUAL1_W

Bit 1 - Dual Sample & Hold for channel 1

pub fn dual2(&mut self) -> DUAL2_W

Bit 2 - Dual Sample & Hold for channel 2

pub fn dual3(&mut self) -> DUAL3_W

Bit 3 - Dual Sample & Hold for channel 3

pub fn dual4(&mut self) -> DUAL4_W

Bit 4 - Dual Sample & Hold for channel 4

pub fn dual5(&mut self) -> DUAL5_W

Bit 5 - Dual Sample & Hold for channel 5

pub fn dual6(&mut self) -> DUAL6_W

Bit 6 - Dual Sample & Hold for channel 6

pub fn dual7(&mut self) -> DUAL7_W

Bit 7 - Dual Sample & Hold for channel 7

pub fn dual8(&mut self) -> DUAL8_W

Bit 8 - Dual Sample & Hold for channel 8

pub fn dual9(&mut self) -> DUAL9_W

Bit 9 - Dual Sample & Hold for channel 9

pub fn dual10(&mut self) -> DUAL10_W

Bit 10 - Dual Sample & Hold for channel 10

pub fn dual11(&mut self) -> DUAL11_W

Bit 11 - Dual Sample & Hold for channel 11

impl W<u32, Reg<u32, _AFEC_COSR>>

pub fn csel(&mut self) -> CSEL_W

Bit 0 - Sample & Hold unit Correction Select

impl W<u32, Reg<u32, _AFEC_CVR>>

pub fn offsetcorr(&mut self) -> OFFSETCORR_W

Bits 0:15 - Offset Correction

pub fn gaincorr(&mut self) -> GAINCORR_W

Bits 16:31 - Gain Correction

impl W<u32, Reg<u32, _AFEC_CECR>>

pub fn ecorr0(&mut self) -> ECORR0_W

Bit 0 - Error Correction Enable for channel 0

pub fn ecorr1(&mut self) -> ECORR1_W

Bit 1 - Error Correction Enable for channel 1

pub fn ecorr2(&mut self) -> ECORR2_W

Bit 2 - Error Correction Enable for channel 2

pub fn ecorr3(&mut self) -> ECORR3_W

Bit 3 - Error Correction Enable for channel 3

pub fn ecorr4(&mut self) -> ECORR4_W

Bit 4 - Error Correction Enable for channel 4

pub fn ecorr5(&mut self) -> ECORR5_W

Bit 5 - Error Correction Enable for channel 5

pub fn ecorr6(&mut self) -> ECORR6_W

Bit 6 - Error Correction Enable for channel 6

pub fn ecorr7(&mut self) -> ECORR7_W

Bit 7 - Error Correction Enable for channel 7

pub fn ecorr8(&mut self) -> ECORR8_W

Bit 8 - Error Correction Enable for channel 8

pub fn ecorr9(&mut self) -> ECORR9_W

Bit 9 - Error Correction Enable for channel 9

pub fn ecorr10(&mut self) -> ECORR10_W

Bit 10 - Error Correction Enable for channel 10

pub fn ecorr11(&mut self) -> ECORR11_W

Bit 11 - Error Correction Enable for channel 11

impl W<u32, Reg<u32, _AFEC_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protect KEY

impl W<u32, Reg<u32, _DACC_CR>>

pub fn swrst(&mut self) -> SWRST_W

Bit 0 - Software Reset

impl W<u32, Reg<u32, _DACC_MR>>

pub fn maxs0(&mut self) -> MAXS0_W

Bit 0 - Max Speed Mode for Channel 0

pub fn maxs1(&mut self) -> MAXS1_W

Bit 1 - Max Speed Mode for Channel 1

pub fn word(&mut self) -> WORD_W

Bit 4 - Word Transfer Mode

pub fn zero(&mut self) -> ZERO_W

Bit 5 - Must always be written to 0.

pub fn diff(&mut self) -> DIFF_W

Bit 23 - Differential Mode

pub fn prescaler(&mut self) -> PRESCALER_W

Bits 24:27 - Peripheral Clock to DAC Clock Ratio

impl W<u32, Reg<u32, _DACC_TRIGR>>

pub fn trgen0(&mut self) -> TRGEN0_W

Bit 0 - Trigger Enable of Channel 0

pub fn trgen1(&mut self) -> TRGEN1_W

Bit 1 - Trigger Enable of Channel 1

pub fn trgsel0(&mut self) -> TRGSEL0_W

Bits 4:6 - Trigger Selection of Channel 0

pub fn trgsel1(&mut self) -> TRGSEL1_W

Bits 8:10 - Trigger Selection of Channel 1

pub fn osr0(&mut self) -> OSR0_W

Bits 16:18 - Over Sampling Ratio of Channel 0

pub fn osr1(&mut self) -> OSR1_W

Bits 20:22 - Over Sampling Ratio of Channel 1

impl W<u32, Reg<u32, _DACC_CHER>>

pub fn ch0(&mut self) -> CH0_W

Bit 0 - Channel 0 Enable

pub fn ch1(&mut self) -> CH1_W

Bit 1 - Channel 1 Enable

impl W<u32, Reg<u32, _DACC_CHDR>>

pub fn ch0(&mut self) -> CH0_W

Bit 0 - Channel 0 Disable

pub fn ch1(&mut self) -> CH1_W

Bit 1 - Channel 1 Disable

impl W<u32, Reg<u32, _DACC_CDR>>

pub fn data0(&mut self) -> DATA0_W

Bits 0:15 - Data to Convert for channel 0

pub fn data1(&mut self) -> DATA1_W

Bits 16:31 - Data to Convert for channel 1

impl W<u32, Reg<u32, _DACC_IER>>

pub fn txrdy0(&mut self) -> TXRDY0_W

Bit 0 - Transmit Ready Interrupt Enable of channel 0

pub fn txrdy1(&mut self) -> TXRDY1_W

Bit 1 - Transmit Ready Interrupt Enable of channel 1

pub fn eoc0(&mut self) -> EOC0_W

Bit 4 - End of Conversion Interrupt Enable of channel 0

pub fn eoc1(&mut self) -> EOC1_W

Bit 5 - End of Conversion Interrupt Enable of channel 1

impl W<u32, Reg<u32, _DACC_IDR>>

pub fn txrdy0(&mut self) -> TXRDY0_W

Bit 0 - Transmit Ready Interrupt Disable of channel 0

pub fn txrdy1(&mut self) -> TXRDY1_W

Bit 1 - Transmit Ready Interrupt Disable of channel 1

pub fn eoc0(&mut self) -> EOC0_W

Bit 4 - End of Conversion Interrupt Disable of channel 0

pub fn eoc1(&mut self) -> EOC1_W

Bit 5 - End of Conversion Interrupt Disable of channel 1

impl W<u32, Reg<u32, _DACC_ACR>>

pub fn ibctlch0(&mut self) -> IBCTLCH0_W

Bits 0:1 - Analog Output Current Control

pub fn ibctlch1(&mut self) -> IBCTLCH1_W

Bits 2:3 - Analog Output Current Control

impl W<u32, Reg<u32, _DACC_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protect Key

impl W<u32, Reg<u32, _EEFC_FMR>>

pub fn frdy(&mut self) -> FRDY_W

Bit 0 - Flash Ready Interrupt Enable

pub fn fws(&mut self) -> FWS_W

Bits 8:11 - Flash Wait State

pub fn scod(&mut self) -> SCOD_W

Bit 16 - Sequential Code Optimization Disable

pub fn cloe(&mut self) -> CLOE_W

Bit 26 - Code Loop Optimization Enable

impl W<u32, Reg<u32, _EEFC_FCR>>

pub fn fcmd(&mut self) -> FCMD_W

Bits 0:7 - Flash Command

pub fn farg(&mut self) -> FARG_W

Bits 8:23 - Flash Command Argument

pub fn fkey(&mut self) -> FKEY_W

Bits 24:31 - Flash Writing Protection Key

impl W<u32, Reg<u32, _EEFC_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _GMAC_SAB>>

pub fn addr(&mut self) -> ADDR_W

Bits 0:31 - Specific Address 1

impl W<u32, Reg<u32, _GMAC_SAT>>

pub fn addr(&mut self) -> ADDR_W

Bits 0:15 - Specific Address 1

impl W<u32, Reg<u32, _GMAC_ST2CW0>>

pub fn maskval(&mut self) -> MASKVAL_W

Bits 0:15 - Mask Value

pub fn compval(&mut self) -> COMPVAL_W

Bits 16:31 - Compare Value

impl W<u32, Reg<u32, _GMAC_ST2CW1>>

pub fn offsval(&mut self) -> OFFSVAL_W

Bits 0:6 - Offset Value in Bytes

pub fn offsstrt(&mut self) -> OFFSSTRT_W

Bits 7:8 - Ethernet Frame Offset Start

impl W<u32, Reg<u32, _GMAC_NCR>>

pub fn lbl(&mut self) -> LBL_W

Bit 1 - Loop Back Local

pub fn rxen(&mut self) -> RXEN_W

Bit 2 - Receive Enable

pub fn txen(&mut self) -> TXEN_W

Bit 3 - Transmit Enable

pub fn mpe(&mut self) -> MPE_W

Bit 4 - Management Port Enable

pub fn clrstat(&mut self) -> CLRSTAT_W

Bit 5 - Clear Statistics Registers

pub fn incstat(&mut self) -> INCSTAT_W

Bit 6 - Increment Statistics Registers

pub fn westat(&mut self) -> WESTAT_W

Bit 7 - Write Enable for Statistics Registers

pub fn bp(&mut self) -> BP_W

Bit 8 - Back pressure

pub fn tstart(&mut self) -> TSTART_W

Bit 9 - Start Transmission

pub fn thalt(&mut self) -> THALT_W

Bit 10 - Transmit Halt

pub fn txpf(&mut self) -> TXPF_W

Bit 11 - Transmit Pause Frame

pub fn txzqpf(&mut self) -> TXZQPF_W

Bit 12 - Transmit Zero Quantum Pause Frame

pub fn srtsm(&mut self) -> SRTSM_W

Bit 15 - Store Receive Time Stamp to Memory

pub fn enpbpr(&mut self) -> ENPBPR_W

Bit 16 - Enable PFC Priority-based Pause Reception

pub fn txpbpf(&mut self) -> TXPBPF_W

Bit 17 - Transmit PFC Priority-based Pause Frame

pub fn fnp(&mut self) -> FNP_W

Bit 18 - Flush Next Packet

pub fn txlpien(&mut self) -> TXLPIEN_W

Bit 19 - Enable LPI Transmission

impl W<u32, Reg<u32, _GMAC_NCFGR>>

pub fn spd(&mut self) -> SPD_W

Bit 0 - Speed

pub fn fd(&mut self) -> FD_W

Bit 1 - Full Duplex

pub fn dnvlan(&mut self) -> DNVLAN_W

Bit 2 - Discard Non-VLAN FRAMES

pub fn jframe(&mut self) -> JFRAME_W

Bit 3 - Jumbo Frame Size

pub fn caf(&mut self) -> CAF_W

Bit 4 - Copy All Frames

pub fn nbc(&mut self) -> NBC_W

Bit 5 - No Broadcast

pub fn mtihen(&mut self) -> MTIHEN_W

Bit 6 - Multicast Hash Enable

pub fn unihen(&mut self) -> UNIHEN_W

Bit 7 - Unicast Hash Enable

pub fn maxfs(&mut self) -> MAXFS_W

Bit 8 - 1536 Maximum Frame Size

pub fn rty(&mut self) -> RTY_W

Bit 12 - Retry Test

pub fn pen(&mut self) -> PEN_W

Bit 13 - Pause Enable

pub fn rxbufo(&mut self) -> RXBUFO_W

Bits 14:15 - Receive Buffer Offset

pub fn lferd(&mut self) -> LFERD_W

Bit 16 - Length Field Error Frame Discard

pub fn rfcs(&mut self) -> RFCS_W

Bit 17 - Remove FCS

pub fn clk(&mut self) -> CLK_W

Bits 18:20 - MDC CLock Division

pub fn dbw(&mut self) -> DBW_W

Bits 21:22 - Data Bus Width

pub fn dcpf(&mut self) -> DCPF_W

Bit 23 - Disable Copy of Pause Frames

pub fn rxcoen(&mut self) -> RXCOEN_W

Bit 24 - Receive Checksum Offload Enable

pub fn efrhd(&mut self) -> EFRHD_W

Bit 25 - Enable Frames Received in Half Duplex

pub fn irxfcs(&mut self) -> IRXFCS_W

Bit 26 - Ignore RX FCS

pub fn ipgsen(&mut self) -> IPGSEN_W

Bit 28 - IP Stretch Enable

pub fn rxbp(&mut self) -> RXBP_W

Bit 29 - Receive Bad Preamble

pub fn irxer(&mut self) -> IRXER_W

Bit 30 - Ignore IPG GRXER

impl W<u32, Reg<u32, _GMAC_UR>>

pub fn rmii(&mut self) -> RMII_W

Bit 0 - Reduced MII Mode

impl W<u32, Reg<u32, _GMAC_DCFGR>>

pub fn fbldo(&mut self) -> FBLDO_W

Bits 0:4 - Fixed Burst Length for DMA Data Operations:

pub fn esma(&mut self) -> ESMA_W

Bit 6 - Endian Swap Mode Enable for Management Descriptor Accesses

pub fn espa(&mut self) -> ESPA_W

Bit 7 - Endian Swap Mode Enable for Packet Data Accesses

pub fn rxbms(&mut self) -> RXBMS_W

Bits 8:9 - Receiver Packet Buffer Memory Size Select

pub fn txpbms(&mut self) -> TXPBMS_W

Bit 10 - Transmitter Packet Buffer Memory Size Select

pub fn txcoen(&mut self) -> TXCOEN_W

Bit 11 - Transmitter Checksum Generation Offload Enable

pub fn drbs(&mut self) -> DRBS_W

Bits 16:23 - DMA Receive Buffer Size

pub fn ddrp(&mut self) -> DDRP_W

Bit 24 - DMA Discard Receive Packets

impl W<u32, Reg<u32, _GMAC_TSR>>

pub fn ubr(&mut self) -> UBR_W

Bit 0 - Used Bit Read

pub fn col(&mut self) -> COL_W

Bit 1 - Collision Occurred

pub fn rle(&mut self) -> RLE_W

Bit 2 - Retry Limit Exceeded

pub fn txgo(&mut self) -> TXGO_W

Bit 3 - Transmit Go

pub fn tfc(&mut self) -> TFC_W

Bit 4 - Transmit Frame Corruption Due to AHB Error

pub fn txcomp(&mut self) -> TXCOMP_W

Bit 5 - Transmit Complete

pub fn hresp(&mut self) -> HRESP_W

Bit 8 - HRESP Not OK

impl W<u32, Reg<u32, _GMAC_RBQB>>

pub fn addr(&mut self) -> ADDR_W

Bits 2:31 - Receive Buffer Queue Base Address

impl W<u32, Reg<u32, _GMAC_TBQB>>

pub fn addr(&mut self) -> ADDR_W

Bits 2:31 - Transmit Buffer Queue Base Address

impl W<u32, Reg<u32, _GMAC_RSR>>

pub fn bna(&mut self) -> BNA_W

Bit 0 - Buffer Not Available

pub fn rec(&mut self) -> REC_W

Bit 1 - Frame Received

pub fn rxovr(&mut self) -> RXOVR_W

Bit 2 - Receive Overrun

pub fn hno(&mut self) -> HNO_W

Bit 3 - HRESP Not OK

impl W<u32, Reg<u32, _GMAC_IER>>

pub fn mfs(&mut self) -> MFS_W

Bit 0 - Management Frame Sent

pub fn rcomp(&mut self) -> RCOMP_W

Bit 1 - Receive Complete

pub fn rxubr(&mut self) -> RXUBR_W

Bit 2 - RX Used Bit Read

pub fn txubr(&mut self) -> TXUBR_W

Bit 3 - TX Used Bit Read

pub fn tur(&mut self) -> TUR_W

Bit 4 - Transmit Underrun

pub fn rlex(&mut self) -> RLEX_W

Bit 5 - Retry Limit Exceeded or Late Collision

pub fn tfc(&mut self) -> TFC_W

Bit 6 - Transmit Frame Corruption Due to AHB Error

pub fn tcomp(&mut self) -> TCOMP_W

Bit 7 - Transmit Complete

pub fn rovr(&mut self) -> ROVR_W

Bit 10 - Receive Overrun

pub fn hresp(&mut self) -> HRESP_W

Bit 11 - HRESP Not OK

pub fn pfnz(&mut self) -> PFNZ_W

Bit 12 - Pause Frame with Non-zero Pause Quantum Received

pub fn ptz(&mut self) -> PTZ_W

Bit 13 - Pause Time Zero

pub fn pftr(&mut self) -> PFTR_W

Bit 14 - Pause Frame Transmitted

pub fn exint(&mut self) -> EXINT_W

Bit 15 - External Interrupt

pub fn drqfr(&mut self) -> DRQFR_W

Bit 18 - PTP Delay Request Frame Received

pub fn sfr(&mut self) -> SFR_W

Bit 19 - PTP Sync Frame Received

pub fn drqft(&mut self) -> DRQFT_W

Bit 20 - PTP Delay Request Frame Transmitted

pub fn sft(&mut self) -> SFT_W

Bit 21 - PTP Sync Frame Transmitted

pub fn pdrqfr(&mut self) -> PDRQFR_W

Bit 22 - PDelay Request Frame Received

pub fn pdrsfr(&mut self) -> PDRSFR_W

Bit 23 - PDelay Response Frame Received

pub fn pdrqft(&mut self) -> PDRQFT_W

Bit 24 - PDelay Request Frame Transmitted

pub fn pdrsft(&mut self) -> PDRSFT_W

Bit 25 - PDelay Response Frame Transmitted

pub fn sri(&mut self) -> SRI_W

Bit 26 - TSU Seconds Register Increment

pub fn rxlpisbc(&mut self) -> RXLPISBC_W

Bit 27 - Enable RX LPI Indication

pub fn wol(&mut self) -> WOL_W

Bit 28 - Wake On LAN

pub fn tsutimcomp(&mut self) -> TSUTIMCOMP_W

Bit 29 - TSU Timer Comparison

impl W<u32, Reg<u32, _GMAC_IDR>>

pub fn mfs(&mut self) -> MFS_W

Bit 0 - Management Frame Sent

pub fn rcomp(&mut self) -> RCOMP_W

Bit 1 - Receive Complete

pub fn rxubr(&mut self) -> RXUBR_W

Bit 2 - RX Used Bit Read

pub fn txubr(&mut self) -> TXUBR_W

Bit 3 - TX Used Bit Read

pub fn tur(&mut self) -> TUR_W

Bit 4 - Transmit Underrun

pub fn rlex(&mut self) -> RLEX_W

Bit 5 - Retry Limit Exceeded or Late Collision

pub fn tfc(&mut self) -> TFC_W

Bit 6 - Transmit Frame Corruption Due to AHB Error

pub fn tcomp(&mut self) -> TCOMP_W

Bit 7 - Transmit Complete

pub fn rovr(&mut self) -> ROVR_W

Bit 10 - Receive Overrun

pub fn hresp(&mut self) -> HRESP_W

Bit 11 - HRESP Not OK

pub fn pfnz(&mut self) -> PFNZ_W

Bit 12 - Pause Frame with Non-zero Pause Quantum Received

pub fn ptz(&mut self) -> PTZ_W

Bit 13 - Pause Time Zero

pub fn pftr(&mut self) -> PFTR_W

Bit 14 - Pause Frame Transmitted

pub fn exint(&mut self) -> EXINT_W

Bit 15 - External Interrupt

pub fn drqfr(&mut self) -> DRQFR_W

Bit 18 - PTP Delay Request Frame Received

pub fn sfr(&mut self) -> SFR_W

Bit 19 - PTP Sync Frame Received

pub fn drqft(&mut self) -> DRQFT_W

Bit 20 - PTP Delay Request Frame Transmitted

pub fn sft(&mut self) -> SFT_W

Bit 21 - PTP Sync Frame Transmitted

pub fn pdrqfr(&mut self) -> PDRQFR_W

Bit 22 - PDelay Request Frame Received

pub fn pdrsfr(&mut self) -> PDRSFR_W

Bit 23 - PDelay Response Frame Received

pub fn pdrqft(&mut self) -> PDRQFT_W

Bit 24 - PDelay Request Frame Transmitted

pub fn pdrsft(&mut self) -> PDRSFT_W

Bit 25 - PDelay Response Frame Transmitted

pub fn sri(&mut self) -> SRI_W

Bit 26 - TSU Seconds Register Increment

pub fn rxlpisbc(&mut self) -> RXLPISBC_W

Bit 27 - Enable RX LPI Indication

pub fn wol(&mut self) -> WOL_W

Bit 28 - Wake On LAN

pub fn tsutimcomp(&mut self) -> TSUTIMCOMP_W

Bit 29 - TSU Timer Comparison

impl W<u32, Reg<u32, _GMAC_IMR>>

pub fn mfs(&mut self) -> MFS_W

Bit 0 - Management Frame Sent

pub fn rcomp(&mut self) -> RCOMP_W

Bit 1 - Receive Complete

pub fn rxubr(&mut self) -> RXUBR_W

Bit 2 - RX Used Bit Read

pub fn txubr(&mut self) -> TXUBR_W

Bit 3 - TX Used Bit Read

pub fn tur(&mut self) -> TUR_W

Bit 4 - Transmit Underrun

pub fn rlex(&mut self) -> RLEX_W

Bit 5 - Retry Limit Exceeded

pub fn tfc(&mut self) -> TFC_W

Bit 6 - Transmit Frame Corruption Due to AHB Error

pub fn tcomp(&mut self) -> TCOMP_W

Bit 7 - Transmit Complete

pub fn rovr(&mut self) -> ROVR_W

Bit 10 - Receive Overrun

pub fn hresp(&mut self) -> HRESP_W

Bit 11 - HRESP Not OK

pub fn pfnz(&mut self) -> PFNZ_W

Bit 12 - Pause Frame with Non-zero Pause Quantum Received

pub fn ptz(&mut self) -> PTZ_W

Bit 13 - Pause Time Zero

pub fn pftr(&mut self) -> PFTR_W

Bit 14 - Pause Frame Transmitted

pub fn exint(&mut self) -> EXINT_W

Bit 15 - External Interrupt

pub fn drqfr(&mut self) -> DRQFR_W

Bit 18 - PTP Delay Request Frame Received

pub fn sfr(&mut self) -> SFR_W

Bit 19 - PTP Sync Frame Received

pub fn drqft(&mut self) -> DRQFT_W

Bit 20 - PTP Delay Request Frame Transmitted

pub fn sft(&mut self) -> SFT_W

Bit 21 - PTP Sync Frame Transmitted

pub fn pdrqfr(&mut self) -> PDRQFR_W

Bit 22 - PDelay Request Frame Received

pub fn pdrsfr(&mut self) -> PDRSFR_W

Bit 23 - PDelay Response Frame Received

pub fn pdrqft(&mut self) -> PDRQFT_W

Bit 24 - PDelay Request Frame Transmitted

pub fn pdrsft(&mut self) -> PDRSFT_W

Bit 25 - PDelay Response Frame Transmitted

pub fn sri(&mut self) -> SRI_W

Bit 26 - TSU Seconds Register Increment

pub fn rxlpisbc(&mut self) -> RXLPISBC_W

Bit 27 - Enable RX LPI Indication

pub fn wol(&mut self) -> WOL_W

Bit 28 - Wake On LAN

pub fn tsutimcomp(&mut self) -> TSUTIMCOMP_W

Bit 29 - TSU Timer Comparison

impl W<u32, Reg<u32, _GMAC_MAN>>

pub fn data(&mut self) -> DATA_W

Bits 0:15 - PHY Data

pub fn wtn(&mut self) -> WTN_W

Bits 16:17 - Write Ten

pub fn rega(&mut self) -> REGA_W

Bits 18:22 - Register Address

pub fn phya(&mut self) -> PHYA_W

Bits 23:27 - PHY Address

pub fn op(&mut self) -> OP_W

Bits 28:29 - Operation

pub fn cltto(&mut self) -> CLTTO_W

Bit 30 - Clause 22 Operation

pub fn wzo(&mut self) -> WZO_W

Bit 31 - Write ZERO

impl W<u32, Reg<u32, _GMAC_TPQ>>

pub fn tpq(&mut self) -> TPQ_W

Bits 0:15 - Transmit Pause Quantum

impl W<u32, Reg<u32, _GMAC_TPSF>>

pub fn tpb1adr(&mut self) -> TPB1ADR_W

Bits 0:11 - Transmit Partial Store and Forward Address

pub fn entxp(&mut self) -> ENTXP_W

Bit 31 - Enable TX Partial Store and Forward Operation

impl W<u32, Reg<u32, _GMAC_RPSF>>

pub fn rpb1adr(&mut self) -> RPB1ADR_W

Bits 0:11 - Receive Partial Store and Forward Address

pub fn enrxp(&mut self) -> ENRXP_W

Bit 31 - Enable RX Partial Store and Forward Operation

impl W<u32, Reg<u32, _GMAC_RJFML>>

pub fn fml(&mut self) -> FML_W

Bits 0:13 - Frame Max Length

impl W<u32, Reg<u32, _GMAC_HRB>>

pub fn addr(&mut self) -> ADDR_W

Bits 0:31 - Hash Address

impl W<u32, Reg<u32, _GMAC_HRT>>

pub fn addr(&mut self) -> ADDR_W

Bits 0:31 - Hash Address

impl W<u32, Reg<u32, _GMAC_TIDM1>>

pub fn tid(&mut self) -> TID_W

Bits 0:15 - Type ID Match 1

pub fn enid1(&mut self) -> ENID1_W

Bit 31 - Enable Copying of TID Matched Frames

impl W<u32, Reg<u32, _GMAC_TIDM2>>

pub fn tid(&mut self) -> TID_W

Bits 0:15 - Type ID Match 2

pub fn enid2(&mut self) -> ENID2_W

Bit 31 - Enable Copying of TID Matched Frames

impl W<u32, Reg<u32, _GMAC_TIDM3>>

pub fn tid(&mut self) -> TID_W

Bits 0:15 - Type ID Match 3

pub fn enid3(&mut self) -> ENID3_W

Bit 31 - Enable Copying of TID Matched Frames

impl W<u32, Reg<u32, _GMAC_TIDM4>>

pub fn tid(&mut self) -> TID_W

Bits 0:15 - Type ID Match 4

pub fn enid4(&mut self) -> ENID4_W

Bit 31 - Enable Copying of TID Matched Frames

impl W<u32, Reg<u32, _GMAC_WOL>>

pub fn ip(&mut self) -> IP_W

Bits 0:15 - ARP Request IP Address

pub fn mag(&mut self) -> MAG_W

Bit 16 - Magic Packet Event Enable

pub fn arp(&mut self) -> ARP_W

Bit 17 - ARP Request IP Address

pub fn sa1(&mut self) -> SA1_W

Bit 18 - Specific Address Register 1 Event Enable

pub fn mti(&mut self) -> MTI_W

Bit 19 - Multicast Hash Event Enable

impl W<u32, Reg<u32, _GMAC_IPGS>>

pub fn fl(&mut self) -> FL_W

Bits 0:15 - Frame Length

impl W<u32, Reg<u32, _GMAC_SVLAN>>

pub fn vlan_type(&mut self) -> VLAN_TYPE_W

Bits 0:15 - User Defined VLAN_TYPE Field

pub fn esvlan(&mut self) -> ESVLAN_W

Bit 31 - Enable Stacked VLAN Processing Mode

impl W<u32, Reg<u32, _GMAC_TPFCP>>

pub fn pev(&mut self) -> PEV_W

Bits 0:7 - Priority Enable Vector

pub fn pq(&mut self) -> PQ_W

Bits 8:15 - Pause Quantum

impl W<u32, Reg<u32, _GMAC_SAMB1>>

pub fn addr(&mut self) -> ADDR_W

Bits 0:31 - Specific Address 1 Mask

impl W<u32, Reg<u32, _GMAC_SAMT1>>

pub fn addr(&mut self) -> ADDR_W

Bits 0:15 - Specific Address 1 Mask

impl W<u32, Reg<u32, _GMAC_NSC>>

pub fn nanosec(&mut self) -> NANOSEC_W

Bits 0:21 - 1588 Timer Nanosecond Comparison Value

impl W<u32, Reg<u32, _GMAC_SCL>>

pub fn sec(&mut self) -> SEC_W

Bits 0:31 - 1588 Timer Second Comparison Value

impl W<u32, Reg<u32, _GMAC_SCH>>

pub fn sec(&mut self) -> SEC_W

Bits 0:15 - 1588 Timer Second Comparison Value

impl W<u32, Reg<u32, _GMAC_TISUBN>>

pub fn lsbtir(&mut self) -> LSBTIR_W

Bits 0:15 - Lower Significant Bits of Timer Increment Register

impl W<u32, Reg<u32, _GMAC_TSH>>

pub fn tcs(&mut self) -> TCS_W

Bits 0:15 - Timer Count in Seconds

impl W<u32, Reg<u32, _GMAC_TSL>>

pub fn tcs(&mut self) -> TCS_W

Bits 0:31 - Timer Count in Seconds

impl W<u32, Reg<u32, _GMAC_TN>>

pub fn tns(&mut self) -> TNS_W

Bits 0:29 - Timer Count in Nanoseconds

impl W<u32, Reg<u32, _GMAC_TA>>

pub fn itdt(&mut self) -> ITDT_W

Bits 0:29 - Increment/Decrement

pub fn adj(&mut self) -> ADJ_W

Bit 31 - Adjust 1588 Timer

impl W<u32, Reg<u32, _GMAC_TI>>

pub fn cns(&mut self) -> CNS_W

Bits 0:7 - Count Nanoseconds

pub fn acns(&mut self) -> ACNS_W

Bits 8:15 - Alternative Count Nanoseconds

pub fn nit(&mut self) -> NIT_W

Bits 16:23 - Number of Increments

impl W<u32, Reg<u32, _GMAC_TBQBAPQ>>

pub fn txbqba(&mut self) -> TXBQBA_W

Bits 2:31 - Transmit Buffer Queue Base Address

impl W<u32, Reg<u32, _GMAC_RBQBAPQ>>

pub fn rxbqba(&mut self) -> RXBQBA_W

Bits 2:31 - Receive Buffer Queue Base Address

impl W<u32, Reg<u32, _GMAC_RBSRPQ>>

pub fn rbs(&mut self) -> RBS_W

Bits 0:15 - Receive Buffer Size

impl W<u32, Reg<u32, _GMAC_CBSCR>>

pub fn qbe(&mut self) -> QBE_W

Bit 0 - Queue B CBS Enable

pub fn qae(&mut self) -> QAE_W

Bit 1 - Queue A CBS Enable

impl W<u32, Reg<u32, _GMAC_CBSISQA>>

pub fn is(&mut self) -> IS_W

Bits 0:31 - IdleSlope

impl W<u32, Reg<u32, _GMAC_CBSISQB>>

pub fn is(&mut self) -> IS_W

Bits 0:31 - IdleSlope

impl W<u32, Reg<u32, _GMAC_ST1RPQ>>

pub fn qnb(&mut self) -> QNB_W

Bits 0:2 - Queue Number (0-5)

pub fn dstcm(&mut self) -> DSTCM_W

Bits 4:11 - Differentiated Services or Traffic Class Match

pub fn udpm(&mut self) -> UDPM_W

Bits 12:27 - UDP Port Match

pub fn dstce(&mut self) -> DSTCE_W

Bit 28 - Differentiated Services or Traffic Class Match Enable

pub fn udpe(&mut self) -> UDPE_W

Bit 29 - UDP Port Match Enable

impl W<u32, Reg<u32, _GMAC_ST2RPQ>>

pub fn qnb(&mut self) -> QNB_W

Bits 0:2 - Queue Number (0-5)

pub fn vlanp(&mut self) -> VLANP_W

Bits 4:6 - VLAN Priority

pub fn vlane(&mut self) -> VLANE_W

Bit 8 - VLAN Enable

pub fn i2eth(&mut self) -> I2ETH_W

Bits 9:11 - Index of Screening Type 2 EtherType register x

pub fn ethe(&mut self) -> ETHE_W

Bit 12 - EtherType Enable

pub fn compa(&mut self) -> COMPA_W

Bits 13:17 - Index of Screening Type 2 Compare Word 0/Word 1 register x

pub fn compae(&mut self) -> COMPAE_W

Bit 18 - Compare A Enable

pub fn compb(&mut self) -> COMPB_W

Bits 19:23 - Index of Screening Type 2 Compare Word 0/Word 1 register x

pub fn compbe(&mut self) -> COMPBE_W

Bit 24 - Compare B Enable

pub fn compc(&mut self) -> COMPC_W

Bits 25:29 - Index of Screening Type 2 Compare Word 0/Word 1 register x

pub fn compce(&mut self) -> COMPCE_W

Bit 30 - Compare C Enable

impl W<u32, Reg<u32, _GMAC_IERPQ>>

pub fn rcomp(&mut self) -> RCOMP_W

Bit 1 - Receive Complete

pub fn rxubr(&mut self) -> RXUBR_W

Bit 2 - RX Used Bit Read

pub fn rlex(&mut self) -> RLEX_W

Bit 5 - Retry Limit Exceeded or Late Collision

pub fn tfc(&mut self) -> TFC_W

Bit 6 - Transmit Frame Corruption Due to AHB Error

pub fn tcomp(&mut self) -> TCOMP_W

Bit 7 - Transmit Complete

pub fn rovr(&mut self) -> ROVR_W

Bit 10 - Receive Overrun

pub fn hresp(&mut self) -> HRESP_W

Bit 11 - HRESP Not OK

impl W<u32, Reg<u32, _GMAC_IDRPQ>>

pub fn rcomp(&mut self) -> RCOMP_W

Bit 1 - Receive Complete

pub fn rxubr(&mut self) -> RXUBR_W

Bit 2 - RX Used Bit Read

pub fn rlex(&mut self) -> RLEX_W

Bit 5 - Retry Limit Exceeded or Late Collision

pub fn tfc(&mut self) -> TFC_W

Bit 6 - Transmit Frame Corruption Due to AHB Error

pub fn tcomp(&mut self) -> TCOMP_W

Bit 7 - Transmit Complete

pub fn rovr(&mut self) -> ROVR_W

Bit 10 - Receive Overrun

pub fn hresp(&mut self) -> HRESP_W

Bit 11 - HRESP Not OK

impl W<u32, Reg<u32, _GMAC_IMRPQ>>

pub fn rcomp(&mut self) -> RCOMP_W

Bit 1 - Receive Complete

pub fn rxubr(&mut self) -> RXUBR_W

Bit 2 - RX Used Bit Read

pub fn rlex(&mut self) -> RLEX_W

Bit 5 - Retry Limit Exceeded or Late Collision

pub fn ahb(&mut self) -> AHB_W

Bit 6 - AHB Error

pub fn tcomp(&mut self) -> TCOMP_W

Bit 7 - Transmit Complete

pub fn rovr(&mut self) -> ROVR_W

Bit 10 - Receive Overrun

pub fn hresp(&mut self) -> HRESP_W

Bit 11 - HRESP Not OK

impl W<u32, Reg<u32, _GMAC_ST2ER>>

pub fn compval(&mut self) -> COMPVAL_W

Bits 0:15 - Ethertype Compare Value

impl W<u32, Reg<u32, _SYS_GPBR>>

pub fn gpbr_value(&mut self) -> GPBR_VALUE_W

Bits 0:31 - Value of GPBR x

impl W<u32, Reg<u32, _ICM_CFG>>

pub fn wbdis(&mut self) -> WBDIS_W

Bit 0 - Write Back Disable

pub fn eomdis(&mut self) -> EOMDIS_W

Bit 1 - End of Monitoring Disable

pub fn slbdis(&mut self) -> SLBDIS_W

Bit 2 - Secondary List Branching Disable

pub fn bbc(&mut self) -> BBC_W

Bits 4:7 - Bus Burden Control

pub fn ascd(&mut self) -> ASCD_W

Bit 8 - Automatic Switch To Compare Digest

pub fn dualbuff(&mut self) -> DUALBUFF_W

Bit 9 - Dual Input Buffer

pub fn uihash(&mut self) -> UIHASH_W

Bit 12 - User Initial Hash Value

pub fn ualgo(&mut self) -> UALGO_W

Bits 13:15 - User SHA Algorithm

impl W<u32, Reg<u32, _ICM_CTRL>>

pub fn enable(&mut self) -> ENABLE_W

Bit 0 - ICM Enable

pub fn disable(&mut self) -> DISABLE_W

Bit 1 - ICM Disable Register

pub fn swrst(&mut self) -> SWRST_W

Bit 2 - Software Reset

pub fn rehash(&mut self) -> REHASH_W

Bits 4:7 - Recompute Internal Hash

pub fn rmdis(&mut self) -> RMDIS_W

Bits 8:11 - Region Monitoring Disable

pub fn rmen(&mut self) -> RMEN_W

Bits 12:15 - Region Monitoring Enable

impl W<u32, Reg<u32, _ICM_IER>>

pub fn rhc(&mut self) -> RHC_W

Bits 0:3 - Region Hash Completed Interrupt Enable

pub fn rdm(&mut self) -> RDM_W

Bits 4:7 - Region Digest Mismatch Interrupt Enable

pub fn rbe(&mut self) -> RBE_W

Bits 8:11 - Region Bus Error Interrupt Enable

pub fn rwc(&mut self) -> RWC_W

Bits 12:15 - Region Wrap Condition detected Interrupt Enable

pub fn rec(&mut self) -> REC_W

Bits 16:19 - Region End bit Condition Detected Interrupt Enable

pub fn rsu(&mut self) -> RSU_W

Bits 20:23 - Region Status Updated Interrupt Disable

pub fn urad(&mut self) -> URAD_W

Bit 24 - Undefined Register Access Detection Interrupt Enable

impl W<u32, Reg<u32, _ICM_IDR>>

pub fn rhc(&mut self) -> RHC_W

Bits 0:3 - Region Hash Completed Interrupt Disable

pub fn rdm(&mut self) -> RDM_W

Bits 4:7 - Region Digest Mismatch Interrupt Disable

pub fn rbe(&mut self) -> RBE_W

Bits 8:11 - Region Bus Error Interrupt Disable

pub fn rwc(&mut self) -> RWC_W

Bits 12:15 - Region Wrap Condition Detected Interrupt Disable

pub fn rec(&mut self) -> REC_W

Bits 16:19 - Region End bit Condition detected Interrupt Disable

pub fn rsu(&mut self) -> RSU_W

Bits 20:23 - Region Status Updated Interrupt Disable

pub fn urad(&mut self) -> URAD_W

Bit 24 - Undefined Register Access Detection Interrupt Disable

impl W<u32, Reg<u32, _ICM_DSCR>>

pub fn dasa(&mut self) -> DASA_W

Bits 6:31 - Descriptor Area Start Address

impl W<u32, Reg<u32, _ICM_HASH>>

pub fn hasa(&mut self) -> HASA_W

Bits 7:31 - Hash Area Start Address

impl W<u32, Reg<u32, _ICM_UIHVAL>>

pub fn val(&mut self) -> VAL_W

Bits 0:31 - Initial Hash Value

impl W<u32, Reg<u32, _ISI_CFG1>>

pub fn hsync_pol(&mut self) -> HSYNC_POL_W

Bit 2 - Horizontal Synchronization Polarity

pub fn vsync_pol(&mut self) -> VSYNC_POL_W

Bit 3 - Vertical Synchronization Polarity

pub fn pixclk_pol(&mut self) -> PIXCLK_POL_W

Bit 4 - Pixel Clock Polarity

pub fn grayle(&mut self) -> GRAYLE_W

Bit 5 - Grayscale Little Endian

pub fn emb_sync(&mut self) -> EMB_SYNC_W

Bit 6 - Embedded Synchronization

pub fn crc_sync(&mut self) -> CRC_SYNC_W

Bit 7 - Embedded Synchronization Correction

pub fn frate(&mut self) -> FRATE_W

Bits 8:10 - Frame Rate [0..7]

pub fn discr(&mut self) -> DISCR_W

Bit 11 - Disable Codec Request

pub fn full(&mut self) -> FULL_W

Bit 12 - Full Mode is Allowed

pub fn thmask(&mut self) -> THMASK_W

Bits 13:14 - Threshold Mask

pub fn sld(&mut self) -> SLD_W

Bits 16:23 - Start of Line Delay

pub fn sfd(&mut self) -> SFD_W

Bits 24:31 - Start of Frame Delay

impl W<u32, Reg<u32, _ISI_CFG2>>

pub fn im_vsize(&mut self) -> IM_VSIZE_W

Bits 0:10 - Vertical Size of the Image Sensor [0..2047]

pub fn gs_mode(&mut self) -> GS_MODE_W

Bit 11 - Grayscale Pixel Format Mode

pub fn rgb_mode(&mut self) -> RGB_MODE_W

Bit 12 - RGB Input Mode

pub fn grayscale(&mut self) -> GRAYSCALE_W

Bit 13 - Grayscale Mode Format Enable

pub fn rgb_swap(&mut self) -> RGB_SWAP_W

Bit 14 - RGB Format Swap Mode

pub fn col_space(&mut self) -> COL_SPACE_W

Bit 15 - Color Space for the Image Data

pub fn im_hsize(&mut self) -> IM_HSIZE_W

Bits 16:26 - Horizontal Size of the Image Sensor [0..2047]

pub fn ycc_swap(&mut self) -> YCC_SWAP_W

Bits 28:29 - YCrCb Format Swap Mode

pub fn rgb_cfg(&mut self) -> RGB_CFG_W

Bits 30:31 - RGB Pixel Mapping Configuration

impl W<u32, Reg<u32, _ISI_PSIZE>>

pub fn prev_vsize(&mut self) -> PREV_VSIZE_W

Bits 0:9 - Vertical Size for the Preview Path

pub fn prev_hsize(&mut self) -> PREV_HSIZE_W

Bits 16:25 - Horizontal Size for the Preview Path

impl W<u32, Reg<u32, _ISI_PDECF>>

pub fn dec_factor(&mut self) -> DEC_FACTOR_W

Bits 0:7 - Decimation Factor

impl W<u32, Reg<u32, _ISI_Y2R_SET0>>

pub fn c0(&mut self) -> C0_W

Bits 0:7 - Color Space Conversion Matrix Coefficient C0

pub fn c1(&mut self) -> C1_W

Bits 8:15 - Color Space Conversion Matrix Coefficient C1

pub fn c2(&mut self) -> C2_W

Bits 16:23 - Color Space Conversion Matrix Coefficient C2

pub fn c3(&mut self) -> C3_W

Bits 24:31 - Color Space Conversion Matrix Coefficient C3

impl W<u32, Reg<u32, _ISI_Y2R_SET1>>

pub fn c4(&mut self) -> C4_W

Bits 0:8 - Color Space Conversion Matrix Coefficient C4

pub fn yoff(&mut self) -> YOFF_W

Bit 12 - Color Space Conversion Luminance Default Offset

pub fn croff(&mut self) -> CROFF_W

Bit 13 - Color Space Conversion Red Chrominance Default Offset

pub fn cboff(&mut self) -> CBOFF_W

Bit 14 - Color Space Conversion Blue Chrominance Default Offset

impl W<u32, Reg<u32, _ISI_R2Y_SET0>>

pub fn c0(&mut self) -> C0_W

Bits 0:6 - Color Space Conversion Matrix Coefficient C0

pub fn c1(&mut self) -> C1_W

Bits 8:14 - Color Space Conversion Matrix Coefficient C1

pub fn c2(&mut self) -> C2_W

Bits 16:22 - Color Space Conversion Matrix Coefficient C2

pub fn roff(&mut self) -> ROFF_W

Bit 24 - Color Space Conversion Red Component Offset

impl W<u32, Reg<u32, _ISI_R2Y_SET1>>

pub fn c3(&mut self) -> C3_W

Bits 0:6 - Color Space Conversion Matrix Coefficient C3

pub fn c4(&mut self) -> C4_W

Bits 8:14 - Color Space Conversion Matrix Coefficient C4

pub fn c5(&mut self) -> C5_W

Bits 16:22 - Color Space Conversion Matrix Coefficient C5

pub fn goff(&mut self) -> GOFF_W

Bit 24 - Color Space Conversion Green Component Offset

impl W<u32, Reg<u32, _ISI_R2Y_SET2>>

pub fn c6(&mut self) -> C6_W

Bits 0:6 - Color Space Conversion Matrix Coefficient C6

pub fn c7(&mut self) -> C7_W

Bits 8:14 - Color Space Conversion Matrix Coefficient C7

pub fn c8(&mut self) -> C8_W

Bits 16:22 - Color Space Conversion Matrix Coefficient C8

pub fn boff(&mut self) -> BOFF_W

Bit 24 - Color Space Conversion Blue Component Offset

impl W<u32, Reg<u32, _ISI_CR>>

pub fn isi_en(&mut self) -> ISI_EN_W

Bit 0 - ISI Module Enable Request

pub fn isi_dis(&mut self) -> ISI_DIS_W

Bit 1 - ISI Module Disable Request

pub fn isi_srst(&mut self) -> ISI_SRST_W

Bit 2 - ISI Software Reset Request

pub fn isi_cdc(&mut self) -> ISI_CDC_W

Bit 8 - ISI Codec Request

impl W<u32, Reg<u32, _ISI_IER>>

pub fn dis_done(&mut self) -> DIS_DONE_W

Bit 1 - Disable Done Interrupt Enable

pub fn srst(&mut self) -> SRST_W

Bit 2 - Software Reset Interrupt Enable

pub fn vsync(&mut self) -> VSYNC_W

Bit 10 - Vertical Synchronization Interrupt Enable

pub fn pxfr_done(&mut self) -> PXFR_DONE_W

Bit 16 - Preview DMA Transfer Done Interrupt Enable

pub fn cxfr_done(&mut self) -> CXFR_DONE_W

Bit 17 - Codec DMA Transfer Done Interrupt Enable

pub fn p_ovr(&mut self) -> P_OVR_W

Bit 24 - Preview Datapath Overflow Interrupt Enable

pub fn c_ovr(&mut self) -> C_OVR_W

Bit 25 - Codec Datapath Overflow Interrupt Enable

pub fn crc_err(&mut self) -> CRC_ERR_W

Bit 26 - Embedded Synchronization CRC Error Interrupt Enable

pub fn fr_ovr(&mut self) -> FR_OVR_W

Bit 27 - Frame Rate Overflow Interrupt Enable

impl W<u32, Reg<u32, _ISI_IDR>>

pub fn dis_done(&mut self) -> DIS_DONE_W

Bit 1 - Disable Done Interrupt Disable

pub fn srst(&mut self) -> SRST_W

Bit 2 - Software Reset Interrupt Disable

pub fn vsync(&mut self) -> VSYNC_W

Bit 10 - Vertical Synchronization Interrupt Disable

pub fn pxfr_done(&mut self) -> PXFR_DONE_W

Bit 16 - Preview DMA Transfer Done Interrupt Disable

pub fn cxfr_done(&mut self) -> CXFR_DONE_W

Bit 17 - Codec DMA Transfer Done Interrupt Disable

pub fn p_ovr(&mut self) -> P_OVR_W

Bit 24 - Preview Datapath Overflow Interrupt Disable

pub fn c_ovr(&mut self) -> C_OVR_W

Bit 25 - Codec Datapath Overflow Interrupt Disable

pub fn crc_err(&mut self) -> CRC_ERR_W

Bit 26 - Embedded Synchronization CRC Error Interrupt Disable

pub fn fr_ovr(&mut self) -> FR_OVR_W

Bit 27 - Frame Rate Overflow Interrupt Disable

impl W<u32, Reg<u32, _ISI_DMA_CHER>>

pub fn p_ch_en(&mut self) -> P_CH_EN_W

Bit 0 - Preview Channel Enable

pub fn c_ch_en(&mut self) -> C_CH_EN_W

Bit 1 - Codec Channel Enable

impl W<u32, Reg<u32, _ISI_DMA_CHDR>>

pub fn p_ch_dis(&mut self) -> P_CH_DIS_W

Bit 0 - Preview Channel Disable Request

pub fn c_ch_dis(&mut self) -> C_CH_DIS_W

Bit 1 - Codec Channel Disable Request

impl W<u32, Reg<u32, _ISI_DMA_P_ADDR>>

pub fn p_addr(&mut self) -> P_ADDR_W

Bits 2:31 - Preview Image Base Address

impl W<u32, Reg<u32, _ISI_DMA_P_CTRL>>

pub fn p_fetch(&mut self) -> P_FETCH_W

Bit 0 - Descriptor Fetch Control Bit

pub fn p_wb(&mut self) -> P_WB_W

Bit 1 - Descriptor Writeback Control Bit

pub fn p_ien(&mut self) -> P_IEN_W

Bit 2 - Transfer Done Flag Control

pub fn p_done(&mut self) -> P_DONE_W

Bit 3 - Preview Transfer Done

impl W<u32, Reg<u32, _ISI_DMA_P_DSCR>>

pub fn p_dscr(&mut self) -> P_DSCR_W

Bits 2:31 - Preview Descriptor Base Address

impl W<u32, Reg<u32, _ISI_DMA_C_ADDR>>

pub fn c_addr(&mut self) -> C_ADDR_W

Bits 2:31 - Codec Image Base Address

impl W<u32, Reg<u32, _ISI_DMA_C_CTRL>>

pub fn c_fetch(&mut self) -> C_FETCH_W

Bit 0 - Descriptor Fetch Control Bit

pub fn c_wb(&mut self) -> C_WB_W

Bit 1 - Descriptor Writeback Control Bit

pub fn c_ien(&mut self) -> C_IEN_W

Bit 2 - Transfer Done Flag Control

pub fn c_done(&mut self) -> C_DONE_W

Bit 3 - Codec Transfer Done

impl W<u32, Reg<u32, _ISI_DMA_C_DSCR>>

pub fn c_dscr(&mut self) -> C_DSCR_W

Bits 2:31 - Codec Descriptor Base Address

impl W<u32, Reg<u32, _ISI_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key Password

impl W<u32, Reg<u32, _MATRIX_PRAS>>

pub fn m0pr(&mut self) -> M0PR_W

Bits 0:1 - Master 0 Priority

pub fn m1pr(&mut self) -> M1PR_W

Bits 4:5 - Master 1 Priority

pub fn m2pr(&mut self) -> M2PR_W

Bits 8:9 - Master 2 Priority

pub fn m3pr(&mut self) -> M3PR_W

Bits 12:13 - Master 3 Priority

pub fn m4pr(&mut self) -> M4PR_W

Bits 16:17 - Master 4 Priority

pub fn m5pr(&mut self) -> M5PR_W

Bits 20:21 - Master 5 Priority

pub fn m6pr(&mut self) -> M6PR_W

Bits 24:25 - Master 6 Priority

impl W<u32, Reg<u32, _MATRIX_PRBS>>

pub fn m8pr(&mut self) -> M8PR_W

Bits 0:1 - Master 8 Priority

pub fn m9pr(&mut self) -> M9PR_W

Bits 4:5 - Master 9 Priority

pub fn m10pr(&mut self) -> M10PR_W

Bits 8:9 - Master 10 Priority

pub fn m11pr(&mut self) -> M11PR_W

Bits 12:13 - Master 11 Priority

pub fn m12pr(&mut self) -> M12PR_W

Bits 16:17 - Master 12 Priority

impl W<u32, Reg<u32, _MATRIX_MCFG>>

pub fn ulbt(&mut self) -> ULBT_W

Bits 0:2 - Undefined Length Burst Type

impl W<u32, Reg<u32, _MATRIX_SCFG>>

pub fn slot_cycle(&mut self) -> SLOT_CYCLE_W

Bits 0:8 - Maximum Bus Grant Duration for Masters

pub fn defmstr_type(&mut self) -> DEFMSTR_TYPE_W

Bits 16:17 - Default Master Type

pub fn fixed_defmstr(&mut self) -> FIXED_DEFMSTR_W

Bits 18:21 - Fixed Default Master

impl W<u32, Reg<u32, _MATRIX_MRCR>>

pub fn rcb0(&mut self) -> RCB0_W

Bit 0 - Remap Command Bit for Master 0

pub fn rcb1(&mut self) -> RCB1_W

Bit 1 - Remap Command Bit for Master 1

pub fn rcb2(&mut self) -> RCB2_W

Bit 2 - Remap Command Bit for Master 2

pub fn rcb3(&mut self) -> RCB3_W

Bit 3 - Remap Command Bit for Master 3

pub fn rcb4(&mut self) -> RCB4_W

Bit 4 - Remap Command Bit for Master 4

pub fn rcb5(&mut self) -> RCB5_W

Bit 5 - Remap Command Bit for Master 5

pub fn rcb6(&mut self) -> RCB6_W

Bit 6 - Remap Command Bit for Master 6

pub fn rcb8(&mut self) -> RCB8_W

Bit 8 - Remap Command Bit for Master 8

pub fn rcb9(&mut self) -> RCB9_W

Bit 9 - Remap Command Bit for Master 9

pub fn rcb10(&mut self) -> RCB10_W

Bit 10 - Remap Command Bit for Master 10

pub fn rcb11(&mut self) -> RCB11_W

Bit 11 - Remap Command Bit for Master 11

pub fn rcb12(&mut self) -> RCB12_W

Bit 12 - Remap Command Bit for Master 12

impl W<u32, Reg<u32, _CCFG_CAN0>>

pub fn can0dmaba(&mut self) -> CAN0DMABA_W

Bits 16:31 - CAN0 DMA Base Address

impl W<u32, Reg<u32, _CCFG_SYSIO>>

pub fn sysio4(&mut self) -> SYSIO4_W

Bit 4 - PB4 or TDI Assignment

pub fn sysio5(&mut self) -> SYSIO5_W

Bit 5 - PB5 or TDO/TRACESWO Assignment

pub fn sysio6(&mut self) -> SYSIO6_W

Bit 6 - PB6 or TMS/SWDIO Assignment

pub fn sysio7(&mut self) -> SYSIO7_W

Bit 7 - PB7 or TCK/SWCLK Assignment

pub fn sysio12(&mut self) -> SYSIO12_W

Bit 12 - PB12 or ERASE Assignment

impl W<u32, Reg<u32, _CCFG_PCCR>>

pub fn tc0cc(&mut self) -> TC0CC_W

Bit 20 - TC0 Clock Configuration

pub fn i2sc0cc(&mut self) -> I2SC0CC_W

Bit 21 - I2SC0 Clock Configuration

pub fn i2sc1cc(&mut self) -> I2SC1CC_W

Bit 22 - I2SC1 Clock Configuration

impl W<u32, Reg<u32, _CCFG_DYNCKG>>

pub fn matckg(&mut self) -> MATCKG_W

Bit 0 - MATRIX Dynamic Clock Gating

pub fn bridckg(&mut self) -> BRIDCKG_W

Bit 1 - Bridge Dynamic Clock Gating Enable

pub fn efcckg(&mut self) -> EFCCKG_W

Bit 2 - EFC Dynamic Clock Gating Enable

impl W<u32, Reg<u32, _CCFG_SMCNFCS>>

pub fn smc_nfcs0(&mut self) -> SMC_NFCS0_W

Bit 0 - SMC NAND Flash Chip Select 0 Assignment

pub fn smc_nfcs1(&mut self) -> SMC_NFCS1_W

Bit 1 - SMC NAND Flash Chip Select 1 Assignment

pub fn smc_nfcs2(&mut self) -> SMC_NFCS2_W

Bit 2 - SMC NAND Flash Chip Select 2 Assignment

pub fn smc_nfcs3(&mut self) -> SMC_NFCS3_W

Bit 3 - SMC NAND Flash Chip Select 3 Assignment

pub fn sdramen(&mut self) -> SDRAMEN_W

Bit 4 - SDRAM Enable

impl W<u32, Reg<u32, _MATRIX_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _MCAN_CUST>>

pub fn csv(&mut self) -> CSV_W

Bits 0:31 - Customer-specific Value

impl W<u32, Reg<u32, _MCAN_DBTP>>

pub fn dsjw(&mut self) -> DSJW_W

Bits 0:2 - Data (Re) Synchronization Jump Width

pub fn dtseg2(&mut self) -> DTSEG2_W

Bits 4:7 - Data Time Segment After Sample Point

pub fn dtseg1(&mut self) -> DTSEG1_W

Bits 8:12 - Data Time Segment Before Sample Point

pub fn dbrp(&mut self) -> DBRP_W

Bits 16:20 - Data Bit Rate Prescaler

pub fn tdc(&mut self) -> TDC_W

Bit 23 - Transmitter Delay Compensation

impl W<u32, Reg<u32, _MCAN_TEST>>

pub fn lbck(&mut self) -> LBCK_W

Bit 4 - Loop Back Mode (read/write)

pub fn tx(&mut self) -> TX_W

Bits 5:6 - Control of Transmit Pin (read/write)

pub fn rx(&mut self) -> RX_W

Bit 7 - Receive Pin (read-only)

impl W<u32, Reg<u32, _MCAN_RWD>>

pub fn wdc(&mut self) -> WDC_W

Bits 0:7 - Watchdog Configuration (read/write)

pub fn wdv(&mut self) -> WDV_W

Bits 8:15 - Watchdog Value (read-only)

impl W<u32, Reg<u32, _MCAN_CCCR>>

pub fn init(&mut self) -> INIT_W

Bit 0 - Initialization (read/write)

pub fn cce(&mut self) -> CCE_W

Bit 1 - Configuration Change Enable (read/write, write protection)

pub fn asm(&mut self) -> ASM_W

Bit 2 - Restricted Operation Mode (read/write, write protection against '1')

pub fn csa(&mut self) -> CSA_W

Bit 3 - Clock Stop Acknowledge (read-only)

pub fn csr(&mut self) -> CSR_W

Bit 4 - Clock Stop Request (read/write)

pub fn mon(&mut self) -> MON_W

Bit 5 - Bus Monitoring Mode (read/write, write protection against '1')

pub fn dar(&mut self) -> DAR_W

Bit 6 - Disable Automatic Retransmission (read/write, write protection)

pub fn test(&mut self) -> TEST_W

Bit 7 - Test Mode Enable (read/write, write protection against '1')

pub fn fdoe(&mut self) -> FDOE_W

Bit 8 - CAN FD Operation Enable (read/write, write protection)

pub fn brse(&mut self) -> BRSE_W

Bit 9 - Bit Rate Switching Enable (read/write, write protection)

pub fn pxhd(&mut self) -> PXHD_W

Bit 12 - Protocol Exception Event Handling (read/write, write protection)

pub fn efbi(&mut self) -> EFBI_W

Bit 13 - Edge Filtering during Bus Integration (read/write, write protection)

pub fn txp(&mut self) -> TXP_W

Bit 14 - Transmit Pause (read/write, write protection)

pub fn niso(&mut self) -> NISO_W

Bit 15 - Non-ISO Operation

impl W<u32, Reg<u32, _MCAN_NBTP>>

pub fn ntseg2(&mut self) -> NTSEG2_W

Bits 0:6 - Nominal Time Segment After Sample Point

pub fn ntseg1(&mut self) -> NTSEG1_W

Bits 8:15 - Nominal Time Segment Before Sample Point

pub fn nbrp(&mut self) -> NBRP_W

Bits 16:24 - Nominal Bit Rate Prescaler

pub fn nsjw(&mut self) -> NSJW_W

Bits 25:31 - Nominal (Re) Synchronization Jump Width

impl W<u32, Reg<u32, _MCAN_TSCC>>

pub fn tss(&mut self) -> TSS_W

Bits 0:1 - Timestamp Select

pub fn tcp(&mut self) -> TCP_W

Bits 16:19 - Timestamp Counter Prescaler

impl W<u32, Reg<u32, _MCAN_TSCV>>

pub fn tsc(&mut self) -> TSC_W

Bits 0:15 - Timestamp Counter (cleared on write)

impl W<u32, Reg<u32, _MCAN_TOCC>>

pub fn etoc(&mut self) -> ETOC_W

Bit 0 - Enable Timeout Counter

pub fn tos(&mut self) -> TOS_W

Bits 1:2 - Timeout Select

pub fn top(&mut self) -> TOP_W

Bits 16:31 - Timeout Period

impl W<u32, Reg<u32, _MCAN_TOCV>>

pub fn toc(&mut self) -> TOC_W

Bits 0:15 - Timeout Counter (cleared on write)

impl W<u32, Reg<u32, _MCAN_TDCR>>

pub fn tdcf(&mut self) -> TDCF_W

Bits 0:6 - Transmitter Delay Compensation Filter

pub fn tdco(&mut self) -> TDCO_W

Bits 8:14 - Transmitter Delay Compensation Offset

impl W<u32, Reg<u32, _MCAN_IR>>

pub fn rf0n(&mut self) -> RF0N_W

Bit 0 - Receive FIFO 0 New Message

pub fn rf0w(&mut self) -> RF0W_W

Bit 1 - Receive FIFO 0 Watermark Reached

pub fn rf0f(&mut self) -> RF0F_W

Bit 2 - Receive FIFO 0 Full

pub fn rf0l(&mut self) -> RF0L_W

Bit 3 - Receive FIFO 0 Message Lost

pub fn rf1n(&mut self) -> RF1N_W

Bit 4 - Receive FIFO 1 New Message

pub fn rf1w(&mut self) -> RF1W_W

Bit 5 - Receive FIFO 1 Watermark Reached

pub fn rf1f(&mut self) -> RF1F_W

Bit 6 - Receive FIFO 1 Full

pub fn rf1l(&mut self) -> RF1L_W

Bit 7 - Receive FIFO 1 Message Lost

pub fn hpm(&mut self) -> HPM_W

Bit 8 - High Priority Message

pub fn tc(&mut self) -> TC_W

Bit 9 - Transmission Completed

pub fn tcf(&mut self) -> TCF_W

Bit 10 - Transmission Cancellation Finished

pub fn tfe(&mut self) -> TFE_W

Bit 11 - Tx FIFO Empty

pub fn tefn(&mut self) -> TEFN_W

Bit 12 - Tx Event FIFO New Entry

pub fn tefw(&mut self) -> TEFW_W

Bit 13 - Tx Event FIFO Watermark Reached

pub fn teff(&mut self) -> TEFF_W

Bit 14 - Tx Event FIFO Full

pub fn tefl(&mut self) -> TEFL_W

Bit 15 - Tx Event FIFO Element Lost

pub fn tsw(&mut self) -> TSW_W

Bit 16 - Timestamp Wraparound

pub fn mraf(&mut self) -> MRAF_W

Bit 17 - Message RAM Access Failure

pub fn too(&mut self) -> TOO_W

Bit 18 - Timeout Occurred

pub fn drx(&mut self) -> DRX_W

Bit 19 - Message stored to Dedicated Receive Buffer

pub fn elo(&mut self) -> ELO_W

Bit 22 - Error Logging Overflow

pub fn ep(&mut self) -> EP_W

Bit 23 - Error Passive

pub fn ew(&mut self) -> EW_W

Bit 24 - Warning Status

pub fn bo(&mut self) -> BO_W

Bit 25 - Bus_Off Status

pub fn wdi(&mut self) -> WDI_W

Bit 26 - Watchdog Interrupt

pub fn pea(&mut self) -> PEA_W

Bit 27 - Protocol Error in Arbitration Phase

pub fn ped(&mut self) -> PED_W

Bit 28 - Protocol Error in Data Phase

pub fn ara(&mut self) -> ARA_W

Bit 29 - Access to Reserved Address

impl W<u32, Reg<u32, _MCAN_IE>>

pub fn rf0ne(&mut self) -> RF0NE_W

Bit 0 - Receive FIFO 0 New Message Interrupt Enable

pub fn rf0we(&mut self) -> RF0WE_W

Bit 1 - Receive FIFO 0 Watermark Reached Interrupt Enable

pub fn rf0fe(&mut self) -> RF0FE_W

Bit 2 - Receive FIFO 0 Full Interrupt Enable

pub fn rf0le(&mut self) -> RF0LE_W

Bit 3 - Receive FIFO 0 Message Lost Interrupt Enable

pub fn rf1ne(&mut self) -> RF1NE_W

Bit 4 - Receive FIFO 1 New Message Interrupt Enable

pub fn rf1we(&mut self) -> RF1WE_W

Bit 5 - Receive FIFO 1 Watermark Reached Interrupt Enable

pub fn rf1fe(&mut self) -> RF1FE_W

Bit 6 - Receive FIFO 1 Full Interrupt Enable

pub fn rf1le(&mut self) -> RF1LE_W

Bit 7 - Receive FIFO 1 Message Lost Interrupt Enable

pub fn hpme(&mut self) -> HPME_W

Bit 8 - High Priority Message Interrupt Enable

pub fn tce(&mut self) -> TCE_W

Bit 9 - Transmission Completed Interrupt Enable

pub fn tcfe(&mut self) -> TCFE_W

Bit 10 - Transmission Cancellation Finished Interrupt Enable

pub fn tfee(&mut self) -> TFEE_W

Bit 11 - Tx FIFO Empty Interrupt Enable

pub fn tefne(&mut self) -> TEFNE_W

Bit 12 - Tx Event FIFO New Entry Interrupt Enable

pub fn tefwe(&mut self) -> TEFWE_W

Bit 13 - Tx Event FIFO Watermark Reached Interrupt Enable

pub fn teffe(&mut self) -> TEFFE_W

Bit 14 - Tx Event FIFO Full Interrupt Enable

pub fn tefle(&mut self) -> TEFLE_W

Bit 15 - Tx Event FIFO Event Lost Interrupt Enable

pub fn tswe(&mut self) -> TSWE_W

Bit 16 - Timestamp Wraparound Interrupt Enable

pub fn mrafe(&mut self) -> MRAFE_W

Bit 17 - Message RAM Access Failure Interrupt Enable

pub fn tooe(&mut self) -> TOOE_W

Bit 18 - Timeout Occurred Interrupt Enable

pub fn drxe(&mut self) -> DRXE_W

Bit 19 - Message stored to Dedicated Receive Buffer Interrupt Enable

pub fn eloe(&mut self) -> ELOE_W

Bit 22 - Error Logging Overflow Interrupt Enable

pub fn epe(&mut self) -> EPE_W

Bit 23 - Error Passive Interrupt Enable

pub fn ewe(&mut self) -> EWE_W

Bit 24 - Warning Status Interrupt Enable

pub fn boe(&mut self) -> BOE_W

Bit 25 - Bus_Off Status Interrupt Enable

pub fn wdie(&mut self) -> WDIE_W

Bit 26 - Watchdog Interrupt Enable

pub fn peae(&mut self) -> PEAE_W

Bit 27 - Protocol Error in Arbitration Phase Enable

pub fn pede(&mut self) -> PEDE_W

Bit 28 - Protocol Error in Data Phase Enable

pub fn arae(&mut self) -> ARAE_W

Bit 29 - Access to Reserved Address Enable

impl W<u32, Reg<u32, _MCAN_ILS>>

pub fn rf0nl(&mut self) -> RF0NL_W

Bit 0 - Receive FIFO 0 New Message Interrupt Line

pub fn rf0wl(&mut self) -> RF0WL_W

Bit 1 - Receive FIFO 0 Watermark Reached Interrupt Line

pub fn rf0fl(&mut self) -> RF0FL_W

Bit 2 - Receive FIFO 0 Full Interrupt Line

pub fn rf0ll(&mut self) -> RF0LL_W

Bit 3 - Receive FIFO 0 Message Lost Interrupt Line

pub fn rf1nl(&mut self) -> RF1NL_W

Bit 4 - Receive FIFO 1 New Message Interrupt Line

pub fn rf1wl(&mut self) -> RF1WL_W

Bit 5 - Receive FIFO 1 Watermark Reached Interrupt Line

pub fn rf1fl(&mut self) -> RF1FL_W

Bit 6 - Receive FIFO 1 Full Interrupt Line

pub fn rf1ll(&mut self) -> RF1LL_W

Bit 7 - Receive FIFO 1 Message Lost Interrupt Line

pub fn hpml(&mut self) -> HPML_W

Bit 8 - High Priority Message Interrupt Line

pub fn tcl(&mut self) -> TCL_W

Bit 9 - Transmission Completed Interrupt Line

pub fn tcfl(&mut self) -> TCFL_W

Bit 10 - Transmission Cancellation Finished Interrupt Line

pub fn tfel(&mut self) -> TFEL_W

Bit 11 - Tx FIFO Empty Interrupt Line

pub fn tefnl(&mut self) -> TEFNL_W

Bit 12 - Tx Event FIFO New Entry Interrupt Line

pub fn tefwl(&mut self) -> TEFWL_W

Bit 13 - Tx Event FIFO Watermark Reached Interrupt Line

pub fn teffl(&mut self) -> TEFFL_W

Bit 14 - Tx Event FIFO Full Interrupt Line

pub fn tefll(&mut self) -> TEFLL_W

Bit 15 - Tx Event FIFO Event Lost Interrupt Line

pub fn tswl(&mut self) -> TSWL_W

Bit 16 - Timestamp Wraparound Interrupt Line

pub fn mrafl(&mut self) -> MRAFL_W

Bit 17 - Message RAM Access Failure Interrupt Line

pub fn tool(&mut self) -> TOOL_W

Bit 18 - Timeout Occurred Interrupt Line

pub fn drxl(&mut self) -> DRXL_W

Bit 19 - Message stored to Dedicated Receive Buffer Interrupt Line

pub fn elol(&mut self) -> ELOL_W

Bit 22 - Error Logging Overflow Interrupt Line

pub fn epl(&mut self) -> EPL_W

Bit 23 - Error Passive Interrupt Line

pub fn ewl(&mut self) -> EWL_W

Bit 24 - Warning Status Interrupt Line

pub fn bol(&mut self) -> BOL_W

Bit 25 - Bus_Off Status Interrupt Line

pub fn wdil(&mut self) -> WDIL_W

Bit 26 - Watchdog Interrupt Line

pub fn peal(&mut self) -> PEAL_W

Bit 27 - Protocol Error in Arbitration Phase Line

pub fn pedl(&mut self) -> PEDL_W

Bit 28 - Protocol Error in Data Phase Line

pub fn aral(&mut self) -> ARAL_W

Bit 29 - Access to Reserved Address Line

impl W<u32, Reg<u32, _MCAN_ILE>>

pub fn eint0(&mut self) -> EINT0_W

Bit 0 - Enable Interrupt Line 0

pub fn eint1(&mut self) -> EINT1_W

Bit 1 - Enable Interrupt Line 1

impl W<u32, Reg<u32, _MCAN_GFC>>

pub fn rrfe(&mut self) -> RRFE_W

Bit 0 - Reject Remote Frames Extended

pub fn rrfs(&mut self) -> RRFS_W

Bit 1 - Reject Remote Frames Standard

pub fn anfe(&mut self) -> ANFE_W

Bits 2:3 - Accept Non-matching Frames Extended

pub fn anfs(&mut self) -> ANFS_W

Bits 4:5 - Accept Non-matching Frames Standard

impl W<u32, Reg<u32, _MCAN_SIDFC>>

pub fn flssa(&mut self) -> FLSSA_W

Bits 2:15 - Filter List Standard Start Address

pub fn lss(&mut self) -> LSS_W

Bits 16:23 - List Size Standard

impl W<u32, Reg<u32, _MCAN_XIDFC>>

pub fn flesa(&mut self) -> FLESA_W

Bits 2:15 - Filter List Extended Start Address

pub fn lse(&mut self) -> LSE_W

Bits 16:22 - List Size Extended

impl W<u32, Reg<u32, _MCAN_XIDAM>>

pub fn eidm(&mut self) -> EIDM_W

Bits 0:28 - Extended ID Mask

impl W<u32, Reg<u32, _MCAN_NDAT1>>

pub fn nd0(&mut self) -> ND0_W

Bit 0 - New Data

pub fn nd1(&mut self) -> ND1_W

Bit 1 - New Data

pub fn nd2(&mut self) -> ND2_W

Bit 2 - New Data

pub fn nd3(&mut self) -> ND3_W

Bit 3 - New Data

pub fn nd4(&mut self) -> ND4_W

Bit 4 - New Data

pub fn nd5(&mut self) -> ND5_W

Bit 5 - New Data

pub fn nd6(&mut self) -> ND6_W

Bit 6 - New Data

pub fn nd7(&mut self) -> ND7_W

Bit 7 - New Data

pub fn nd8(&mut self) -> ND8_W

Bit 8 - New Data

pub fn nd9(&mut self) -> ND9_W

Bit 9 - New Data

pub fn nd10(&mut self) -> ND10_W

Bit 10 - New Data

pub fn nd11(&mut self) -> ND11_W

Bit 11 - New Data

pub fn nd12(&mut self) -> ND12_W

Bit 12 - New Data

pub fn nd13(&mut self) -> ND13_W

Bit 13 - New Data

pub fn nd14(&mut self) -> ND14_W

Bit 14 - New Data

pub fn nd15(&mut self) -> ND15_W

Bit 15 - New Data

pub fn nd16(&mut self) -> ND16_W

Bit 16 - New Data

pub fn nd17(&mut self) -> ND17_W

Bit 17 - New Data

pub fn nd18(&mut self) -> ND18_W

Bit 18 - New Data

pub fn nd19(&mut self) -> ND19_W

Bit 19 - New Data

pub fn nd20(&mut self) -> ND20_W

Bit 20 - New Data

pub fn nd21(&mut self) -> ND21_W

Bit 21 - New Data

pub fn nd22(&mut self) -> ND22_W

Bit 22 - New Data

pub fn nd23(&mut self) -> ND23_W

Bit 23 - New Data

pub fn nd24(&mut self) -> ND24_W

Bit 24 - New Data

pub fn nd25(&mut self) -> ND25_W

Bit 25 - New Data

pub fn nd26(&mut self) -> ND26_W

Bit 26 - New Data

pub fn nd27(&mut self) -> ND27_W

Bit 27 - New Data

pub fn nd28(&mut self) -> ND28_W

Bit 28 - New Data

pub fn nd29(&mut self) -> ND29_W

Bit 29 - New Data

pub fn nd30(&mut self) -> ND30_W

Bit 30 - New Data

pub fn nd31(&mut self) -> ND31_W

Bit 31 - New Data

impl W<u32, Reg<u32, _MCAN_NDAT2>>

pub fn nd32(&mut self) -> ND32_W

Bit 0 - New Data

pub fn nd33(&mut self) -> ND33_W

Bit 1 - New Data

pub fn nd34(&mut self) -> ND34_W

Bit 2 - New Data

pub fn nd35(&mut self) -> ND35_W

Bit 3 - New Data

pub fn nd36(&mut self) -> ND36_W

Bit 4 - New Data

pub fn nd37(&mut self) -> ND37_W

Bit 5 - New Data

pub fn nd38(&mut self) -> ND38_W

Bit 6 - New Data

pub fn nd39(&mut self) -> ND39_W

Bit 7 - New Data

pub fn nd40(&mut self) -> ND40_W

Bit 8 - New Data

pub fn nd41(&mut self) -> ND41_W

Bit 9 - New Data

pub fn nd42(&mut self) -> ND42_W

Bit 10 - New Data

pub fn nd43(&mut self) -> ND43_W

Bit 11 - New Data

pub fn nd44(&mut self) -> ND44_W

Bit 12 - New Data

pub fn nd45(&mut self) -> ND45_W

Bit 13 - New Data

pub fn nd46(&mut self) -> ND46_W

Bit 14 - New Data

pub fn nd47(&mut self) -> ND47_W

Bit 15 - New Data

pub fn nd48(&mut self) -> ND48_W

Bit 16 - New Data

pub fn nd49(&mut self) -> ND49_W

Bit 17 - New Data

pub fn nd50(&mut self) -> ND50_W

Bit 18 - New Data

pub fn nd51(&mut self) -> ND51_W

Bit 19 - New Data

pub fn nd52(&mut self) -> ND52_W

Bit 20 - New Data

pub fn nd53(&mut self) -> ND53_W

Bit 21 - New Data

pub fn nd54(&mut self) -> ND54_W

Bit 22 - New Data

pub fn nd55(&mut self) -> ND55_W

Bit 23 - New Data

pub fn nd56(&mut self) -> ND56_W

Bit 24 - New Data

pub fn nd57(&mut self) -> ND57_W

Bit 25 - New Data

pub fn nd58(&mut self) -> ND58_W

Bit 26 - New Data

pub fn nd59(&mut self) -> ND59_W

Bit 27 - New Data

pub fn nd60(&mut self) -> ND60_W

Bit 28 - New Data

pub fn nd61(&mut self) -> ND61_W

Bit 29 - New Data

pub fn nd62(&mut self) -> ND62_W

Bit 30 - New Data

pub fn nd63(&mut self) -> ND63_W

Bit 31 - New Data

impl W<u32, Reg<u32, _MCAN_RXF0C>>

pub fn f0sa(&mut self) -> F0SA_W

Bits 2:15 - Receive FIFO 0 Start Address

pub fn f0s(&mut self) -> F0S_W

Bits 16:22 - Receive FIFO 0 Start Address

pub fn f0wm(&mut self) -> F0WM_W

Bits 24:30 - Receive FIFO 0 Watermark

pub fn f0om(&mut self) -> F0OM_W

Bit 31 - FIFO 0 Operation Mode

impl W<u32, Reg<u32, _MCAN_RXF0A>>

pub fn f0ai(&mut self) -> F0AI_W

Bits 0:5 - Receive FIFO 0 Acknowledge Index

impl W<u32, Reg<u32, _MCAN_RXBC>>

pub fn rbsa(&mut self) -> RBSA_W

Bits 2:15 - Receive Buffer Start Address

impl W<u32, Reg<u32, _MCAN_RXF1C>>

pub fn f1sa(&mut self) -> F1SA_W

Bits 2:15 - Receive FIFO 1 Start Address

pub fn f1s(&mut self) -> F1S_W

Bits 16:22 - Receive FIFO 1 Start Address

pub fn f1wm(&mut self) -> F1WM_W

Bits 24:30 - Receive FIFO 1 Watermark

pub fn f1om(&mut self) -> F1OM_W

Bit 31 - FIFO 1 Operation Mode

impl W<u32, Reg<u32, _MCAN_RXF1A>>

pub fn f1ai(&mut self) -> F1AI_W

Bits 0:5 - Receive FIFO 1 Acknowledge Index

impl W<u32, Reg<u32, _MCAN_RXESC>>

pub fn f0ds(&mut self) -> F0DS_W

Bits 0:2 - Receive FIFO 0 Data Field Size

pub fn f1ds(&mut self) -> F1DS_W

Bits 4:6 - Receive FIFO 1 Data Field Size

pub fn rbds(&mut self) -> RBDS_W

Bits 8:10 - Receive Buffer Data Field Size

impl W<u32, Reg<u32, _MCAN_TXBC>>

pub fn tbsa(&mut self) -> TBSA_W

Bits 2:15 - Tx Buffers Start Address

pub fn ndtb(&mut self) -> NDTB_W

Bits 16:21 - Number of Dedicated Transmit Buffers

pub fn tfqs(&mut self) -> TFQS_W

Bits 24:29 - Transmit FIFO/Queue Size

pub fn tfqm(&mut self) -> TFQM_W

Bit 30 - Tx FIFO/Queue Mode

impl W<u32, Reg<u32, _MCAN_TXESC>>

pub fn tbds(&mut self) -> TBDS_W

Bits 0:2 - Tx Buffer Data Field Size

impl W<u32, Reg<u32, _MCAN_TXBAR>>

pub fn ar0(&mut self) -> AR0_W

Bit 0 - Add Request for Transmit Buffer 0

pub fn ar1(&mut self) -> AR1_W

Bit 1 - Add Request for Transmit Buffer 1

pub fn ar2(&mut self) -> AR2_W

Bit 2 - Add Request for Transmit Buffer 2

pub fn ar3(&mut self) -> AR3_W

Bit 3 - Add Request for Transmit Buffer 3

pub fn ar4(&mut self) -> AR4_W

Bit 4 - Add Request for Transmit Buffer 4

pub fn ar5(&mut self) -> AR5_W

Bit 5 - Add Request for Transmit Buffer 5

pub fn ar6(&mut self) -> AR6_W

Bit 6 - Add Request for Transmit Buffer 6

pub fn ar7(&mut self) -> AR7_W

Bit 7 - Add Request for Transmit Buffer 7

pub fn ar8(&mut self) -> AR8_W

Bit 8 - Add Request for Transmit Buffer 8

pub fn ar9(&mut self) -> AR9_W

Bit 9 - Add Request for Transmit Buffer 9

pub fn ar10(&mut self) -> AR10_W

Bit 10 - Add Request for Transmit Buffer 10

pub fn ar11(&mut self) -> AR11_W

Bit 11 - Add Request for Transmit Buffer 11

pub fn ar12(&mut self) -> AR12_W

Bit 12 - Add Request for Transmit Buffer 12

pub fn ar13(&mut self) -> AR13_W

Bit 13 - Add Request for Transmit Buffer 13

pub fn ar14(&mut self) -> AR14_W

Bit 14 - Add Request for Transmit Buffer 14

pub fn ar15(&mut self) -> AR15_W

Bit 15 - Add Request for Transmit Buffer 15

pub fn ar16(&mut self) -> AR16_W

Bit 16 - Add Request for Transmit Buffer 16

pub fn ar17(&mut self) -> AR17_W

Bit 17 - Add Request for Transmit Buffer 17

pub fn ar18(&mut self) -> AR18_W

Bit 18 - Add Request for Transmit Buffer 18

pub fn ar19(&mut self) -> AR19_W

Bit 19 - Add Request for Transmit Buffer 19

pub fn ar20(&mut self) -> AR20_W

Bit 20 - Add Request for Transmit Buffer 20

pub fn ar21(&mut self) -> AR21_W

Bit 21 - Add Request for Transmit Buffer 21

pub fn ar22(&mut self) -> AR22_W

Bit 22 - Add Request for Transmit Buffer 22

pub fn ar23(&mut self) -> AR23_W

Bit 23 - Add Request for Transmit Buffer 23

pub fn ar24(&mut self) -> AR24_W

Bit 24 - Add Request for Transmit Buffer 24

pub fn ar25(&mut self) -> AR25_W

Bit 25 - Add Request for Transmit Buffer 25

pub fn ar26(&mut self) -> AR26_W

Bit 26 - Add Request for Transmit Buffer 26

pub fn ar27(&mut self) -> AR27_W

Bit 27 - Add Request for Transmit Buffer 27

pub fn ar28(&mut self) -> AR28_W

Bit 28 - Add Request for Transmit Buffer 28

pub fn ar29(&mut self) -> AR29_W

Bit 29 - Add Request for Transmit Buffer 29

pub fn ar30(&mut self) -> AR30_W

Bit 30 - Add Request for Transmit Buffer 30

pub fn ar31(&mut self) -> AR31_W

Bit 31 - Add Request for Transmit Buffer 31

impl W<u32, Reg<u32, _MCAN_TXBCR>>

pub fn cr0(&mut self) -> CR0_W

Bit 0 - Cancellation Request for Transmit Buffer 0

pub fn cr1(&mut self) -> CR1_W

Bit 1 - Cancellation Request for Transmit Buffer 1

pub fn cr2(&mut self) -> CR2_W

Bit 2 - Cancellation Request for Transmit Buffer 2

pub fn cr3(&mut self) -> CR3_W

Bit 3 - Cancellation Request for Transmit Buffer 3

pub fn cr4(&mut self) -> CR4_W

Bit 4 - Cancellation Request for Transmit Buffer 4

pub fn cr5(&mut self) -> CR5_W

Bit 5 - Cancellation Request for Transmit Buffer 5

pub fn cr6(&mut self) -> CR6_W

Bit 6 - Cancellation Request for Transmit Buffer 6

pub fn cr7(&mut self) -> CR7_W

Bit 7 - Cancellation Request for Transmit Buffer 7

pub fn cr8(&mut self) -> CR8_W

Bit 8 - Cancellation Request for Transmit Buffer 8

pub fn cr9(&mut self) -> CR9_W

Bit 9 - Cancellation Request for Transmit Buffer 9

pub fn cr10(&mut self) -> CR10_W

Bit 10 - Cancellation Request for Transmit Buffer 10

pub fn cr11(&mut self) -> CR11_W

Bit 11 - Cancellation Request for Transmit Buffer 11

pub fn cr12(&mut self) -> CR12_W

Bit 12 - Cancellation Request for Transmit Buffer 12

pub fn cr13(&mut self) -> CR13_W

Bit 13 - Cancellation Request for Transmit Buffer 13

pub fn cr14(&mut self) -> CR14_W

Bit 14 - Cancellation Request for Transmit Buffer 14

pub fn cr15(&mut self) -> CR15_W

Bit 15 - Cancellation Request for Transmit Buffer 15

pub fn cr16(&mut self) -> CR16_W

Bit 16 - Cancellation Request for Transmit Buffer 16

pub fn cr17(&mut self) -> CR17_W

Bit 17 - Cancellation Request for Transmit Buffer 17

pub fn cr18(&mut self) -> CR18_W

Bit 18 - Cancellation Request for Transmit Buffer 18

pub fn cr19(&mut self) -> CR19_W

Bit 19 - Cancellation Request for Transmit Buffer 19

pub fn cr20(&mut self) -> CR20_W

Bit 20 - Cancellation Request for Transmit Buffer 20

pub fn cr21(&mut self) -> CR21_W

Bit 21 - Cancellation Request for Transmit Buffer 21

pub fn cr22(&mut self) -> CR22_W

Bit 22 - Cancellation Request for Transmit Buffer 22

pub fn cr23(&mut self) -> CR23_W

Bit 23 - Cancellation Request for Transmit Buffer 23

pub fn cr24(&mut self) -> CR24_W

Bit 24 - Cancellation Request for Transmit Buffer 24

pub fn cr25(&mut self) -> CR25_W

Bit 25 - Cancellation Request for Transmit Buffer 25

pub fn cr26(&mut self) -> CR26_W

Bit 26 - Cancellation Request for Transmit Buffer 26

pub fn cr27(&mut self) -> CR27_W

Bit 27 - Cancellation Request for Transmit Buffer 27

pub fn cr28(&mut self) -> CR28_W

Bit 28 - Cancellation Request for Transmit Buffer 28

pub fn cr29(&mut self) -> CR29_W

Bit 29 - Cancellation Request for Transmit Buffer 29

pub fn cr30(&mut self) -> CR30_W

Bit 30 - Cancellation Request for Transmit Buffer 30

pub fn cr31(&mut self) -> CR31_W

Bit 31 - Cancellation Request for Transmit Buffer 31

impl W<u32, Reg<u32, _MCAN_TXBTIE>>

pub fn tie0(&mut self) -> TIE0_W

Bit 0 - Transmission Interrupt Enable for Buffer 0

pub fn tie1(&mut self) -> TIE1_W

Bit 1 - Transmission Interrupt Enable for Buffer 1

pub fn tie2(&mut self) -> TIE2_W

Bit 2 - Transmission Interrupt Enable for Buffer 2

pub fn tie3(&mut self) -> TIE3_W

Bit 3 - Transmission Interrupt Enable for Buffer 3

pub fn tie4(&mut self) -> TIE4_W

Bit 4 - Transmission Interrupt Enable for Buffer 4

pub fn tie5(&mut self) -> TIE5_W

Bit 5 - Transmission Interrupt Enable for Buffer 5

pub fn tie6(&mut self) -> TIE6_W

Bit 6 - Transmission Interrupt Enable for Buffer 6

pub fn tie7(&mut self) -> TIE7_W

Bit 7 - Transmission Interrupt Enable for Buffer 7

pub fn tie8(&mut self) -> TIE8_W

Bit 8 - Transmission Interrupt Enable for Buffer 8

pub fn tie9(&mut self) -> TIE9_W

Bit 9 - Transmission Interrupt Enable for Buffer 9

pub fn tie10(&mut self) -> TIE10_W

Bit 10 - Transmission Interrupt Enable for Buffer 10

pub fn tie11(&mut self) -> TIE11_W

Bit 11 - Transmission Interrupt Enable for Buffer 11

pub fn tie12(&mut self) -> TIE12_W

Bit 12 - Transmission Interrupt Enable for Buffer 12

pub fn tie13(&mut self) -> TIE13_W

Bit 13 - Transmission Interrupt Enable for Buffer 13

pub fn tie14(&mut self) -> TIE14_W

Bit 14 - Transmission Interrupt Enable for Buffer 14

pub fn tie15(&mut self) -> TIE15_W

Bit 15 - Transmission Interrupt Enable for Buffer 15

pub fn tie16(&mut self) -> TIE16_W

Bit 16 - Transmission Interrupt Enable for Buffer 16

pub fn tie17(&mut self) -> TIE17_W

Bit 17 - Transmission Interrupt Enable for Buffer 17

pub fn tie18(&mut self) -> TIE18_W

Bit 18 - Transmission Interrupt Enable for Buffer 18

pub fn tie19(&mut self) -> TIE19_W

Bit 19 - Transmission Interrupt Enable for Buffer 19

pub fn tie20(&mut self) -> TIE20_W

Bit 20 - Transmission Interrupt Enable for Buffer 20

pub fn tie21(&mut self) -> TIE21_W

Bit 21 - Transmission Interrupt Enable for Buffer 21

pub fn tie22(&mut self) -> TIE22_W

Bit 22 - Transmission Interrupt Enable for Buffer 22

pub fn tie23(&mut self) -> TIE23_W

Bit 23 - Transmission Interrupt Enable for Buffer 23

pub fn tie24(&mut self) -> TIE24_W

Bit 24 - Transmission Interrupt Enable for Buffer 24

pub fn tie25(&mut self) -> TIE25_W

Bit 25 - Transmission Interrupt Enable for Buffer 25

pub fn tie26(&mut self) -> TIE26_W

Bit 26 - Transmission Interrupt Enable for Buffer 26

pub fn tie27(&mut self) -> TIE27_W

Bit 27 - Transmission Interrupt Enable for Buffer 27

pub fn tie28(&mut self) -> TIE28_W

Bit 28 - Transmission Interrupt Enable for Buffer 28

pub fn tie29(&mut self) -> TIE29_W

Bit 29 - Transmission Interrupt Enable for Buffer 29

pub fn tie30(&mut self) -> TIE30_W

Bit 30 - Transmission Interrupt Enable for Buffer 30

pub fn tie31(&mut self) -> TIE31_W

Bit 31 - Transmission Interrupt Enable for Buffer 31

impl W<u32, Reg<u32, _MCAN_TXBCIE>>

pub fn cfie0(&mut self) -> CFIE0_W

Bit 0 - Cancellation Finished Interrupt Enable for Transmit Buffer 0

pub fn cfie1(&mut self) -> CFIE1_W

Bit 1 - Cancellation Finished Interrupt Enable for Transmit Buffer 1

pub fn cfie2(&mut self) -> CFIE2_W

Bit 2 - Cancellation Finished Interrupt Enable for Transmit Buffer 2

pub fn cfie3(&mut self) -> CFIE3_W

Bit 3 - Cancellation Finished Interrupt Enable for Transmit Buffer 3

pub fn cfie4(&mut self) -> CFIE4_W

Bit 4 - Cancellation Finished Interrupt Enable for Transmit Buffer 4

pub fn cfie5(&mut self) -> CFIE5_W

Bit 5 - Cancellation Finished Interrupt Enable for Transmit Buffer 5

pub fn cfie6(&mut self) -> CFIE6_W

Bit 6 - Cancellation Finished Interrupt Enable for Transmit Buffer 6

pub fn cfie7(&mut self) -> CFIE7_W

Bit 7 - Cancellation Finished Interrupt Enable for Transmit Buffer 7

pub fn cfie8(&mut self) -> CFIE8_W

Bit 8 - Cancellation Finished Interrupt Enable for Transmit Buffer 8

pub fn cfie9(&mut self) -> CFIE9_W

Bit 9 - Cancellation Finished Interrupt Enable for Transmit Buffer 9

pub fn cfie10(&mut self) -> CFIE10_W

Bit 10 - Cancellation Finished Interrupt Enable for Transmit Buffer 10

pub fn cfie11(&mut self) -> CFIE11_W

Bit 11 - Cancellation Finished Interrupt Enable for Transmit Buffer 11

pub fn cfie12(&mut self) -> CFIE12_W

Bit 12 - Cancellation Finished Interrupt Enable for Transmit Buffer 12

pub fn cfie13(&mut self) -> CFIE13_W

Bit 13 - Cancellation Finished Interrupt Enable for Transmit Buffer 13

pub fn cfie14(&mut self) -> CFIE14_W

Bit 14 - Cancellation Finished Interrupt Enable for Transmit Buffer 14

pub fn cfie15(&mut self) -> CFIE15_W

Bit 15 - Cancellation Finished Interrupt Enable for Transmit Buffer 15

pub fn cfie16(&mut self) -> CFIE16_W

Bit 16 - Cancellation Finished Interrupt Enable for Transmit Buffer 16

pub fn cfie17(&mut self) -> CFIE17_W

Bit 17 - Cancellation Finished Interrupt Enable for Transmit Buffer 17

pub fn cfie18(&mut self) -> CFIE18_W

Bit 18 - Cancellation Finished Interrupt Enable for Transmit Buffer 18

pub fn cfie19(&mut self) -> CFIE19_W

Bit 19 - Cancellation Finished Interrupt Enable for Transmit Buffer 19

pub fn cfie20(&mut self) -> CFIE20_W

Bit 20 - Cancellation Finished Interrupt Enable for Transmit Buffer 20

pub fn cfie21(&mut self) -> CFIE21_W

Bit 21 - Cancellation Finished Interrupt Enable for Transmit Buffer 21

pub fn cfie22(&mut self) -> CFIE22_W

Bit 22 - Cancellation Finished Interrupt Enable for Transmit Buffer 22

pub fn cfie23(&mut self) -> CFIE23_W

Bit 23 - Cancellation Finished Interrupt Enable for Transmit Buffer 23

pub fn cfie24(&mut self) -> CFIE24_W

Bit 24 - Cancellation Finished Interrupt Enable for Transmit Buffer 24

pub fn cfie25(&mut self) -> CFIE25_W

Bit 25 - Cancellation Finished Interrupt Enable for Transmit Buffer 25

pub fn cfie26(&mut self) -> CFIE26_W

Bit 26 - Cancellation Finished Interrupt Enable for Transmit Buffer 26

pub fn cfie27(&mut self) -> CFIE27_W

Bit 27 - Cancellation Finished Interrupt Enable for Transmit Buffer 27

pub fn cfie28(&mut self) -> CFIE28_W

Bit 28 - Cancellation Finished Interrupt Enable for Transmit Buffer 28

pub fn cfie29(&mut self) -> CFIE29_W

Bit 29 - Cancellation Finished Interrupt Enable for Transmit Buffer 29

pub fn cfie30(&mut self) -> CFIE30_W

Bit 30 - Cancellation Finished Interrupt Enable for Transmit Buffer 30

pub fn cfie31(&mut self) -> CFIE31_W

Bit 31 - Cancellation Finished Interrupt Enable for Transmit Buffer 31

impl W<u32, Reg<u32, _MCAN_TXEFC>>

pub fn efsa(&mut self) -> EFSA_W

Bits 2:15 - Event FIFO Start Address

pub fn efs(&mut self) -> EFS_W

Bits 16:21 - Event FIFO Size

pub fn efwm(&mut self) -> EFWM_W

Bits 24:29 - Event FIFO Watermark

impl W<u32, Reg<u32, _MCAN_TXEFA>>

pub fn efai(&mut self) -> EFAI_W

Bits 0:4 - Event FIFO Acknowledge Index

impl W<u32, Reg<u32, _PIO_PER>>

pub fn p0(&mut self) -> P0_W

Bit 0 - PIO Enable

pub fn p1(&mut self) -> P1_W

Bit 1 - PIO Enable

pub fn p2(&mut self) -> P2_W

Bit 2 - PIO Enable

pub fn p3(&mut self) -> P3_W

Bit 3 - PIO Enable

pub fn p4(&mut self) -> P4_W

Bit 4 - PIO Enable

pub fn p5(&mut self) -> P5_W

Bit 5 - PIO Enable

pub fn p6(&mut self) -> P6_W

Bit 6 - PIO Enable

pub fn p7(&mut self) -> P7_W

Bit 7 - PIO Enable

pub fn p8(&mut self) -> P8_W

Bit 8 - PIO Enable

pub fn p9(&mut self) -> P9_W

Bit 9 - PIO Enable

pub fn p10(&mut self) -> P10_W

Bit 10 - PIO Enable

pub fn p11(&mut self) -> P11_W

Bit 11 - PIO Enable

pub fn p12(&mut self) -> P12_W

Bit 12 - PIO Enable

pub fn p13(&mut self) -> P13_W

Bit 13 - PIO Enable

pub fn p14(&mut self) -> P14_W

Bit 14 - PIO Enable

pub fn p15(&mut self) -> P15_W

Bit 15 - PIO Enable

pub fn p16(&mut self) -> P16_W

Bit 16 - PIO Enable

pub fn p17(&mut self) -> P17_W

Bit 17 - PIO Enable

pub fn p18(&mut self) -> P18_W

Bit 18 - PIO Enable

pub fn p19(&mut self) -> P19_W

Bit 19 - PIO Enable

pub fn p20(&mut self) -> P20_W

Bit 20 - PIO Enable

pub fn p21(&mut self) -> P21_W

Bit 21 - PIO Enable

pub fn p22(&mut self) -> P22_W

Bit 22 - PIO Enable

pub fn p23(&mut self) -> P23_W

Bit 23 - PIO Enable

pub fn p24(&mut self) -> P24_W

Bit 24 - PIO Enable

pub fn p25(&mut self) -> P25_W

Bit 25 - PIO Enable

pub fn p26(&mut self) -> P26_W

Bit 26 - PIO Enable

pub fn p27(&mut self) -> P27_W

Bit 27 - PIO Enable

pub fn p28(&mut self) -> P28_W

Bit 28 - PIO Enable

pub fn p29(&mut self) -> P29_W

Bit 29 - PIO Enable

pub fn p30(&mut self) -> P30_W

Bit 30 - PIO Enable

pub fn p31(&mut self) -> P31_W

Bit 31 - PIO Enable

impl W<u32, Reg<u32, _PIO_PDR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - PIO Disable

pub fn p1(&mut self) -> P1_W

Bit 1 - PIO Disable

pub fn p2(&mut self) -> P2_W

Bit 2 - PIO Disable

pub fn p3(&mut self) -> P3_W

Bit 3 - PIO Disable

pub fn p4(&mut self) -> P4_W

Bit 4 - PIO Disable

pub fn p5(&mut self) -> P5_W

Bit 5 - PIO Disable

pub fn p6(&mut self) -> P6_W

Bit 6 - PIO Disable

pub fn p7(&mut self) -> P7_W

Bit 7 - PIO Disable

pub fn p8(&mut self) -> P8_W

Bit 8 - PIO Disable

pub fn p9(&mut self) -> P9_W

Bit 9 - PIO Disable

pub fn p10(&mut self) -> P10_W

Bit 10 - PIO Disable

pub fn p11(&mut self) -> P11_W

Bit 11 - PIO Disable

pub fn p12(&mut self) -> P12_W

Bit 12 - PIO Disable

pub fn p13(&mut self) -> P13_W

Bit 13 - PIO Disable

pub fn p14(&mut self) -> P14_W

Bit 14 - PIO Disable

pub fn p15(&mut self) -> P15_W

Bit 15 - PIO Disable

pub fn p16(&mut self) -> P16_W

Bit 16 - PIO Disable

pub fn p17(&mut self) -> P17_W

Bit 17 - PIO Disable

pub fn p18(&mut self) -> P18_W

Bit 18 - PIO Disable

pub fn p19(&mut self) -> P19_W

Bit 19 - PIO Disable

pub fn p20(&mut self) -> P20_W

Bit 20 - PIO Disable

pub fn p21(&mut self) -> P21_W

Bit 21 - PIO Disable

pub fn p22(&mut self) -> P22_W

Bit 22 - PIO Disable

pub fn p23(&mut self) -> P23_W

Bit 23 - PIO Disable

pub fn p24(&mut self) -> P24_W

Bit 24 - PIO Disable

pub fn p25(&mut self) -> P25_W

Bit 25 - PIO Disable

pub fn p26(&mut self) -> P26_W

Bit 26 - PIO Disable

pub fn p27(&mut self) -> P27_W

Bit 27 - PIO Disable

pub fn p28(&mut self) -> P28_W

Bit 28 - PIO Disable

pub fn p29(&mut self) -> P29_W

Bit 29 - PIO Disable

pub fn p30(&mut self) -> P30_W

Bit 30 - PIO Disable

pub fn p31(&mut self) -> P31_W

Bit 31 - PIO Disable

impl W<u32, Reg<u32, _PIO_OER>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Output Enable

pub fn p1(&mut self) -> P1_W

Bit 1 - Output Enable

pub fn p2(&mut self) -> P2_W

Bit 2 - Output Enable

pub fn p3(&mut self) -> P3_W

Bit 3 - Output Enable

pub fn p4(&mut self) -> P4_W

Bit 4 - Output Enable

pub fn p5(&mut self) -> P5_W

Bit 5 - Output Enable

pub fn p6(&mut self) -> P6_W

Bit 6 - Output Enable

pub fn p7(&mut self) -> P7_W

Bit 7 - Output Enable

pub fn p8(&mut self) -> P8_W

Bit 8 - Output Enable

pub fn p9(&mut self) -> P9_W

Bit 9 - Output Enable

pub fn p10(&mut self) -> P10_W

Bit 10 - Output Enable

pub fn p11(&mut self) -> P11_W

Bit 11 - Output Enable

pub fn p12(&mut self) -> P12_W

Bit 12 - Output Enable

pub fn p13(&mut self) -> P13_W

Bit 13 - Output Enable

pub fn p14(&mut self) -> P14_W

Bit 14 - Output Enable

pub fn p15(&mut self) -> P15_W

Bit 15 - Output Enable

pub fn p16(&mut self) -> P16_W

Bit 16 - Output Enable

pub fn p17(&mut self) -> P17_W

Bit 17 - Output Enable

pub fn p18(&mut self) -> P18_W

Bit 18 - Output Enable

pub fn p19(&mut self) -> P19_W

Bit 19 - Output Enable

pub fn p20(&mut self) -> P20_W

Bit 20 - Output Enable

pub fn p21(&mut self) -> P21_W

Bit 21 - Output Enable

pub fn p22(&mut self) -> P22_W

Bit 22 - Output Enable

pub fn p23(&mut self) -> P23_W

Bit 23 - Output Enable

pub fn p24(&mut self) -> P24_W

Bit 24 - Output Enable

pub fn p25(&mut self) -> P25_W

Bit 25 - Output Enable

pub fn p26(&mut self) -> P26_W

Bit 26 - Output Enable

pub fn p27(&mut self) -> P27_W

Bit 27 - Output Enable

pub fn p28(&mut self) -> P28_W

Bit 28 - Output Enable

pub fn p29(&mut self) -> P29_W

Bit 29 - Output Enable

pub fn p30(&mut self) -> P30_W

Bit 30 - Output Enable

pub fn p31(&mut self) -> P31_W

Bit 31 - Output Enable

impl W<u32, Reg<u32, _PIO_ODR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Output Disable

pub fn p1(&mut self) -> P1_W

Bit 1 - Output Disable

pub fn p2(&mut self) -> P2_W

Bit 2 - Output Disable

pub fn p3(&mut self) -> P3_W

Bit 3 - Output Disable

pub fn p4(&mut self) -> P4_W

Bit 4 - Output Disable

pub fn p5(&mut self) -> P5_W

Bit 5 - Output Disable

pub fn p6(&mut self) -> P6_W

Bit 6 - Output Disable

pub fn p7(&mut self) -> P7_W

Bit 7 - Output Disable

pub fn p8(&mut self) -> P8_W

Bit 8 - Output Disable

pub fn p9(&mut self) -> P9_W

Bit 9 - Output Disable

pub fn p10(&mut self) -> P10_W

Bit 10 - Output Disable

pub fn p11(&mut self) -> P11_W

Bit 11 - Output Disable

pub fn p12(&mut self) -> P12_W

Bit 12 - Output Disable

pub fn p13(&mut self) -> P13_W

Bit 13 - Output Disable

pub fn p14(&mut self) -> P14_W

Bit 14 - Output Disable

pub fn p15(&mut self) -> P15_W

Bit 15 - Output Disable

pub fn p16(&mut self) -> P16_W

Bit 16 - Output Disable

pub fn p17(&mut self) -> P17_W

Bit 17 - Output Disable

pub fn p18(&mut self) -> P18_W

Bit 18 - Output Disable

pub fn p19(&mut self) -> P19_W

Bit 19 - Output Disable

pub fn p20(&mut self) -> P20_W

Bit 20 - Output Disable

pub fn p21(&mut self) -> P21_W

Bit 21 - Output Disable

pub fn p22(&mut self) -> P22_W

Bit 22 - Output Disable

pub fn p23(&mut self) -> P23_W

Bit 23 - Output Disable

pub fn p24(&mut self) -> P24_W

Bit 24 - Output Disable

pub fn p25(&mut self) -> P25_W

Bit 25 - Output Disable

pub fn p26(&mut self) -> P26_W

Bit 26 - Output Disable

pub fn p27(&mut self) -> P27_W

Bit 27 - Output Disable

pub fn p28(&mut self) -> P28_W

Bit 28 - Output Disable

pub fn p29(&mut self) -> P29_W

Bit 29 - Output Disable

pub fn p30(&mut self) -> P30_W

Bit 30 - Output Disable

pub fn p31(&mut self) -> P31_W

Bit 31 - Output Disable

impl W<u32, Reg<u32, _PIO_IFER>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Input Filter Enable

pub fn p1(&mut self) -> P1_W

Bit 1 - Input Filter Enable

pub fn p2(&mut self) -> P2_W

Bit 2 - Input Filter Enable

pub fn p3(&mut self) -> P3_W

Bit 3 - Input Filter Enable

pub fn p4(&mut self) -> P4_W

Bit 4 - Input Filter Enable

pub fn p5(&mut self) -> P5_W

Bit 5 - Input Filter Enable

pub fn p6(&mut self) -> P6_W

Bit 6 - Input Filter Enable

pub fn p7(&mut self) -> P7_W

Bit 7 - Input Filter Enable

pub fn p8(&mut self) -> P8_W

Bit 8 - Input Filter Enable

pub fn p9(&mut self) -> P9_W

Bit 9 - Input Filter Enable

pub fn p10(&mut self) -> P10_W

Bit 10 - Input Filter Enable

pub fn p11(&mut self) -> P11_W

Bit 11 - Input Filter Enable

pub fn p12(&mut self) -> P12_W

Bit 12 - Input Filter Enable

pub fn p13(&mut self) -> P13_W

Bit 13 - Input Filter Enable

pub fn p14(&mut self) -> P14_W

Bit 14 - Input Filter Enable

pub fn p15(&mut self) -> P15_W

Bit 15 - Input Filter Enable

pub fn p16(&mut self) -> P16_W

Bit 16 - Input Filter Enable

pub fn p17(&mut self) -> P17_W

Bit 17 - Input Filter Enable

pub fn p18(&mut self) -> P18_W

Bit 18 - Input Filter Enable

pub fn p19(&mut self) -> P19_W

Bit 19 - Input Filter Enable

pub fn p20(&mut self) -> P20_W

Bit 20 - Input Filter Enable

pub fn p21(&mut self) -> P21_W

Bit 21 - Input Filter Enable

pub fn p22(&mut self) -> P22_W

Bit 22 - Input Filter Enable

pub fn p23(&mut self) -> P23_W

Bit 23 - Input Filter Enable

pub fn p24(&mut self) -> P24_W

Bit 24 - Input Filter Enable

pub fn p25(&mut self) -> P25_W

Bit 25 - Input Filter Enable

pub fn p26(&mut self) -> P26_W

Bit 26 - Input Filter Enable

pub fn p27(&mut self) -> P27_W

Bit 27 - Input Filter Enable

pub fn p28(&mut self) -> P28_W

Bit 28 - Input Filter Enable

pub fn p29(&mut self) -> P29_W

Bit 29 - Input Filter Enable

pub fn p30(&mut self) -> P30_W

Bit 30 - Input Filter Enable

pub fn p31(&mut self) -> P31_W

Bit 31 - Input Filter Enable

impl W<u32, Reg<u32, _PIO_IFDR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Input Filter Disable

pub fn p1(&mut self) -> P1_W

Bit 1 - Input Filter Disable

pub fn p2(&mut self) -> P2_W

Bit 2 - Input Filter Disable

pub fn p3(&mut self) -> P3_W

Bit 3 - Input Filter Disable

pub fn p4(&mut self) -> P4_W

Bit 4 - Input Filter Disable

pub fn p5(&mut self) -> P5_W

Bit 5 - Input Filter Disable

pub fn p6(&mut self) -> P6_W

Bit 6 - Input Filter Disable

pub fn p7(&mut self) -> P7_W

Bit 7 - Input Filter Disable

pub fn p8(&mut self) -> P8_W

Bit 8 - Input Filter Disable

pub fn p9(&mut self) -> P9_W

Bit 9 - Input Filter Disable

pub fn p10(&mut self) -> P10_W

Bit 10 - Input Filter Disable

pub fn p11(&mut self) -> P11_W

Bit 11 - Input Filter Disable

pub fn p12(&mut self) -> P12_W

Bit 12 - Input Filter Disable

pub fn p13(&mut self) -> P13_W

Bit 13 - Input Filter Disable

pub fn p14(&mut self) -> P14_W

Bit 14 - Input Filter Disable

pub fn p15(&mut self) -> P15_W

Bit 15 - Input Filter Disable

pub fn p16(&mut self) -> P16_W

Bit 16 - Input Filter Disable

pub fn p17(&mut self) -> P17_W

Bit 17 - Input Filter Disable

pub fn p18(&mut self) -> P18_W

Bit 18 - Input Filter Disable

pub fn p19(&mut self) -> P19_W

Bit 19 - Input Filter Disable

pub fn p20(&mut self) -> P20_W

Bit 20 - Input Filter Disable

pub fn p21(&mut self) -> P21_W

Bit 21 - Input Filter Disable

pub fn p22(&mut self) -> P22_W

Bit 22 - Input Filter Disable

pub fn p23(&mut self) -> P23_W

Bit 23 - Input Filter Disable

pub fn p24(&mut self) -> P24_W

Bit 24 - Input Filter Disable

pub fn p25(&mut self) -> P25_W

Bit 25 - Input Filter Disable

pub fn p26(&mut self) -> P26_W

Bit 26 - Input Filter Disable

pub fn p27(&mut self) -> P27_W

Bit 27 - Input Filter Disable

pub fn p28(&mut self) -> P28_W

Bit 28 - Input Filter Disable

pub fn p29(&mut self) -> P29_W

Bit 29 - Input Filter Disable

pub fn p30(&mut self) -> P30_W

Bit 30 - Input Filter Disable

pub fn p31(&mut self) -> P31_W

Bit 31 - Input Filter Disable

impl W<u32, Reg<u32, _PIO_SODR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Set Output Data

pub fn p1(&mut self) -> P1_W

Bit 1 - Set Output Data

pub fn p2(&mut self) -> P2_W

Bit 2 - Set Output Data

pub fn p3(&mut self) -> P3_W

Bit 3 - Set Output Data

pub fn p4(&mut self) -> P4_W

Bit 4 - Set Output Data

pub fn p5(&mut self) -> P5_W

Bit 5 - Set Output Data

pub fn p6(&mut self) -> P6_W

Bit 6 - Set Output Data

pub fn p7(&mut self) -> P7_W

Bit 7 - Set Output Data

pub fn p8(&mut self) -> P8_W

Bit 8 - Set Output Data

pub fn p9(&mut self) -> P9_W

Bit 9 - Set Output Data

pub fn p10(&mut self) -> P10_W

Bit 10 - Set Output Data

pub fn p11(&mut self) -> P11_W

Bit 11 - Set Output Data

pub fn p12(&mut self) -> P12_W

Bit 12 - Set Output Data

pub fn p13(&mut self) -> P13_W

Bit 13 - Set Output Data

pub fn p14(&mut self) -> P14_W

Bit 14 - Set Output Data

pub fn p15(&mut self) -> P15_W

Bit 15 - Set Output Data

pub fn p16(&mut self) -> P16_W

Bit 16 - Set Output Data

pub fn p17(&mut self) -> P17_W

Bit 17 - Set Output Data

pub fn p18(&mut self) -> P18_W

Bit 18 - Set Output Data

pub fn p19(&mut self) -> P19_W

Bit 19 - Set Output Data

pub fn p20(&mut self) -> P20_W

Bit 20 - Set Output Data

pub fn p21(&mut self) -> P21_W

Bit 21 - Set Output Data

pub fn p22(&mut self) -> P22_W

Bit 22 - Set Output Data

pub fn p23(&mut self) -> P23_W

Bit 23 - Set Output Data

pub fn p24(&mut self) -> P24_W

Bit 24 - Set Output Data

pub fn p25(&mut self) -> P25_W

Bit 25 - Set Output Data

pub fn p26(&mut self) -> P26_W

Bit 26 - Set Output Data

pub fn p27(&mut self) -> P27_W

Bit 27 - Set Output Data

pub fn p28(&mut self) -> P28_W

Bit 28 - Set Output Data

pub fn p29(&mut self) -> P29_W

Bit 29 - Set Output Data

pub fn p30(&mut self) -> P30_W

Bit 30 - Set Output Data

pub fn p31(&mut self) -> P31_W

Bit 31 - Set Output Data

impl W<u32, Reg<u32, _PIO_CODR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Clear Output Data

pub fn p1(&mut self) -> P1_W

Bit 1 - Clear Output Data

pub fn p2(&mut self) -> P2_W

Bit 2 - Clear Output Data

pub fn p3(&mut self) -> P3_W

Bit 3 - Clear Output Data

pub fn p4(&mut self) -> P4_W

Bit 4 - Clear Output Data

pub fn p5(&mut self) -> P5_W

Bit 5 - Clear Output Data

pub fn p6(&mut self) -> P6_W

Bit 6 - Clear Output Data

pub fn p7(&mut self) -> P7_W

Bit 7 - Clear Output Data

pub fn p8(&mut self) -> P8_W

Bit 8 - Clear Output Data

pub fn p9(&mut self) -> P9_W

Bit 9 - Clear Output Data

pub fn p10(&mut self) -> P10_W

Bit 10 - Clear Output Data

pub fn p11(&mut self) -> P11_W

Bit 11 - Clear Output Data

pub fn p12(&mut self) -> P12_W

Bit 12 - Clear Output Data

pub fn p13(&mut self) -> P13_W

Bit 13 - Clear Output Data

pub fn p14(&mut self) -> P14_W

Bit 14 - Clear Output Data

pub fn p15(&mut self) -> P15_W

Bit 15 - Clear Output Data

pub fn p16(&mut self) -> P16_W

Bit 16 - Clear Output Data

pub fn p17(&mut self) -> P17_W

Bit 17 - Clear Output Data

pub fn p18(&mut self) -> P18_W

Bit 18 - Clear Output Data

pub fn p19(&mut self) -> P19_W

Bit 19 - Clear Output Data

pub fn p20(&mut self) -> P20_W

Bit 20 - Clear Output Data

pub fn p21(&mut self) -> P21_W

Bit 21 - Clear Output Data

pub fn p22(&mut self) -> P22_W

Bit 22 - Clear Output Data

pub fn p23(&mut self) -> P23_W

Bit 23 - Clear Output Data

pub fn p24(&mut self) -> P24_W

Bit 24 - Clear Output Data

pub fn p25(&mut self) -> P25_W

Bit 25 - Clear Output Data

pub fn p26(&mut self) -> P26_W

Bit 26 - Clear Output Data

pub fn p27(&mut self) -> P27_W

Bit 27 - Clear Output Data

pub fn p28(&mut self) -> P28_W

Bit 28 - Clear Output Data

pub fn p29(&mut self) -> P29_W

Bit 29 - Clear Output Data

pub fn p30(&mut self) -> P30_W

Bit 30 - Clear Output Data

pub fn p31(&mut self) -> P31_W

Bit 31 - Clear Output Data

impl W<u32, Reg<u32, _PIO_ODSR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Output Data Status

pub fn p1(&mut self) -> P1_W

Bit 1 - Output Data Status

pub fn p2(&mut self) -> P2_W

Bit 2 - Output Data Status

pub fn p3(&mut self) -> P3_W

Bit 3 - Output Data Status

pub fn p4(&mut self) -> P4_W

Bit 4 - Output Data Status

pub fn p5(&mut self) -> P5_W

Bit 5 - Output Data Status

pub fn p6(&mut self) -> P6_W

Bit 6 - Output Data Status

pub fn p7(&mut self) -> P7_W

Bit 7 - Output Data Status

pub fn p8(&mut self) -> P8_W

Bit 8 - Output Data Status

pub fn p9(&mut self) -> P9_W

Bit 9 - Output Data Status

pub fn p10(&mut self) -> P10_W

Bit 10 - Output Data Status

pub fn p11(&mut self) -> P11_W

Bit 11 - Output Data Status

pub fn p12(&mut self) -> P12_W

Bit 12 - Output Data Status

pub fn p13(&mut self) -> P13_W

Bit 13 - Output Data Status

pub fn p14(&mut self) -> P14_W

Bit 14 - Output Data Status

pub fn p15(&mut self) -> P15_W

Bit 15 - Output Data Status

pub fn p16(&mut self) -> P16_W

Bit 16 - Output Data Status

pub fn p17(&mut self) -> P17_W

Bit 17 - Output Data Status

pub fn p18(&mut self) -> P18_W

Bit 18 - Output Data Status

pub fn p19(&mut self) -> P19_W

Bit 19 - Output Data Status

pub fn p20(&mut self) -> P20_W

Bit 20 - Output Data Status

pub fn p21(&mut self) -> P21_W

Bit 21 - Output Data Status

pub fn p22(&mut self) -> P22_W

Bit 22 - Output Data Status

pub fn p23(&mut self) -> P23_W

Bit 23 - Output Data Status

pub fn p24(&mut self) -> P24_W

Bit 24 - Output Data Status

pub fn p25(&mut self) -> P25_W

Bit 25 - Output Data Status

pub fn p26(&mut self) -> P26_W

Bit 26 - Output Data Status

pub fn p27(&mut self) -> P27_W

Bit 27 - Output Data Status

pub fn p28(&mut self) -> P28_W

Bit 28 - Output Data Status

pub fn p29(&mut self) -> P29_W

Bit 29 - Output Data Status

pub fn p30(&mut self) -> P30_W

Bit 30 - Output Data Status

pub fn p31(&mut self) -> P31_W

Bit 31 - Output Data Status

impl W<u32, Reg<u32, _PIO_IER>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Input Change Interrupt Enable

pub fn p1(&mut self) -> P1_W

Bit 1 - Input Change Interrupt Enable

pub fn p2(&mut self) -> P2_W

Bit 2 - Input Change Interrupt Enable

pub fn p3(&mut self) -> P3_W

Bit 3 - Input Change Interrupt Enable

pub fn p4(&mut self) -> P4_W

Bit 4 - Input Change Interrupt Enable

pub fn p5(&mut self) -> P5_W

Bit 5 - Input Change Interrupt Enable

pub fn p6(&mut self) -> P6_W

Bit 6 - Input Change Interrupt Enable

pub fn p7(&mut self) -> P7_W

Bit 7 - Input Change Interrupt Enable

pub fn p8(&mut self) -> P8_W

Bit 8 - Input Change Interrupt Enable

pub fn p9(&mut self) -> P9_W

Bit 9 - Input Change Interrupt Enable

pub fn p10(&mut self) -> P10_W

Bit 10 - Input Change Interrupt Enable

pub fn p11(&mut self) -> P11_W

Bit 11 - Input Change Interrupt Enable

pub fn p12(&mut self) -> P12_W

Bit 12 - Input Change Interrupt Enable

pub fn p13(&mut self) -> P13_W

Bit 13 - Input Change Interrupt Enable

pub fn p14(&mut self) -> P14_W

Bit 14 - Input Change Interrupt Enable

pub fn p15(&mut self) -> P15_W

Bit 15 - Input Change Interrupt Enable

pub fn p16(&mut self) -> P16_W

Bit 16 - Input Change Interrupt Enable

pub fn p17(&mut self) -> P17_W

Bit 17 - Input Change Interrupt Enable

pub fn p18(&mut self) -> P18_W

Bit 18 - Input Change Interrupt Enable

pub fn p19(&mut self) -> P19_W

Bit 19 - Input Change Interrupt Enable

pub fn p20(&mut self) -> P20_W

Bit 20 - Input Change Interrupt Enable

pub fn p21(&mut self) -> P21_W

Bit 21 - Input Change Interrupt Enable

pub fn p22(&mut self) -> P22_W

Bit 22 - Input Change Interrupt Enable

pub fn p23(&mut self) -> P23_W

Bit 23 - Input Change Interrupt Enable

pub fn p24(&mut self) -> P24_W

Bit 24 - Input Change Interrupt Enable

pub fn p25(&mut self) -> P25_W

Bit 25 - Input Change Interrupt Enable

pub fn p26(&mut self) -> P26_W

Bit 26 - Input Change Interrupt Enable

pub fn p27(&mut self) -> P27_W

Bit 27 - Input Change Interrupt Enable

pub fn p28(&mut self) -> P28_W

Bit 28 - Input Change Interrupt Enable

pub fn p29(&mut self) -> P29_W

Bit 29 - Input Change Interrupt Enable

pub fn p30(&mut self) -> P30_W

Bit 30 - Input Change Interrupt Enable

pub fn p31(&mut self) -> P31_W

Bit 31 - Input Change Interrupt Enable

impl W<u32, Reg<u32, _PIO_IDR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Input Change Interrupt Disable

pub fn p1(&mut self) -> P1_W

Bit 1 - Input Change Interrupt Disable

pub fn p2(&mut self) -> P2_W

Bit 2 - Input Change Interrupt Disable

pub fn p3(&mut self) -> P3_W

Bit 3 - Input Change Interrupt Disable

pub fn p4(&mut self) -> P4_W

Bit 4 - Input Change Interrupt Disable

pub fn p5(&mut self) -> P5_W

Bit 5 - Input Change Interrupt Disable

pub fn p6(&mut self) -> P6_W

Bit 6 - Input Change Interrupt Disable

pub fn p7(&mut self) -> P7_W

Bit 7 - Input Change Interrupt Disable

pub fn p8(&mut self) -> P8_W

Bit 8 - Input Change Interrupt Disable

pub fn p9(&mut self) -> P9_W

Bit 9 - Input Change Interrupt Disable

pub fn p10(&mut self) -> P10_W

Bit 10 - Input Change Interrupt Disable

pub fn p11(&mut self) -> P11_W

Bit 11 - Input Change Interrupt Disable

pub fn p12(&mut self) -> P12_W

Bit 12 - Input Change Interrupt Disable

pub fn p13(&mut self) -> P13_W

Bit 13 - Input Change Interrupt Disable

pub fn p14(&mut self) -> P14_W

Bit 14 - Input Change Interrupt Disable

pub fn p15(&mut self) -> P15_W

Bit 15 - Input Change Interrupt Disable

pub fn p16(&mut self) -> P16_W

Bit 16 - Input Change Interrupt Disable

pub fn p17(&mut self) -> P17_W

Bit 17 - Input Change Interrupt Disable

pub fn p18(&mut self) -> P18_W

Bit 18 - Input Change Interrupt Disable

pub fn p19(&mut self) -> P19_W

Bit 19 - Input Change Interrupt Disable

pub fn p20(&mut self) -> P20_W

Bit 20 - Input Change Interrupt Disable

pub fn p21(&mut self) -> P21_W

Bit 21 - Input Change Interrupt Disable

pub fn p22(&mut self) -> P22_W

Bit 22 - Input Change Interrupt Disable

pub fn p23(&mut self) -> P23_W

Bit 23 - Input Change Interrupt Disable

pub fn p24(&mut self) -> P24_W

Bit 24 - Input Change Interrupt Disable

pub fn p25(&mut self) -> P25_W

Bit 25 - Input Change Interrupt Disable

pub fn p26(&mut self) -> P26_W

Bit 26 - Input Change Interrupt Disable

pub fn p27(&mut self) -> P27_W

Bit 27 - Input Change Interrupt Disable

pub fn p28(&mut self) -> P28_W

Bit 28 - Input Change Interrupt Disable

pub fn p29(&mut self) -> P29_W

Bit 29 - Input Change Interrupt Disable

pub fn p30(&mut self) -> P30_W

Bit 30 - Input Change Interrupt Disable

pub fn p31(&mut self) -> P31_W

Bit 31 - Input Change Interrupt Disable

impl W<u32, Reg<u32, _PIO_MDER>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Multi-drive Enable

pub fn p1(&mut self) -> P1_W

Bit 1 - Multi-drive Enable

pub fn p2(&mut self) -> P2_W

Bit 2 - Multi-drive Enable

pub fn p3(&mut self) -> P3_W

Bit 3 - Multi-drive Enable

pub fn p4(&mut self) -> P4_W

Bit 4 - Multi-drive Enable

pub fn p5(&mut self) -> P5_W

Bit 5 - Multi-drive Enable

pub fn p6(&mut self) -> P6_W

Bit 6 - Multi-drive Enable

pub fn p7(&mut self) -> P7_W

Bit 7 - Multi-drive Enable

pub fn p8(&mut self) -> P8_W

Bit 8 - Multi-drive Enable

pub fn p9(&mut self) -> P9_W

Bit 9 - Multi-drive Enable

pub fn p10(&mut self) -> P10_W

Bit 10 - Multi-drive Enable

pub fn p11(&mut self) -> P11_W

Bit 11 - Multi-drive Enable

pub fn p12(&mut self) -> P12_W

Bit 12 - Multi-drive Enable

pub fn p13(&mut self) -> P13_W

Bit 13 - Multi-drive Enable

pub fn p14(&mut self) -> P14_W

Bit 14 - Multi-drive Enable

pub fn p15(&mut self) -> P15_W

Bit 15 - Multi-drive Enable

pub fn p16(&mut self) -> P16_W

Bit 16 - Multi-drive Enable

pub fn p17(&mut self) -> P17_W

Bit 17 - Multi-drive Enable

pub fn p18(&mut self) -> P18_W

Bit 18 - Multi-drive Enable

pub fn p19(&mut self) -> P19_W

Bit 19 - Multi-drive Enable

pub fn p20(&mut self) -> P20_W

Bit 20 - Multi-drive Enable

pub fn p21(&mut self) -> P21_W

Bit 21 - Multi-drive Enable

pub fn p22(&mut self) -> P22_W

Bit 22 - Multi-drive Enable

pub fn p23(&mut self) -> P23_W

Bit 23 - Multi-drive Enable

pub fn p24(&mut self) -> P24_W

Bit 24 - Multi-drive Enable

pub fn p25(&mut self) -> P25_W

Bit 25 - Multi-drive Enable

pub fn p26(&mut self) -> P26_W

Bit 26 - Multi-drive Enable

pub fn p27(&mut self) -> P27_W

Bit 27 - Multi-drive Enable

pub fn p28(&mut self) -> P28_W

Bit 28 - Multi-drive Enable

pub fn p29(&mut self) -> P29_W

Bit 29 - Multi-drive Enable

pub fn p30(&mut self) -> P30_W

Bit 30 - Multi-drive Enable

pub fn p31(&mut self) -> P31_W

Bit 31 - Multi-drive Enable

impl W<u32, Reg<u32, _PIO_MDDR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Multi-drive Disable

pub fn p1(&mut self) -> P1_W

Bit 1 - Multi-drive Disable

pub fn p2(&mut self) -> P2_W

Bit 2 - Multi-drive Disable

pub fn p3(&mut self) -> P3_W

Bit 3 - Multi-drive Disable

pub fn p4(&mut self) -> P4_W

Bit 4 - Multi-drive Disable

pub fn p5(&mut self) -> P5_W

Bit 5 - Multi-drive Disable

pub fn p6(&mut self) -> P6_W

Bit 6 - Multi-drive Disable

pub fn p7(&mut self) -> P7_W

Bit 7 - Multi-drive Disable

pub fn p8(&mut self) -> P8_W

Bit 8 - Multi-drive Disable

pub fn p9(&mut self) -> P9_W

Bit 9 - Multi-drive Disable

pub fn p10(&mut self) -> P10_W

Bit 10 - Multi-drive Disable

pub fn p11(&mut self) -> P11_W

Bit 11 - Multi-drive Disable

pub fn p12(&mut self) -> P12_W

Bit 12 - Multi-drive Disable

pub fn p13(&mut self) -> P13_W

Bit 13 - Multi-drive Disable

pub fn p14(&mut self) -> P14_W

Bit 14 - Multi-drive Disable

pub fn p15(&mut self) -> P15_W

Bit 15 - Multi-drive Disable

pub fn p16(&mut self) -> P16_W

Bit 16 - Multi-drive Disable

pub fn p17(&mut self) -> P17_W

Bit 17 - Multi-drive Disable

pub fn p18(&mut self) -> P18_W

Bit 18 - Multi-drive Disable

pub fn p19(&mut self) -> P19_W

Bit 19 - Multi-drive Disable

pub fn p20(&mut self) -> P20_W

Bit 20 - Multi-drive Disable

pub fn p21(&mut self) -> P21_W

Bit 21 - Multi-drive Disable

pub fn p22(&mut self) -> P22_W

Bit 22 - Multi-drive Disable

pub fn p23(&mut self) -> P23_W

Bit 23 - Multi-drive Disable

pub fn p24(&mut self) -> P24_W

Bit 24 - Multi-drive Disable

pub fn p25(&mut self) -> P25_W

Bit 25 - Multi-drive Disable

pub fn p26(&mut self) -> P26_W

Bit 26 - Multi-drive Disable

pub fn p27(&mut self) -> P27_W

Bit 27 - Multi-drive Disable

pub fn p28(&mut self) -> P28_W

Bit 28 - Multi-drive Disable

pub fn p29(&mut self) -> P29_W

Bit 29 - Multi-drive Disable

pub fn p30(&mut self) -> P30_W

Bit 30 - Multi-drive Disable

pub fn p31(&mut self) -> P31_W

Bit 31 - Multi-drive Disable

impl W<u32, Reg<u32, _PIO_PUDR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Pull-Up Disable

pub fn p1(&mut self) -> P1_W

Bit 1 - Pull-Up Disable

pub fn p2(&mut self) -> P2_W

Bit 2 - Pull-Up Disable

pub fn p3(&mut self) -> P3_W

Bit 3 - Pull-Up Disable

pub fn p4(&mut self) -> P4_W

Bit 4 - Pull-Up Disable

pub fn p5(&mut self) -> P5_W

Bit 5 - Pull-Up Disable

pub fn p6(&mut self) -> P6_W

Bit 6 - Pull-Up Disable

pub fn p7(&mut self) -> P7_W

Bit 7 - Pull-Up Disable

pub fn p8(&mut self) -> P8_W

Bit 8 - Pull-Up Disable

pub fn p9(&mut self) -> P9_W

Bit 9 - Pull-Up Disable

pub fn p10(&mut self) -> P10_W

Bit 10 - Pull-Up Disable

pub fn p11(&mut self) -> P11_W

Bit 11 - Pull-Up Disable

pub fn p12(&mut self) -> P12_W

Bit 12 - Pull-Up Disable

pub fn p13(&mut self) -> P13_W

Bit 13 - Pull-Up Disable

pub fn p14(&mut self) -> P14_W

Bit 14 - Pull-Up Disable

pub fn p15(&mut self) -> P15_W

Bit 15 - Pull-Up Disable

pub fn p16(&mut self) -> P16_W

Bit 16 - Pull-Up Disable

pub fn p17(&mut self) -> P17_W

Bit 17 - Pull-Up Disable

pub fn p18(&mut self) -> P18_W

Bit 18 - Pull-Up Disable

pub fn p19(&mut self) -> P19_W

Bit 19 - Pull-Up Disable

pub fn p20(&mut self) -> P20_W

Bit 20 - Pull-Up Disable

pub fn p21(&mut self) -> P21_W

Bit 21 - Pull-Up Disable

pub fn p22(&mut self) -> P22_W

Bit 22 - Pull-Up Disable

pub fn p23(&mut self) -> P23_W

Bit 23 - Pull-Up Disable

pub fn p24(&mut self) -> P24_W

Bit 24 - Pull-Up Disable

pub fn p25(&mut self) -> P25_W

Bit 25 - Pull-Up Disable

pub fn p26(&mut self) -> P26_W

Bit 26 - Pull-Up Disable

pub fn p27(&mut self) -> P27_W

Bit 27 - Pull-Up Disable

pub fn p28(&mut self) -> P28_W

Bit 28 - Pull-Up Disable

pub fn p29(&mut self) -> P29_W

Bit 29 - Pull-Up Disable

pub fn p30(&mut self) -> P30_W

Bit 30 - Pull-Up Disable

pub fn p31(&mut self) -> P31_W

Bit 31 - Pull-Up Disable

impl W<u32, Reg<u32, _PIO_PUER>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Pull-Up Enable

pub fn p1(&mut self) -> P1_W

Bit 1 - Pull-Up Enable

pub fn p2(&mut self) -> P2_W

Bit 2 - Pull-Up Enable

pub fn p3(&mut self) -> P3_W

Bit 3 - Pull-Up Enable

pub fn p4(&mut self) -> P4_W

Bit 4 - Pull-Up Enable

pub fn p5(&mut self) -> P5_W

Bit 5 - Pull-Up Enable

pub fn p6(&mut self) -> P6_W

Bit 6 - Pull-Up Enable

pub fn p7(&mut self) -> P7_W

Bit 7 - Pull-Up Enable

pub fn p8(&mut self) -> P8_W

Bit 8 - Pull-Up Enable

pub fn p9(&mut self) -> P9_W

Bit 9 - Pull-Up Enable

pub fn p10(&mut self) -> P10_W

Bit 10 - Pull-Up Enable

pub fn p11(&mut self) -> P11_W

Bit 11 - Pull-Up Enable

pub fn p12(&mut self) -> P12_W

Bit 12 - Pull-Up Enable

pub fn p13(&mut self) -> P13_W

Bit 13 - Pull-Up Enable

pub fn p14(&mut self) -> P14_W

Bit 14 - Pull-Up Enable

pub fn p15(&mut self) -> P15_W

Bit 15 - Pull-Up Enable

pub fn p16(&mut self) -> P16_W

Bit 16 - Pull-Up Enable

pub fn p17(&mut self) -> P17_W

Bit 17 - Pull-Up Enable

pub fn p18(&mut self) -> P18_W

Bit 18 - Pull-Up Enable

pub fn p19(&mut self) -> P19_W

Bit 19 - Pull-Up Enable

pub fn p20(&mut self) -> P20_W

Bit 20 - Pull-Up Enable

pub fn p21(&mut self) -> P21_W

Bit 21 - Pull-Up Enable

pub fn p22(&mut self) -> P22_W

Bit 22 - Pull-Up Enable

pub fn p23(&mut self) -> P23_W

Bit 23 - Pull-Up Enable

pub fn p24(&mut self) -> P24_W

Bit 24 - Pull-Up Enable

pub fn p25(&mut self) -> P25_W

Bit 25 - Pull-Up Enable

pub fn p26(&mut self) -> P26_W

Bit 26 - Pull-Up Enable

pub fn p27(&mut self) -> P27_W

Bit 27 - Pull-Up Enable

pub fn p28(&mut self) -> P28_W

Bit 28 - Pull-Up Enable

pub fn p29(&mut self) -> P29_W

Bit 29 - Pull-Up Enable

pub fn p30(&mut self) -> P30_W

Bit 30 - Pull-Up Enable

pub fn p31(&mut self) -> P31_W

Bit 31 - Pull-Up Enable

impl W<u32, Reg<u32, _PIO_ABCDSR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Peripheral Select

pub fn p1(&mut self) -> P1_W

Bit 1 - Peripheral Select

pub fn p2(&mut self) -> P2_W

Bit 2 - Peripheral Select

pub fn p3(&mut self) -> P3_W

Bit 3 - Peripheral Select

pub fn p4(&mut self) -> P4_W

Bit 4 - Peripheral Select

pub fn p5(&mut self) -> P5_W

Bit 5 - Peripheral Select

pub fn p6(&mut self) -> P6_W

Bit 6 - Peripheral Select

pub fn p7(&mut self) -> P7_W

Bit 7 - Peripheral Select

pub fn p8(&mut self) -> P8_W

Bit 8 - Peripheral Select

pub fn p9(&mut self) -> P9_W

Bit 9 - Peripheral Select

pub fn p10(&mut self) -> P10_W

Bit 10 - Peripheral Select

pub fn p11(&mut self) -> P11_W

Bit 11 - Peripheral Select

pub fn p12(&mut self) -> P12_W

Bit 12 - Peripheral Select

pub fn p13(&mut self) -> P13_W

Bit 13 - Peripheral Select

pub fn p14(&mut self) -> P14_W

Bit 14 - Peripheral Select

pub fn p15(&mut self) -> P15_W

Bit 15 - Peripheral Select

pub fn p16(&mut self) -> P16_W

Bit 16 - Peripheral Select

pub fn p17(&mut self) -> P17_W

Bit 17 - Peripheral Select

pub fn p18(&mut self) -> P18_W

Bit 18 - Peripheral Select

pub fn p19(&mut self) -> P19_W

Bit 19 - Peripheral Select

pub fn p20(&mut self) -> P20_W

Bit 20 - Peripheral Select

pub fn p21(&mut self) -> P21_W

Bit 21 - Peripheral Select

pub fn p22(&mut self) -> P22_W

Bit 22 - Peripheral Select

pub fn p23(&mut self) -> P23_W

Bit 23 - Peripheral Select

pub fn p24(&mut self) -> P24_W

Bit 24 - Peripheral Select

pub fn p25(&mut self) -> P25_W

Bit 25 - Peripheral Select

pub fn p26(&mut self) -> P26_W

Bit 26 - Peripheral Select

pub fn p27(&mut self) -> P27_W

Bit 27 - Peripheral Select

pub fn p28(&mut self) -> P28_W

Bit 28 - Peripheral Select

pub fn p29(&mut self) -> P29_W

Bit 29 - Peripheral Select

pub fn p30(&mut self) -> P30_W

Bit 30 - Peripheral Select

pub fn p31(&mut self) -> P31_W

Bit 31 - Peripheral Select

impl W<u32, Reg<u32, _PIO_IFSCDR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Peripheral Clock Glitch Filtering Select

pub fn p1(&mut self) -> P1_W

Bit 1 - Peripheral Clock Glitch Filtering Select

pub fn p2(&mut self) -> P2_W

Bit 2 - Peripheral Clock Glitch Filtering Select

pub fn p3(&mut self) -> P3_W

Bit 3 - Peripheral Clock Glitch Filtering Select

pub fn p4(&mut self) -> P4_W

Bit 4 - Peripheral Clock Glitch Filtering Select

pub fn p5(&mut self) -> P5_W

Bit 5 - Peripheral Clock Glitch Filtering Select

pub fn p6(&mut self) -> P6_W

Bit 6 - Peripheral Clock Glitch Filtering Select

pub fn p7(&mut self) -> P7_W

Bit 7 - Peripheral Clock Glitch Filtering Select

pub fn p8(&mut self) -> P8_W

Bit 8 - Peripheral Clock Glitch Filtering Select

pub fn p9(&mut self) -> P9_W

Bit 9 - Peripheral Clock Glitch Filtering Select

pub fn p10(&mut self) -> P10_W

Bit 10 - Peripheral Clock Glitch Filtering Select

pub fn p11(&mut self) -> P11_W

Bit 11 - Peripheral Clock Glitch Filtering Select

pub fn p12(&mut self) -> P12_W

Bit 12 - Peripheral Clock Glitch Filtering Select

pub fn p13(&mut self) -> P13_W

Bit 13 - Peripheral Clock Glitch Filtering Select

pub fn p14(&mut self) -> P14_W

Bit 14 - Peripheral Clock Glitch Filtering Select

pub fn p15(&mut self) -> P15_W

Bit 15 - Peripheral Clock Glitch Filtering Select

pub fn p16(&mut self) -> P16_W

Bit 16 - Peripheral Clock Glitch Filtering Select

pub fn p17(&mut self) -> P17_W

Bit 17 - Peripheral Clock Glitch Filtering Select

pub fn p18(&mut self) -> P18_W

Bit 18 - Peripheral Clock Glitch Filtering Select

pub fn p19(&mut self) -> P19_W

Bit 19 - Peripheral Clock Glitch Filtering Select

pub fn p20(&mut self) -> P20_W

Bit 20 - Peripheral Clock Glitch Filtering Select

pub fn p21(&mut self) -> P21_W

Bit 21 - Peripheral Clock Glitch Filtering Select

pub fn p22(&mut self) -> P22_W

Bit 22 - Peripheral Clock Glitch Filtering Select

pub fn p23(&mut self) -> P23_W

Bit 23 - Peripheral Clock Glitch Filtering Select

pub fn p24(&mut self) -> P24_W

Bit 24 - Peripheral Clock Glitch Filtering Select

pub fn p25(&mut self) -> P25_W

Bit 25 - Peripheral Clock Glitch Filtering Select

pub fn p26(&mut self) -> P26_W

Bit 26 - Peripheral Clock Glitch Filtering Select

pub fn p27(&mut self) -> P27_W

Bit 27 - Peripheral Clock Glitch Filtering Select

pub fn p28(&mut self) -> P28_W

Bit 28 - Peripheral Clock Glitch Filtering Select

pub fn p29(&mut self) -> P29_W

Bit 29 - Peripheral Clock Glitch Filtering Select

pub fn p30(&mut self) -> P30_W

Bit 30 - Peripheral Clock Glitch Filtering Select

pub fn p31(&mut self) -> P31_W

Bit 31 - Peripheral Clock Glitch Filtering Select

impl W<u32, Reg<u32, _PIO_IFSCER>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Slow Clock Debouncing Filtering Select

pub fn p1(&mut self) -> P1_W

Bit 1 - Slow Clock Debouncing Filtering Select

pub fn p2(&mut self) -> P2_W

Bit 2 - Slow Clock Debouncing Filtering Select

pub fn p3(&mut self) -> P3_W

Bit 3 - Slow Clock Debouncing Filtering Select

pub fn p4(&mut self) -> P4_W

Bit 4 - Slow Clock Debouncing Filtering Select

pub fn p5(&mut self) -> P5_W

Bit 5 - Slow Clock Debouncing Filtering Select

pub fn p6(&mut self) -> P6_W

Bit 6 - Slow Clock Debouncing Filtering Select

pub fn p7(&mut self) -> P7_W

Bit 7 - Slow Clock Debouncing Filtering Select

pub fn p8(&mut self) -> P8_W

Bit 8 - Slow Clock Debouncing Filtering Select

pub fn p9(&mut self) -> P9_W

Bit 9 - Slow Clock Debouncing Filtering Select

pub fn p10(&mut self) -> P10_W

Bit 10 - Slow Clock Debouncing Filtering Select

pub fn p11(&mut self) -> P11_W

Bit 11 - Slow Clock Debouncing Filtering Select

pub fn p12(&mut self) -> P12_W

Bit 12 - Slow Clock Debouncing Filtering Select

pub fn p13(&mut self) -> P13_W

Bit 13 - Slow Clock Debouncing Filtering Select

pub fn p14(&mut self) -> P14_W

Bit 14 - Slow Clock Debouncing Filtering Select

pub fn p15(&mut self) -> P15_W

Bit 15 - Slow Clock Debouncing Filtering Select

pub fn p16(&mut self) -> P16_W

Bit 16 - Slow Clock Debouncing Filtering Select

pub fn p17(&mut self) -> P17_W

Bit 17 - Slow Clock Debouncing Filtering Select

pub fn p18(&mut self) -> P18_W

Bit 18 - Slow Clock Debouncing Filtering Select

pub fn p19(&mut self) -> P19_W

Bit 19 - Slow Clock Debouncing Filtering Select

pub fn p20(&mut self) -> P20_W

Bit 20 - Slow Clock Debouncing Filtering Select

pub fn p21(&mut self) -> P21_W

Bit 21 - Slow Clock Debouncing Filtering Select

pub fn p22(&mut self) -> P22_W

Bit 22 - Slow Clock Debouncing Filtering Select

pub fn p23(&mut self) -> P23_W

Bit 23 - Slow Clock Debouncing Filtering Select

pub fn p24(&mut self) -> P24_W

Bit 24 - Slow Clock Debouncing Filtering Select

pub fn p25(&mut self) -> P25_W

Bit 25 - Slow Clock Debouncing Filtering Select

pub fn p26(&mut self) -> P26_W

Bit 26 - Slow Clock Debouncing Filtering Select

pub fn p27(&mut self) -> P27_W

Bit 27 - Slow Clock Debouncing Filtering Select

pub fn p28(&mut self) -> P28_W

Bit 28 - Slow Clock Debouncing Filtering Select

pub fn p29(&mut self) -> P29_W

Bit 29 - Slow Clock Debouncing Filtering Select

pub fn p30(&mut self) -> P30_W

Bit 30 - Slow Clock Debouncing Filtering Select

pub fn p31(&mut self) -> P31_W

Bit 31 - Slow Clock Debouncing Filtering Select

impl W<u32, Reg<u32, _PIO_SCDR>>

pub fn div(&mut self) -> DIV_W

Bits 0:13 - Slow Clock Divider Selection for Debouncing

impl W<u32, Reg<u32, _PIO_PPDDR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Pull-Down Disable

pub fn p1(&mut self) -> P1_W

Bit 1 - Pull-Down Disable

pub fn p2(&mut self) -> P2_W

Bit 2 - Pull-Down Disable

pub fn p3(&mut self) -> P3_W

Bit 3 - Pull-Down Disable

pub fn p4(&mut self) -> P4_W

Bit 4 - Pull-Down Disable

pub fn p5(&mut self) -> P5_W

Bit 5 - Pull-Down Disable

pub fn p6(&mut self) -> P6_W

Bit 6 - Pull-Down Disable

pub fn p7(&mut self) -> P7_W

Bit 7 - Pull-Down Disable

pub fn p8(&mut self) -> P8_W

Bit 8 - Pull-Down Disable

pub fn p9(&mut self) -> P9_W

Bit 9 - Pull-Down Disable

pub fn p10(&mut self) -> P10_W

Bit 10 - Pull-Down Disable

pub fn p11(&mut self) -> P11_W

Bit 11 - Pull-Down Disable

pub fn p12(&mut self) -> P12_W

Bit 12 - Pull-Down Disable

pub fn p13(&mut self) -> P13_W

Bit 13 - Pull-Down Disable

pub fn p14(&mut self) -> P14_W

Bit 14 - Pull-Down Disable

pub fn p15(&mut self) -> P15_W

Bit 15 - Pull-Down Disable

pub fn p16(&mut self) -> P16_W

Bit 16 - Pull-Down Disable

pub fn p17(&mut self) -> P17_W

Bit 17 - Pull-Down Disable

pub fn p18(&mut self) -> P18_W

Bit 18 - Pull-Down Disable

pub fn p19(&mut self) -> P19_W

Bit 19 - Pull-Down Disable

pub fn p20(&mut self) -> P20_W

Bit 20 - Pull-Down Disable

pub fn p21(&mut self) -> P21_W

Bit 21 - Pull-Down Disable

pub fn p22(&mut self) -> P22_W

Bit 22 - Pull-Down Disable

pub fn p23(&mut self) -> P23_W

Bit 23 - Pull-Down Disable

pub fn p24(&mut self) -> P24_W

Bit 24 - Pull-Down Disable

pub fn p25(&mut self) -> P25_W

Bit 25 - Pull-Down Disable

pub fn p26(&mut self) -> P26_W

Bit 26 - Pull-Down Disable

pub fn p27(&mut self) -> P27_W

Bit 27 - Pull-Down Disable

pub fn p28(&mut self) -> P28_W

Bit 28 - Pull-Down Disable

pub fn p29(&mut self) -> P29_W

Bit 29 - Pull-Down Disable

pub fn p30(&mut self) -> P30_W

Bit 30 - Pull-Down Disable

pub fn p31(&mut self) -> P31_W

Bit 31 - Pull-Down Disable

impl W<u32, Reg<u32, _PIO_PPDER>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Pull-Down Enable

pub fn p1(&mut self) -> P1_W

Bit 1 - Pull-Down Enable

pub fn p2(&mut self) -> P2_W

Bit 2 - Pull-Down Enable

pub fn p3(&mut self) -> P3_W

Bit 3 - Pull-Down Enable

pub fn p4(&mut self) -> P4_W

Bit 4 - Pull-Down Enable

pub fn p5(&mut self) -> P5_W

Bit 5 - Pull-Down Enable

pub fn p6(&mut self) -> P6_W

Bit 6 - Pull-Down Enable

pub fn p7(&mut self) -> P7_W

Bit 7 - Pull-Down Enable

pub fn p8(&mut self) -> P8_W

Bit 8 - Pull-Down Enable

pub fn p9(&mut self) -> P9_W

Bit 9 - Pull-Down Enable

pub fn p10(&mut self) -> P10_W

Bit 10 - Pull-Down Enable

pub fn p11(&mut self) -> P11_W

Bit 11 - Pull-Down Enable

pub fn p12(&mut self) -> P12_W

Bit 12 - Pull-Down Enable

pub fn p13(&mut self) -> P13_W

Bit 13 - Pull-Down Enable

pub fn p14(&mut self) -> P14_W

Bit 14 - Pull-Down Enable

pub fn p15(&mut self) -> P15_W

Bit 15 - Pull-Down Enable

pub fn p16(&mut self) -> P16_W

Bit 16 - Pull-Down Enable

pub fn p17(&mut self) -> P17_W

Bit 17 - Pull-Down Enable

pub fn p18(&mut self) -> P18_W

Bit 18 - Pull-Down Enable

pub fn p19(&mut self) -> P19_W

Bit 19 - Pull-Down Enable

pub fn p20(&mut self) -> P20_W

Bit 20 - Pull-Down Enable

pub fn p21(&mut self) -> P21_W

Bit 21 - Pull-Down Enable

pub fn p22(&mut self) -> P22_W

Bit 22 - Pull-Down Enable

pub fn p23(&mut self) -> P23_W

Bit 23 - Pull-Down Enable

pub fn p24(&mut self) -> P24_W

Bit 24 - Pull-Down Enable

pub fn p25(&mut self) -> P25_W

Bit 25 - Pull-Down Enable

pub fn p26(&mut self) -> P26_W

Bit 26 - Pull-Down Enable

pub fn p27(&mut self) -> P27_W

Bit 27 - Pull-Down Enable

pub fn p28(&mut self) -> P28_W

Bit 28 - Pull-Down Enable

pub fn p29(&mut self) -> P29_W

Bit 29 - Pull-Down Enable

pub fn p30(&mut self) -> P30_W

Bit 30 - Pull-Down Enable

pub fn p31(&mut self) -> P31_W

Bit 31 - Pull-Down Enable

impl W<u32, Reg<u32, _PIO_OWER>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Output Write Enable

pub fn p1(&mut self) -> P1_W

Bit 1 - Output Write Enable

pub fn p2(&mut self) -> P2_W

Bit 2 - Output Write Enable

pub fn p3(&mut self) -> P3_W

Bit 3 - Output Write Enable

pub fn p4(&mut self) -> P4_W

Bit 4 - Output Write Enable

pub fn p5(&mut self) -> P5_W

Bit 5 - Output Write Enable

pub fn p6(&mut self) -> P6_W

Bit 6 - Output Write Enable

pub fn p7(&mut self) -> P7_W

Bit 7 - Output Write Enable

pub fn p8(&mut self) -> P8_W

Bit 8 - Output Write Enable

pub fn p9(&mut self) -> P9_W

Bit 9 - Output Write Enable

pub fn p10(&mut self) -> P10_W

Bit 10 - Output Write Enable

pub fn p11(&mut self) -> P11_W

Bit 11 - Output Write Enable

pub fn p12(&mut self) -> P12_W

Bit 12 - Output Write Enable

pub fn p13(&mut self) -> P13_W

Bit 13 - Output Write Enable

pub fn p14(&mut self) -> P14_W

Bit 14 - Output Write Enable

pub fn p15(&mut self) -> P15_W

Bit 15 - Output Write Enable

pub fn p16(&mut self) -> P16_W

Bit 16 - Output Write Enable

pub fn p17(&mut self) -> P17_W

Bit 17 - Output Write Enable

pub fn p18(&mut self) -> P18_W

Bit 18 - Output Write Enable

pub fn p19(&mut self) -> P19_W

Bit 19 - Output Write Enable

pub fn p20(&mut self) -> P20_W

Bit 20 - Output Write Enable

pub fn p21(&mut self) -> P21_W

Bit 21 - Output Write Enable

pub fn p22(&mut self) -> P22_W

Bit 22 - Output Write Enable

pub fn p23(&mut self) -> P23_W

Bit 23 - Output Write Enable

pub fn p24(&mut self) -> P24_W

Bit 24 - Output Write Enable

pub fn p25(&mut self) -> P25_W

Bit 25 - Output Write Enable

pub fn p26(&mut self) -> P26_W

Bit 26 - Output Write Enable

pub fn p27(&mut self) -> P27_W

Bit 27 - Output Write Enable

pub fn p28(&mut self) -> P28_W

Bit 28 - Output Write Enable

pub fn p29(&mut self) -> P29_W

Bit 29 - Output Write Enable

pub fn p30(&mut self) -> P30_W

Bit 30 - Output Write Enable

pub fn p31(&mut self) -> P31_W

Bit 31 - Output Write Enable

impl W<u32, Reg<u32, _PIO_OWDR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Output Write Disable

pub fn p1(&mut self) -> P1_W

Bit 1 - Output Write Disable

pub fn p2(&mut self) -> P2_W

Bit 2 - Output Write Disable

pub fn p3(&mut self) -> P3_W

Bit 3 - Output Write Disable

pub fn p4(&mut self) -> P4_W

Bit 4 - Output Write Disable

pub fn p5(&mut self) -> P5_W

Bit 5 - Output Write Disable

pub fn p6(&mut self) -> P6_W

Bit 6 - Output Write Disable

pub fn p7(&mut self) -> P7_W

Bit 7 - Output Write Disable

pub fn p8(&mut self) -> P8_W

Bit 8 - Output Write Disable

pub fn p9(&mut self) -> P9_W

Bit 9 - Output Write Disable

pub fn p10(&mut self) -> P10_W

Bit 10 - Output Write Disable

pub fn p11(&mut self) -> P11_W

Bit 11 - Output Write Disable

pub fn p12(&mut self) -> P12_W

Bit 12 - Output Write Disable

pub fn p13(&mut self) -> P13_W

Bit 13 - Output Write Disable

pub fn p14(&mut self) -> P14_W

Bit 14 - Output Write Disable

pub fn p15(&mut self) -> P15_W

Bit 15 - Output Write Disable

pub fn p16(&mut self) -> P16_W

Bit 16 - Output Write Disable

pub fn p17(&mut self) -> P17_W

Bit 17 - Output Write Disable

pub fn p18(&mut self) -> P18_W

Bit 18 - Output Write Disable

pub fn p19(&mut self) -> P19_W

Bit 19 - Output Write Disable

pub fn p20(&mut self) -> P20_W

Bit 20 - Output Write Disable

pub fn p21(&mut self) -> P21_W

Bit 21 - Output Write Disable

pub fn p22(&mut self) -> P22_W

Bit 22 - Output Write Disable

pub fn p23(&mut self) -> P23_W

Bit 23 - Output Write Disable

pub fn p24(&mut self) -> P24_W

Bit 24 - Output Write Disable

pub fn p25(&mut self) -> P25_W

Bit 25 - Output Write Disable

pub fn p26(&mut self) -> P26_W

Bit 26 - Output Write Disable

pub fn p27(&mut self) -> P27_W

Bit 27 - Output Write Disable

pub fn p28(&mut self) -> P28_W

Bit 28 - Output Write Disable

pub fn p29(&mut self) -> P29_W

Bit 29 - Output Write Disable

pub fn p30(&mut self) -> P30_W

Bit 30 - Output Write Disable

pub fn p31(&mut self) -> P31_W

Bit 31 - Output Write Disable

impl W<u32, Reg<u32, _PIO_AIMER>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Additional Interrupt Modes Enable

pub fn p1(&mut self) -> P1_W

Bit 1 - Additional Interrupt Modes Enable

pub fn p2(&mut self) -> P2_W

Bit 2 - Additional Interrupt Modes Enable

pub fn p3(&mut self) -> P3_W

Bit 3 - Additional Interrupt Modes Enable

pub fn p4(&mut self) -> P4_W

Bit 4 - Additional Interrupt Modes Enable

pub fn p5(&mut self) -> P5_W

Bit 5 - Additional Interrupt Modes Enable

pub fn p6(&mut self) -> P6_W

Bit 6 - Additional Interrupt Modes Enable

pub fn p7(&mut self) -> P7_W

Bit 7 - Additional Interrupt Modes Enable

pub fn p8(&mut self) -> P8_W

Bit 8 - Additional Interrupt Modes Enable

pub fn p9(&mut self) -> P9_W

Bit 9 - Additional Interrupt Modes Enable

pub fn p10(&mut self) -> P10_W

Bit 10 - Additional Interrupt Modes Enable

pub fn p11(&mut self) -> P11_W

Bit 11 - Additional Interrupt Modes Enable

pub fn p12(&mut self) -> P12_W

Bit 12 - Additional Interrupt Modes Enable

pub fn p13(&mut self) -> P13_W

Bit 13 - Additional Interrupt Modes Enable

pub fn p14(&mut self) -> P14_W

Bit 14 - Additional Interrupt Modes Enable

pub fn p15(&mut self) -> P15_W

Bit 15 - Additional Interrupt Modes Enable

pub fn p16(&mut self) -> P16_W

Bit 16 - Additional Interrupt Modes Enable

pub fn p17(&mut self) -> P17_W

Bit 17 - Additional Interrupt Modes Enable

pub fn p18(&mut self) -> P18_W

Bit 18 - Additional Interrupt Modes Enable

pub fn p19(&mut self) -> P19_W

Bit 19 - Additional Interrupt Modes Enable

pub fn p20(&mut self) -> P20_W

Bit 20 - Additional Interrupt Modes Enable

pub fn p21(&mut self) -> P21_W

Bit 21 - Additional Interrupt Modes Enable

pub fn p22(&mut self) -> P22_W

Bit 22 - Additional Interrupt Modes Enable

pub fn p23(&mut self) -> P23_W

Bit 23 - Additional Interrupt Modes Enable

pub fn p24(&mut self) -> P24_W

Bit 24 - Additional Interrupt Modes Enable

pub fn p25(&mut self) -> P25_W

Bit 25 - Additional Interrupt Modes Enable

pub fn p26(&mut self) -> P26_W

Bit 26 - Additional Interrupt Modes Enable

pub fn p27(&mut self) -> P27_W

Bit 27 - Additional Interrupt Modes Enable

pub fn p28(&mut self) -> P28_W

Bit 28 - Additional Interrupt Modes Enable

pub fn p29(&mut self) -> P29_W

Bit 29 - Additional Interrupt Modes Enable

pub fn p30(&mut self) -> P30_W

Bit 30 - Additional Interrupt Modes Enable

pub fn p31(&mut self) -> P31_W

Bit 31 - Additional Interrupt Modes Enable

impl W<u32, Reg<u32, _PIO_AIMDR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Additional Interrupt Modes Disable

pub fn p1(&mut self) -> P1_W

Bit 1 - Additional Interrupt Modes Disable

pub fn p2(&mut self) -> P2_W

Bit 2 - Additional Interrupt Modes Disable

pub fn p3(&mut self) -> P3_W

Bit 3 - Additional Interrupt Modes Disable

pub fn p4(&mut self) -> P4_W

Bit 4 - Additional Interrupt Modes Disable

pub fn p5(&mut self) -> P5_W

Bit 5 - Additional Interrupt Modes Disable

pub fn p6(&mut self) -> P6_W

Bit 6 - Additional Interrupt Modes Disable

pub fn p7(&mut self) -> P7_W

Bit 7 - Additional Interrupt Modes Disable

pub fn p8(&mut self) -> P8_W

Bit 8 - Additional Interrupt Modes Disable

pub fn p9(&mut self) -> P9_W

Bit 9 - Additional Interrupt Modes Disable

pub fn p10(&mut self) -> P10_W

Bit 10 - Additional Interrupt Modes Disable

pub fn p11(&mut self) -> P11_W

Bit 11 - Additional Interrupt Modes Disable

pub fn p12(&mut self) -> P12_W

Bit 12 - Additional Interrupt Modes Disable

pub fn p13(&mut self) -> P13_W

Bit 13 - Additional Interrupt Modes Disable

pub fn p14(&mut self) -> P14_W

Bit 14 - Additional Interrupt Modes Disable

pub fn p15(&mut self) -> P15_W

Bit 15 - Additional Interrupt Modes Disable

pub fn p16(&mut self) -> P16_W

Bit 16 - Additional Interrupt Modes Disable

pub fn p17(&mut self) -> P17_W

Bit 17 - Additional Interrupt Modes Disable

pub fn p18(&mut self) -> P18_W

Bit 18 - Additional Interrupt Modes Disable

pub fn p19(&mut self) -> P19_W

Bit 19 - Additional Interrupt Modes Disable

pub fn p20(&mut self) -> P20_W

Bit 20 - Additional Interrupt Modes Disable

pub fn p21(&mut self) -> P21_W

Bit 21 - Additional Interrupt Modes Disable

pub fn p22(&mut self) -> P22_W

Bit 22 - Additional Interrupt Modes Disable

pub fn p23(&mut self) -> P23_W

Bit 23 - Additional Interrupt Modes Disable

pub fn p24(&mut self) -> P24_W

Bit 24 - Additional Interrupt Modes Disable

pub fn p25(&mut self) -> P25_W

Bit 25 - Additional Interrupt Modes Disable

pub fn p26(&mut self) -> P26_W

Bit 26 - Additional Interrupt Modes Disable

pub fn p27(&mut self) -> P27_W

Bit 27 - Additional Interrupt Modes Disable

pub fn p28(&mut self) -> P28_W

Bit 28 - Additional Interrupt Modes Disable

pub fn p29(&mut self) -> P29_W

Bit 29 - Additional Interrupt Modes Disable

pub fn p30(&mut self) -> P30_W

Bit 30 - Additional Interrupt Modes Disable

pub fn p31(&mut self) -> P31_W

Bit 31 - Additional Interrupt Modes Disable

impl W<u32, Reg<u32, _PIO_ESR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Edge Interrupt Selection

pub fn p1(&mut self) -> P1_W

Bit 1 - Edge Interrupt Selection

pub fn p2(&mut self) -> P2_W

Bit 2 - Edge Interrupt Selection

pub fn p3(&mut self) -> P3_W

Bit 3 - Edge Interrupt Selection

pub fn p4(&mut self) -> P4_W

Bit 4 - Edge Interrupt Selection

pub fn p5(&mut self) -> P5_W

Bit 5 - Edge Interrupt Selection

pub fn p6(&mut self) -> P6_W

Bit 6 - Edge Interrupt Selection

pub fn p7(&mut self) -> P7_W

Bit 7 - Edge Interrupt Selection

pub fn p8(&mut self) -> P8_W

Bit 8 - Edge Interrupt Selection

pub fn p9(&mut self) -> P9_W

Bit 9 - Edge Interrupt Selection

pub fn p10(&mut self) -> P10_W

Bit 10 - Edge Interrupt Selection

pub fn p11(&mut self) -> P11_W

Bit 11 - Edge Interrupt Selection

pub fn p12(&mut self) -> P12_W

Bit 12 - Edge Interrupt Selection

pub fn p13(&mut self) -> P13_W

Bit 13 - Edge Interrupt Selection

pub fn p14(&mut self) -> P14_W

Bit 14 - Edge Interrupt Selection

pub fn p15(&mut self) -> P15_W

Bit 15 - Edge Interrupt Selection

pub fn p16(&mut self) -> P16_W

Bit 16 - Edge Interrupt Selection

pub fn p17(&mut self) -> P17_W

Bit 17 - Edge Interrupt Selection

pub fn p18(&mut self) -> P18_W

Bit 18 - Edge Interrupt Selection

pub fn p19(&mut self) -> P19_W

Bit 19 - Edge Interrupt Selection

pub fn p20(&mut self) -> P20_W

Bit 20 - Edge Interrupt Selection

pub fn p21(&mut self) -> P21_W

Bit 21 - Edge Interrupt Selection

pub fn p22(&mut self) -> P22_W

Bit 22 - Edge Interrupt Selection

pub fn p23(&mut self) -> P23_W

Bit 23 - Edge Interrupt Selection

pub fn p24(&mut self) -> P24_W

Bit 24 - Edge Interrupt Selection

pub fn p25(&mut self) -> P25_W

Bit 25 - Edge Interrupt Selection

pub fn p26(&mut self) -> P26_W

Bit 26 - Edge Interrupt Selection

pub fn p27(&mut self) -> P27_W

Bit 27 - Edge Interrupt Selection

pub fn p28(&mut self) -> P28_W

Bit 28 - Edge Interrupt Selection

pub fn p29(&mut self) -> P29_W

Bit 29 - Edge Interrupt Selection

pub fn p30(&mut self) -> P30_W

Bit 30 - Edge Interrupt Selection

pub fn p31(&mut self) -> P31_W

Bit 31 - Edge Interrupt Selection

impl W<u32, Reg<u32, _PIO_LSR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Level Interrupt Selection

pub fn p1(&mut self) -> P1_W

Bit 1 - Level Interrupt Selection

pub fn p2(&mut self) -> P2_W

Bit 2 - Level Interrupt Selection

pub fn p3(&mut self) -> P3_W

Bit 3 - Level Interrupt Selection

pub fn p4(&mut self) -> P4_W

Bit 4 - Level Interrupt Selection

pub fn p5(&mut self) -> P5_W

Bit 5 - Level Interrupt Selection

pub fn p6(&mut self) -> P6_W

Bit 6 - Level Interrupt Selection

pub fn p7(&mut self) -> P7_W

Bit 7 - Level Interrupt Selection

pub fn p8(&mut self) -> P8_W

Bit 8 - Level Interrupt Selection

pub fn p9(&mut self) -> P9_W

Bit 9 - Level Interrupt Selection

pub fn p10(&mut self) -> P10_W

Bit 10 - Level Interrupt Selection

pub fn p11(&mut self) -> P11_W

Bit 11 - Level Interrupt Selection

pub fn p12(&mut self) -> P12_W

Bit 12 - Level Interrupt Selection

pub fn p13(&mut self) -> P13_W

Bit 13 - Level Interrupt Selection

pub fn p14(&mut self) -> P14_W

Bit 14 - Level Interrupt Selection

pub fn p15(&mut self) -> P15_W

Bit 15 - Level Interrupt Selection

pub fn p16(&mut self) -> P16_W

Bit 16 - Level Interrupt Selection

pub fn p17(&mut self) -> P17_W

Bit 17 - Level Interrupt Selection

pub fn p18(&mut self) -> P18_W

Bit 18 - Level Interrupt Selection

pub fn p19(&mut self) -> P19_W

Bit 19 - Level Interrupt Selection

pub fn p20(&mut self) -> P20_W

Bit 20 - Level Interrupt Selection

pub fn p21(&mut self) -> P21_W

Bit 21 - Level Interrupt Selection

pub fn p22(&mut self) -> P22_W

Bit 22 - Level Interrupt Selection

pub fn p23(&mut self) -> P23_W

Bit 23 - Level Interrupt Selection

pub fn p24(&mut self) -> P24_W

Bit 24 - Level Interrupt Selection

pub fn p25(&mut self) -> P25_W

Bit 25 - Level Interrupt Selection

pub fn p26(&mut self) -> P26_W

Bit 26 - Level Interrupt Selection

pub fn p27(&mut self) -> P27_W

Bit 27 - Level Interrupt Selection

pub fn p28(&mut self) -> P28_W

Bit 28 - Level Interrupt Selection

pub fn p29(&mut self) -> P29_W

Bit 29 - Level Interrupt Selection

pub fn p30(&mut self) -> P30_W

Bit 30 - Level Interrupt Selection

pub fn p31(&mut self) -> P31_W

Bit 31 - Level Interrupt Selection

impl W<u32, Reg<u32, _PIO_FELLSR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Falling Edge/Low-Level Interrupt Selection

pub fn p1(&mut self) -> P1_W

Bit 1 - Falling Edge/Low-Level Interrupt Selection

pub fn p2(&mut self) -> P2_W

Bit 2 - Falling Edge/Low-Level Interrupt Selection

pub fn p3(&mut self) -> P3_W

Bit 3 - Falling Edge/Low-Level Interrupt Selection

pub fn p4(&mut self) -> P4_W

Bit 4 - Falling Edge/Low-Level Interrupt Selection

pub fn p5(&mut self) -> P5_W

Bit 5 - Falling Edge/Low-Level Interrupt Selection

pub fn p6(&mut self) -> P6_W

Bit 6 - Falling Edge/Low-Level Interrupt Selection

pub fn p7(&mut self) -> P7_W

Bit 7 - Falling Edge/Low-Level Interrupt Selection

pub fn p8(&mut self) -> P8_W

Bit 8 - Falling Edge/Low-Level Interrupt Selection

pub fn p9(&mut self) -> P9_W

Bit 9 - Falling Edge/Low-Level Interrupt Selection

pub fn p10(&mut self) -> P10_W

Bit 10 - Falling Edge/Low-Level Interrupt Selection

pub fn p11(&mut self) -> P11_W

Bit 11 - Falling Edge/Low-Level Interrupt Selection

pub fn p12(&mut self) -> P12_W

Bit 12 - Falling Edge/Low-Level Interrupt Selection

pub fn p13(&mut self) -> P13_W

Bit 13 - Falling Edge/Low-Level Interrupt Selection

pub fn p14(&mut self) -> P14_W

Bit 14 - Falling Edge/Low-Level Interrupt Selection

pub fn p15(&mut self) -> P15_W

Bit 15 - Falling Edge/Low-Level Interrupt Selection

pub fn p16(&mut self) -> P16_W

Bit 16 - Falling Edge/Low-Level Interrupt Selection

pub fn p17(&mut self) -> P17_W

Bit 17 - Falling Edge/Low-Level Interrupt Selection

pub fn p18(&mut self) -> P18_W

Bit 18 - Falling Edge/Low-Level Interrupt Selection

pub fn p19(&mut self) -> P19_W

Bit 19 - Falling Edge/Low-Level Interrupt Selection

pub fn p20(&mut self) -> P20_W

Bit 20 - Falling Edge/Low-Level Interrupt Selection

pub fn p21(&mut self) -> P21_W

Bit 21 - Falling Edge/Low-Level Interrupt Selection

pub fn p22(&mut self) -> P22_W

Bit 22 - Falling Edge/Low-Level Interrupt Selection

pub fn p23(&mut self) -> P23_W

Bit 23 - Falling Edge/Low-Level Interrupt Selection

pub fn p24(&mut self) -> P24_W

Bit 24 - Falling Edge/Low-Level Interrupt Selection

pub fn p25(&mut self) -> P25_W

Bit 25 - Falling Edge/Low-Level Interrupt Selection

pub fn p26(&mut self) -> P26_W

Bit 26 - Falling Edge/Low-Level Interrupt Selection

pub fn p27(&mut self) -> P27_W

Bit 27 - Falling Edge/Low-Level Interrupt Selection

pub fn p28(&mut self) -> P28_W

Bit 28 - Falling Edge/Low-Level Interrupt Selection

pub fn p29(&mut self) -> P29_W

Bit 29 - Falling Edge/Low-Level Interrupt Selection

pub fn p30(&mut self) -> P30_W

Bit 30 - Falling Edge/Low-Level Interrupt Selection

pub fn p31(&mut self) -> P31_W

Bit 31 - Falling Edge/Low-Level Interrupt Selection

impl W<u32, Reg<u32, _PIO_REHLSR>>

pub fn p0(&mut self) -> P0_W

Bit 0 - Rising Edge/High-Level Interrupt Selection

pub fn p1(&mut self) -> P1_W

Bit 1 - Rising Edge/High-Level Interrupt Selection

pub fn p2(&mut self) -> P2_W

Bit 2 - Rising Edge/High-Level Interrupt Selection

pub fn p3(&mut self) -> P3_W

Bit 3 - Rising Edge/High-Level Interrupt Selection

pub fn p4(&mut self) -> P4_W

Bit 4 - Rising Edge/High-Level Interrupt Selection

pub fn p5(&mut self) -> P5_W

Bit 5 - Rising Edge/High-Level Interrupt Selection

pub fn p6(&mut self) -> P6_W

Bit 6 - Rising Edge/High-Level Interrupt Selection

pub fn p7(&mut self) -> P7_W

Bit 7 - Rising Edge/High-Level Interrupt Selection

pub fn p8(&mut self) -> P8_W

Bit 8 - Rising Edge/High-Level Interrupt Selection

pub fn p9(&mut self) -> P9_W

Bit 9 - Rising Edge/High-Level Interrupt Selection

pub fn p10(&mut self) -> P10_W

Bit 10 - Rising Edge/High-Level Interrupt Selection

pub fn p11(&mut self) -> P11_W

Bit 11 - Rising Edge/High-Level Interrupt Selection

pub fn p12(&mut self) -> P12_W

Bit 12 - Rising Edge/High-Level Interrupt Selection

pub fn p13(&mut self) -> P13_W

Bit 13 - Rising Edge/High-Level Interrupt Selection

pub fn p14(&mut self) -> P14_W

Bit 14 - Rising Edge/High-Level Interrupt Selection

pub fn p15(&mut self) -> P15_W

Bit 15 - Rising Edge/High-Level Interrupt Selection

pub fn p16(&mut self) -> P16_W

Bit 16 - Rising Edge/High-Level Interrupt Selection

pub fn p17(&mut self) -> P17_W

Bit 17 - Rising Edge/High-Level Interrupt Selection

pub fn p18(&mut self) -> P18_W

Bit 18 - Rising Edge/High-Level Interrupt Selection

pub fn p19(&mut self) -> P19_W

Bit 19 - Rising Edge/High-Level Interrupt Selection

pub fn p20(&mut self) -> P20_W

Bit 20 - Rising Edge/High-Level Interrupt Selection

pub fn p21(&mut self) -> P21_W

Bit 21 - Rising Edge/High-Level Interrupt Selection

pub fn p22(&mut self) -> P22_W

Bit 22 - Rising Edge/High-Level Interrupt Selection

pub fn p23(&mut self) -> P23_W

Bit 23 - Rising Edge/High-Level Interrupt Selection

pub fn p24(&mut self) -> P24_W

Bit 24 - Rising Edge/High-Level Interrupt Selection

pub fn p25(&mut self) -> P25_W

Bit 25 - Rising Edge/High-Level Interrupt Selection

pub fn p26(&mut self) -> P26_W

Bit 26 - Rising Edge/High-Level Interrupt Selection

pub fn p27(&mut self) -> P27_W

Bit 27 - Rising Edge/High-Level Interrupt Selection

pub fn p28(&mut self) -> P28_W

Bit 28 - Rising Edge/High-Level Interrupt Selection

pub fn p29(&mut self) -> P29_W

Bit 29 - Rising Edge/High-Level Interrupt Selection

pub fn p30(&mut self) -> P30_W

Bit 30 - Rising Edge/High-Level Interrupt Selection

pub fn p31(&mut self) -> P31_W

Bit 31 - Rising Edge/High-Level Interrupt Selection

impl W<u32, Reg<u32, _PIO_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _PIO_SCHMITT>>

pub fn schmitt0(&mut self) -> SCHMITT0_W

Bit 0 - Schmitt Trigger Control

pub fn schmitt1(&mut self) -> SCHMITT1_W

Bit 1 - Schmitt Trigger Control

pub fn schmitt2(&mut self) -> SCHMITT2_W

Bit 2 - Schmitt Trigger Control

pub fn schmitt3(&mut self) -> SCHMITT3_W

Bit 3 - Schmitt Trigger Control

pub fn schmitt4(&mut self) -> SCHMITT4_W

Bit 4 - Schmitt Trigger Control

pub fn schmitt5(&mut self) -> SCHMITT5_W

Bit 5 - Schmitt Trigger Control

pub fn schmitt6(&mut self) -> SCHMITT6_W

Bit 6 - Schmitt Trigger Control

pub fn schmitt7(&mut self) -> SCHMITT7_W

Bit 7 - Schmitt Trigger Control

pub fn schmitt8(&mut self) -> SCHMITT8_W

Bit 8 - Schmitt Trigger Control

pub fn schmitt9(&mut self) -> SCHMITT9_W

Bit 9 - Schmitt Trigger Control

pub fn schmitt10(&mut self) -> SCHMITT10_W

Bit 10 - Schmitt Trigger Control

pub fn schmitt11(&mut self) -> SCHMITT11_W

Bit 11 - Schmitt Trigger Control

pub fn schmitt12(&mut self) -> SCHMITT12_W

Bit 12 - Schmitt Trigger Control

pub fn schmitt13(&mut self) -> SCHMITT13_W

Bit 13 - Schmitt Trigger Control

pub fn schmitt14(&mut self) -> SCHMITT14_W

Bit 14 - Schmitt Trigger Control

pub fn schmitt15(&mut self) -> SCHMITT15_W

Bit 15 - Schmitt Trigger Control

pub fn schmitt16(&mut self) -> SCHMITT16_W

Bit 16 - Schmitt Trigger Control

pub fn schmitt17(&mut self) -> SCHMITT17_W

Bit 17 - Schmitt Trigger Control

pub fn schmitt18(&mut self) -> SCHMITT18_W

Bit 18 - Schmitt Trigger Control

pub fn schmitt19(&mut self) -> SCHMITT19_W

Bit 19 - Schmitt Trigger Control

pub fn schmitt20(&mut self) -> SCHMITT20_W

Bit 20 - Schmitt Trigger Control

pub fn schmitt21(&mut self) -> SCHMITT21_W

Bit 21 - Schmitt Trigger Control

pub fn schmitt22(&mut self) -> SCHMITT22_W

Bit 22 - Schmitt Trigger Control

pub fn schmitt23(&mut self) -> SCHMITT23_W

Bit 23 - Schmitt Trigger Control

pub fn schmitt24(&mut self) -> SCHMITT24_W

Bit 24 - Schmitt Trigger Control

pub fn schmitt25(&mut self) -> SCHMITT25_W

Bit 25 - Schmitt Trigger Control

pub fn schmitt26(&mut self) -> SCHMITT26_W

Bit 26 - Schmitt Trigger Control

pub fn schmitt27(&mut self) -> SCHMITT27_W

Bit 27 - Schmitt Trigger Control

pub fn schmitt28(&mut self) -> SCHMITT28_W

Bit 28 - Schmitt Trigger Control

pub fn schmitt29(&mut self) -> SCHMITT29_W

Bit 29 - Schmitt Trigger Control

pub fn schmitt30(&mut self) -> SCHMITT30_W

Bit 30 - Schmitt Trigger Control

pub fn schmitt31(&mut self) -> SCHMITT31_W

Bit 31 - Schmitt Trigger Control

impl W<u32, Reg<u32, _PIO_DRIVER>>

pub fn line0(&mut self) -> LINE0_W

Bit 0 - Drive of PIO Line 0

pub fn line1(&mut self) -> LINE1_W

Bit 1 - Drive of PIO Line 1

pub fn line2(&mut self) -> LINE2_W

Bit 2 - Drive of PIO Line 2

pub fn line3(&mut self) -> LINE3_W

Bit 3 - Drive of PIO Line 3

pub fn line4(&mut self) -> LINE4_W

Bit 4 - Drive of PIO Line 4

pub fn line5(&mut self) -> LINE5_W

Bit 5 - Drive of PIO Line 5

pub fn line6(&mut self) -> LINE6_W

Bit 6 - Drive of PIO Line 6

pub fn line7(&mut self) -> LINE7_W

Bit 7 - Drive of PIO Line 7

pub fn line8(&mut self) -> LINE8_W

Bit 8 - Drive of PIO Line 8

pub fn line9(&mut self) -> LINE9_W

Bit 9 - Drive of PIO Line 9

pub fn line10(&mut self) -> LINE10_W

Bit 10 - Drive of PIO Line 10

pub fn line11(&mut self) -> LINE11_W

Bit 11 - Drive of PIO Line 11

pub fn line12(&mut self) -> LINE12_W

Bit 12 - Drive of PIO Line 12

pub fn line13(&mut self) -> LINE13_W

Bit 13 - Drive of PIO Line 13

pub fn line14(&mut self) -> LINE14_W

Bit 14 - Drive of PIO Line 14

pub fn line15(&mut self) -> LINE15_W

Bit 15 - Drive of PIO Line 15

pub fn line16(&mut self) -> LINE16_W

Bit 16 - Drive of PIO Line 16

pub fn line17(&mut self) -> LINE17_W

Bit 17 - Drive of PIO Line 17

pub fn line18(&mut self) -> LINE18_W

Bit 18 - Drive of PIO Line 18

pub fn line19(&mut self) -> LINE19_W

Bit 19 - Drive of PIO Line 19

pub fn line20(&mut self) -> LINE20_W

Bit 20 - Drive of PIO Line 20

pub fn line21(&mut self) -> LINE21_W

Bit 21 - Drive of PIO Line 21

pub fn line22(&mut self) -> LINE22_W

Bit 22 - Drive of PIO Line 22

pub fn line23(&mut self) -> LINE23_W

Bit 23 - Drive of PIO Line 23

pub fn line24(&mut self) -> LINE24_W

Bit 24 - Drive of PIO Line 24

pub fn line25(&mut self) -> LINE25_W

Bit 25 - Drive of PIO Line 25

pub fn line26(&mut self) -> LINE26_W

Bit 26 - Drive of PIO Line 26

pub fn line27(&mut self) -> LINE27_W

Bit 27 - Drive of PIO Line 27

pub fn line28(&mut self) -> LINE28_W

Bit 28 - Drive of PIO Line 28

pub fn line29(&mut self) -> LINE29_W

Bit 29 - Drive of PIO Line 29

pub fn line30(&mut self) -> LINE30_W

Bit 30 - Drive of PIO Line 30

pub fn line31(&mut self) -> LINE31_W

Bit 31 - Drive of PIO Line 31

impl W<u32, Reg<u32, _PIO_PCMR>>

pub fn pcen(&mut self) -> PCEN_W

Bit 0 - Parallel Capture Mode Enable

pub fn dsize(&mut self) -> DSIZE_W

Bits 4:5 - Parallel Capture Mode Data Size

pub fn alwys(&mut self) -> ALWYS_W

Bit 9 - Parallel Capture Mode Always Sampling

pub fn halfs(&mut self) -> HALFS_W

Bit 10 - Parallel Capture Mode Half Sampling

pub fn frsts(&mut self) -> FRSTS_W

Bit 11 - Parallel Capture Mode First Sample

impl W<u32, Reg<u32, _PIO_PCIER>>

pub fn drdy(&mut self) -> DRDY_W

Bit 0 - Parallel Capture Mode Data Ready Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W

Bit 1 - Parallel Capture Mode Overrun Error Interrupt Enable

pub fn endrx(&mut self) -> ENDRX_W

Bit 2 - End of Reception Transfer Interrupt Enable

pub fn rxbuff(&mut self) -> RXBUFF_W

Bit 3 - Reception Buffer Full Interrupt Enable

impl W<u32, Reg<u32, _PIO_PCIDR>>

pub fn drdy(&mut self) -> DRDY_W

Bit 0 - Parallel Capture Mode Data Ready Interrupt Disable

pub fn ovre(&mut self) -> OVRE_W

Bit 1 - Parallel Capture Mode Overrun Error Interrupt Disable

pub fn endrx(&mut self) -> ENDRX_W

Bit 2 - End of Reception Transfer Interrupt Disable

pub fn rxbuff(&mut self) -> RXBUFF_W

Bit 3 - Reception Buffer Full Interrupt Disable

impl W<u32, Reg<u32, _PMC_SCER>>

pub fn usbclk(&mut self) -> USBCLK_W

Bit 5 - Enable USB FS Clock

pub fn pck0(&mut self) -> PCK0_W

Bit 8 - Programmable Clock 0 Output Enable

pub fn pck1(&mut self) -> PCK1_W

Bit 9 - Programmable Clock 1 Output Enable

pub fn pck2(&mut self) -> PCK2_W

Bit 10 - Programmable Clock 2 Output Enable

pub fn pck3(&mut self) -> PCK3_W

Bit 11 - Programmable Clock 3 Output Enable

pub fn pck4(&mut self) -> PCK4_W

Bit 12 - Programmable Clock 4 Output Enable

pub fn pck5(&mut self) -> PCK5_W

Bit 13 - Programmable Clock 5 Output Enable

pub fn pck6(&mut self) -> PCK6_W

Bit 14 - Programmable Clock 6 Output Enable

pub fn pck7(&mut self) -> PCK7_W

Bit 15 - Programmable Clock 7 Output Enable

impl W<u32, Reg<u32, _PMC_SCDR>>

pub fn usbclk(&mut self) -> USBCLK_W

Bit 5 - Disable USB FS Clock

pub fn pck0(&mut self) -> PCK0_W

Bit 8 - Programmable Clock 0 Output Disable

pub fn pck1(&mut self) -> PCK1_W

Bit 9 - Programmable Clock 1 Output Disable

pub fn pck2(&mut self) -> PCK2_W

Bit 10 - Programmable Clock 2 Output Disable

pub fn pck3(&mut self) -> PCK3_W

Bit 11 - Programmable Clock 3 Output Disable

pub fn pck4(&mut self) -> PCK4_W

Bit 12 - Programmable Clock 4 Output Disable

pub fn pck5(&mut self) -> PCK5_W

Bit 13 - Programmable Clock 5 Output Disable

pub fn pck6(&mut self) -> PCK6_W

Bit 14 - Programmable Clock 6 Output Disable

pub fn pck7(&mut self) -> PCK7_W

Bit 15 - Programmable Clock 7 Output Disable

impl W<u32, Reg<u32, _PMC_PCER0>>

pub fn pid7(&mut self) -> PID7_W

Bit 7 - Peripheral Clock 7 Enable

pub fn pid8(&mut self) -> PID8_W

Bit 8 - Peripheral Clock 8 Enable

pub fn pid10(&mut self) -> PID10_W

Bit 10 - Peripheral Clock 10 Enable

pub fn pid11(&mut self) -> PID11_W

Bit 11 - Peripheral Clock 11 Enable

pub fn pid13(&mut self) -> PID13_W

Bit 13 - Peripheral Clock 13 Enable

pub fn pid14(&mut self) -> PID14_W

Bit 14 - Peripheral Clock 14 Enable

pub fn pid16(&mut self) -> PID16_W

Bit 16 - Peripheral Clock 16 Enable

pub fn pid19(&mut self) -> PID19_W

Bit 19 - Peripheral Clock 19 Enable

pub fn pid20(&mut self) -> PID20_W

Bit 20 - Peripheral Clock 20 Enable

pub fn pid22(&mut self) -> PID22_W

Bit 22 - Peripheral Clock 22 Enable

pub fn pid23(&mut self) -> PID23_W

Bit 23 - Peripheral Clock 23 Enable

pub fn pid24(&mut self) -> PID24_W

Bit 24 - Peripheral Clock 24 Enable

pub fn pid25(&mut self) -> PID25_W

Bit 25 - Peripheral Clock 25 Enable

pub fn pid26(&mut self) -> PID26_W

Bit 26 - Peripheral Clock 26 Enable

pub fn pid27(&mut self) -> PID27_W

Bit 27 - Peripheral Clock 27 Enable

pub fn pid28(&mut self) -> PID28_W

Bit 28 - Peripheral Clock 28 Enable

pub fn pid29(&mut self) -> PID29_W

Bit 29 - Peripheral Clock 29 Enable

pub fn pid30(&mut self) -> PID30_W

Bit 30 - Peripheral Clock 30 Enable

pub fn pid31(&mut self) -> PID31_W

Bit 31 - Peripheral Clock 31 Enable

impl W<u32, Reg<u32, _PMC_PCDR0>>

pub fn pid7(&mut self) -> PID7_W

Bit 7 - Peripheral Clock 7 Disable

pub fn pid8(&mut self) -> PID8_W

Bit 8 - Peripheral Clock 8 Disable

pub fn pid10(&mut self) -> PID10_W

Bit 10 - Peripheral Clock 10 Disable

pub fn pid11(&mut self) -> PID11_W

Bit 11 - Peripheral Clock 11 Disable

pub fn pid13(&mut self) -> PID13_W

Bit 13 - Peripheral Clock 13 Disable

pub fn pid14(&mut self) -> PID14_W

Bit 14 - Peripheral Clock 14 Disable

pub fn pid16(&mut self) -> PID16_W

Bit 16 - Peripheral Clock 16 Disable

pub fn pid19(&mut self) -> PID19_W

Bit 19 - Peripheral Clock 19 Disable

pub fn pid20(&mut self) -> PID20_W

Bit 20 - Peripheral Clock 20 Disable

pub fn pid22(&mut self) -> PID22_W

Bit 22 - Peripheral Clock 22 Disable

pub fn pid23(&mut self) -> PID23_W

Bit 23 - Peripheral Clock 23 Disable

pub fn pid24(&mut self) -> PID24_W

Bit 24 - Peripheral Clock 24 Disable

pub fn pid25(&mut self) -> PID25_W

Bit 25 - Peripheral Clock 25 Disable

pub fn pid26(&mut self) -> PID26_W

Bit 26 - Peripheral Clock 26 Disable

pub fn pid27(&mut self) -> PID27_W

Bit 27 - Peripheral Clock 27 Disable

pub fn pid28(&mut self) -> PID28_W

Bit 28 - Peripheral Clock 28 Disable

pub fn pid29(&mut self) -> PID29_W

Bit 29 - Peripheral Clock 29 Disable

pub fn pid30(&mut self) -> PID30_W

Bit 30 - Peripheral Clock 30 Disable

pub fn pid31(&mut self) -> PID31_W

Bit 31 - Peripheral Clock 31 Disable

impl W<u32, Reg<u32, _CKGR_UCKR>>

pub fn upllen(&mut self) -> UPLLEN_W

Bit 16 - UTMI PLL Enable

pub fn upllcount(&mut self) -> UPLLCOUNT_W

Bits 20:23 - UTMI PLL Start-up Time

impl W<u32, Reg<u32, _CKGR_MOR>>

pub fn moscxten(&mut self) -> MOSCXTEN_W

Bit 0 - Main Crystal Oscillator Enable

pub fn moscxtby(&mut self) -> MOSCXTBY_W

Bit 1 - Main Crystal Oscillator Bypass

pub fn waitmode(&mut self) -> WAITMODE_W

Bit 2 - Wait Mode Command (Write-only)

pub fn moscrcen(&mut self) -> MOSCRCEN_W

Bit 3 - Main RC Oscillator Enable

pub fn moscrcf(&mut self) -> MOSCRCF_W

Bits 4:6 - Main RC Oscillator Frequency Selection

pub fn moscxtst(&mut self) -> MOSCXTST_W

Bits 8:15 - Main Crystal Oscillator Startup Time

pub fn key(&mut self) -> KEY_W

Bits 16:23 - Write Access Password

pub fn moscsel(&mut self) -> MOSCSEL_W

Bit 24 - Main Clock Oscillator Selection

pub fn cfden(&mut self) -> CFDEN_W

Bit 25 - Clock Failure Detector Enable

pub fn xt32kfme(&mut self) -> XT32KFME_W

Bit 26 - 32.768 kHz Crystal Oscillator Frequency Monitoring Enable

impl W<u32, Reg<u32, _CKGR_MCFR>>

pub fn mainf(&mut self) -> MAINF_W

Bits 0:15 - Main Clock Frequency

pub fn mainfrdy(&mut self) -> MAINFRDY_W

Bit 16 - Main Clock Frequency Measure Ready

pub fn rcmeas(&mut self) -> RCMEAS_W

Bit 20 - RC Oscillator Frequency Measure (write-only)

pub fn ccss(&mut self) -> CCSS_W

Bit 24 - Counter Clock Source Selection

impl W<u32, Reg<u32, _CKGR_PLLAR>>

pub fn diva(&mut self) -> DIVA_W

Bits 0:7 - PLLA Front End Divider

pub fn pllacount(&mut self) -> PLLACOUNT_W

Bits 8:13 - PLLA Counter

pub fn mula(&mut self) -> MULA_W

Bits 16:26 - PLLA Multiplier

pub fn one(&mut self) -> ONE_W

Bit 29 - Must Be Set to 1

impl W<u32, Reg<u32, _PMC_MCKR>>

pub fn css(&mut self) -> CSS_W

Bits 0:1 - Master Clock Source Selection

pub fn pres(&mut self) -> PRES_W

Bits 4:6 - Processor Clock Prescaler

pub fn mdiv(&mut self) -> MDIV_W

Bits 8:9 - Master Clock Division

pub fn uplldiv2(&mut self) -> UPLLDIV2_W

Bit 13 - UPLL Divider by 2

impl W<u32, Reg<u32, _PMC_USB>>

pub fn usbs(&mut self) -> USBS_W

Bit 0 - USB Input Clock Selection

pub fn usbdiv(&mut self) -> USBDIV_W

Bits 8:11 - Divider for USB_48M

impl W<u32, Reg<u32, _PMC_PCK>>

pub fn css(&mut self) -> CSS_W

Bits 0:2 - Programmable Clock Source Selection

pub fn pres(&mut self) -> PRES_W

Bits 4:11 - Programmable Clock Prescaler

impl W<u32, Reg<u32, _PMC_IER>>

pub fn moscxts(&mut self) -> MOSCXTS_W

Bit 0 - Main Crystal Oscillator Status Interrupt Enable

pub fn locka(&mut self) -> LOCKA_W

Bit 1 - PLLA Lock Interrupt Enable

pub fn mckrdy(&mut self) -> MCKRDY_W

Bit 3 - Master Clock Ready Interrupt Enable

pub fn locku(&mut self) -> LOCKU_W

Bit 6 - UTMI PLL Lock Interrupt Enable

pub fn pckrdy0(&mut self) -> PCKRDY0_W

Bit 8 - Programmable Clock Ready 0 Interrupt Enable

pub fn pckrdy1(&mut self) -> PCKRDY1_W

Bit 9 - Programmable Clock Ready 1 Interrupt Enable

pub fn pckrdy2(&mut self) -> PCKRDY2_W

Bit 10 - Programmable Clock Ready 2 Interrupt Enable

pub fn pckrdy3(&mut self) -> PCKRDY3_W

Bit 11 - Programmable Clock Ready 3 Interrupt Enable

pub fn pckrdy4(&mut self) -> PCKRDY4_W

Bit 12 - Programmable Clock Ready 4 Interrupt Enable

pub fn pckrdy5(&mut self) -> PCKRDY5_W

Bit 13 - Programmable Clock Ready 5 Interrupt Enable

pub fn pckrdy6(&mut self) -> PCKRDY6_W

Bit 14 - Programmable Clock Ready 6 Interrupt Enable

pub fn pckrdy7(&mut self) -> PCKRDY7_W

Bit 15 - Programmable Clock Ready 7 Interrupt Enable

pub fn moscsels(&mut self) -> MOSCSELS_W

Bit 16 - Main Clock Source Oscillator Selection Status Interrupt Enable

pub fn moscrcs(&mut self) -> MOSCRCS_W

Bit 17 - Main RC Oscillator Status Interrupt Enable

pub fn cfdev(&mut self) -> CFDEV_W

Bit 18 - Clock Failure Detector Event Interrupt Enable

pub fn xt32kerr(&mut self) -> XT32KERR_W

Bit 21 - 32.768 kHz Crystal Oscillator Error Interrupt Enable

impl W<u32, Reg<u32, _PMC_IDR>>

pub fn moscxts(&mut self) -> MOSCXTS_W

Bit 0 - Main Crystal Oscillator Status Interrupt Disable

pub fn locka(&mut self) -> LOCKA_W

Bit 1 - PLLA Lock Interrupt Disable

pub fn mckrdy(&mut self) -> MCKRDY_W

Bit 3 - Master Clock Ready Interrupt Disable

pub fn locku(&mut self) -> LOCKU_W

Bit 6 - UTMI PLL Lock Interrupt Disable

pub fn pckrdy0(&mut self) -> PCKRDY0_W

Bit 8 - Programmable Clock Ready 0 Interrupt Disable

pub fn pckrdy1(&mut self) -> PCKRDY1_W

Bit 9 - Programmable Clock Ready 1 Interrupt Disable

pub fn pckrdy2(&mut self) -> PCKRDY2_W

Bit 10 - Programmable Clock Ready 2 Interrupt Disable

pub fn pckrdy3(&mut self) -> PCKRDY3_W

Bit 11 - Programmable Clock Ready 3 Interrupt Disable

pub fn pckrdy4(&mut self) -> PCKRDY4_W

Bit 12 - Programmable Clock Ready 4 Interrupt Disable

pub fn pckrdy5(&mut self) -> PCKRDY5_W

Bit 13 - Programmable Clock Ready 5 Interrupt Disable

pub fn pckrdy6(&mut self) -> PCKRDY6_W

Bit 14 - Programmable Clock Ready 6 Interrupt Disable

pub fn pckrdy7(&mut self) -> PCKRDY7_W

Bit 15 - Programmable Clock Ready 7 Interrupt Disable

pub fn moscsels(&mut self) -> MOSCSELS_W

Bit 16 - Main Clock Source Oscillator Selection Status Interrupt Disable

pub fn moscrcs(&mut self) -> MOSCRCS_W

Bit 17 - Main RC Status Interrupt Disable

pub fn cfdev(&mut self) -> CFDEV_W

Bit 18 - Clock Failure Detector Event Interrupt Disable

pub fn xt32kerr(&mut self) -> XT32KERR_W

Bit 21 - 32.768 kHz Crystal Oscillator Error Interrupt Disable

impl W<u32, Reg<u32, _PMC_FSMR>>

pub fn fstt0(&mut self) -> FSTT0_W

Bit 0 - Fast Startup Input Enable 0

pub fn fstt1(&mut self) -> FSTT1_W

Bit 1 - Fast Startup Input Enable 1

pub fn fstt2(&mut self) -> FSTT2_W

Bit 2 - Fast Startup Input Enable 2

pub fn fstt3(&mut self) -> FSTT3_W

Bit 3 - Fast Startup Input Enable 3

pub fn fstt4(&mut self) -> FSTT4_W

Bit 4 - Fast Startup Input Enable 4

pub fn fstt5(&mut self) -> FSTT5_W

Bit 5 - Fast Startup Input Enable 5

pub fn fstt6(&mut self) -> FSTT6_W

Bit 6 - Fast Startup Input Enable 6

pub fn fstt7(&mut self) -> FSTT7_W

Bit 7 - Fast Startup Input Enable 7

pub fn fstt8(&mut self) -> FSTT8_W

Bit 8 - Fast Startup Input Enable 8

pub fn fstt9(&mut self) -> FSTT9_W

Bit 9 - Fast Startup Input Enable 9

pub fn fstt10(&mut self) -> FSTT10_W

Bit 10 - Fast Startup Input Enable 10

pub fn fstt11(&mut self) -> FSTT11_W

Bit 11 - Fast Startup Input Enable 11

pub fn fstt12(&mut self) -> FSTT12_W

Bit 12 - Fast Startup Input Enable 12

pub fn fstt13(&mut self) -> FSTT13_W

Bit 13 - Fast Startup Input Enable 13

pub fn fstt14(&mut self) -> FSTT14_W

Bit 14 - Fast Startup Input Enable 14

pub fn fstt15(&mut self) -> FSTT15_W

Bit 15 - Fast Startup Input Enable 15

pub fn rttal(&mut self) -> RTTAL_W

Bit 16 - RTT Alarm Enable

pub fn rtcal(&mut self) -> RTCAL_W

Bit 17 - RTC Alarm Enable

pub fn usbal(&mut self) -> USBAL_W

Bit 18 - USB Alarm Enable

pub fn lpm(&mut self) -> LPM_W

Bit 20 - Low-power Mode

pub fn flpm(&mut self) -> FLPM_W

Bits 21:22 - Flash Low-power Mode

pub fn fflpm(&mut self) -> FFLPM_W

Bit 23 - Force Flash Low-power Mode

impl W<u32, Reg<u32, _PMC_FSPR>>

pub fn fstp0(&mut self) -> FSTP0_W

Bit 0 - Fast Startup Input Polarity 0

pub fn fstp1(&mut self) -> FSTP1_W

Bit 1 - Fast Startup Input Polarity 1

pub fn fstp2(&mut self) -> FSTP2_W

Bit 2 - Fast Startup Input Polarity 2

pub fn fstp3(&mut self) -> FSTP3_W

Bit 3 - Fast Startup Input Polarity 3

pub fn fstp4(&mut self) -> FSTP4_W

Bit 4 - Fast Startup Input Polarity 4

pub fn fstp5(&mut self) -> FSTP5_W

Bit 5 - Fast Startup Input Polarity 5

pub fn fstp6(&mut self) -> FSTP6_W

Bit 6 - Fast Startup Input Polarity 6

pub fn fstp7(&mut self) -> FSTP7_W

Bit 7 - Fast Startup Input Polarity 7

pub fn fstp8(&mut self) -> FSTP8_W

Bit 8 - Fast Startup Input Polarity 8

pub fn fstp9(&mut self) -> FSTP9_W

Bit 9 - Fast Startup Input Polarity 9

pub fn fstp10(&mut self) -> FSTP10_W

Bit 10 - Fast Startup Input Polarity 10

pub fn fstp11(&mut self) -> FSTP11_W

Bit 11 - Fast Startup Input Polarity 11

pub fn fstp12(&mut self) -> FSTP12_W

Bit 12 - Fast Startup Input Polarity 12

pub fn fstp13(&mut self) -> FSTP13_W

Bit 13 - Fast Startup Input Polarity 13

pub fn fstp14(&mut self) -> FSTP14_W

Bit 14 - Fast Startup Input Polarity 14

pub fn fstp15(&mut self) -> FSTP15_W

Bit 15 - Fast Startup Input Polarity 15

impl W<u32, Reg<u32, _PMC_FOCR>>

pub fn foclr(&mut self) -> FOCLR_W

Bit 0 - Fault Output Clear

impl W<u32, Reg<u32, _PMC_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _PMC_PCER1>>

pub fn pid32(&mut self) -> PID32_W

Bit 0 - Peripheral Clock 32 Enable

pub fn pid33(&mut self) -> PID33_W

Bit 1 - Peripheral Clock 33 Enable

pub fn pid34(&mut self) -> PID34_W

Bit 2 - Peripheral Clock 34 Enable

pub fn pid35(&mut self) -> PID35_W

Bit 3 - Peripheral Clock 35 Enable

pub fn pid39(&mut self) -> PID39_W

Bit 7 - Peripheral Clock 39 Enable

pub fn pid40(&mut self) -> PID40_W

Bit 8 - Peripheral Clock 40 Enable

pub fn pid43(&mut self) -> PID43_W

Bit 11 - Peripheral Clock 43 Enable

pub fn pid44(&mut self) -> PID44_W

Bit 12 - Peripheral Clock 44 Enable

pub fn pid45(&mut self) -> PID45_W

Bit 13 - Peripheral Clock 45 Enable

pub fn pid46(&mut self) -> PID46_W

Bit 14 - Peripheral Clock 46 Enable

pub fn pid47(&mut self) -> PID47_W

Bit 15 - Peripheral Clock 47 Enable

pub fn pid48(&mut self) -> PID48_W

Bit 16 - Peripheral Clock 48 Enable

pub fn pid49(&mut self) -> PID49_W

Bit 17 - Peripheral Clock 49 Enable

pub fn pid50(&mut self) -> PID50_W

Bit 18 - Peripheral Clock 50 Enable

pub fn pid51(&mut self) -> PID51_W

Bit 19 - Peripheral Clock 51 Enable

pub fn pid52(&mut self) -> PID52_W

Bit 20 - Peripheral Clock 52 Enable

pub fn pid56(&mut self) -> PID56_W

Bit 24 - Peripheral Clock 56 Enable

pub fn pid57(&mut self) -> PID57_W

Bit 25 - Peripheral Clock 57 Enable

pub fn pid58(&mut self) -> PID58_W

Bit 26 - Peripheral Clock 58 Enable

pub fn pid59(&mut self) -> PID59_W

Bit 27 - Peripheral Clock 59 Enable

pub fn pid60(&mut self) -> PID60_W

Bit 28 - Peripheral Clock 60 Enable

impl W<u32, Reg<u32, _PMC_PCDR1>>

pub fn pid32(&mut self) -> PID32_W

Bit 0 - Peripheral Clock 32 Disable

pub fn pid33(&mut self) -> PID33_W

Bit 1 - Peripheral Clock 33 Disable

pub fn pid34(&mut self) -> PID34_W

Bit 2 - Peripheral Clock 34 Disable

pub fn pid35(&mut self) -> PID35_W

Bit 3 - Peripheral Clock 35 Disable

pub fn pid39(&mut self) -> PID39_W

Bit 7 - Peripheral Clock 39 Disable

pub fn pid40(&mut self) -> PID40_W

Bit 8 - Peripheral Clock 40 Disable

pub fn pid43(&mut self) -> PID43_W

Bit 11 - Peripheral Clock 43 Disable

pub fn pid44(&mut self) -> PID44_W

Bit 12 - Peripheral Clock 44 Disable

pub fn pid45(&mut self) -> PID45_W

Bit 13 - Peripheral Clock 45 Disable

pub fn pid46(&mut self) -> PID46_W

Bit 14 - Peripheral Clock 46 Disable

pub fn pid47(&mut self) -> PID47_W

Bit 15 - Peripheral Clock 47 Disable

pub fn pid48(&mut self) -> PID48_W

Bit 16 - Peripheral Clock 48 Disable

pub fn pid49(&mut self) -> PID49_W

Bit 17 - Peripheral Clock 49 Disable

pub fn pid50(&mut self) -> PID50_W

Bit 18 - Peripheral Clock 50 Disable

pub fn pid51(&mut self) -> PID51_W

Bit 19 - Peripheral Clock 51 Disable

pub fn pid52(&mut self) -> PID52_W

Bit 20 - Peripheral Clock 52 Disable

pub fn pid56(&mut self) -> PID56_W

Bit 24 - Peripheral Clock 56 Disable

pub fn pid57(&mut self) -> PID57_W

Bit 25 - Peripheral Clock 57 Disable

pub fn pid58(&mut self) -> PID58_W

Bit 26 - Peripheral Clock 58 Disable

pub fn pid59(&mut self) -> PID59_W

Bit 27 - Peripheral Clock 59 Disable

pub fn pid60(&mut self) -> PID60_W

Bit 28 - Peripheral Clock 60 Disable

impl W<u32, Reg<u32, _PMC_PCR>>

pub fn pid(&mut self) -> PID_W

Bits 0:6 - Peripheral ID

pub fn gclkcss(&mut self) -> GCLKCSS_W

Bits 8:10 - Generic Clock Source Selection

pub fn cmd(&mut self) -> CMD_W

Bit 12 - Command

pub fn gclkdiv(&mut self) -> GCLKDIV_W

Bits 20:27 - Generic Clock Division Ratio

pub fn en(&mut self) -> EN_W

Bit 28 - Enable

pub fn gclken(&mut self) -> GCLKEN_W

Bit 29 - Generic Clock Enable

impl W<u32, Reg<u32, _PMC_OCR>>

pub fn cal4(&mut self) -> CAL4_W

Bits 0:6 - Main RC Oscillator Calibration Bits for 4 MHz

pub fn sel4(&mut self) -> SEL4_W

Bit 7 - Selection of Main RC Oscillator Calibration Bits for 4 MHz

pub fn cal8(&mut self) -> CAL8_W

Bits 8:14 - Main RC Oscillator Calibration Bits for 8 MHz

pub fn sel8(&mut self) -> SEL8_W

Bit 15 - Selection of Main RC Oscillator Calibration Bits for 8 MHz

pub fn cal12(&mut self) -> CAL12_W

Bits 16:22 - Main RC Oscillator Calibration Bits for 12 MHz

pub fn sel12(&mut self) -> SEL12_W

Bit 23 - Selection of Main RC Oscillator Calibration Bits for 12 MHz

impl W<u32, Reg<u32, _PMC_SLPWK_ER0>>

pub fn pid7(&mut self) -> PID7_W

Bit 7 - Peripheral 7 SleepWalking Enable

pub fn pid8(&mut self) -> PID8_W

Bit 8 - Peripheral 8 SleepWalking Enable

pub fn pid10(&mut self) -> PID10_W

Bit 10 - Peripheral 10 SleepWalking Enable

pub fn pid11(&mut self) -> PID11_W

Bit 11 - Peripheral 11 SleepWalking Enable

pub fn pid13(&mut self) -> PID13_W

Bit 13 - Peripheral 13 SleepWalking Enable

pub fn pid14(&mut self) -> PID14_W

Bit 14 - Peripheral 14 SleepWalking Enable

pub fn pid16(&mut self) -> PID16_W

Bit 16 - Peripheral 16 SleepWalking Enable

pub fn pid19(&mut self) -> PID19_W

Bit 19 - Peripheral 19 SleepWalking Enable

pub fn pid20(&mut self) -> PID20_W

Bit 20 - Peripheral 20 SleepWalking Enable

pub fn pid22(&mut self) -> PID22_W

Bit 22 - Peripheral 22 SleepWalking Enable

pub fn pid23(&mut self) -> PID23_W

Bit 23 - Peripheral 23 SleepWalking Enable

pub fn pid24(&mut self) -> PID24_W

Bit 24 - Peripheral 24 SleepWalking Enable

pub fn pid25(&mut self) -> PID25_W

Bit 25 - Peripheral 25 SleepWalking Enable

pub fn pid26(&mut self) -> PID26_W

Bit 26 - Peripheral 26 SleepWalking Enable

pub fn pid27(&mut self) -> PID27_W

Bit 27 - Peripheral 27 SleepWalking Enable

pub fn pid28(&mut self) -> PID28_W

Bit 28 - Peripheral 28 SleepWalking Enable

pub fn pid29(&mut self) -> PID29_W

Bit 29 - Peripheral 29 SleepWalking Enable

pub fn pid30(&mut self) -> PID30_W

Bit 30 - Peripheral 30 SleepWalking Enable

pub fn pid31(&mut self) -> PID31_W

Bit 31 - Peripheral 31 SleepWalking Enable

impl W<u32, Reg<u32, _PMC_SLPWK_DR0>>

pub fn pid7(&mut self) -> PID7_W

Bit 7 - Peripheral 7 SleepWalking Disable

pub fn pid8(&mut self) -> PID8_W

Bit 8 - Peripheral 8 SleepWalking Disable

pub fn pid10(&mut self) -> PID10_W

Bit 10 - Peripheral 10 SleepWalking Disable

pub fn pid11(&mut self) -> PID11_W

Bit 11 - Peripheral 11 SleepWalking Disable

pub fn pid13(&mut self) -> PID13_W

Bit 13 - Peripheral 13 SleepWalking Disable

pub fn pid14(&mut self) -> PID14_W

Bit 14 - Peripheral 14 SleepWalking Disable

pub fn pid16(&mut self) -> PID16_W

Bit 16 - Peripheral 16 SleepWalking Disable

pub fn pid19(&mut self) -> PID19_W

Bit 19 - Peripheral 19 SleepWalking Disable

pub fn pid20(&mut self) -> PID20_W

Bit 20 - Peripheral 20 SleepWalking Disable

pub fn pid22(&mut self) -> PID22_W

Bit 22 - Peripheral 22 SleepWalking Disable

pub fn pid23(&mut self) -> PID23_W

Bit 23 - Peripheral 23 SleepWalking Disable

pub fn pid24(&mut self) -> PID24_W

Bit 24 - Peripheral 24 SleepWalking Disable

pub fn pid25(&mut self) -> PID25_W

Bit 25 - Peripheral 25 SleepWalking Disable

pub fn pid26(&mut self) -> PID26_W

Bit 26 - Peripheral 26 SleepWalking Disable

pub fn pid27(&mut self) -> PID27_W

Bit 27 - Peripheral 27 SleepWalking Disable

pub fn pid28(&mut self) -> PID28_W

Bit 28 - Peripheral 28 SleepWalking Disable

pub fn pid29(&mut self) -> PID29_W

Bit 29 - Peripheral 29 SleepWalking Disable

pub fn pid30(&mut self) -> PID30_W

Bit 30 - Peripheral 30 SleepWalking Disable

pub fn pid31(&mut self) -> PID31_W

Bit 31 - Peripheral 31 SleepWalking Disable

impl W<u32, Reg<u32, _PMC_PMMR>>

pub fn plla_mmax(&mut self) -> PLLA_MMAX_W

Bits 0:10 - PLLA Maximum Allowed Multiplier Value

impl W<u32, Reg<u32, _PMC_SLPWK_ER1>>

pub fn pid32(&mut self) -> PID32_W

Bit 0 - Peripheral 32 SleepWalking Enable

pub fn pid33(&mut self) -> PID33_W

Bit 1 - Peripheral 33 SleepWalking Enable

pub fn pid34(&mut self) -> PID34_W

Bit 2 - Peripheral 34 SleepWalking Enable

pub fn pid35(&mut self) -> PID35_W

Bit 3 - Peripheral 35 SleepWalking Enable

pub fn pid39(&mut self) -> PID39_W

Bit 7 - Peripheral 39 SleepWalking Enable

pub fn pid40(&mut self) -> PID40_W

Bit 8 - Peripheral 40 SleepWalking Enable

pub fn pid43(&mut self) -> PID43_W

Bit 11 - Peripheral 43 SleepWalking Enable

pub fn pid44(&mut self) -> PID44_W

Bit 12 - Peripheral 44 SleepWalking Enable

pub fn pid45(&mut self) -> PID45_W

Bit 13 - Peripheral 45 SleepWalking Enable

pub fn pid46(&mut self) -> PID46_W

Bit 14 - Peripheral 46 SleepWalking Enable

pub fn pid47(&mut self) -> PID47_W

Bit 15 - Peripheral 47 SleepWalking Enable

pub fn pid48(&mut self) -> PID48_W

Bit 16 - Peripheral 48 SleepWalking Enable

pub fn pid49(&mut self) -> PID49_W

Bit 17 - Peripheral 49 SleepWalking Enable

pub fn pid50(&mut self) -> PID50_W

Bit 18 - Peripheral 50 SleepWalking Enable

pub fn pid51(&mut self) -> PID51_W

Bit 19 - Peripheral 51 SleepWalking Enable

pub fn pid52(&mut self) -> PID52_W

Bit 20 - Peripheral 52 SleepWalking Enable

pub fn pid56(&mut self) -> PID56_W

Bit 24 - Peripheral 56 SleepWalking Enable

pub fn pid57(&mut self) -> PID57_W

Bit 25 - Peripheral 57 SleepWalking Enable

pub fn pid58(&mut self) -> PID58_W

Bit 26 - Peripheral 58 SleepWalking Enable

pub fn pid59(&mut self) -> PID59_W

Bit 27 - Peripheral 59 SleepWalking Enable

pub fn pid60(&mut self) -> PID60_W

Bit 28 - Peripheral 60 SleepWalking Enable

impl W<u32, Reg<u32, _PMC_SLPWK_DR1>>

pub fn pid32(&mut self) -> PID32_W

Bit 0 - Peripheral 32 SleepWalking Disable

pub fn pid33(&mut self) -> PID33_W

Bit 1 - Peripheral 33 SleepWalking Disable

pub fn pid34(&mut self) -> PID34_W

Bit 2 - Peripheral 34 SleepWalking Disable

pub fn pid35(&mut self) -> PID35_W

Bit 3 - Peripheral 35 SleepWalking Disable

pub fn pid39(&mut self) -> PID39_W

Bit 7 - Peripheral 39 SleepWalking Disable

pub fn pid40(&mut self) -> PID40_W

Bit 8 - Peripheral 40 SleepWalking Disable

pub fn pid43(&mut self) -> PID43_W

Bit 11 - Peripheral 43 SleepWalking Disable

pub fn pid44(&mut self) -> PID44_W

Bit 12 - Peripheral 44 SleepWalking Disable

pub fn pid45(&mut self) -> PID45_W

Bit 13 - Peripheral 45 SleepWalking Disable

pub fn pid46(&mut self) -> PID46_W

Bit 14 - Peripheral 46 SleepWalking Disable

pub fn pid47(&mut self) -> PID47_W

Bit 15 - Peripheral 47 SleepWalking Disable

pub fn pid48(&mut self) -> PID48_W

Bit 16 - Peripheral 48 SleepWalking Disable

pub fn pid49(&mut self) -> PID49_W

Bit 17 - Peripheral 49 SleepWalking Disable

pub fn pid50(&mut self) -> PID50_W

Bit 18 - Peripheral 50 SleepWalking Disable

pub fn pid51(&mut self) -> PID51_W

Bit 19 - Peripheral 51 SleepWalking Disable

pub fn pid52(&mut self) -> PID52_W

Bit 20 - Peripheral 52 SleepWalking Disable

pub fn pid56(&mut self) -> PID56_W

Bit 24 - Peripheral 56 SleepWalking Disable

pub fn pid57(&mut self) -> PID57_W

Bit 25 - Peripheral 57 SleepWalking Disable

pub fn pid58(&mut self) -> PID58_W

Bit 26 - Peripheral 58 SleepWalking Disable

pub fn pid59(&mut self) -> PID59_W

Bit 27 - Peripheral 59 SleepWalking Disable

pub fn pid60(&mut self) -> PID60_W

Bit 28 - Peripheral 60 SleepWalking Disable

impl W<u32, Reg<u32, _PWM_CMPV>>

pub fn cv(&mut self) -> CV_W

Bits 0:23 - Comparison x Value

pub fn cvm(&mut self) -> CVM_W

Bit 24 - Comparison x Value Mode

impl W<u32, Reg<u32, _PWM_CMPVUPD>>

pub fn cvupd(&mut self) -> CVUPD_W

Bits 0:23 - Comparison x Value Update

pub fn cvmupd(&mut self) -> CVMUPD_W

Bit 24 - Comparison x Value Mode Update

impl W<u32, Reg<u32, _PWM_CMPM>>

pub fn cen(&mut self) -> CEN_W

Bit 0 - Comparison x Enable

pub fn ctr(&mut self) -> CTR_W

Bits 4:7 - Comparison x Trigger

pub fn cpr(&mut self) -> CPR_W

Bits 8:11 - Comparison x Period

pub fn cprcnt(&mut self) -> CPRCNT_W

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&mut self) -> CUPR_W

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&mut self) -> CUPRCNT_W

Bits 20:23 - Comparison x Update Period Counter

impl W<u32, Reg<u32, _PWM_CMPMUPD>>

pub fn cenupd(&mut self) -> CENUPD_W

Bit 0 - Comparison x Enable Update

pub fn ctrupd(&mut self) -> CTRUPD_W

Bits 4:7 - Comparison x Trigger Update

pub fn cprupd(&mut self) -> CPRUPD_W

Bits 8:11 - Comparison x Period Update

pub fn cuprupd(&mut self) -> CUPRUPD_W

Bits 16:19 - Comparison x Update Period Update

impl W<u32, Reg<u32, _PWM_CMR>>

pub fn cpre(&mut self) -> CPRE_W

Bits 0:3 - Channel Pre-scaler

pub fn calg(&mut self) -> CALG_W

Bit 8 - Channel Alignment

pub fn cpol(&mut self) -> CPOL_W

Bit 9 - Channel Polarity

pub fn ces(&mut self) -> CES_W

Bit 10 - Counter Event Selection

pub fn upds(&mut self) -> UPDS_W

Bit 11 - Update Selection

pub fn dpoli(&mut self) -> DPOLI_W

Bit 12 - Disabled Polarity Inverted

pub fn tcts(&mut self) -> TCTS_W

Bit 13 - Timer Counter Trigger Selection

pub fn dte(&mut self) -> DTE_W

Bit 16 - Dead-Time Generator Enable

pub fn dthi(&mut self) -> DTHI_W

Bit 17 - Dead-Time PWMHx Output Inverted

pub fn dtli(&mut self) -> DTLI_W

Bit 18 - Dead-Time PWMLx Output Inverted

pub fn ppm(&mut self) -> PPM_W

Bit 19 - Push-Pull Mode

impl W<u32, Reg<u32, _PWM_CDTY>>

pub fn cdty(&mut self) -> CDTY_W

Bits 0:23 - Channel Duty-Cycle

impl W<u32, Reg<u32, _PWM_CDTYUPD>>

pub fn cdtyupd(&mut self) -> CDTYUPD_W

Bits 0:23 - Channel Duty-Cycle Update

impl W<u32, Reg<u32, _PWM_CPRD>>

pub fn cprd(&mut self) -> CPRD_W

Bits 0:23 - Channel Period

impl W<u32, Reg<u32, _PWM_CPRDUPD>>

pub fn cprdupd(&mut self) -> CPRDUPD_W

Bits 0:23 - Channel Period Update

impl W<u32, Reg<u32, _PWM_DT>>

pub fn dth(&mut self) -> DTH_W

Bits 0:15 - Dead-Time Value for PWMHx Output

pub fn dtl(&mut self) -> DTL_W

Bits 16:31 - Dead-Time Value for PWMLx Output

impl W<u32, Reg<u32, _PWM_DTUPD>>

pub fn dthupd(&mut self) -> DTHUPD_W

Bits 0:15 - Dead-Time Value Update for PWMHx Output

pub fn dtlupd(&mut self) -> DTLUPD_W

Bits 16:31 - Dead-Time Value Update for PWMLx Output

impl W<u32, Reg<u32, _PWM_CLK>>

pub fn diva(&mut self) -> DIVA_W

Bits 0:7 - CLKA Divide Factor

pub fn prea(&mut self) -> PREA_W

Bits 8:11 - CLKA Source Clock Selection

pub fn divb(&mut self) -> DIVB_W

Bits 16:23 - CLKB Divide Factor

pub fn preb(&mut self) -> PREB_W

Bits 24:27 - CLKB Source Clock Selection

impl W<u32, Reg<u32, _PWM_ENA>>

pub fn chid0(&mut self) -> CHID0_W

Bit 0 - Channel ID

pub fn chid1(&mut self) -> CHID1_W

Bit 1 - Channel ID

pub fn chid2(&mut self) -> CHID2_W

Bit 2 - Channel ID

pub fn chid3(&mut self) -> CHID3_W

Bit 3 - Channel ID

impl W<u32, Reg<u32, _PWM_DIS>>

pub fn chid0(&mut self) -> CHID0_W

Bit 0 - Channel ID

pub fn chid1(&mut self) -> CHID1_W

Bit 1 - Channel ID

pub fn chid2(&mut self) -> CHID2_W

Bit 2 - Channel ID

pub fn chid3(&mut self) -> CHID3_W

Bit 3 - Channel ID

impl W<u32, Reg<u32, _PWM_IER1>>

pub fn chid0(&mut self) -> CHID0_W

Bit 0 - Counter Event on Channel 0 Interrupt Enable

pub fn chid1(&mut self) -> CHID1_W

Bit 1 - Counter Event on Channel 1 Interrupt Enable

pub fn chid2(&mut self) -> CHID2_W

Bit 2 - Counter Event on Channel 2 Interrupt Enable

pub fn chid3(&mut self) -> CHID3_W

Bit 3 - Counter Event on Channel 3 Interrupt Enable

pub fn fchid0(&mut self) -> FCHID0_W

Bit 16 - Fault Protection Trigger on Channel 0 Interrupt Enable

pub fn fchid1(&mut self) -> FCHID1_W

Bit 17 - Fault Protection Trigger on Channel 1 Interrupt Enable

pub fn fchid2(&mut self) -> FCHID2_W

Bit 18 - Fault Protection Trigger on Channel 2 Interrupt Enable

pub fn fchid3(&mut self) -> FCHID3_W

Bit 19 - Fault Protection Trigger on Channel 3 Interrupt Enable

impl W<u32, Reg<u32, _PWM_IDR1>>

pub fn chid0(&mut self) -> CHID0_W

Bit 0 - Counter Event on Channel 0 Interrupt Disable

pub fn chid1(&mut self) -> CHID1_W

Bit 1 - Counter Event on Channel 1 Interrupt Disable

pub fn chid2(&mut self) -> CHID2_W

Bit 2 - Counter Event on Channel 2 Interrupt Disable

pub fn chid3(&mut self) -> CHID3_W

Bit 3 - Counter Event on Channel 3 Interrupt Disable

pub fn fchid0(&mut self) -> FCHID0_W

Bit 16 - Fault Protection Trigger on Channel 0 Interrupt Disable

pub fn fchid1(&mut self) -> FCHID1_W

Bit 17 - Fault Protection Trigger on Channel 1 Interrupt Disable

pub fn fchid2(&mut self) -> FCHID2_W

Bit 18 - Fault Protection Trigger on Channel 2 Interrupt Disable

pub fn fchid3(&mut self) -> FCHID3_W

Bit 19 - Fault Protection Trigger on Channel 3 Interrupt Disable

impl W<u32, Reg<u32, _PWM_SCM>>

pub fn sync0(&mut self) -> SYNC0_W

Bit 0 - Synchronous Channel 0

pub fn sync1(&mut self) -> SYNC1_W

Bit 1 - Synchronous Channel 1

pub fn sync2(&mut self) -> SYNC2_W

Bit 2 - Synchronous Channel 2

pub fn sync3(&mut self) -> SYNC3_W

Bit 3 - Synchronous Channel 3

pub fn updm(&mut self) -> UPDM_W

Bits 16:17 - Synchronous Channels Update Mode

pub fn ptrm(&mut self) -> PTRM_W

Bit 20 - DMA Controller Transfer Request Mode

pub fn ptrcs(&mut self) -> PTRCS_W

Bits 21:23 - DMA Controller Transfer Request Comparison Selection

impl W<u32, Reg<u32, _PWM_DMAR>>

pub fn dmaduty(&mut self) -> DMADUTY_W

Bits 0:23 - Duty-Cycle Holding Register for DMA Access

impl W<u32, Reg<u32, _PWM_SCUC>>

pub fn updulock(&mut self) -> UPDULOCK_W

Bit 0 - Synchronous Channels Update Unlock

impl W<u32, Reg<u32, _PWM_SCUP>>

pub fn upr(&mut self) -> UPR_W

Bits 0:3 - Update Period

pub fn uprcnt(&mut self) -> UPRCNT_W

Bits 4:7 - Update Period Counter

impl W<u32, Reg<u32, _PWM_SCUPUPD>>

pub fn uprupd(&mut self) -> UPRUPD_W

Bits 0:3 - Update Period Update

impl W<u32, Reg<u32, _PWM_IER2>>

pub fn wrdy(&mut self) -> WRDY_W

Bit 0 - Write Ready for Synchronous Channels Update Interrupt Enable

pub fn unre(&mut self) -> UNRE_W

Bit 3 - Synchronous Channels Update Underrun Error Interrupt Enable

pub fn cmpm0(&mut self) -> CMPM0_W

Bit 8 - Comparison 0 Match Interrupt Enable

pub fn cmpm1(&mut self) -> CMPM1_W

Bit 9 - Comparison 1 Match Interrupt Enable

pub fn cmpm2(&mut self) -> CMPM2_W

Bit 10 - Comparison 2 Match Interrupt Enable

pub fn cmpm3(&mut self) -> CMPM3_W

Bit 11 - Comparison 3 Match Interrupt Enable

pub fn cmpm4(&mut self) -> CMPM4_W

Bit 12 - Comparison 4 Match Interrupt Enable

pub fn cmpm5(&mut self) -> CMPM5_W

Bit 13 - Comparison 5 Match Interrupt Enable

pub fn cmpm6(&mut self) -> CMPM6_W

Bit 14 - Comparison 6 Match Interrupt Enable

pub fn cmpm7(&mut self) -> CMPM7_W

Bit 15 - Comparison 7 Match Interrupt Enable

pub fn cmpu0(&mut self) -> CMPU0_W

Bit 16 - Comparison 0 Update Interrupt Enable

pub fn cmpu1(&mut self) -> CMPU1_W

Bit 17 - Comparison 1 Update Interrupt Enable

pub fn cmpu2(&mut self) -> CMPU2_W

Bit 18 - Comparison 2 Update Interrupt Enable

pub fn cmpu3(&mut self) -> CMPU3_W

Bit 19 - Comparison 3 Update Interrupt Enable

pub fn cmpu4(&mut self) -> CMPU4_W

Bit 20 - Comparison 4 Update Interrupt Enable

pub fn cmpu5(&mut self) -> CMPU5_W

Bit 21 - Comparison 5 Update Interrupt Enable

pub fn cmpu6(&mut self) -> CMPU6_W

Bit 22 - Comparison 6 Update Interrupt Enable

pub fn cmpu7(&mut self) -> CMPU7_W

Bit 23 - Comparison 7 Update Interrupt Enable

impl W<u32, Reg<u32, _PWM_IDR2>>

pub fn wrdy(&mut self) -> WRDY_W

Bit 0 - Write Ready for Synchronous Channels Update Interrupt Disable

pub fn unre(&mut self) -> UNRE_W

Bit 3 - Synchronous Channels Update Underrun Error Interrupt Disable

pub fn cmpm0(&mut self) -> CMPM0_W

Bit 8 - Comparison 0 Match Interrupt Disable

pub fn cmpm1(&mut self) -> CMPM1_W

Bit 9 - Comparison 1 Match Interrupt Disable

pub fn cmpm2(&mut self) -> CMPM2_W

Bit 10 - Comparison 2 Match Interrupt Disable

pub fn cmpm3(&mut self) -> CMPM3_W

Bit 11 - Comparison 3 Match Interrupt Disable

pub fn cmpm4(&mut self) -> CMPM4_W

Bit 12 - Comparison 4 Match Interrupt Disable

pub fn cmpm5(&mut self) -> CMPM5_W

Bit 13 - Comparison 5 Match Interrupt Disable

pub fn cmpm6(&mut self) -> CMPM6_W

Bit 14 - Comparison 6 Match Interrupt Disable

pub fn cmpm7(&mut self) -> CMPM7_W

Bit 15 - Comparison 7 Match Interrupt Disable

pub fn cmpu0(&mut self) -> CMPU0_W

Bit 16 - Comparison 0 Update Interrupt Disable

pub fn cmpu1(&mut self) -> CMPU1_W

Bit 17 - Comparison 1 Update Interrupt Disable

pub fn cmpu2(&mut self) -> CMPU2_W

Bit 18 - Comparison 2 Update Interrupt Disable

pub fn cmpu3(&mut self) -> CMPU3_W

Bit 19 - Comparison 3 Update Interrupt Disable

pub fn cmpu4(&mut self) -> CMPU4_W

Bit 20 - Comparison 4 Update Interrupt Disable

pub fn cmpu5(&mut self) -> CMPU5_W

Bit 21 - Comparison 5 Update Interrupt Disable

pub fn cmpu6(&mut self) -> CMPU6_W

Bit 22 - Comparison 6 Update Interrupt Disable

pub fn cmpu7(&mut self) -> CMPU7_W

Bit 23 - Comparison 7 Update Interrupt Disable

impl W<u32, Reg<u32, _PWM_OOV>>

pub fn oovh0(&mut self) -> OOVH0_W

Bit 0 - Output Override Value for PWMH output of the channel 0

pub fn oovh1(&mut self) -> OOVH1_W

Bit 1 - Output Override Value for PWMH output of the channel 1

pub fn oovh2(&mut self) -> OOVH2_W

Bit 2 - Output Override Value for PWMH output of the channel 2

pub fn oovh3(&mut self) -> OOVH3_W

Bit 3 - Output Override Value for PWMH output of the channel 3

pub fn oovl0(&mut self) -> OOVL0_W

Bit 16 - Output Override Value for PWML output of the channel 0

pub fn oovl1(&mut self) -> OOVL1_W

Bit 17 - Output Override Value for PWML output of the channel 1

pub fn oovl2(&mut self) -> OOVL2_W

Bit 18 - Output Override Value for PWML output of the channel 2

pub fn oovl3(&mut self) -> OOVL3_W

Bit 19 - Output Override Value for PWML output of the channel 3

impl W<u32, Reg<u32, _PWM_OS>>

pub fn osh0(&mut self) -> OSH0_W

Bit 0 - Output Selection for PWMH output of the channel 0

pub fn osh1(&mut self) -> OSH1_W

Bit 1 - Output Selection for PWMH output of the channel 1

pub fn osh2(&mut self) -> OSH2_W

Bit 2 - Output Selection for PWMH output of the channel 2

pub fn osh3(&mut self) -> OSH3_W

Bit 3 - Output Selection for PWMH output of the channel 3

pub fn osl0(&mut self) -> OSL0_W

Bit 16 - Output Selection for PWML output of the channel 0

pub fn osl1(&mut self) -> OSL1_W

Bit 17 - Output Selection for PWML output of the channel 1

pub fn osl2(&mut self) -> OSL2_W

Bit 18 - Output Selection for PWML output of the channel 2

pub fn osl3(&mut self) -> OSL3_W

Bit 19 - Output Selection for PWML output of the channel 3

impl W<u32, Reg<u32, _PWM_OSS>>

pub fn ossh0(&mut self) -> OSSH0_W

Bit 0 - Output Selection Set for PWMH output of the channel 0

pub fn ossh1(&mut self) -> OSSH1_W

Bit 1 - Output Selection Set for PWMH output of the channel 1

pub fn ossh2(&mut self) -> OSSH2_W

Bit 2 - Output Selection Set for PWMH output of the channel 2

pub fn ossh3(&mut self) -> OSSH3_W

Bit 3 - Output Selection Set for PWMH output of the channel 3

pub fn ossl0(&mut self) -> OSSL0_W

Bit 16 - Output Selection Set for PWML output of the channel 0

pub fn ossl1(&mut self) -> OSSL1_W

Bit 17 - Output Selection Set for PWML output of the channel 1

pub fn ossl2(&mut self) -> OSSL2_W

Bit 18 - Output Selection Set for PWML output of the channel 2

pub fn ossl3(&mut self) -> OSSL3_W

Bit 19 - Output Selection Set for PWML output of the channel 3

impl W<u32, Reg<u32, _PWM_OSC>>

pub fn osch0(&mut self) -> OSCH0_W

Bit 0 - Output Selection Clear for PWMH output of the channel 0

pub fn osch1(&mut self) -> OSCH1_W

Bit 1 - Output Selection Clear for PWMH output of the channel 1

pub fn osch2(&mut self) -> OSCH2_W

Bit 2 - Output Selection Clear for PWMH output of the channel 2

pub fn osch3(&mut self) -> OSCH3_W

Bit 3 - Output Selection Clear for PWMH output of the channel 3

pub fn oscl0(&mut self) -> OSCL0_W

Bit 16 - Output Selection Clear for PWML output of the channel 0

pub fn oscl1(&mut self) -> OSCL1_W

Bit 17 - Output Selection Clear for PWML output of the channel 1

pub fn oscl2(&mut self) -> OSCL2_W

Bit 18 - Output Selection Clear for PWML output of the channel 2

pub fn oscl3(&mut self) -> OSCL3_W

Bit 19 - Output Selection Clear for PWML output of the channel 3

impl W<u32, Reg<u32, _PWM_OSSUPD>>

pub fn ossuph0(&mut self) -> OSSUPH0_W

Bit 0 - Output Selection Set for PWMH output of the channel 0

pub fn ossuph1(&mut self) -> OSSUPH1_W

Bit 1 - Output Selection Set for PWMH output of the channel 1

pub fn ossuph2(&mut self) -> OSSUPH2_W

Bit 2 - Output Selection Set for PWMH output of the channel 2

pub fn ossuph3(&mut self) -> OSSUPH3_W

Bit 3 - Output Selection Set for PWMH output of the channel 3

pub fn ossupl0(&mut self) -> OSSUPL0_W

Bit 16 - Output Selection Set for PWML output of the channel 0

pub fn ossupl1(&mut self) -> OSSUPL1_W

Bit 17 - Output Selection Set for PWML output of the channel 1

pub fn ossupl2(&mut self) -> OSSUPL2_W

Bit 18 - Output Selection Set for PWML output of the channel 2

pub fn ossupl3(&mut self) -> OSSUPL3_W

Bit 19 - Output Selection Set for PWML output of the channel 3

impl W<u32, Reg<u32, _PWM_OSCUPD>>

pub fn oscuph0(&mut self) -> OSCUPH0_W

Bit 0 - Output Selection Clear for PWMH output of the channel 0

pub fn oscuph1(&mut self) -> OSCUPH1_W

Bit 1 - Output Selection Clear for PWMH output of the channel 1

pub fn oscuph2(&mut self) -> OSCUPH2_W

Bit 2 - Output Selection Clear for PWMH output of the channel 2

pub fn oscuph3(&mut self) -> OSCUPH3_W

Bit 3 - Output Selection Clear for PWMH output of the channel 3

pub fn oscupl0(&mut self) -> OSCUPL0_W

Bit 16 - Output Selection Clear for PWML output of the channel 0

pub fn oscupl1(&mut self) -> OSCUPL1_W

Bit 17 - Output Selection Clear for PWML output of the channel 1

pub fn oscupl2(&mut self) -> OSCUPL2_W

Bit 18 - Output Selection Clear for PWML output of the channel 2

pub fn oscupl3(&mut self) -> OSCUPL3_W

Bit 19 - Output Selection Clear for PWML output of the channel 3

impl W<u32, Reg<u32, _PWM_FMR>>

pub fn fpol(&mut self) -> FPOL_W

Bits 0:7 - Fault Polarity

pub fn fmod(&mut self) -> FMOD_W

Bits 8:15 - Fault Activation Mode

pub fn ffil(&mut self) -> FFIL_W

Bits 16:23 - Fault Filtering

impl W<u32, Reg<u32, _PWM_FCR>>

pub fn fclr(&mut self) -> FCLR_W

Bits 0:7 - Fault Clear

impl W<u32, Reg<u32, _PWM_FPV1>>

pub fn fpvh0(&mut self) -> FPVH0_W

Bit 0 - Fault Protection Value for PWMH output on channel 0

pub fn fpvh1(&mut self) -> FPVH1_W

Bit 1 - Fault Protection Value for PWMH output on channel 1

pub fn fpvh2(&mut self) -> FPVH2_W

Bit 2 - Fault Protection Value for PWMH output on channel 2

pub fn fpvh3(&mut self) -> FPVH3_W

Bit 3 - Fault Protection Value for PWMH output on channel 3

pub fn fpvl0(&mut self) -> FPVL0_W

Bit 16 - Fault Protection Value for PWML output on channel 0

pub fn fpvl1(&mut self) -> FPVL1_W

Bit 17 - Fault Protection Value for PWML output on channel 1

pub fn fpvl2(&mut self) -> FPVL2_W

Bit 18 - Fault Protection Value for PWML output on channel 2

pub fn fpvl3(&mut self) -> FPVL3_W

Bit 19 - Fault Protection Value for PWML output on channel 3

impl W<u32, Reg<u32, _PWM_FPE>>

pub fn fpe0(&mut self) -> FPE0_W

Bits 0:7 - Fault Protection Enable for channel 0

pub fn fpe1(&mut self) -> FPE1_W

Bits 8:15 - Fault Protection Enable for channel 1

pub fn fpe2(&mut self) -> FPE2_W

Bits 16:23 - Fault Protection Enable for channel 2

pub fn fpe3(&mut self) -> FPE3_W

Bits 24:31 - Fault Protection Enable for channel 3

impl W<u32, Reg<u32, _PWM_ELMR>>

pub fn csel0(&mut self) -> CSEL0_W

Bit 0 - Comparison 0 Selection

pub fn csel1(&mut self) -> CSEL1_W

Bit 1 - Comparison 1 Selection

pub fn csel2(&mut self) -> CSEL2_W

Bit 2 - Comparison 2 Selection

pub fn csel3(&mut self) -> CSEL3_W

Bit 3 - Comparison 3 Selection

pub fn csel4(&mut self) -> CSEL4_W

Bit 4 - Comparison 4 Selection

pub fn csel5(&mut self) -> CSEL5_W

Bit 5 - Comparison 5 Selection

pub fn csel6(&mut self) -> CSEL6_W

Bit 6 - Comparison 6 Selection

pub fn csel7(&mut self) -> CSEL7_W

Bit 7 - Comparison 7 Selection

impl W<u32, Reg<u32, _PWM_SSPR>>

pub fn sprd(&mut self) -> SPRD_W

Bits 0:23 - Spread Spectrum Limit Value

pub fn sprdm(&mut self) -> SPRDM_W

Bit 24 - Spread Spectrum Counter Mode

impl W<u32, Reg<u32, _PWM_SSPUP>>

pub fn sprdup(&mut self) -> SPRDUP_W

Bits 0:23 - Spread Spectrum Limit Value Update

impl W<u32, Reg<u32, _PWM_SMMR>>

pub fn gcen0(&mut self) -> GCEN0_W

Bit 0 - Gray Count ENable

pub fn gcen1(&mut self) -> GCEN1_W

Bit 1 - Gray Count ENable

pub fn down0(&mut self) -> DOWN0_W

Bit 16 - DOWN Count

pub fn down1(&mut self) -> DOWN1_W

Bit 17 - DOWN Count

impl W<u32, Reg<u32, _PWM_FPV2>>

pub fn fpzh0(&mut self) -> FPZH0_W

Bit 0 - Fault Protection to Hi-Z for PWMH output on channel 0

pub fn fpzh1(&mut self) -> FPZH1_W

Bit 1 - Fault Protection to Hi-Z for PWMH output on channel 1

pub fn fpzh2(&mut self) -> FPZH2_W

Bit 2 - Fault Protection to Hi-Z for PWMH output on channel 2

pub fn fpzh3(&mut self) -> FPZH3_W

Bit 3 - Fault Protection to Hi-Z for PWMH output on channel 3

pub fn fpzl0(&mut self) -> FPZL0_W

Bit 16 - Fault Protection to Hi-Z for PWML output on channel 0

pub fn fpzl1(&mut self) -> FPZL1_W

Bit 17 - Fault Protection to Hi-Z for PWML output on channel 1

pub fn fpzl2(&mut self) -> FPZL2_W

Bit 18 - Fault Protection to Hi-Z for PWML output on channel 2

pub fn fpzl3(&mut self) -> FPZL3_W

Bit 19 - Fault Protection to Hi-Z for PWML output on channel 3

impl W<u32, Reg<u32, _PWM_WPCR>>

pub fn wpcmd(&mut self) -> WPCMD_W

Bits 0:1 - Write Protection Command

pub fn wprg0(&mut self) -> WPRG0_W

Bit 2 - Write Protection Register Group 0

pub fn wprg1(&mut self) -> WPRG1_W

Bit 3 - Write Protection Register Group 1

pub fn wprg2(&mut self) -> WPRG2_W

Bit 4 - Write Protection Register Group 2

pub fn wprg3(&mut self) -> WPRG3_W

Bit 5 - Write Protection Register Group 3

pub fn wprg4(&mut self) -> WPRG4_W

Bit 6 - Write Protection Register Group 4

pub fn wprg5(&mut self) -> WPRG5_W

Bit 7 - Write Protection Register Group 5

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _PWM_CMUPD0>>

pub fn cpolup(&mut self) -> CPOLUP_W

Bit 9 - Channel Polarity Update

pub fn cpolinvup(&mut self) -> CPOLINVUP_W

Bit 13 - Channel Polarity Inversion Update

impl W<u32, Reg<u32, _PWM_CMUPD1>>

pub fn cpolup(&mut self) -> CPOLUP_W

Bit 9 - Channel Polarity Update

pub fn cpolinvup(&mut self) -> CPOLINVUP_W

Bit 13 - Channel Polarity Inversion Update

impl W<u32, Reg<u32, _PWM_ETRG1>>

pub fn maxcnt(&mut self) -> MAXCNT_W

Bits 0:23 - Maximum Counter value

pub fn trgmode(&mut self) -> TRGMODE_W

Bits 24:25 - External Trigger Mode

pub fn trgedge(&mut self) -> TRGEDGE_W

Bit 28 - Edge Selection

pub fn trgfilt(&mut self) -> TRGFILT_W

Bit 29 - Filtered input

pub fn trgsrc(&mut self) -> TRGSRC_W

Bit 30 - Trigger Source

pub fn rfen(&mut self) -> RFEN_W

Bit 31 - Recoverable Fault Enable

impl W<u32, Reg<u32, _PWM_LEBR1>>

pub fn lebdelay(&mut self) -> LEBDELAY_W

Bits 0:6 - Leading-Edge Blanking Delay for TRGINx

pub fn pwmlfen(&mut self) -> PWMLFEN_W

Bit 16 - PWML Falling Edge Enable

pub fn pwmlren(&mut self) -> PWMLREN_W

Bit 17 - PWML Rising Edge Enable

pub fn pwmhfen(&mut self) -> PWMHFEN_W

Bit 18 - PWMH Falling Edge Enable

pub fn pwmhren(&mut self) -> PWMHREN_W

Bit 19 - PWMH Rising Edge Enable

impl W<u32, Reg<u32, _PWM_CMUPD2>>

pub fn cpolup(&mut self) -> CPOLUP_W

Bit 9 - Channel Polarity Update

pub fn cpolinvup(&mut self) -> CPOLINVUP_W

Bit 13 - Channel Polarity Inversion Update

impl W<u32, Reg<u32, _PWM_ETRG2>>

pub fn maxcnt(&mut self) -> MAXCNT_W

Bits 0:23 - Maximum Counter value

pub fn trgmode(&mut self) -> TRGMODE_W

Bits 24:25 - External Trigger Mode

pub fn trgedge(&mut self) -> TRGEDGE_W

Bit 28 - Edge Selection

pub fn trgfilt(&mut self) -> TRGFILT_W

Bit 29 - Filtered input

pub fn trgsrc(&mut self) -> TRGSRC_W

Bit 30 - Trigger Source

pub fn rfen(&mut self) -> RFEN_W

Bit 31 - Recoverable Fault Enable

impl W<u32, Reg<u32, _PWM_LEBR2>>

pub fn lebdelay(&mut self) -> LEBDELAY_W

Bits 0:6 - Leading-Edge Blanking Delay for TRGINx

pub fn pwmlfen(&mut self) -> PWMLFEN_W

Bit 16 - PWML Falling Edge Enable

pub fn pwmlren(&mut self) -> PWMLREN_W

Bit 17 - PWML Rising Edge Enable

pub fn pwmhfen(&mut self) -> PWMHFEN_W

Bit 18 - PWMH Falling Edge Enable

pub fn pwmhren(&mut self) -> PWMHREN_W

Bit 19 - PWMH Rising Edge Enable

impl W<u32, Reg<u32, _PWM_CMUPD3>>

pub fn cpolup(&mut self) -> CPOLUP_W

Bit 9 - Channel Polarity Update

pub fn cpolinvup(&mut self) -> CPOLINVUP_W

Bit 13 - Channel Polarity Inversion Update

impl W<u32, Reg<u32, _QSPI_CR>>

pub fn qspien(&mut self) -> QSPIEN_W

Bit 0 - QSPI Enable

pub fn qspidis(&mut self) -> QSPIDIS_W

Bit 1 - QSPI Disable

pub fn swrst(&mut self) -> SWRST_W

Bit 7 - QSPI Software Reset

pub fn lastxfer(&mut self) -> LASTXFER_W

Bit 24 - Last Transfer

impl W<u32, Reg<u32, _QSPI_MR>>

pub fn smm(&mut self) -> SMM_W

Bit 0 - Serial Memory Mode

pub fn llb(&mut self) -> LLB_W

Bit 1 - Local Loopback Enable

pub fn wdrbt(&mut self) -> WDRBT_W

Bit 2 - Wait Data Read Before Transfer

pub fn csmode(&mut self) -> CSMODE_W

Bits 4:5 - Chip Select Mode

pub fn nbbits(&mut self) -> NBBITS_W

Bits 8:11 - Number Of Bits Per Transfer

pub fn dlybct(&mut self) -> DLYBCT_W

Bits 16:23 - Delay Between Consecutive Transfers

pub fn dlycs(&mut self) -> DLYCS_W

Bits 24:31 - Minimum Inactive QCS Delay

impl W<u32, Reg<u32, _QSPI_TDR>>

pub fn td(&mut self) -> TD_W

Bits 0:15 - Transmit Data

impl W<u32, Reg<u32, _QSPI_IER>>

pub fn rdrf(&mut self) -> RDRF_W

Bit 0 - Receive Data Register Full Interrupt Enable

pub fn tdre(&mut self) -> TDRE_W

Bit 1 - Transmit Data Register Empty Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 2 - Transmission Registers Empty Enable

pub fn ovres(&mut self) -> OVRES_W

Bit 3 - Overrun Error Interrupt Enable

pub fn csr(&mut self) -> CSR_W

Bit 8 - Chip Select Rise Interrupt Enable

pub fn css(&mut self) -> CSS_W

Bit 9 - Chip Select Status Interrupt Enable

pub fn instre(&mut self) -> INSTRE_W

Bit 10 - Instruction End Interrupt Enable

impl W<u32, Reg<u32, _QSPI_IDR>>

pub fn rdrf(&mut self) -> RDRF_W

Bit 0 - Receive Data Register Full Interrupt Disable

pub fn tdre(&mut self) -> TDRE_W

Bit 1 - Transmit Data Register Empty Interrupt Disable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 2 - Transmission Registers Empty Disable

pub fn ovres(&mut self) -> OVRES_W

Bit 3 - Overrun Error Interrupt Disable

pub fn csr(&mut self) -> CSR_W

Bit 8 - Chip Select Rise Interrupt Disable

pub fn css(&mut self) -> CSS_W

Bit 9 - Chip Select Status Interrupt Disable

pub fn instre(&mut self) -> INSTRE_W

Bit 10 - Instruction End Interrupt Disable

impl W<u32, Reg<u32, _QSPI_SCR>>

pub fn cpol(&mut self) -> CPOL_W

Bit 0 - Clock Polarity

pub fn cpha(&mut self) -> CPHA_W

Bit 1 - Clock Phase

pub fn scbr(&mut self) -> SCBR_W

Bits 8:15 - Serial Clock Baud Rate

pub fn dlybs(&mut self) -> DLYBS_W

Bits 16:23 - Delay Before QSCK

impl W<u32, Reg<u32, _QSPI_IAR>>

pub fn addr(&mut self) -> ADDR_W

Bits 0:31 - Address

impl W<u32, Reg<u32, _QSPI_ICR>>

pub fn inst(&mut self) -> INST_W

Bits 0:7 - Instruction Code

pub fn opt(&mut self) -> OPT_W

Bits 16:23 - Option Code

impl W<u32, Reg<u32, _QSPI_IFR>>

pub fn width(&mut self) -> WIDTH_W

Bits 0:2 - Width of Instruction Code, Address, Option Code and Data

pub fn insten(&mut self) -> INSTEN_W

Bit 4 - Instruction Enable

pub fn addren(&mut self) -> ADDREN_W

Bit 5 - Address Enable

pub fn opten(&mut self) -> OPTEN_W

Bit 6 - Option Enable

pub fn dataen(&mut self) -> DATAEN_W

Bit 7 - Data Enable

pub fn optl(&mut self) -> OPTL_W

Bits 8:9 - Option Code Length

pub fn addrl(&mut self) -> ADDRL_W

Bit 10 - Address Length

pub fn tfrtyp(&mut self) -> TFRTYP_W

Bits 12:13 - Data Transfer Type

pub fn crm(&mut self) -> CRM_W

Bit 14 - Continuous Read Mode

pub fn nbdum(&mut self) -> NBDUM_W

Bits 16:20 - Number Of Dummy Cycles

impl W<u32, Reg<u32, _QSPI_SMR>>

pub fn scren(&mut self) -> SCREN_W

Bit 0 - Scrambling/Unscrambling Enable

pub fn rvdis(&mut self) -> RVDIS_W

Bit 1 - Scrambling/Unscrambling Random Value Disable

impl W<u32, Reg<u32, _QSPI_SKR>>

pub fn usrk(&mut self) -> USRK_W

Bits 0:31 - User Scrambling Key

impl W<u32, Reg<u32, _QSPI_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _RSTC_CR>>

pub fn procrst(&mut self) -> PROCRST_W

Bit 0 - Processor Reset

pub fn extrst(&mut self) -> EXTRST_W

Bit 3 - External Reset

pub fn key(&mut self) -> KEY_W

Bits 24:31 - System Reset Key

impl W<u32, Reg<u32, _RSTC_MR>>

pub fn ursten(&mut self) -> URSTEN_W

Bit 0 - User Reset Enable

pub fn urstien(&mut self) -> URSTIEN_W

Bit 4 - User Reset Interrupt Enable

pub fn erstl(&mut self) -> ERSTL_W

Bits 8:11 - External Reset Length

pub fn key(&mut self) -> KEY_W

Bits 24:31 - Write Access Password

impl W<u32, Reg<u32, _RSWDT_CR>>

pub fn wdrstt(&mut self) -> WDRSTT_W

Bit 0 - Watchdog Restart

pub fn key(&mut self) -> KEY_W

Bits 24:31 - Password

impl W<u32, Reg<u32, _RSWDT_MR>>

pub fn wdv(&mut self) -> WDV_W

Bits 0:11 - Watchdog Counter Value

pub fn wdfien(&mut self) -> WDFIEN_W

Bit 12 - Watchdog Fault Interrupt Enable

pub fn wdrsten(&mut self) -> WDRSTEN_W

Bit 13 - Watchdog Reset Enable

pub fn wddis(&mut self) -> WDDIS_W

Bit 15 - Watchdog Disable

pub fn allones(&mut self) -> ALLONES_W

Bits 16:27 - Must Always Be Written with 0xFFF

pub fn wddbghlt(&mut self) -> WDDBGHLT_W

Bit 28 - Watchdog Debug Halt

pub fn wdidlehlt(&mut self) -> WDIDLEHLT_W

Bit 29 - Watchdog Idle Halt

impl W<u32, Reg<u32, _RTC_CR>>

pub fn updtim(&mut self) -> UPDTIM_W

Bit 0 - Update Request Time Register

pub fn updcal(&mut self) -> UPDCAL_W

Bit 1 - Update Request Calendar Register

pub fn timevsel(&mut self) -> TIMEVSEL_W

Bits 8:9 - Time Event Selection

pub fn calevsel(&mut self) -> CALEVSEL_W

Bits 16:17 - Calendar Event Selection

impl W<u32, Reg<u32, _RTC_MR>>

pub fn hrmod(&mut self) -> HRMOD_W

Bit 0 - 12-/24-hour Mode

pub fn persian(&mut self) -> PERSIAN_W

Bit 1 - PERSIAN Calendar

pub fn negppm(&mut self) -> NEGPPM_W

Bit 4 - NEGative PPM Correction

pub fn correction(&mut self) -> CORRECTION_W

Bits 8:14 - Slow Clock Correction

pub fn highppm(&mut self) -> HIGHPPM_W

Bit 15 - HIGH PPM Correction

pub fn out0(&mut self) -> OUT0_W

Bits 16:18 - RTCOUT0 OutputSource Selection

pub fn out1(&mut self) -> OUT1_W

Bits 20:22 - RTCOUT1 Output Source Selection

pub fn thigh(&mut self) -> THIGH_W

Bits 24:26 - High Duration of the Output Pulse

pub fn tperiod(&mut self) -> TPERIOD_W

Bits 28:29 - Period of the Output Pulse

impl W<u32, Reg<u32, _RTC_TIMR>>

pub fn sec(&mut self) -> SEC_W

Bits 0:6 - Current Second

pub fn min(&mut self) -> MIN_W

Bits 8:14 - Current Minute

pub fn hour(&mut self) -> HOUR_W

Bits 16:21 - Current Hour

pub fn ampm(&mut self) -> AMPM_W

Bit 22 - Ante Meridiem Post Meridiem Indicator

impl W<u32, Reg<u32, _RTC_CALR>>

pub fn cent(&mut self) -> CENT_W

Bits 0:6 - Current Century

pub fn year(&mut self) -> YEAR_W

Bits 8:15 - Current Year

pub fn month(&mut self) -> MONTH_W

Bits 16:20 - Current Month

pub fn day(&mut self) -> DAY_W

Bits 21:23 - Current Day in Current Week

pub fn date(&mut self) -> DATE_W

Bits 24:29 - Current Day in Current Month

impl W<u32, Reg<u32, _RTC_TIMALR>>

pub fn sec(&mut self) -> SEC_W

Bits 0:6 - Second Alarm

pub fn secen(&mut self) -> SECEN_W

Bit 7 - Second Alarm Enable

pub fn min(&mut self) -> MIN_W

Bits 8:14 - Minute Alarm

pub fn minen(&mut self) -> MINEN_W

Bit 15 - Minute Alarm Enable

pub fn hour(&mut self) -> HOUR_W

Bits 16:21 - Hour Alarm

pub fn ampm(&mut self) -> AMPM_W

Bit 22 - AM/PM Indicator

pub fn houren(&mut self) -> HOUREN_W

Bit 23 - Hour Alarm Enable

impl W<u32, Reg<u32, _RTC_CALALR>>

pub fn month(&mut self) -> MONTH_W

Bits 16:20 - Month Alarm

pub fn mthen(&mut self) -> MTHEN_W

Bit 23 - Month Alarm Enable

pub fn date(&mut self) -> DATE_W

Bits 24:29 - Date Alarm

pub fn dateen(&mut self) -> DATEEN_W

Bit 31 - Date Alarm Enable

impl W<u32, Reg<u32, _RTC_SCCR>>

pub fn ackclr(&mut self) -> ACKCLR_W

Bit 0 - Acknowledge Clear

pub fn alrclr(&mut self) -> ALRCLR_W

Bit 1 - Alarm Clear

pub fn secclr(&mut self) -> SECCLR_W

Bit 2 - Second Clear

pub fn timclr(&mut self) -> TIMCLR_W

Bit 3 - Time Clear

pub fn calclr(&mut self) -> CALCLR_W

Bit 4 - Calendar Clear

pub fn tderrclr(&mut self) -> TDERRCLR_W

Bit 5 - Time and/or Date Free Running Error Clear

impl W<u32, Reg<u32, _RTC_IER>>

pub fn acken(&mut self) -> ACKEN_W

Bit 0 - Acknowledge Update Interrupt Enable

pub fn alren(&mut self) -> ALREN_W

Bit 1 - Alarm Interrupt Enable

pub fn secen(&mut self) -> SECEN_W

Bit 2 - Second Event Interrupt Enable

pub fn timen(&mut self) -> TIMEN_W

Bit 3 - Time Event Interrupt Enable

pub fn calen(&mut self) -> CALEN_W

Bit 4 - Calendar Event Interrupt Enable

pub fn tderren(&mut self) -> TDERREN_W

Bit 5 - Time and/or Date Error Interrupt Enable

impl W<u32, Reg<u32, _RTC_IDR>>

pub fn ackdis(&mut self) -> ACKDIS_W

Bit 0 - Acknowledge Update Interrupt Disable

pub fn alrdis(&mut self) -> ALRDIS_W

Bit 1 - Alarm Interrupt Disable

pub fn secdis(&mut self) -> SECDIS_W

Bit 2 - Second Event Interrupt Disable

pub fn timdis(&mut self) -> TIMDIS_W

Bit 3 - Time Event Interrupt Disable

pub fn caldis(&mut self) -> CALDIS_W

Bit 4 - Calendar Event Interrupt Disable

pub fn tderrdis(&mut self) -> TDERRDIS_W

Bit 5 - Time and/or Date Error Interrupt Disable

impl W<u32, Reg<u32, _RTT_MR>>

pub fn rtpres(&mut self) -> RTPRES_W

Bits 0:15 - Real-time Timer Prescaler Value

pub fn almien(&mut self) -> ALMIEN_W

Bit 16 - Alarm Interrupt Enable

pub fn rttincien(&mut self) -> RTTINCIEN_W

Bit 17 - Real-time Timer Increment Interrupt Enable

pub fn rttrst(&mut self) -> RTTRST_W

Bit 18 - Real-time Timer Restart

pub fn rttdis(&mut self) -> RTTDIS_W

Bit 20 - Real-time Timer Disable

pub fn rtc1hz(&mut self) -> RTC1HZ_W

Bit 24 - Real-Time Clock 1Hz Clock Selection

impl W<u32, Reg<u32, _RTT_AR>>

pub fn almv(&mut self) -> ALMV_W

Bits 0:31 - Alarm Value

impl W<u32, Reg<u32, _SSC_CR>>

pub fn rxen(&mut self) -> RXEN_W

Bit 0 - Receive Enable

pub fn rxdis(&mut self) -> RXDIS_W

Bit 1 - Receive Disable

pub fn txen(&mut self) -> TXEN_W

Bit 8 - Transmit Enable

pub fn txdis(&mut self) -> TXDIS_W

Bit 9 - Transmit Disable

pub fn swrst(&mut self) -> SWRST_W

Bit 15 - Software Reset

impl W<u32, Reg<u32, _SSC_CMR>>

pub fn div(&mut self) -> DIV_W

Bits 0:11 - Clock Divider

impl W<u32, Reg<u32, _SSC_RCMR>>

pub fn cks(&mut self) -> CKS_W

Bits 0:1 - Receive Clock Selection

pub fn cko(&mut self) -> CKO_W

Bits 2:4 - Receive Clock Output Mode Selection

pub fn cki(&mut self) -> CKI_W

Bit 5 - Receive Clock Inversion

pub fn ckg(&mut self) -> CKG_W

Bits 6:7 - Receive Clock Gating Selection

pub fn start(&mut self) -> START_W

Bits 8:11 - Receive Start Selection

pub fn stop(&mut self) -> STOP_W

Bit 12 - Receive Stop Selection

pub fn sttdly(&mut self) -> STTDLY_W

Bits 16:23 - Receive Start Delay

pub fn period(&mut self) -> PERIOD_W

Bits 24:31 - Receive Period Divider Selection

impl W<u32, Reg<u32, _SSC_RFMR>>

pub fn datlen(&mut self) -> DATLEN_W

Bits 0:4 - Data Length

pub fn loop_(&mut self) -> LOOP_W

Bit 5 - Loop Mode

pub fn msbf(&mut self) -> MSBF_W

Bit 7 - Most Significant Bit First

pub fn datnb(&mut self) -> DATNB_W

Bits 8:11 - Data Number per Frame

pub fn fslen(&mut self) -> FSLEN_W

Bits 16:19 - Receive Frame Sync Length

pub fn fsos(&mut self) -> FSOS_W

Bits 20:22 - Receive Frame Sync Output Selection

pub fn fsedge(&mut self) -> FSEDGE_W

Bit 24 - Frame Sync Edge Detection

pub fn fslen_ext(&mut self) -> FSLEN_EXT_W

Bits 28:31 - FSLEN Field Extension

impl W<u32, Reg<u32, _SSC_TCMR>>

pub fn cks(&mut self) -> CKS_W

Bits 0:1 - Transmit Clock Selection

pub fn cko(&mut self) -> CKO_W

Bits 2:4 - Transmit Clock Output Mode Selection

pub fn cki(&mut self) -> CKI_W

Bit 5 - Transmit Clock Inversion

pub fn ckg(&mut self) -> CKG_W

Bits 6:7 - Transmit Clock Gating Selection

pub fn start(&mut self) -> START_W

Bits 8:11 - Transmit Start Selection

pub fn sttdly(&mut self) -> STTDLY_W

Bits 16:23 - Transmit Start Delay

pub fn period(&mut self) -> PERIOD_W

Bits 24:31 - Transmit Period Divider Selection

impl W<u32, Reg<u32, _SSC_TFMR>>

pub fn datlen(&mut self) -> DATLEN_W

Bits 0:4 - Data Length

pub fn datdef(&mut self) -> DATDEF_W

Bit 5 - Data Default Value

pub fn msbf(&mut self) -> MSBF_W

Bit 7 - Most Significant Bit First

pub fn datnb(&mut self) -> DATNB_W

Bits 8:11 - Data Number per Frame

pub fn fslen(&mut self) -> FSLEN_W

Bits 16:19 - Transmit Frame Sync Length

pub fn fsos(&mut self) -> FSOS_W

Bits 20:22 - Transmit Frame Sync Output Selection

pub fn fsden(&mut self) -> FSDEN_W

Bit 23 - Frame Sync Data Enable

pub fn fsedge(&mut self) -> FSEDGE_W

Bit 24 - Frame Sync Edge Detection

pub fn fslen_ext(&mut self) -> FSLEN_EXT_W

Bits 28:31 - FSLEN Field Extension

impl W<u32, Reg<u32, _SSC_THR>>

pub fn tdat(&mut self) -> TDAT_W

Bits 0:31 - Transmit Data

impl W<u32, Reg<u32, _SSC_TSHR>>

pub fn tsdat(&mut self) -> TSDAT_W

Bits 0:15 - Transmit Synchronization Data

impl W<u32, Reg<u32, _SSC_RC0R>>

pub fn cp0(&mut self) -> CP0_W

Bits 0:15 - Receive Compare Data 0

impl W<u32, Reg<u32, _SSC_RC1R>>

pub fn cp1(&mut self) -> CP1_W

Bits 0:15 - Receive Compare Data 1

impl W<u32, Reg<u32, _SSC_IER>>

pub fn txrdy(&mut self) -> TXRDY_W

Bit 0 - Transmit Ready Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 1 - Transmit Empty Interrupt Enable

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 4 - Receive Ready Interrupt Enable

pub fn ovrun(&mut self) -> OVRUN_W

Bit 5 - Receive Overrun Interrupt Enable

pub fn cp0(&mut self) -> CP0_W

Bit 8 - Compare 0 Interrupt Enable

pub fn cp1(&mut self) -> CP1_W

Bit 9 - Compare 1 Interrupt Enable

pub fn txsyn(&mut self) -> TXSYN_W

Bit 10 - Tx Sync Interrupt Enable

pub fn rxsyn(&mut self) -> RXSYN_W

Bit 11 - Rx Sync Interrupt Enable

impl W<u32, Reg<u32, _SSC_IDR>>

pub fn txrdy(&mut self) -> TXRDY_W

Bit 0 - Transmit Ready Interrupt Disable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 1 - Transmit Empty Interrupt Disable

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 4 - Receive Ready Interrupt Disable

pub fn ovrun(&mut self) -> OVRUN_W

Bit 5 - Receive Overrun Interrupt Disable

pub fn cp0(&mut self) -> CP0_W

Bit 8 - Compare 0 Interrupt Disable

pub fn cp1(&mut self) -> CP1_W

Bit 9 - Compare 1 Interrupt Disable

pub fn txsyn(&mut self) -> TXSYN_W

Bit 10 - Tx Sync Interrupt Enable

pub fn rxsyn(&mut self) -> RXSYN_W

Bit 11 - Rx Sync Interrupt Enable

impl W<u32, Reg<u32, _SSC_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _SUPC_CR>>

pub fn vroff(&mut self) -> VROFF_W

Bit 2 - Voltage Regulator Off

pub fn xtalsel(&mut self) -> XTALSEL_W

Bit 3 - Crystal Oscillator Select

pub fn key(&mut self) -> KEY_W

Bits 24:31 - Password

impl W<u32, Reg<u32, _SUPC_SMMR>>

pub fn smth(&mut self) -> SMTH_W

Bits 0:3 - Supply Monitor Threshold

pub fn smsmpl(&mut self) -> SMSMPL_W

Bits 8:10 - Supply Monitor Sampling Period

pub fn smrsten(&mut self) -> SMRSTEN_W

Bit 12 - Supply Monitor Reset Enable

pub fn smien(&mut self) -> SMIEN_W

Bit 13 - Supply Monitor Interrupt Enable

impl W<u32, Reg<u32, _SUPC_MR>>

pub fn bodrsten(&mut self) -> BODRSTEN_W

Bit 12 - Brownout Detector Reset Enable

pub fn boddis(&mut self) -> BODDIS_W

Bit 13 - Brownout Detector Disable

pub fn onreg(&mut self) -> ONREG_W

Bit 14 - Voltage Regulator Enable

pub fn bkupreton(&mut self) -> BKUPRETON_W

Bit 17 - SRAM On In Backup Mode

pub fn oscbypass(&mut self) -> OSCBYPASS_W

Bit 20 - Oscillator Bypass

pub fn key(&mut self) -> KEY_W

Bits 24:31 - Password Key

impl W<u32, Reg<u32, _SUPC_WUMR>>

pub fn smen(&mut self) -> SMEN_W

Bit 1 - Supply Monitor Wake-up Enable

pub fn rtten(&mut self) -> RTTEN_W

Bit 2 - Real-time Timer Wake-up Enable

pub fn rtcen(&mut self) -> RTCEN_W

Bit 3 - Real-time Clock Wake-up Enable

pub fn lpdbcen0(&mut self) -> LPDBCEN0_W

Bit 5 - Low-power Debouncer Enable WKUP0

pub fn lpdbcen1(&mut self) -> LPDBCEN1_W

Bit 6 - Low-power Debouncer Enable WKUP1

pub fn lpdbcclr(&mut self) -> LPDBCCLR_W

Bit 7 - Low-power Debouncer Clear

pub fn wkupdbc(&mut self) -> WKUPDBC_W

Bits 12:14 - Wake-up Inputs Debouncer Period

pub fn lpdbc(&mut self) -> LPDBC_W

Bits 16:18 - Low-power Debouncer Period

impl W<u32, Reg<u32, _SUPC_WUIR>>

pub fn wkupen0(&mut self) -> WKUPEN0_W

Bit 0 - Wake-up Input Enable 0 to 0

pub fn wkupen1(&mut self) -> WKUPEN1_W

Bit 1 - Wake-up Input Enable 0 to 1

pub fn wkupen2(&mut self) -> WKUPEN2_W

Bit 2 - Wake-up Input Enable 0 to 2

pub fn wkupen3(&mut self) -> WKUPEN3_W

Bit 3 - Wake-up Input Enable 0 to 3

pub fn wkupen4(&mut self) -> WKUPEN4_W

Bit 4 - Wake-up Input Enable 0 to 4

pub fn wkupen5(&mut self) -> WKUPEN5_W

Bit 5 - Wake-up Input Enable 0 to 5

pub fn wkupen6(&mut self) -> WKUPEN6_W

Bit 6 - Wake-up Input Enable 0 to 6

pub fn wkupen7(&mut self) -> WKUPEN7_W

Bit 7 - Wake-up Input Enable 0 to 7

pub fn wkupen8(&mut self) -> WKUPEN8_W

Bit 8 - Wake-up Input Enable 0 to 8

pub fn wkupen9(&mut self) -> WKUPEN9_W

Bit 9 - Wake-up Input Enable 0 to 9

pub fn wkupen10(&mut self) -> WKUPEN10_W

Bit 10 - Wake-up Input Enable 0 to 10

pub fn wkupen11(&mut self) -> WKUPEN11_W

Bit 11 - Wake-up Input Enable 0 to 11

pub fn wkupen12(&mut self) -> WKUPEN12_W

Bit 12 - Wake-up Input Enable 0 to 12

pub fn wkupen13(&mut self) -> WKUPEN13_W

Bit 13 - Wake-up Input Enable 0 to 13

pub fn wkupt0(&mut self) -> WKUPT0_W

Bit 16 - Wake-up Input Type 0 to 0

pub fn wkupt1(&mut self) -> WKUPT1_W

Bit 17 - Wake-up Input Type 0 to 1

pub fn wkupt2(&mut self) -> WKUPT2_W

Bit 18 - Wake-up Input Type 0 to 2

pub fn wkupt3(&mut self) -> WKUPT3_W

Bit 19 - Wake-up Input Type 0 to 3

pub fn wkupt4(&mut self) -> WKUPT4_W

Bit 20 - Wake-up Input Type 0 to 4

pub fn wkupt5(&mut self) -> WKUPT5_W

Bit 21 - Wake-up Input Type 0 to 5

pub fn wkupt6(&mut self) -> WKUPT6_W

Bit 22 - Wake-up Input Type 0 to 6

pub fn wkupt7(&mut self) -> WKUPT7_W

Bit 23 - Wake-up Input Type 0 to 7

pub fn wkupt8(&mut self) -> WKUPT8_W

Bit 24 - Wake-up Input Type 0 to 8

pub fn wkupt9(&mut self) -> WKUPT9_W

Bit 25 - Wake-up Input Type 0 to 9

pub fn wkupt10(&mut self) -> WKUPT10_W

Bit 26 - Wake-up Input Type 0 to 10

pub fn wkupt11(&mut self) -> WKUPT11_W

Bit 27 - Wake-up Input Type 0 to 11

pub fn wkupt12(&mut self) -> WKUPT12_W

Bit 28 - Wake-up Input Type 0 to 12

pub fn wkupt13(&mut self) -> WKUPT13_W

Bit 29 - Wake-up Input Type 0 to 13

impl W<u32, Reg<u32, _TC_CCR>>

pub fn clken(&mut self) -> CLKEN_W

Bit 0 - Counter Clock Enable Command

pub fn clkdis(&mut self) -> CLKDIS_W

Bit 1 - Counter Clock Disable Command

pub fn swtrg(&mut self) -> SWTRG_W

Bit 2 - Software Trigger Command

impl W<u32, Reg<u32, _TC_CMR_CAPTURE_MODE>>

pub fn tcclks(&mut self) -> TCCLKS_W

Bits 0:2 - Clock Selection

pub fn clki(&mut self) -> CLKI_W

Bit 3 - Clock Invert

pub fn burst(&mut self) -> BURST_W

Bits 4:5 - Burst Signal Selection

pub fn ldbstop(&mut self) -> LDBSTOP_W

Bit 6 - Counter Clock Stopped with RB Loading

pub fn ldbdis(&mut self) -> LDBDIS_W

Bit 7 - Counter Clock Disable with RB Loading

pub fn etrgedg(&mut self) -> ETRGEDG_W

Bits 8:9 - External Trigger Edge Selection

pub fn abetrg(&mut self) -> ABETRG_W

Bit 10 - TIOAx or TIOBx External Trigger Selection

pub fn cpctrg(&mut self) -> CPCTRG_W

Bit 14 - RC Compare Trigger Enable

pub fn wave(&mut self) -> WAVE_W

Bit 15 - Waveform Mode

pub fn ldra(&mut self) -> LDRA_W

Bits 16:17 - RA Loading Edge Selection

pub fn ldrb(&mut self) -> LDRB_W

Bits 18:19 - RB Loading Edge Selection

pub fn sbsmplr(&mut self) -> SBSMPLR_W

Bits 20:22 - Loading Edge Subsampling Ratio

impl W<u32, Reg<u32, _TC_CMR_WAVEFORM_MODE>>

pub fn tcclks(&mut self) -> TCCLKS_W

Bits 0:2 - Clock Selection

pub fn clki(&mut self) -> CLKI_W

Bit 3 - Clock Invert

pub fn burst(&mut self) -> BURST_W

Bits 4:5 - Burst Signal Selection

pub fn cpcstop(&mut self) -> CPCSTOP_W

Bit 6 - Counter Clock Stopped with RC Compare

pub fn cpcdis(&mut self) -> CPCDIS_W

Bit 7 - Counter Clock Disable with RC Loading

pub fn eevtedg(&mut self) -> EEVTEDG_W

Bits 8:9 - External Event Edge Selection

pub fn eevt(&mut self) -> EEVT_W

Bits 10:11 - External Event Selection

pub fn enetrg(&mut self) -> ENETRG_W

Bit 12 - External Event Trigger Enable

pub fn wavsel(&mut self) -> WAVSEL_W

Bits 13:14 - Waveform Selection

pub fn wave(&mut self) -> WAVE_W

Bit 15 - Waveform Mode

pub fn acpa(&mut self) -> ACPA_W

Bits 16:17 - RA Compare Effect on TIOAx

pub fn acpc(&mut self) -> ACPC_W

Bits 18:19 - RC Compare Effect on TIOAx

pub fn aeevt(&mut self) -> AEEVT_W

Bits 20:21 - External Event Effect on TIOAx

pub fn aswtrg(&mut self) -> ASWTRG_W

Bits 22:23 - Software Trigger Effect on TIOAx

pub fn bcpb(&mut self) -> BCPB_W

Bits 24:25 - RB Compare Effect on TIOBx

pub fn bcpc(&mut self) -> BCPC_W

Bits 26:27 - RC Compare Effect on TIOBx

pub fn beevt(&mut self) -> BEEVT_W

Bits 28:29 - External Event Effect on TIOBx

pub fn bswtrg(&mut self) -> BSWTRG_W

Bits 30:31 - Software Trigger Effect on TIOBx

impl W<u32, Reg<u32, _TC_SMMR>>

pub fn gcen(&mut self) -> GCEN_W

Bit 0 - Gray Count Enable

pub fn down(&mut self) -> DOWN_W

Bit 1 - Down Count

impl W<u32, Reg<u32, _TC_RA>>

pub fn ra(&mut self) -> RA_W

Bits 0:31 - Register A

impl W<u32, Reg<u32, _TC_RB>>

pub fn rb(&mut self) -> RB_W

Bits 0:31 - Register B

impl W<u32, Reg<u32, _TC_RC>>

pub fn rc(&mut self) -> RC_W

Bits 0:31 - Register C

impl W<u32, Reg<u32, _TC_IER>>

pub fn covfs(&mut self) -> COVFS_W

Bit 0 - Counter Overflow

pub fn lovrs(&mut self) -> LOVRS_W

Bit 1 - Load Overrun

pub fn cpas(&mut self) -> CPAS_W

Bit 2 - RA Compare

pub fn cpbs(&mut self) -> CPBS_W

Bit 3 - RB Compare

pub fn cpcs(&mut self) -> CPCS_W

Bit 4 - RC Compare

pub fn ldras(&mut self) -> LDRAS_W

Bit 5 - RA Loading

pub fn ldrbs(&mut self) -> LDRBS_W

Bit 6 - RB Loading

pub fn etrgs(&mut self) -> ETRGS_W

Bit 7 - External Trigger

impl W<u32, Reg<u32, _TC_IDR>>

pub fn covfs(&mut self) -> COVFS_W

Bit 0 - Counter Overflow

pub fn lovrs(&mut self) -> LOVRS_W

Bit 1 - Load Overrun

pub fn cpas(&mut self) -> CPAS_W

Bit 2 - RA Compare

pub fn cpbs(&mut self) -> CPBS_W

Bit 3 - RB Compare

pub fn cpcs(&mut self) -> CPCS_W

Bit 4 - RC Compare

pub fn ldras(&mut self) -> LDRAS_W

Bit 5 - RA Loading

pub fn ldrbs(&mut self) -> LDRBS_W

Bit 6 - RB Loading

pub fn etrgs(&mut self) -> ETRGS_W

Bit 7 - External Trigger

impl W<u32, Reg<u32, _TC_EMR>>

pub fn trigsrca(&mut self) -> TRIGSRCA_W

Bits 0:1 - Trigger Source for Input A

pub fn trigsrcb(&mut self) -> TRIGSRCB_W

Bits 4:5 - Trigger Source for Input B

pub fn nodivclk(&mut self) -> NODIVCLK_W

Bit 8 - No Divided Clock

impl W<u32, Reg<u32, _TC_BCR>>

pub fn sync(&mut self) -> SYNC_W

Bit 0 - Synchro Command

impl W<u32, Reg<u32, _TC_BMR>>

pub fn tc0xc0s(&mut self) -> TC0XC0S_W

Bits 0:1 - External Clock Signal 0 Selection

pub fn tc1xc1s(&mut self) -> TC1XC1S_W

Bits 2:3 - External Clock Signal 1 Selection

pub fn tc2xc2s(&mut self) -> TC2XC2S_W

Bits 4:5 - External Clock Signal 2 Selection

pub fn qden(&mut self) -> QDEN_W

Bit 8 - Quadrature Decoder Enabled

pub fn posen(&mut self) -> POSEN_W

Bit 9 - Position Enabled

pub fn speeden(&mut self) -> SPEEDEN_W

Bit 10 - Speed Enabled

pub fn qdtrans(&mut self) -> QDTRANS_W

Bit 11 - Quadrature Decoding Transparent

pub fn edgpha(&mut self) -> EDGPHA_W

Bit 12 - Edge on PHA Count Mode

pub fn inva(&mut self) -> INVA_W

Bit 13 - Inverted PHA

pub fn invb(&mut self) -> INVB_W

Bit 14 - Inverted PHB

pub fn invidx(&mut self) -> INVIDX_W

Bit 15 - Inverted Index

pub fn swap(&mut self) -> SWAP_W

Bit 16 - Swap PHA and PHB

pub fn idxphb(&mut self) -> IDXPHB_W

Bit 17 - Index Pin is PHB Pin

pub fn autoc(&mut self) -> AUTOC_W

Bit 18 - AutoCorrection of missing pulses

pub fn maxfilt(&mut self) -> MAXFILT_W

Bits 20:25 - Maximum Filter

pub fn maxcmp(&mut self) -> MAXCMP_W

Bits 26:29 - Maximum Consecutive Missing Pulses

impl W<u32, Reg<u32, _TC_QIER>>

pub fn idx(&mut self) -> IDX_W

Bit 0 - Index

pub fn dirchg(&mut self) -> DIRCHG_W

Bit 1 - Direction Change

pub fn qerr(&mut self) -> QERR_W

Bit 2 - Quadrature Error

pub fn mpe(&mut self) -> MPE_W

Bit 3 - Consecutive Missing Pulse Error

impl W<u32, Reg<u32, _TC_QIDR>>

pub fn idx(&mut self) -> IDX_W

Bit 0 - Index

pub fn dirchg(&mut self) -> DIRCHG_W

Bit 1 - Direction Change

pub fn qerr(&mut self) -> QERR_W

Bit 2 - Quadrature Error

pub fn mpe(&mut self) -> MPE_W

Bit 3 - Consecutive Missing Pulse Error

impl W<u32, Reg<u32, _TC_FMR>>

pub fn encf0(&mut self) -> ENCF0_W

Bit 0 - Enable Compare Fault Channel 0

pub fn encf1(&mut self) -> ENCF1_W

Bit 1 - Enable Compare Fault Channel 1

impl W<u32, Reg<u32, _TC_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _TRNG_CR>>

pub fn enable(&mut self) -> ENABLE_W

Bit 0 - Enables the TRNG to Provide Random Values

pub fn key(&mut self) -> KEY_W

Bits 8:31 - Security Key

impl W<u32, Reg<u32, _TRNG_IER>>

pub fn datrdy(&mut self) -> DATRDY_W

Bit 0 - Data Ready Interrupt Enable

impl W<u32, Reg<u32, _TRNG_IDR>>

pub fn datrdy(&mut self) -> DATRDY_W

Bit 0 - Data Ready Interrupt Disable

impl W<u32, Reg<u32, _TWIHS_CR>>

pub fn start(&mut self) -> START_W

Bit 0 - Send a START Condition

pub fn stop(&mut self) -> STOP_W

Bit 1 - Send a STOP Condition

pub fn msen(&mut self) -> MSEN_W

Bit 2 - TWIHS Master Mode Enabled

pub fn msdis(&mut self) -> MSDIS_W

Bit 3 - TWIHS Master Mode Disabled

pub fn sven(&mut self) -> SVEN_W

Bit 4 - TWIHS Slave Mode Enabled

pub fn svdis(&mut self) -> SVDIS_W

Bit 5 - TWIHS Slave Mode Disabled

pub fn quick(&mut self) -> QUICK_W

Bit 6 - SMBus Quick Command

pub fn swrst(&mut self) -> SWRST_W

Bit 7 - Software Reset

pub fn hsen(&mut self) -> HSEN_W

Bit 8 - TWIHS High-Speed Mode Enabled

pub fn hsdis(&mut self) -> HSDIS_W

Bit 9 - TWIHS High-Speed Mode Disabled

pub fn smben(&mut self) -> SMBEN_W

Bit 10 - SMBus Mode Enabled

pub fn smbdis(&mut self) -> SMBDIS_W

Bit 11 - SMBus Mode Disabled

pub fn pecen(&mut self) -> PECEN_W

Bit 12 - Packet Error Checking Enable

pub fn pecdis(&mut self) -> PECDIS_W

Bit 13 - Packet Error Checking Disable

pub fn pecrq(&mut self) -> PECRQ_W

Bit 14 - PEC Request

pub fn clear(&mut self) -> CLEAR_W

Bit 15 - Bus CLEAR Command

pub fn acmen(&mut self) -> ACMEN_W

Bit 16 - Alternative Command Mode Enable

pub fn acmdis(&mut self) -> ACMDIS_W

Bit 17 - Alternative Command Mode Disable

pub fn thrclr(&mut self) -> THRCLR_W

Bit 24 - Transmit Holding Register Clear

pub fn lockclr(&mut self) -> LOCKCLR_W

Bit 26 - Lock Clear

pub fn fifoen(&mut self) -> FIFOEN_W

Bit 28 - FIFO Enable

pub fn fifodis(&mut self) -> FIFODIS_W

Bit 29 - FIFO Disable

impl W<u32, Reg<u32, _TWIHS_MMR>>

pub fn iadrsz(&mut self) -> IADRSZ_W

Bits 8:9 - Internal Device Address Size

pub fn mread(&mut self) -> MREAD_W

Bit 12 - Master Read Direction

pub fn dadr(&mut self) -> DADR_W

Bits 16:22 - Device Address

impl W<u32, Reg<u32, _TWIHS_SMR>>

pub fn nacken(&mut self) -> NACKEN_W

Bit 0 - Slave Receiver Data Phase NACK enable

pub fn smda(&mut self) -> SMDA_W

Bit 2 - SMBus Default Address

pub fn smhh(&mut self) -> SMHH_W

Bit 3 - SMBus Host Header

pub fn sclwsdis(&mut self) -> SCLWSDIS_W

Bit 6 - Clock Wait State Disable

pub fn mask(&mut self) -> MASK_W

Bits 8:14 - Slave Address Mask

pub fn sadr(&mut self) -> SADR_W

Bits 16:22 - Slave Address

pub fn sadr1en(&mut self) -> SADR1EN_W

Bit 28 - Slave Address 1 Enable

pub fn sadr2en(&mut self) -> SADR2EN_W

Bit 29 - Slave Address 2 Enable

pub fn sadr3en(&mut self) -> SADR3EN_W

Bit 30 - Slave Address 3 Enable

pub fn datamen(&mut self) -> DATAMEN_W

Bit 31 - Data Matching Enable

impl W<u32, Reg<u32, _TWIHS_IADR>>

pub fn iadr(&mut self) -> IADR_W

Bits 0:23 - Internal Address

impl W<u32, Reg<u32, _TWIHS_CWGR>>

pub fn cldiv(&mut self) -> CLDIV_W

Bits 0:7 - Clock Low Divider

pub fn chdiv(&mut self) -> CHDIV_W

Bits 8:15 - Clock High Divider

pub fn ckdiv(&mut self) -> CKDIV_W

Bits 16:18 - Clock Divider

pub fn hold(&mut self) -> HOLD_W

Bits 24:29 - TWD Hold Time Versus TWCK Falling

impl W<u32, Reg<u32, _TWIHS_IER>>

pub fn txcomp(&mut self) -> TXCOMP_W

Bit 0 - Transmission Completed Interrupt Enable

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 1 - Receive Holding Register Ready Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 2 - Transmit Holding Register Ready Interrupt Enable

pub fn svacc(&mut self) -> SVACC_W

Bit 4 - Slave Access Interrupt Enable

pub fn gacc(&mut self) -> GACC_W

Bit 5 - General Call Access Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W

Bit 6 - Overrun Error Interrupt Enable

pub fn unre(&mut self) -> UNRE_W

Bit 7 - Underrun Error Interrupt Enable

pub fn nack(&mut self) -> NACK_W

Bit 8 - Not Acknowledge Interrupt Enable

pub fn arblst(&mut self) -> ARBLST_W

Bit 9 - Arbitration Lost Interrupt Enable

pub fn scl_ws(&mut self) -> SCL_WS_W

Bit 10 - Clock Wait State Interrupt Enable

pub fn eosacc(&mut self) -> EOSACC_W

Bit 11 - End Of Slave Access Interrupt Enable

pub fn mcack(&mut self) -> MCACK_W

Bit 16 - Master Code Acknowledge Interrupt Enable

pub fn tout(&mut self) -> TOUT_W

Bit 18 - Timeout Error Interrupt Enable

pub fn pecerr(&mut self) -> PECERR_W

Bit 19 - PEC Error Interrupt Enable

pub fn smbdam(&mut self) -> SMBDAM_W

Bit 20 - SMBus Default Address Match Interrupt Enable

pub fn smbhhm(&mut self) -> SMBHHM_W

Bit 21 - SMBus Host Header Address Match Interrupt Enable

impl W<u32, Reg<u32, _TWIHS_IDR>>

pub fn txcomp(&mut self) -> TXCOMP_W

Bit 0 - Transmission Completed Interrupt Disable

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 1 - Receive Holding Register Ready Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 2 - Transmit Holding Register Ready Interrupt Disable

pub fn svacc(&mut self) -> SVACC_W

Bit 4 - Slave Access Interrupt Disable

pub fn gacc(&mut self) -> GACC_W

Bit 5 - General Call Access Interrupt Disable

pub fn ovre(&mut self) -> OVRE_W

Bit 6 - Overrun Error Interrupt Disable

pub fn unre(&mut self) -> UNRE_W

Bit 7 - Underrun Error Interrupt Disable

pub fn nack(&mut self) -> NACK_W

Bit 8 - Not Acknowledge Interrupt Disable

pub fn arblst(&mut self) -> ARBLST_W

Bit 9 - Arbitration Lost Interrupt Disable

pub fn scl_ws(&mut self) -> SCL_WS_W

Bit 10 - Clock Wait State Interrupt Disable

pub fn eosacc(&mut self) -> EOSACC_W

Bit 11 - End Of Slave Access Interrupt Disable

pub fn mcack(&mut self) -> MCACK_W

Bit 16 - Master Code Acknowledge Interrupt Disable

pub fn tout(&mut self) -> TOUT_W

Bit 18 - Timeout Error Interrupt Disable

pub fn pecerr(&mut self) -> PECERR_W

Bit 19 - PEC Error Interrupt Disable

pub fn smbdam(&mut self) -> SMBDAM_W

Bit 20 - SMBus Default Address Match Interrupt Disable

pub fn smbhhm(&mut self) -> SMBHHM_W

Bit 21 - SMBus Host Header Address Match Interrupt Disable

impl W<u32, Reg<u32, _TWIHS_THR>>

pub fn txdata(&mut self) -> TXDATA_W

Bits 0:7 - Master or Slave Transmit Holding Data

impl W<u32, Reg<u32, _TWIHS_SMBTR>>

pub fn presc(&mut self) -> PRESC_W

Bits 0:3 - SMBus Clock Prescaler

pub fn tlows(&mut self) -> TLOWS_W

Bits 8:15 - Slave Clock Stretch Maximum Cycles

pub fn tlowm(&mut self) -> TLOWM_W

Bits 16:23 - Master Clock Stretch Maximum Cycles

pub fn thmax(&mut self) -> THMAX_W

Bits 24:31 - Clock High Maximum Cycles

impl W<u32, Reg<u32, _TWIHS_FILTR>>

pub fn filt(&mut self) -> FILT_W

Bit 0 - RX Digital Filter

pub fn padfen(&mut self) -> PADFEN_W

Bit 1 - PAD Filter Enable

pub fn padfcfg(&mut self) -> PADFCFG_W

Bit 2 - PAD Filter Config

pub fn thres(&mut self) -> THRES_W

Bits 8:10 - Digital Filter Threshold

impl W<u32, Reg<u32, _TWIHS_SWMR>>

pub fn sadr1(&mut self) -> SADR1_W

Bits 0:6 - Slave Address 1

pub fn sadr2(&mut self) -> SADR2_W

Bits 8:14 - Slave Address 2

pub fn sadr3(&mut self) -> SADR3_W

Bits 16:22 - Slave Address 3

pub fn datam(&mut self) -> DATAM_W

Bits 24:31 - Data Match

impl W<u32, Reg<u32, _TWIHS_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _UART_CR>>

pub fn rstrx(&mut self) -> RSTRX_W

Bit 2 - Reset Receiver

pub fn rsttx(&mut self) -> RSTTX_W

Bit 3 - Reset Transmitter

pub fn rxen(&mut self) -> RXEN_W

Bit 4 - Receiver Enable

pub fn rxdis(&mut self) -> RXDIS_W

Bit 5 - Receiver Disable

pub fn txen(&mut self) -> TXEN_W

Bit 6 - Transmitter Enable

pub fn txdis(&mut self) -> TXDIS_W

Bit 7 - Transmitter Disable

pub fn rststa(&mut self) -> RSTSTA_W

Bit 8 - Reset Status

pub fn reqclr(&mut self) -> REQCLR_W

Bit 12 - Request Clear

impl W<u32, Reg<u32, _UART_MR>>

pub fn filter(&mut self) -> FILTER_W

Bit 4 - Receiver Digital Filter

pub fn par(&mut self) -> PAR_W

Bits 9:11 - Parity Type

pub fn brsrcck(&mut self) -> BRSRCCK_W

Bit 12 - Baud Rate Source Clock

pub fn chmode(&mut self) -> CHMODE_W

Bits 14:15 - Channel Mode

impl W<u32, Reg<u32, _UART_IER>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - Enable RXRDY Interrupt

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - Enable TXRDY Interrupt

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Enable Overrun Error Interrupt

pub fn frame(&mut self) -> FRAME_W

Bit 6 - Enable Framing Error Interrupt

pub fn pare(&mut self) -> PARE_W

Bit 7 - Enable Parity Error Interrupt

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - Enable TXEMPTY Interrupt

pub fn cmp(&mut self) -> CMP_W

Bit 15 - Enable Comparison Interrupt

impl W<u32, Reg<u32, _UART_IDR>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - Disable RXRDY Interrupt

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - Disable TXRDY Interrupt

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Disable Overrun Error Interrupt

pub fn frame(&mut self) -> FRAME_W

Bit 6 - Disable Framing Error Interrupt

pub fn pare(&mut self) -> PARE_W

Bit 7 - Disable Parity Error Interrupt

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - Disable TXEMPTY Interrupt

pub fn cmp(&mut self) -> CMP_W

Bit 15 - Disable Comparison Interrupt

impl W<u32, Reg<u32, _UART_THR>>

pub fn txchr(&mut self) -> TXCHR_W

Bits 0:7 - Character to be Transmitted

impl W<u32, Reg<u32, _UART_BRGR>>

pub fn cd(&mut self) -> CD_W

Bits 0:15 - Clock Divisor

impl W<u32, Reg<u32, _UART_CMPR>>

pub fn val1(&mut self) -> VAL1_W

Bits 0:7 - First Comparison Value for Received Character

pub fn cmpmode(&mut self) -> CMPMODE_W

Bit 12 - Comparison Mode

pub fn cmppar(&mut self) -> CMPPAR_W

Bit 14 - Compare Parity

pub fn val2(&mut self) -> VAL2_W

Bits 16:23 - Second Comparison Value for Received Character

impl W<u32, Reg<u32, _UART_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _US_CR_USART_MODE>>

pub fn rstrx(&mut self) -> RSTRX_W

Bit 2 - Reset Receiver

pub fn rsttx(&mut self) -> RSTTX_W

Bit 3 - Reset Transmitter

pub fn rxen(&mut self) -> RXEN_W

Bit 4 - Receiver Enable

pub fn rxdis(&mut self) -> RXDIS_W

Bit 5 - Receiver Disable

pub fn txen(&mut self) -> TXEN_W

Bit 6 - Transmitter Enable

pub fn txdis(&mut self) -> TXDIS_W

Bit 7 - Transmitter Disable

pub fn rststa(&mut self) -> RSTSTA_W

Bit 8 - Reset Status Bits

pub fn sttbrk(&mut self) -> STTBRK_W

Bit 9 - Start Break

pub fn stpbrk(&mut self) -> STPBRK_W

Bit 10 - Stop Break

pub fn sttto(&mut self) -> STTTO_W

Bit 11 - Clear TIMEOUT Flag and Start Timeout After Next Character Received

pub fn senda(&mut self) -> SENDA_W

Bit 12 - Send Address

pub fn rstit(&mut self) -> RSTIT_W

Bit 13 - Reset Iterations

pub fn rstnack(&mut self) -> RSTNACK_W

Bit 14 - Reset Non Acknowledge

pub fn retto(&mut self) -> RETTO_W

Bit 15 - Start Timeout Immediately

pub fn dtren(&mut self) -> DTREN_W

Bit 16 - Data Terminal Ready Enable

pub fn dtrdis(&mut self) -> DTRDIS_W

Bit 17 - Data Terminal Ready Disable

pub fn rtsen(&mut self) -> RTSEN_W

Bit 18 - Request to Send Enable

pub fn rtsdis(&mut self) -> RTSDIS_W

Bit 19 - Request to Send Disable

impl W<u32, Reg<u32, _US_CR_SPI_MODE>>

pub fn rstrx(&mut self) -> RSTRX_W

Bit 2 - Reset Receiver

pub fn rsttx(&mut self) -> RSTTX_W

Bit 3 - Reset Transmitter

pub fn rxen(&mut self) -> RXEN_W

Bit 4 - Receiver Enable

pub fn rxdis(&mut self) -> RXDIS_W

Bit 5 - Receiver Disable

pub fn txen(&mut self) -> TXEN_W

Bit 6 - Transmitter Enable

pub fn txdis(&mut self) -> TXDIS_W

Bit 7 - Transmitter Disable

pub fn rststa(&mut self) -> RSTSTA_W

Bit 8 - Reset Status Bits

pub fn fcs(&mut self) -> FCS_W

Bit 18 - Force SPI Chip Select

pub fn rcs(&mut self) -> RCS_W

Bit 19 - Release SPI Chip Select

impl W<u32, Reg<u32, _US_CR_LIN_MODE>>

pub fn rstrx(&mut self) -> RSTRX_W

Bit 2 - Reset Receiver

pub fn rsttx(&mut self) -> RSTTX_W

Bit 3 - Reset Transmitter

pub fn rxen(&mut self) -> RXEN_W

Bit 4 - Receiver Enable

pub fn rxdis(&mut self) -> RXDIS_W

Bit 5 - Receiver Disable

pub fn txen(&mut self) -> TXEN_W

Bit 6 - Transmitter Enable

pub fn txdis(&mut self) -> TXDIS_W

Bit 7 - Transmitter Disable

pub fn rststa(&mut self) -> RSTSTA_W

Bit 8 - Reset Status Bits

pub fn linabt(&mut self) -> LINABT_W

Bit 20 - Abort LIN Transmission

pub fn linwkup(&mut self) -> LINWKUP_W

Bit 21 - Send LIN Wakeup Signal

impl W<u32, Reg<u32, _US_MR_USART_MODE>>

pub fn usart_mode(&mut self) -> USART_MODE_W

Bits 0:3 - USART Mode of Operation

pub fn usclks(&mut self) -> USCLKS_W

Bits 4:5 - Clock Selection

pub fn chrl(&mut self) -> CHRL_W

Bits 6:7 - Character Length

pub fn sync(&mut self) -> SYNC_W

Bit 8 - Synchronous Mode Select

pub fn par(&mut self) -> PAR_W

Bits 9:11 - Parity Type

pub fn nbstop(&mut self) -> NBSTOP_W

Bits 12:13 - Number of Stop Bits

pub fn chmode(&mut self) -> CHMODE_W

Bits 14:15 - Channel Mode

pub fn msbf(&mut self) -> MSBF_W

Bit 16 - Bit Order

pub fn mode9(&mut self) -> MODE9_W

Bit 17 - 9-bit Character Length

pub fn clko(&mut self) -> CLKO_W

Bit 18 - Clock Output Select

pub fn over(&mut self) -> OVER_W

Bit 19 - Oversampling Mode

pub fn inack(&mut self) -> INACK_W

Bit 20 - Inhibit Non Acknowledge

pub fn dsnack(&mut self) -> DSNACK_W

Bit 21 - Disable Successive NACK

pub fn var_sync(&mut self) -> VAR_SYNC_W

Bit 22 - Variable Synchronization of Command/Data Sync Start Frame Delimiter

pub fn invdata(&mut self) -> INVDATA_W

Bit 23 - Inverted Data

pub fn max_iteration(&mut self) -> MAX_ITERATION_W

Bits 24:26 - Maximum Number of Automatic Iteration

pub fn filter(&mut self) -> FILTER_W

Bit 28 - Receive Line Filter

pub fn man(&mut self) -> MAN_W

Bit 29 - Manchester Encoder/Decoder Enable

pub fn modsync(&mut self) -> MODSYNC_W

Bit 30 - Manchester Synchronization Mode

pub fn onebit(&mut self) -> ONEBIT_W

Bit 31 - Start Frame Delimiter Selector

impl W<u32, Reg<u32, _US_MR_SPI_MODE>>

pub fn usart_mode(&mut self) -> USART_MODE_W

Bits 0:3 - USART Mode of Operation

pub fn usclks(&mut self) -> USCLKS_W

Bits 4:5 - Clock Selection

pub fn chrl(&mut self) -> CHRL_W

Bits 6:7 - Character Length

pub fn clko(&mut self) -> CLKO_W

Bit 18 - Clock Output Select

pub fn cpha(&mut self) -> CPHA_W

Bit 8 - SPI Clock Phase

pub fn cpol(&mut self) -> CPOL_W

Bit 16 - SPI Clock Polarity

pub fn wrdbt(&mut self) -> WRDBT_W

Bit 20 - Wait Read Data Before Transfer

impl W<u32, Reg<u32, _US_IER_USART_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Enable

pub fn rxbrk(&mut self) -> RXBRK_W

Bit 2 - Receiver Break Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Enable

pub fn iter(&mut self) -> ITER_W

Bit 10 - Max number of Repetitions Reached Interrupt Enable

pub fn nack(&mut self) -> NACK_W

Bit 13 - Non Acknowledge Interrupt Enable

pub fn riic(&mut self) -> RIIC_W

Bit 16 - Ring Indicator Input Change Enable

pub fn dsric(&mut self) -> DSRIC_W

Bit 17 - Data Set Ready Input Change Enable

pub fn dcdic(&mut self) -> DCDIC_W

Bit 18 - Data Carrier Detect Input Change Interrupt Enable

pub fn ctsic(&mut self) -> CTSIC_W

Bit 19 - Clear to Send Input Change Interrupt Enable

pub fn mane(&mut self) -> MANE_W

Bit 24 - Manchester Error Interrupt Enable

impl W<u32, Reg<u32, _US_IER_USART_LIN_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn frame(&mut self) -> FRAME_W

Bit 6 - Framing Error Interrupt Enable

pub fn pare(&mut self) -> PARE_W

Bit 7 - Parity Error Interrupt Enable

pub fn timeout(&mut self) -> TIMEOUT_W

Bit 8 - Timeout Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Enable

impl W<u32, Reg<u32, _US_IER_SPI_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Enable

pub fn nsse(&mut self) -> NSSE_W

Bit 19 - NSS Line (Driving CTS Pin) Rising or Falling Edge Event

impl W<u32, Reg<u32, _US_IER_LIN_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Enable

pub fn linbk(&mut self) -> LINBK_W

Bit 13 - LIN Break Sent or LIN Break Received Interrupt Enable

pub fn linid(&mut self) -> LINID_W

Bit 14 - LIN Identifier Sent or LIN Identifier Received Interrupt Enable

pub fn lintc(&mut self) -> LINTC_W

Bit 15 - LIN Transfer Completed Interrupt Enable

pub fn linbe(&mut self) -> LINBE_W

Bit 25 - LIN Bus Error Interrupt Enable

pub fn linisfe(&mut self) -> LINISFE_W

Bit 26 - LIN Inconsistent Synch Field Error Interrupt Enable

pub fn linipe(&mut self) -> LINIPE_W

Bit 27 - LIN Identifier Parity Interrupt Enable

pub fn lince(&mut self) -> LINCE_W

Bit 28 - LIN Checksum Error Interrupt Enable

pub fn linsnre(&mut self) -> LINSNRE_W

Bit 29 - LIN Slave Not Responding Error Interrupt Enable

pub fn linste(&mut self) -> LINSTE_W

Bit 30 - LIN Synch Tolerance Error Interrupt Enable

pub fn linhte(&mut self) -> LINHTE_W

Bit 31 - LIN Header Timeout Error Interrupt Enable

impl W<u32, Reg<u32, _US_IER_LON_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Enable

pub fn lsfe(&mut self) -> LSFE_W

Bit 6 - LON Short Frame Error Interrupt Enable

pub fn lcrce(&mut self) -> LCRCE_W

Bit 7 - LON CRC Error Interrupt Enable

pub fn ltxd(&mut self) -> LTXD_W

Bit 24 - LON Transmission Done Interrupt Enable

pub fn lcol(&mut self) -> LCOL_W

Bit 25 - LON Collision Interrupt Enable

pub fn lfet(&mut self) -> LFET_W

Bit 26 - LON Frame Early Termination Interrupt Enable

pub fn lrxd(&mut self) -> LRXD_W

Bit 27 - LON Reception Done Interrupt Enable

pub fn lblovfe(&mut self) -> LBLOVFE_W

Bit 28 - LON Backlog Overflow Error Interrupt Enable

impl W<u32, Reg<u32, _US_IER_LON_SPI_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Enable

pub fn unre(&mut self) -> UNRE_W

Bit 10 - Underrun Error Interrupt Enable

impl W<u32, Reg<u32, _US_IDR_USART_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Disable

pub fn rxbrk(&mut self) -> RXBRK_W

Bit 2 - Receiver Break Interrupt Disable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Disable

pub fn iter(&mut self) -> ITER_W

Bit 10 - Max Number of Repetitions Reached Interrupt Disable

pub fn nack(&mut self) -> NACK_W

Bit 13 - Non Acknowledge Interrupt Disable

pub fn riic(&mut self) -> RIIC_W

Bit 16 - Ring Indicator Input Change Disable

pub fn dsric(&mut self) -> DSRIC_W

Bit 17 - Data Set Ready Input Change Disable

pub fn dcdic(&mut self) -> DCDIC_W

Bit 18 - Data Carrier Detect Input Change Interrupt Disable

pub fn ctsic(&mut self) -> CTSIC_W

Bit 19 - Clear to Send Input Change Interrupt Disable

pub fn mane(&mut self) -> MANE_W

Bit 24 - Manchester Error Interrupt Disable

impl W<u32, Reg<u32, _US_IDR_USART_LIN_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Disable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn frame(&mut self) -> FRAME_W

Bit 6 - Framing Error Interrupt Disable

pub fn pare(&mut self) -> PARE_W

Bit 7 - Parity Error Interrupt Disable

pub fn timeout(&mut self) -> TIMEOUT_W

Bit 8 - Timeout Interrupt Disable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Disable

pub fn riic(&mut self) -> RIIC_W

Bit 16 - Ring Indicator Input Change Disable

pub fn dsric(&mut self) -> DSRIC_W

Bit 17 - Data Set Ready Input Change Disable

pub fn dcdic(&mut self) -> DCDIC_W

Bit 18 - Data Carrier Detect Input Change Interrupt Disable

impl W<u32, Reg<u32, _US_IDR_SPI_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Disable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Disable

pub fn riic(&mut self) -> RIIC_W

Bit 16 - Ring Indicator Input Change Disable

pub fn dsric(&mut self) -> DSRIC_W

Bit 17 - Data Set Ready Input Change Disable

pub fn dcdic(&mut self) -> DCDIC_W

Bit 18 - Data Carrier Detect Input Change Interrupt Disable

pub fn nsse(&mut self) -> NSSE_W

Bit 19 - NSS Line (Driving CTS Pin) Rising or Falling Edge Event

impl W<u32, Reg<u32, _US_IDR_LIN_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Disable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Disable

pub fn riic(&mut self) -> RIIC_W

Bit 16 - Ring Indicator Input Change Disable

pub fn dsric(&mut self) -> DSRIC_W

Bit 17 - Data Set Ready Input Change Disable

pub fn dcdic(&mut self) -> DCDIC_W

Bit 18 - Data Carrier Detect Input Change Interrupt Disable

pub fn linbk(&mut self) -> LINBK_W

Bit 13 - LIN Break Sent or LIN Break Received Interrupt Disable

pub fn linid(&mut self) -> LINID_W

Bit 14 - LIN Identifier Sent or LIN Identifier Received Interrupt Disable

pub fn lintc(&mut self) -> LINTC_W

Bit 15 - LIN Transfer Completed Interrupt Disable

pub fn linbe(&mut self) -> LINBE_W

Bit 25 - LIN Bus Error Interrupt Disable

pub fn linisfe(&mut self) -> LINISFE_W

Bit 26 - LIN Inconsistent Synch Field Error Interrupt Disable

pub fn linipe(&mut self) -> LINIPE_W

Bit 27 - LIN Identifier Parity Interrupt Disable

pub fn lince(&mut self) -> LINCE_W

Bit 28 - LIN Checksum Error Interrupt Disable

pub fn linsnre(&mut self) -> LINSNRE_W

Bit 29 - LIN Slave Not Responding Error Interrupt Disable

pub fn linste(&mut self) -> LINSTE_W

Bit 30 - LIN Synch Tolerance Error Interrupt Disable

pub fn linhte(&mut self) -> LINHTE_W

Bit 31 - LIN Header Timeout Error Interrupt Disable

impl W<u32, Reg<u32, _US_IDR_LON_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Disable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Disable

pub fn riic(&mut self) -> RIIC_W

Bit 16 - Ring Indicator Input Change Disable

pub fn dsric(&mut self) -> DSRIC_W

Bit 17 - Data Set Ready Input Change Disable

pub fn dcdic(&mut self) -> DCDIC_W

Bit 18 - Data Carrier Detect Input Change Interrupt Disable

pub fn lsfe(&mut self) -> LSFE_W

Bit 6 - LON Short Frame Error Interrupt Disable

pub fn lcrce(&mut self) -> LCRCE_W

Bit 7 - LON CRC Error Interrupt Disable

pub fn ltxd(&mut self) -> LTXD_W

Bit 24 - LON Transmission Done Interrupt Disable

pub fn lcol(&mut self) -> LCOL_W

Bit 25 - LON Collision Interrupt Disable

pub fn lfet(&mut self) -> LFET_W

Bit 26 - LON Frame Early Termination Interrupt Disable

pub fn lrxd(&mut self) -> LRXD_W

Bit 27 - LON Reception Done Interrupt Disable

pub fn lblovfe(&mut self) -> LBLOVFE_W

Bit 28 - LON Backlog Overflow Error Interrupt Disable

impl W<u32, Reg<u32, _US_IDR_LON_SPI_MODE>>

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 0 - RXRDY Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 1 - TXRDY Interrupt Disable

pub fn ovre(&mut self) -> OVRE_W

Bit 5 - Overrun Error Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W

Bit 9 - TXEMPTY Interrupt Disable

pub fn riic(&mut self) -> RIIC_W

Bit 16 - Ring Indicator Input Change Disable

pub fn dsric(&mut self) -> DSRIC_W

Bit 17 - Data Set Ready Input Change Disable

pub fn dcdic(&mut self) -> DCDIC_W

Bit 18 - Data Carrier Detect Input Change Interrupt Disable

pub fn unre(&mut self) -> UNRE_W

Bit 10 - SPI Underrun Error Interrupt Disable

impl W<u32, Reg<u32, _US_THR>>

pub fn txchr(&mut self) -> TXCHR_W

Bits 0:8 - Character to be Transmitted

pub fn txsynh(&mut self) -> TXSYNH_W

Bit 15 - Sync Field to be Transmitted

impl W<u32, Reg<u32, _US_BRGR>>

pub fn cd(&mut self) -> CD_W

Bits 0:15 - Clock Divider

pub fn fp(&mut self) -> FP_W

Bits 16:18 - Fractional Part

impl W<u32, Reg<u32, _US_RTOR>>

pub fn to(&mut self) -> TO_W

Bits 0:16 - Timeout Value

impl W<u32, Reg<u32, _US_TTGR_USART_MODE>>

pub fn tg(&mut self) -> TG_W

Bits 0:7 - Timeguard Value

impl W<u32, Reg<u32, _US_TTGR_LON_MODE>>

pub fn pcycle(&mut self) -> PCYCLE_W

Bits 0:23 - LON PCYCLE Length

impl W<u32, Reg<u32, _US_FIDI_USART_MODE>>

pub fn fi_di_ratio(&mut self) -> FI_DI_RATIO_W

Bits 0:15 - FI Over DI Ratio Value

impl W<u32, Reg<u32, _US_FIDI_LON_MODE>>

pub fn beta2(&mut self) -> BETA2_W

Bits 0:23 - LON BETA2 Length

impl W<u32, Reg<u32, _US_IF>>

pub fn irda_filter(&mut self) -> IRDA_FILTER_W

Bits 0:7 - IrDA Filter

impl W<u32, Reg<u32, _US_MAN>>

pub fn tx_pl(&mut self) -> TX_PL_W

Bits 0:3 - Transmitter Preamble Length

pub fn tx_pp(&mut self) -> TX_PP_W

Bits 8:9 - Transmitter Preamble Pattern

pub fn tx_mpol(&mut self) -> TX_MPOL_W

Bit 12 - Transmitter Manchester Polarity

pub fn rx_pl(&mut self) -> RX_PL_W

Bits 16:19 - Receiver Preamble Length

pub fn rx_pp(&mut self) -> RX_PP_W

Bits 24:25 - Receiver Preamble Pattern detected

pub fn rx_mpol(&mut self) -> RX_MPOL_W

Bit 28 - Receiver Manchester Polarity

pub fn one(&mut self) -> ONE_W

Bit 29 - Must Be Set to 1

pub fn drift(&mut self) -> DRIFT_W

Bit 30 - Drift Compensation

pub fn rxidlev(&mut self) -> RXIDLEV_W

Bit 31 - Receiver Idle Value

impl W<u32, Reg<u32, _US_LINMR>>

pub fn nact(&mut self) -> NACT_W

Bits 0:1 - LIN Node Action

pub fn pardis(&mut self) -> PARDIS_W

Bit 2 - Parity Disable

pub fn chkdis(&mut self) -> CHKDIS_W

Bit 3 - Checksum Disable

pub fn chktyp(&mut self) -> CHKTYP_W

Bit 4 - Checksum Type

pub fn dlm(&mut self) -> DLM_W

Bit 5 - Data Length Mode

pub fn fsdis(&mut self) -> FSDIS_W

Bit 6 - Frame Slot Mode Disable

pub fn wkuptyp(&mut self) -> WKUPTYP_W

Bit 7 - Wakeup Signal Type

pub fn dlc(&mut self) -> DLC_W

Bits 8:15 - Data Length Control

pub fn pdcm(&mut self) -> PDCM_W

Bit 16 - DMAC Mode

pub fn syncdis(&mut self) -> SYNCDIS_W

Bit 17 - Synchronization Disable

impl W<u32, Reg<u32, _US_LINIR>>

pub fn idchr(&mut self) -> IDCHR_W

Bits 0:7 - Identifier Character

impl W<u32, Reg<u32, _US_LONMR>>

pub fn commt(&mut self) -> COMMT_W

Bit 0 - LON comm_type Parameter Value

pub fn coldet(&mut self) -> COLDET_W

Bit 1 - LON Collision Detection Feature

pub fn tcol(&mut self) -> TCOL_W

Bit 2 - Terminate Frame upon Collision Notification

pub fn cdtail(&mut self) -> CDTAIL_W

Bit 3 - LON Collision Detection on Frame Tail

pub fn dmam(&mut self) -> DMAM_W

Bit 4 - LON DMA Mode

pub fn lcds(&mut self) -> LCDS_W

Bit 5 - LON Collision Detection Source

pub fn eofs(&mut self) -> EOFS_W

Bits 16:23 - End of Frame Condition Size

impl W<u32, Reg<u32, _US_LONPR>>

pub fn lonpl(&mut self) -> LONPL_W

Bits 0:13 - LON Preamble Length

impl W<u32, Reg<u32, _US_LONDL>>

pub fn londl(&mut self) -> LONDL_W

Bits 0:7 - LON Data Length

impl W<u32, Reg<u32, _US_LONL2HDR>>

pub fn bli(&mut self) -> BLI_W

Bits 0:5 - LON Backlog Increment

pub fn altp(&mut self) -> ALTP_W

Bit 6 - LON Alternate Path Bit

pub fn pb(&mut self) -> PB_W

Bit 7 - LON Priority Bit

impl W<u32, Reg<u32, _US_LONB1TX>>

pub fn beta1tx(&mut self) -> BETA1TX_W

Bits 0:23 - LON Beta1 Length after Transmission

impl W<u32, Reg<u32, _US_LONB1RX>>

pub fn beta1rx(&mut self) -> BETA1RX_W

Bits 0:23 - LON Beta1 Length after Reception

impl W<u32, Reg<u32, _US_LONPRIO>>

pub fn psnb(&mut self) -> PSNB_W

Bits 0:6 - LON Priority Slot Number

pub fn nps(&mut self) -> NPS_W

Bits 8:14 - LON Node Priority Slot

impl W<u32, Reg<u32, _US_IDTTX>>

pub fn idttx(&mut self) -> IDTTX_W

Bits 0:23 - LON Indeterminate Time after Transmission (comm_type = 1 mode only)

impl W<u32, Reg<u32, _US_IDTRX>>

pub fn idtrx(&mut self) -> IDTRX_W

Bits 0:23 - LON Indeterminate Time after Reception (comm_type = 1 mode only)

impl W<u32, Reg<u32, _US_ICDIFF>>

pub fn icdiff(&mut self) -> ICDIFF_W

Bits 0:3 - IC Differentiator Number

impl W<u32, Reg<u32, _US_WPMR>>

pub fn wpen(&mut self) -> WPEN_W

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W

Bits 8:31 - Write Protection Key

impl W<u32, Reg<u32, _USBHS_DEVDMANXTDSC>>

pub fn nxt_dsc_add(&mut self) -> NXT_DSC_ADD_W

Bits 0:31 - Next Descriptor Address

impl W<u32, Reg<u32, _USBHS_DEVDMAADDRESS>>

pub fn buff_add(&mut self) -> BUFF_ADD_W

Bits 0:31 - Buffer Address

impl W<u32, Reg<u32, _USBHS_DEVDMACONTROL>>

pub fn chann_enb(&mut self) -> CHANN_ENB_W

Bit 0 - Channel Enable Command

pub fn ldnxt_dsc(&mut self) -> LDNXT_DSC_W

Bit 1 - Load Next Channel Transfer Descriptor Enable Command

pub fn end_tr_en(&mut self) -> END_TR_EN_W

Bit 2 - End of Transfer Enable Control (OUT transfers only)

pub fn end_b_en(&mut self) -> END_B_EN_W

Bit 3 - End of Buffer Enable Control

pub fn end_tr_it(&mut self) -> END_TR_IT_W

Bit 4 - End of Transfer Interrupt Enable

pub fn end_buffit(&mut self) -> END_BUFFIT_W

Bit 5 - End of Buffer Interrupt Enable

pub fn desc_ld_it(&mut self) -> DESC_LD_IT_W

Bit 6 - Descriptor Loaded Interrupt Enable

pub fn burst_lck(&mut self) -> BURST_LCK_W

Bit 7 - Burst Lock Enable

pub fn buff_length(&mut self) -> BUFF_LENGTH_W

Bits 16:31 - Buffer Byte Length (Write-only)

impl W<u32, Reg<u32, _USBHS_DEVDMASTATUS>>

pub fn chann_enb(&mut self) -> CHANN_ENB_W

Bit 0 - Channel Enable Status

pub fn chann_act(&mut self) -> CHANN_ACT_W

Bit 1 - Channel Active Status

pub fn end_tr_st(&mut self) -> END_TR_ST_W

Bit 4 - End of Channel Transfer Status

pub fn end_bf_st(&mut self) -> END_BF_ST_W

Bit 5 - End of Channel Buffer Status

pub fn desc_ldst(&mut self) -> DESC_LDST_W

Bit 6 - Descriptor Loaded Status

pub fn buff_count(&mut self) -> BUFF_COUNT_W

Bits 16:31 - Buffer Byte Count

impl W<u32, Reg<u32, _USBHS_HSTDMANXTDSC>>

pub fn nxt_dsc_add(&mut self) -> NXT_DSC_ADD_W

Bits 0:31 - Next Descriptor Address

impl W<u32, Reg<u32, _USBHS_HSTDMAADDRESS>>

pub fn buff_add(&mut self) -> BUFF_ADD_W

Bits 0:31 - Buffer Address

impl W<u32, Reg<u32, _USBHS_HSTDMACONTROL>>

pub fn chann_enb(&mut self) -> CHANN_ENB_W

Bit 0 - Channel Enable Command

pub fn ldnxt_dsc(&mut self) -> LDNXT_DSC_W

Bit 1 - Load Next Channel Transfer Descriptor Enable Command

pub fn end_tr_en(&mut self) -> END_TR_EN_W

Bit 2 - End of Transfer Enable Control (OUT transfers only)

pub fn end_b_en(&mut self) -> END_B_EN_W

Bit 3 - End of Buffer Enable Control

pub fn end_tr_it(&mut self) -> END_TR_IT_W

Bit 4 - End of Transfer Interrupt Enable

pub fn end_buffit(&mut self) -> END_BUFFIT_W

Bit 5 - End of Buffer Interrupt Enable

pub fn desc_ld_it(&mut self) -> DESC_LD_IT_W

Bit 6 - Descriptor Loaded Interrupt Enable

pub fn burst_lck(&mut self) -> BURST_LCK_W

Bit 7 - Burst Lock Enable

pub fn buff_length(&mut self) -> BUFF_LENGTH_W

Bits 16:31 - Buffer Byte Length (Write-only)

impl W<u32, Reg<u32, _USBHS_HSTDMASTATUS>>

pub fn chann_enb(&mut self) -> CHANN_ENB_W

Bit 0 - Channel Enable Status

pub fn chann_act(&mut self) -> CHANN_ACT_W

Bit 1 - Channel Active Status

pub fn end_tr_st(&mut self) -> END_TR_ST_W

Bit 4 - End of Channel Transfer Status

pub fn end_bf_st(&mut self) -> END_BF_ST_W

Bit 5 - End of Channel Buffer Status

pub fn desc_ldst(&mut self) -> DESC_LDST_W

Bit 6 - Descriptor Loaded Status

pub fn buff_count(&mut self) -> BUFF_COUNT_W

Bits 16:31 - Buffer Byte Count

impl W<u32, Reg<u32, _USBHS_DEVCTRL>>

pub fn uadd(&mut self) -> UADD_W

Bits 0:6 - USB Address

pub fn adden(&mut self) -> ADDEN_W

Bit 7 - Address Enable

pub fn detach(&mut self) -> DETACH_W

Bit 8 - Detach

pub fn rmwkup(&mut self) -> RMWKUP_W

Bit 9 - Remote Wake-Up

pub fn spdconf(&mut self) -> SPDCONF_W

Bits 10:11 - Mode Configuration

pub fn ls(&mut self) -> LS_W

Bit 12 - Low-Speed Mode Force

pub fn tstj(&mut self) -> TSTJ_W

Bit 13 - Test mode J

pub fn tstk(&mut self) -> TSTK_W

Bit 14 - Test mode K

pub fn tstpckt(&mut self) -> TSTPCKT_W

Bit 15 - Test packet mode

pub fn opmode2(&mut self) -> OPMODE2_W

Bit 16 - Specific Operational mode

impl W<u32, Reg<u32, _USBHS_DEVICR>>

pub fn suspc(&mut self) -> SUSPC_W

Bit 0 - Suspend Interrupt Clear

pub fn msofc(&mut self) -> MSOFC_W

Bit 1 - Micro Start of Frame Interrupt Clear

pub fn sofc(&mut self) -> SOFC_W

Bit 2 - Start of Frame Interrupt Clear

pub fn eorstc(&mut self) -> EORSTC_W

Bit 3 - End of Reset Interrupt Clear

pub fn wakeupc(&mut self) -> WAKEUPC_W

Bit 4 - Wake-Up Interrupt Clear

pub fn eorsmc(&mut self) -> EORSMC_W

Bit 5 - End of Resume Interrupt Clear

pub fn uprsmc(&mut self) -> UPRSMC_W

Bit 6 - Upstream Resume Interrupt Clear

impl W<u32, Reg<u32, _USBHS_DEVIFR>>

pub fn susps(&mut self) -> SUSPS_W

Bit 0 - Suspend Interrupt Set

pub fn msofs(&mut self) -> MSOFS_W

Bit 1 - Micro Start of Frame Interrupt Set

pub fn sofs(&mut self) -> SOFS_W

Bit 2 - Start of Frame Interrupt Set

pub fn eorsts(&mut self) -> EORSTS_W

Bit 3 - End of Reset Interrupt Set

pub fn wakeups(&mut self) -> WAKEUPS_W

Bit 4 - Wake-Up Interrupt Set

pub fn eorsms(&mut self) -> EORSMS_W

Bit 5 - End of Resume Interrupt Set

pub fn uprsms(&mut self) -> UPRSMS_W

Bit 6 - Upstream Resume Interrupt Set

pub fn dma_1(&mut self) -> DMA_1_W

Bit 25 - DMA Channel 1 Interrupt Set

pub fn dma_2(&mut self) -> DMA_2_W

Bit 26 - DMA Channel 2 Interrupt Set

pub fn dma_3(&mut self) -> DMA_3_W

Bit 27 - DMA Channel 3 Interrupt Set

pub fn dma_4(&mut self) -> DMA_4_W

Bit 28 - DMA Channel 4 Interrupt Set

pub fn dma_5(&mut self) -> DMA_5_W

Bit 29 - DMA Channel 5 Interrupt Set

pub fn dma_6(&mut self) -> DMA_6_W

Bit 30 - DMA Channel 6 Interrupt Set

pub fn dma_7(&mut self) -> DMA_7_W

Bit 31 - DMA Channel 7 Interrupt Set

impl W<u32, Reg<u32, _USBHS_DEVIDR>>

pub fn suspec(&mut self) -> SUSPEC_W

Bit 0 - Suspend Interrupt Disable

pub fn msofec(&mut self) -> MSOFEC_W

Bit 1 - Micro Start of Frame Interrupt Disable

pub fn sofec(&mut self) -> SOFEC_W

Bit 2 - Start of Frame Interrupt Disable

pub fn eorstec(&mut self) -> EORSTEC_W

Bit 3 - End of Reset Interrupt Disable

pub fn wakeupec(&mut self) -> WAKEUPEC_W

Bit 4 - Wake-Up Interrupt Disable

pub fn eorsmec(&mut self) -> EORSMEC_W

Bit 5 - End of Resume Interrupt Disable

pub fn uprsmec(&mut self) -> UPRSMEC_W

Bit 6 - Upstream Resume Interrupt Disable

pub fn pep_0(&mut self) -> PEP_0_W

Bit 12 - Endpoint 0 Interrupt Disable

pub fn pep_1(&mut self) -> PEP_1_W

Bit 13 - Endpoint 1 Interrupt Disable

pub fn pep_2(&mut self) -> PEP_2_W

Bit 14 - Endpoint 2 Interrupt Disable

pub fn pep_3(&mut self) -> PEP_3_W

Bit 15 - Endpoint 3 Interrupt Disable

pub fn pep_4(&mut self) -> PEP_4_W

Bit 16 - Endpoint 4 Interrupt Disable

pub fn pep_5(&mut self) -> PEP_5_W

Bit 17 - Endpoint 5 Interrupt Disable

pub fn pep_6(&mut self) -> PEP_6_W

Bit 18 - Endpoint 6 Interrupt Disable

pub fn pep_7(&mut self) -> PEP_7_W

Bit 19 - Endpoint 7 Interrupt Disable

pub fn pep_8(&mut self) -> PEP_8_W

Bit 20 - Endpoint 8 Interrupt Disable

pub fn pep_9(&mut self) -> PEP_9_W

Bit 21 - Endpoint 9 Interrupt Disable

pub fn dma_1(&mut self) -> DMA_1_W

Bit 25 - DMA Channel 1 Interrupt Disable

pub fn dma_2(&mut self) -> DMA_2_W

Bit 26 - DMA Channel 2 Interrupt Disable

pub fn dma_3(&mut self) -> DMA_3_W

Bit 27 - DMA Channel 3 Interrupt Disable

pub fn dma_4(&mut self) -> DMA_4_W

Bit 28 - DMA Channel 4 Interrupt Disable

pub fn dma_5(&mut self) -> DMA_5_W

Bit 29 - DMA Channel 5 Interrupt Disable

pub fn dma_6(&mut self) -> DMA_6_W

Bit 30 - DMA Channel 6 Interrupt Disable

pub fn dma_7(&mut self) -> DMA_7_W

Bit 31 - DMA Channel 7 Interrupt Disable

impl W<u32, Reg<u32, _USBHS_DEVIER>>

pub fn suspes(&mut self) -> SUSPES_W

Bit 0 - Suspend Interrupt Enable

pub fn msofes(&mut self) -> MSOFES_W

Bit 1 - Micro Start of Frame Interrupt Enable

pub fn sofes(&mut self) -> SOFES_W

Bit 2 - Start of Frame Interrupt Enable

pub fn eorstes(&mut self) -> EORSTES_W

Bit 3 - End of Reset Interrupt Enable

pub fn wakeupes(&mut self) -> WAKEUPES_W

Bit 4 - Wake-Up Interrupt Enable

pub fn eorsmes(&mut self) -> EORSMES_W

Bit 5 - End of Resume Interrupt Enable

pub fn uprsmes(&mut self) -> UPRSMES_W

Bit 6 - Upstream Resume Interrupt Enable

pub fn pep_0(&mut self) -> PEP_0_W

Bit 12 - Endpoint 0 Interrupt Enable

pub fn pep_1(&mut self) -> PEP_1_W

Bit 13 - Endpoint 1 Interrupt Enable

pub fn pep_2(&mut self) -> PEP_2_W

Bit 14 - Endpoint 2 Interrupt Enable

pub fn pep_3(&mut self) -> PEP_3_W

Bit 15 - Endpoint 3 Interrupt Enable

pub fn pep_4(&mut self) -> PEP_4_W

Bit 16 - Endpoint 4 Interrupt Enable

pub fn pep_5(&mut self) -> PEP_5_W

Bit 17 - Endpoint 5 Interrupt Enable

pub fn pep_6(&mut self) -> PEP_6_W

Bit 18 - Endpoint 6 Interrupt Enable

pub fn pep_7(&mut self) -> PEP_7_W

Bit 19 - Endpoint 7 Interrupt Enable

pub fn pep_8(&mut self) -> PEP_8_W

Bit 20 - Endpoint 8 Interrupt Enable

pub fn pep_9(&mut self) -> PEP_9_W

Bit 21 - Endpoint 9 Interrupt Enable

pub fn dma_1(&mut self) -> DMA_1_W

Bit 25 - DMA Channel 1 Interrupt Enable

pub fn dma_2(&mut self) -> DMA_2_W

Bit 26 - DMA Channel 2 Interrupt Enable

pub fn dma_3(&mut self) -> DMA_3_W

Bit 27 - DMA Channel 3 Interrupt Enable

pub fn dma_4(&mut self) -> DMA_4_W

Bit 28 - DMA Channel 4 Interrupt Enable

pub fn dma_5(&mut self) -> DMA_5_W

Bit 29 - DMA Channel 5 Interrupt Enable

pub fn dma_6(&mut self) -> DMA_6_W

Bit 30 - DMA Channel 6 Interrupt Enable

pub fn dma_7(&mut self) -> DMA_7_W

Bit 31 - DMA Channel 7 Interrupt Enable

impl W<u32, Reg<u32, _USBHS_DEVEPT>>

pub fn epen0(&mut self) -> EPEN0_W

Bit 0 - Endpoint 0 Enable

pub fn epen1(&mut self) -> EPEN1_W

Bit 1 - Endpoint 1 Enable

pub fn epen2(&mut self) -> EPEN2_W

Bit 2 - Endpoint 2 Enable

pub fn epen3(&mut self) -> EPEN3_W

Bit 3 - Endpoint 3 Enable

pub fn epen4(&mut self) -> EPEN4_W

Bit 4 - Endpoint 4 Enable

pub fn epen5(&mut self) -> EPEN5_W

Bit 5 - Endpoint 5 Enable

pub fn epen6(&mut self) -> EPEN6_W

Bit 6 - Endpoint 6 Enable

pub fn epen7(&mut self) -> EPEN7_W

Bit 7 - Endpoint 7 Enable

pub fn epen8(&mut self) -> EPEN8_W

Bit 8 - Endpoint 8 Enable

pub fn epen9(&mut self) -> EPEN9_W

Bit 9 - Endpoint 9 Enable

pub fn eprst0(&mut self) -> EPRST0_W

Bit 16 - Endpoint 0 Reset

pub fn eprst1(&mut self) -> EPRST1_W

Bit 17 - Endpoint 1 Reset

pub fn eprst2(&mut self) -> EPRST2_W

Bit 18 - Endpoint 2 Reset

pub fn eprst3(&mut self) -> EPRST3_W

Bit 19 - Endpoint 3 Reset

pub fn eprst4(&mut self) -> EPRST4_W

Bit 20 - Endpoint 4 Reset

pub fn eprst5(&mut self) -> EPRST5_W

Bit 21 - Endpoint 5 Reset

pub fn eprst6(&mut self) -> EPRST6_W

Bit 22 - Endpoint 6 Reset

pub fn eprst7(&mut self) -> EPRST7_W

Bit 23 - Endpoint 7 Reset

pub fn eprst8(&mut self) -> EPRST8_W

Bit 24 - Endpoint 8 Reset

pub fn eprst9(&mut self) -> EPRST9_W

Bit 25 - Endpoint 9 Reset

impl W<u32, Reg<u32, _USBHS_DEVEPTCFG>>

pub fn alloc(&mut self) -> ALLOC_W

Bit 1 - Endpoint Memory Allocate

pub fn epbk(&mut self) -> EPBK_W

Bits 2:3 - Endpoint Banks

pub fn epsize(&mut self) -> EPSIZE_W

Bits 4:6 - Endpoint Size

pub fn epdir(&mut self) -> EPDIR_W

Bit 8 - Endpoint Direction

pub fn autosw(&mut self) -> AUTOSW_W

Bit 9 - Automatic Switch

pub fn eptype(&mut self) -> EPTYPE_W

Bits 11:12 - Endpoint Type

pub fn nbtrans(&mut self) -> NBTRANS_W

Bits 13:14 - Number of transactions per microframe for isochronous endpoint

impl W<u32, Reg<u32, _USBHS_DEVEPTICR_CTRL_MODE>>

pub fn txinic(&mut self) -> TXINIC_W

Bit 0 - Transmitted IN Data Interrupt Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W

Bit 1 - Received OUT Data Interrupt Clear

pub fn rxstpic(&mut self) -> RXSTPIC_W

Bit 2 - Received SETUP Interrupt Clear

pub fn nakoutic(&mut self) -> NAKOUTIC_W

Bit 3 - NAKed OUT Interrupt Clear

pub fn nakinic(&mut self) -> NAKINIC_W

Bit 4 - NAKed IN Interrupt Clear

pub fn overfic(&mut self) -> OVERFIC_W

Bit 5 - Overflow Interrupt Clear

pub fn stalledic(&mut self) -> STALLEDIC_W

Bit 6 - STALLed Interrupt Clear

pub fn shortpacketc(&mut self) -> SHORTPACKETC_W

Bit 7 - Short Packet Interrupt Clear

impl W<u32, Reg<u32, _USBHS_DEVEPTICR_ISO_MODE>>

pub fn txinic(&mut self) -> TXINIC_W

Bit 0 - Transmitted IN Data Interrupt Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W

Bit 1 - Received OUT Data Interrupt Clear

pub fn underfic(&mut self) -> UNDERFIC_W

Bit 2 - Underflow Interrupt Clear

pub fn hbisoinerric(&mut self) -> HBISOINERRIC_W

Bit 3 - High Bandwidth Isochronous IN Underflow Error Interrupt Clear

pub fn hbisoflushic(&mut self) -> HBISOFLUSHIC_W

Bit 4 - High Bandwidth Isochronous IN Flush Interrupt Clear

pub fn overfic(&mut self) -> OVERFIC_W

Bit 5 - Overflow Interrupt Clear

pub fn crcerric(&mut self) -> CRCERRIC_W

Bit 6 - CRC Error Interrupt Clear

pub fn shortpacketc(&mut self) -> SHORTPACKETC_W

Bit 7 - Short Packet Interrupt Clear

impl W<u32, Reg<u32, _USBHS_DEVEPTICR_BLK_MODE>>

pub fn txinic(&mut self) -> TXINIC_W

Bit 0 - Transmitted IN Data Interrupt Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W

Bit 1 - Received OUT Data Interrupt Clear

pub fn rxstpic(&mut self) -> RXSTPIC_W

Bit 2 - Received SETUP Interrupt Clear

pub fn nakoutic(&mut self) -> NAKOUTIC_W

Bit 3 - NAKed OUT Interrupt Clear

pub fn nakinic(&mut self) -> NAKINIC_W

Bit 4 - NAKed IN Interrupt Clear

pub fn overfic(&mut self) -> OVERFIC_W

Bit 5 - Overflow Interrupt Clear

pub fn stalledic(&mut self) -> STALLEDIC_W

Bit 6 - STALLed Interrupt Clear

pub fn shortpacketc(&mut self) -> SHORTPACKETC_W

Bit 7 - Short Packet Interrupt Clear

impl W<u32, Reg<u32, _USBHS_DEVEPTICR_INTRPT_MODE>>

pub fn txinic(&mut self) -> TXINIC_W

Bit 0 - Transmitted IN Data Interrupt Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W

Bit 1 - Received OUT Data Interrupt Clear

pub fn rxstpic(&mut self) -> RXSTPIC_W

Bit 2 - Received SETUP Interrupt Clear

pub fn nakoutic(&mut self) -> NAKOUTIC_W

Bit 3 - NAKed OUT Interrupt Clear

pub fn nakinic(&mut self) -> NAKINIC_W

Bit 4 - NAKed IN Interrupt Clear

pub fn overfic(&mut self) -> OVERFIC_W

Bit 5 - Overflow Interrupt Clear

pub fn stalledic(&mut self) -> STALLEDIC_W

Bit 6 - STALLed Interrupt Clear

pub fn shortpacketc(&mut self) -> SHORTPACKETC_W

Bit 7 - Short Packet Interrupt Clear

impl W<u32, Reg<u32, _USBHS_DEVEPTIFR_CTRL_MODE>>

pub fn txinis(&mut self) -> TXINIS_W

Bit 0 - Transmitted IN Data Interrupt Set

pub fn rxoutis(&mut self) -> RXOUTIS_W

Bit 1 - Received OUT Data Interrupt Set

pub fn rxstpis(&mut self) -> RXSTPIS_W

Bit 2 - Received SETUP Interrupt Set

pub fn nakoutis(&mut self) -> NAKOUTIS_W

Bit 3 - NAKed OUT Interrupt Set

pub fn nakinis(&mut self) -> NAKINIS_W

Bit 4 - NAKed IN Interrupt Set

pub fn overfis(&mut self) -> OVERFIS_W

Bit 5 - Overflow Interrupt Set

pub fn stalledis(&mut self) -> STALLEDIS_W

Bit 6 - STALLed Interrupt Set

pub fn shortpackets(&mut self) -> SHORTPACKETS_W

Bit 7 - Short Packet Interrupt Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W

Bit 12 - Number of Busy Banks Interrupt Set

impl W<u32, Reg<u32, _USBHS_DEVEPTIFR_ISO_MODE>>

pub fn txinis(&mut self) -> TXINIS_W

Bit 0 - Transmitted IN Data Interrupt Set

pub fn rxoutis(&mut self) -> RXOUTIS_W

Bit 1 - Received OUT Data Interrupt Set

pub fn underfis(&mut self) -> UNDERFIS_W

Bit 2 - Underflow Interrupt Set

pub fn hbisoinerris(&mut self) -> HBISOINERRIS_W

Bit 3 - High Bandwidth Isochronous IN Underflow Error Interrupt Set

pub fn hbisoflushis(&mut self) -> HBISOFLUSHIS_W

Bit 4 - High Bandwidth Isochronous IN Flush Interrupt Set

pub fn overfis(&mut self) -> OVERFIS_W

Bit 5 - Overflow Interrupt Set

pub fn crcerris(&mut self) -> CRCERRIS_W

Bit 6 - CRC Error Interrupt Set

pub fn shortpackets(&mut self) -> SHORTPACKETS_W

Bit 7 - Short Packet Interrupt Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W

Bit 12 - Number of Busy Banks Interrupt Set

impl W<u32, Reg<u32, _USBHS_DEVEPTIFR_BLK_MODE>>

pub fn txinis(&mut self) -> TXINIS_W

Bit 0 - Transmitted IN Data Interrupt Set

pub fn rxoutis(&mut self) -> RXOUTIS_W

Bit 1 - Received OUT Data Interrupt Set

pub fn rxstpis(&mut self) -> RXSTPIS_W

Bit 2 - Received SETUP Interrupt Set

pub fn nakoutis(&mut self) -> NAKOUTIS_W

Bit 3 - NAKed OUT Interrupt Set

pub fn nakinis(&mut self) -> NAKINIS_W

Bit 4 - NAKed IN Interrupt Set

pub fn overfis(&mut self) -> OVERFIS_W

Bit 5 - Overflow Interrupt Set

pub fn stalledis(&mut self) -> STALLEDIS_W

Bit 6 - STALLed Interrupt Set

pub fn shortpackets(&mut self) -> SHORTPACKETS_W

Bit 7 - Short Packet Interrupt Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W

Bit 12 - Number of Busy Banks Interrupt Set

impl W<u32, Reg<u32, _USBHS_DEVEPTIFR_INTRPT_MODE>>

pub fn txinis(&mut self) -> TXINIS_W

Bit 0 - Transmitted IN Data Interrupt Set

pub fn rxoutis(&mut self) -> RXOUTIS_W

Bit 1 - Received OUT Data Interrupt Set

pub fn rxstpis(&mut self) -> RXSTPIS_W

Bit 2 - Received SETUP Interrupt Set

pub fn nakoutis(&mut self) -> NAKOUTIS_W

Bit 3 - NAKed OUT Interrupt Set

pub fn nakinis(&mut self) -> NAKINIS_W

Bit 4 - NAKed IN Interrupt Set

pub fn overfis(&mut self) -> OVERFIS_W

Bit 5 - Overflow Interrupt Set

pub fn stalledis(&mut self) -> STALLEDIS_W

Bit 6 - STALLed Interrupt Set

pub fn shortpackets(&mut self) -> SHORTPACKETS_W

Bit 7 - Short Packet Interrupt Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W

Bit 12 - Number of Busy Banks Interrupt Set

impl W<u32, Reg<u32, _USBHS_DEVEPTIER_CTRL_MODE>>

pub fn txines(&mut self) -> TXINES_W

Bit 0 - Transmitted IN Data Interrupt Enable

pub fn rxoutes(&mut self) -> RXOUTES_W

Bit 1 - Received OUT Data Interrupt Enable

pub fn rxstpes(&mut self) -> RXSTPES_W

Bit 2 - Received SETUP Interrupt Enable

pub fn nakoutes(&mut self) -> NAKOUTES_W

Bit 3 - NAKed OUT Interrupt Enable

pub fn nakines(&mut self) -> NAKINES_W

Bit 4 - NAKed IN Interrupt Enable

pub fn overfes(&mut self) -> OVERFES_W

Bit 5 - Overflow Interrupt Enable

pub fn stalledes(&mut self) -> STALLEDES_W

Bit 6 - STALLed Interrupt Enable

pub fn shortpacketes(&mut self) -> SHORTPACKETES_W

Bit 7 - Short Packet Interrupt Enable

pub fn nbusybkes(&mut self) -> NBUSYBKES_W

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbks(&mut self) -> KILLBKS_W

Bit 13 - Kill IN Bank

pub fn fifocons(&mut self) -> FIFOCONS_W

Bit 14 - FIFO Control

pub fn epdishdmas(&mut self) -> EPDISHDMAS_W

Bit 16 - Endpoint Interrupts Disable HDMA Request Enable

pub fn nyetdiss(&mut self) -> NYETDISS_W

Bit 17 - NYET Token Disable Enable

pub fn rstdts(&mut self) -> RSTDTS_W

Bit 18 - Reset Data Toggle Enable

pub fn stallrqs(&mut self) -> STALLRQS_W

Bit 19 - STALL Request Enable

impl W<u32, Reg<u32, _USBHS_DEVEPTIER_ISO_MODE>>

pub fn txines(&mut self) -> TXINES_W

Bit 0 - Transmitted IN Data Interrupt Enable

pub fn rxoutes(&mut self) -> RXOUTES_W

Bit 1 - Received OUT Data Interrupt Enable

pub fn underfes(&mut self) -> UNDERFES_W

Bit 2 - Underflow Interrupt Enable

pub fn hbisoinerres(&mut self) -> HBISOINERRES_W

Bit 3 - High Bandwidth Isochronous IN Underflow Error Interrupt Enable

pub fn hbisoflushes(&mut self) -> HBISOFLUSHES_W

Bit 4 - High Bandwidth Isochronous IN Flush Interrupt Enable

pub fn overfes(&mut self) -> OVERFES_W

Bit 5 - Overflow Interrupt Enable

pub fn crcerres(&mut self) -> CRCERRES_W

Bit 6 - CRC Error Interrupt Enable

pub fn shortpacketes(&mut self) -> SHORTPACKETES_W

Bit 7 - Short Packet Interrupt Enable

pub fn mdataes(&mut self) -> MDATAES_W

Bit 8 - MData Interrupt Enable

pub fn dataxes(&mut self) -> DATAXES_W

Bit 9 - DataX Interrupt Enable

pub fn errortranses(&mut self) -> ERRORTRANSES_W

Bit 10 - Transaction Error Interrupt Enable

pub fn nbusybkes(&mut self) -> NBUSYBKES_W

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbks(&mut self) -> KILLBKS_W

Bit 13 - Kill IN Bank

pub fn fifocons(&mut self) -> FIFOCONS_W

Bit 14 - FIFO Control

pub fn epdishdmas(&mut self) -> EPDISHDMAS_W

Bit 16 - Endpoint Interrupts Disable HDMA Request Enable

pub fn rstdts(&mut self) -> RSTDTS_W

Bit 18 - Reset Data Toggle Enable

impl W<u32, Reg<u32, _USBHS_DEVEPTIER_BLK_MODE>>

pub fn txines(&mut self) -> TXINES_W

Bit 0 - Transmitted IN Data Interrupt Enable

pub fn rxoutes(&mut self) -> RXOUTES_W

Bit 1 - Received OUT Data Interrupt Enable

pub fn rxstpes(&mut self) -> RXSTPES_W

Bit 2 - Received SETUP Interrupt Enable

pub fn nakoutes(&mut self) -> NAKOUTES_W

Bit 3 - NAKed OUT Interrupt Enable

pub fn nakines(&mut self) -> NAKINES_W

Bit 4 - NAKed IN Interrupt Enable

pub fn overfes(&mut self) -> OVERFES_W

Bit 5 - Overflow Interrupt Enable

pub fn stalledes(&mut self) -> STALLEDES_W

Bit 6 - STALLed Interrupt Enable

pub fn shortpacketes(&mut self) -> SHORTPACKETES_W

Bit 7 - Short Packet Interrupt Enable

pub fn nbusybkes(&mut self) -> NBUSYBKES_W

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbks(&mut self) -> KILLBKS_W

Bit 13 - Kill IN Bank

pub fn fifocons(&mut self) -> FIFOCONS_W

Bit 14 - FIFO Control

pub fn epdishdmas(&mut self) -> EPDISHDMAS_W

Bit 16 - Endpoint Interrupts Disable HDMA Request Enable

pub fn nyetdiss(&mut self) -> NYETDISS_W

Bit 17 - NYET Token Disable Enable

pub fn rstdts(&mut self) -> RSTDTS_W

Bit 18 - Reset Data Toggle Enable

pub fn stallrqs(&mut self) -> STALLRQS_W

Bit 19 - STALL Request Enable

impl W<u32, Reg<u32, _USBHS_DEVEPTIER_INTRPT_MODE>>

pub fn txines(&mut self) -> TXINES_W

Bit 0 - Transmitted IN Data Interrupt Enable

pub fn rxoutes(&mut self) -> RXOUTES_W

Bit 1 - Received OUT Data Interrupt Enable

pub fn rxstpes(&mut self) -> RXSTPES_W

Bit 2 - Received SETUP Interrupt Enable

pub fn nakoutes(&mut self) -> NAKOUTES_W

Bit 3 - NAKed OUT Interrupt Enable

pub fn nakines(&mut self) -> NAKINES_W

Bit 4 - NAKed IN Interrupt Enable

pub fn overfes(&mut self) -> OVERFES_W

Bit 5 - Overflow Interrupt Enable

pub fn stalledes(&mut self) -> STALLEDES_W

Bit 6 - STALLed Interrupt Enable

pub fn shortpacketes(&mut self) -> SHORTPACKETES_W

Bit 7 - Short Packet Interrupt Enable

pub fn nbusybkes(&mut self) -> NBUSYBKES_W

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbks(&mut self) -> KILLBKS_W

Bit 13 - Kill IN Bank

pub fn fifocons(&mut self) -> FIFOCONS_W

Bit 14 - FIFO Control

pub fn epdishdmas(&mut self) -> EPDISHDMAS_W

Bit 16 - Endpoint Interrupts Disable HDMA Request Enable

pub fn nyetdiss(&mut self) -> NYETDISS_W

Bit 17 - NYET Token Disable Enable

pub fn rstdts(&mut self) -> RSTDTS_W

Bit 18 - Reset Data Toggle Enable

pub fn stallrqs(&mut self) -> STALLRQS_W

Bit 19 - STALL Request Enable

impl W<u32, Reg<u32, _USBHS_DEVEPTIDR_CTRL_MODE>>

pub fn txinec(&mut self) -> TXINEC_W

Bit 0 - Transmitted IN Interrupt Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W

Bit 1 - Received OUT Data Interrupt Clear

pub fn rxstpec(&mut self) -> RXSTPEC_W

Bit 2 - Received SETUP Interrupt Clear

pub fn nakoutec(&mut self) -> NAKOUTEC_W

Bit 3 - NAKed OUT Interrupt Clear

pub fn nakinec(&mut self) -> NAKINEC_W

Bit 4 - NAKed IN Interrupt Clear

pub fn overfec(&mut self) -> OVERFEC_W

Bit 5 - Overflow Interrupt Clear

pub fn stalledec(&mut self) -> STALLEDEC_W

Bit 6 - STALLed Interrupt Clear

pub fn shortpacketec(&mut self) -> SHORTPACKETEC_W

Bit 7 - Shortpacket Interrupt Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W

Bit 12 - Number of Busy Banks Interrupt Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W

Bit 14 - FIFO Control Clear

pub fn epdishdmac(&mut self) -> EPDISHDMAC_W

Bit 16 - Endpoint Interrupts Disable HDMA Request Clear

pub fn nyetdisc(&mut self) -> NYETDISC_W

Bit 17 - NYET Token Disable Clear

pub fn stallrqc(&mut self) -> STALLRQC_W

Bit 19 - STALL Request Clear

impl W<u32, Reg<u32, _USBHS_DEVEPTIDR_ISO_MODE>>

pub fn txinec(&mut self) -> TXINEC_W

Bit 0 - Transmitted IN Interrupt Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W

Bit 1 - Received OUT Data Interrupt Clear

pub fn underfec(&mut self) -> UNDERFEC_W

Bit 2 - Underflow Interrupt Clear

pub fn hbisoinerrec(&mut self) -> HBISOINERREC_W

Bit 3 - High Bandwidth Isochronous IN Underflow Error Interrupt Clear

pub fn hbisoflushec(&mut self) -> HBISOFLUSHEC_W

Bit 4 - High Bandwidth Isochronous IN Flush Interrupt Clear

pub fn overfec(&mut self) -> OVERFEC_W

Bit 5 - Overflow Interrupt Clear

pub fn shortpacketec(&mut self) -> SHORTPACKETEC_W

Bit 7 - Shortpacket Interrupt Clear

pub fn mdataec(&mut self) -> MDATAEC_W

Bit 8 - MData Interrupt Clear

pub fn dataxec(&mut self) -> DATAXEC_W

Bit 9 - DataX Interrupt Clear

pub fn errortransec(&mut self) -> ERRORTRANSEC_W

Bit 10 - Transaction Error Interrupt Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W

Bit 12 - Number of Busy Banks Interrupt Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W

Bit 14 - FIFO Control Clear

pub fn epdishdmac(&mut self) -> EPDISHDMAC_W

Bit 16 - Endpoint Interrupts Disable HDMA Request Clear

impl W<u32, Reg<u32, _USBHS_DEVEPTIDR_BLK_MODE>>

pub fn txinec(&mut self) -> TXINEC_W

Bit 0 - Transmitted IN Interrupt Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W

Bit 1 - Received OUT Data Interrupt Clear

pub fn rxstpec(&mut self) -> RXSTPEC_W

Bit 2 - Received SETUP Interrupt Clear

pub fn nakoutec(&mut self) -> NAKOUTEC_W

Bit 3 - NAKed OUT Interrupt Clear

pub fn nakinec(&mut self) -> NAKINEC_W

Bit 4 - NAKed IN Interrupt Clear

pub fn overfec(&mut self) -> OVERFEC_W

Bit 5 - Overflow Interrupt Clear

pub fn stalledec(&mut self) -> STALLEDEC_W

Bit 6 - STALLed Interrupt Clear

pub fn shortpacketec(&mut self) -> SHORTPACKETEC_W

Bit 7 - Shortpacket Interrupt Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W

Bit 12 - Number of Busy Banks Interrupt Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W

Bit 14 - FIFO Control Clear

pub fn epdishdmac(&mut self) -> EPDISHDMAC_W

Bit 16 - Endpoint Interrupts Disable HDMA Request Clear

pub fn nyetdisc(&mut self) -> NYETDISC_W

Bit 17 - NYET Token Disable Clear

pub fn stallrqc(&mut self) -> STALLRQC_W

Bit 19 - STALL Request Clear

impl W<u32, Reg<u32, _USBHS_DEVEPTIDR_INTRPT_MODE>>

pub fn txinec(&mut self) -> TXINEC_W

Bit 0 - Transmitted IN Interrupt Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W

Bit 1 - Received OUT Data Interrupt Clear

pub fn rxstpec(&mut self) -> RXSTPEC_W

Bit 2 - Received SETUP Interrupt Clear

pub fn nakoutec(&mut self) -> NAKOUTEC_W

Bit 3 - NAKed OUT Interrupt Clear

pub fn nakinec(&mut self) -> NAKINEC_W

Bit 4 - NAKed IN Interrupt Clear

pub fn overfec(&mut self) -> OVERFEC_W

Bit 5 - Overflow Interrupt Clear

pub fn stalledec(&mut self) -> STALLEDEC_W

Bit 6 - STALLed Interrupt Clear

pub fn shortpacketec(&mut self) -> SHORTPACKETEC_W

Bit 7 - Shortpacket Interrupt Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W

Bit 12 - Number of Busy Banks Interrupt Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W

Bit 14 - FIFO Control Clear

pub fn epdishdmac(&mut self) -> EPDISHDMAC_W

Bit 16 - Endpoint Interrupts Disable HDMA Request Clear

pub fn nyetdisc(&mut self) -> NYETDISC_W

Bit 17 - NYET Token Disable Clear

pub fn stallrqc(&mut self) -> STALLRQC_W

Bit 19 - STALL Request Clear

impl W<u32, Reg<u32, _USBHS_HSTCTRL>>

pub fn sofe(&mut self) -> SOFE_W

Bit 8 - Start of Frame Generation Enable

pub fn reset(&mut self) -> RESET_W

Bit 9 - Send USB Reset

pub fn resume(&mut self) -> RESUME_W

Bit 10 - Send USB Resume

pub fn spdconf(&mut self) -> SPDCONF_W

Bits 12:13 - Mode Configuration

impl W<u32, Reg<u32, _USBHS_HSTICR>>

pub fn dconnic(&mut self) -> DCONNIC_W

Bit 0 - Device Connection Interrupt Clear

pub fn ddiscic(&mut self) -> DDISCIC_W

Bit 1 - Device Disconnection Interrupt Clear

pub fn rstic(&mut self) -> RSTIC_W

Bit 2 - USB Reset Sent Interrupt Clear

pub fn rsmedic(&mut self) -> RSMEDIC_W

Bit 3 - Downstream Resume Sent Interrupt Clear

pub fn rxrsmic(&mut self) -> RXRSMIC_W

Bit 4 - Upstream Resume Received Interrupt Clear

pub fn hsofic(&mut self) -> HSOFIC_W

Bit 5 - Host Start of Frame Interrupt Clear

pub fn hwupic(&mut self) -> HWUPIC_W

Bit 6 - Host Wake-Up Interrupt Clear

impl W<u32, Reg<u32, _USBHS_HSTIFR>>

pub fn dconnis(&mut self) -> DCONNIS_W

Bit 0 - Device Connection Interrupt Set

pub fn ddiscis(&mut self) -> DDISCIS_W

Bit 1 - Device Disconnection Interrupt Set

pub fn rstis(&mut self) -> RSTIS_W

Bit 2 - USB Reset Sent Interrupt Set

pub fn rsmedis(&mut self) -> RSMEDIS_W

Bit 3 - Downstream Resume Sent Interrupt Set

pub fn rxrsmis(&mut self) -> RXRSMIS_W

Bit 4 - Upstream Resume Received Interrupt Set

pub fn hsofis(&mut self) -> HSOFIS_W

Bit 5 - Host Start of Frame Interrupt Set

pub fn hwupis(&mut self) -> HWUPIS_W

Bit 6 - Host Wake-Up Interrupt Set

pub fn dma_0(&mut self) -> DMA_0_W

Bit 25 - DMA Channel 0 Interrupt Set

pub fn dma_1(&mut self) -> DMA_1_W

Bit 26 - DMA Channel 1 Interrupt Set

pub fn dma_2(&mut self) -> DMA_2_W

Bit 27 - DMA Channel 2 Interrupt Set

pub fn dma_3(&mut self) -> DMA_3_W

Bit 28 - DMA Channel 3 Interrupt Set

pub fn dma_4(&mut self) -> DMA_4_W

Bit 29 - DMA Channel 4 Interrupt Set

pub fn dma_5(&mut self) -> DMA_5_W

Bit 30 - DMA Channel 5 Interrupt Set

pub fn dma_6(&mut self) -> DMA_6_W

Bit 31 - DMA Channel 6 Interrupt Set

impl W<u32, Reg<u32, _USBHS_HSTIDR>>

pub fn dconniec(&mut self) -> DCONNIEC_W

Bit 0 - Device Connection Interrupt Disable

pub fn ddisciec(&mut self) -> DDISCIEC_W

Bit 1 - Device Disconnection Interrupt Disable

pub fn rstiec(&mut self) -> RSTIEC_W

Bit 2 - USB Reset Sent Interrupt Disable

pub fn rsmediec(&mut self) -> RSMEDIEC_W

Bit 3 - Downstream Resume Sent Interrupt Disable

pub fn rxrsmiec(&mut self) -> RXRSMIEC_W

Bit 4 - Upstream Resume Received Interrupt Disable

pub fn hsofiec(&mut self) -> HSOFIEC_W

Bit 5 - Host Start of Frame Interrupt Disable

pub fn hwupiec(&mut self) -> HWUPIEC_W

Bit 6 - Host Wake-Up Interrupt Disable

pub fn pep_0(&mut self) -> PEP_0_W

Bit 8 - Pipe 0 Interrupt Disable

pub fn pep_1(&mut self) -> PEP_1_W

Bit 9 - Pipe 1 Interrupt Disable

pub fn pep_2(&mut self) -> PEP_2_W

Bit 10 - Pipe 2 Interrupt Disable

pub fn pep_3(&mut self) -> PEP_3_W

Bit 11 - Pipe 3 Interrupt Disable

pub fn pep_4(&mut self) -> PEP_4_W

Bit 12 - Pipe 4 Interrupt Disable

pub fn pep_5(&mut self) -> PEP_5_W

Bit 13 - Pipe 5 Interrupt Disable

pub fn pep_6(&mut self) -> PEP_6_W

Bit 14 - Pipe 6 Interrupt Disable

pub fn pep_7(&mut self) -> PEP_7_W

Bit 15 - Pipe 7 Interrupt Disable

pub fn pep_8(&mut self) -> PEP_8_W

Bit 16 - Pipe 8 Interrupt Disable

pub fn pep_9(&mut self) -> PEP_9_W

Bit 17 - Pipe 9 Interrupt Disable

pub fn dma_0(&mut self) -> DMA_0_W

Bit 25 - DMA Channel 0 Interrupt Disable

pub fn dma_1(&mut self) -> DMA_1_W

Bit 26 - DMA Channel 1 Interrupt Disable

pub fn dma_2(&mut self) -> DMA_2_W

Bit 27 - DMA Channel 2 Interrupt Disable

pub fn dma_3(&mut self) -> DMA_3_W

Bit 28 - DMA Channel 3 Interrupt Disable

pub fn dma_4(&mut self) -> DMA_4_W

Bit 29 - DMA Channel 4 Interrupt Disable

pub fn dma_5(&mut self) -> DMA_5_W

Bit 30 - DMA Channel 5 Interrupt Disable

pub fn dma_6(&mut self) -> DMA_6_W

Bit 31 - DMA Channel 6 Interrupt Disable

impl W<u32, Reg<u32, _USBHS_HSTIER>>

pub fn dconnies(&mut self) -> DCONNIES_W

Bit 0 - Device Connection Interrupt Enable

pub fn ddiscies(&mut self) -> DDISCIES_W

Bit 1 - Device Disconnection Interrupt Enable

pub fn rsties(&mut self) -> RSTIES_W

Bit 2 - USB Reset Sent Interrupt Enable

pub fn rsmedies(&mut self) -> RSMEDIES_W

Bit 3 - Downstream Resume Sent Interrupt Enable

pub fn rxrsmies(&mut self) -> RXRSMIES_W

Bit 4 - Upstream Resume Received Interrupt Enable

pub fn hsofies(&mut self) -> HSOFIES_W

Bit 5 - Host Start of Frame Interrupt Enable

pub fn hwupies(&mut self) -> HWUPIES_W

Bit 6 - Host Wake-Up Interrupt Enable

pub fn pep_0(&mut self) -> PEP_0_W

Bit 8 - Pipe 0 Interrupt Enable

pub fn pep_1(&mut self) -> PEP_1_W

Bit 9 - Pipe 1 Interrupt Enable

pub fn pep_2(&mut self) -> PEP_2_W

Bit 10 - Pipe 2 Interrupt Enable

pub fn pep_3(&mut self) -> PEP_3_W

Bit 11 - Pipe 3 Interrupt Enable

pub fn pep_4(&mut self) -> PEP_4_W

Bit 12 - Pipe 4 Interrupt Enable

pub fn pep_5(&mut self) -> PEP_5_W

Bit 13 - Pipe 5 Interrupt Enable

pub fn pep_6(&mut self) -> PEP_6_W

Bit 14 - Pipe 6 Interrupt Enable

pub fn pep_7(&mut self) -> PEP_7_W

Bit 15 - Pipe 7 Interrupt Enable

pub fn pep_8(&mut self) -> PEP_8_W

Bit 16 - Pipe 8 Interrupt Enable

pub fn pep_9(&mut self) -> PEP_9_W

Bit 17 - Pipe 9 Interrupt Enable

pub fn dma_0(&mut self) -> DMA_0_W

Bit 25 - DMA Channel 0 Interrupt Enable

pub fn dma_1(&mut self) -> DMA_1_W

Bit 26 - DMA Channel 1 Interrupt Enable

pub fn dma_2(&mut self) -> DMA_2_W

Bit 27 - DMA Channel 2 Interrupt Enable

pub fn dma_3(&mut self) -> DMA_3_W

Bit 28 - DMA Channel 3 Interrupt Enable

pub fn dma_4(&mut self) -> DMA_4_W

Bit 29 - DMA Channel 4 Interrupt Enable

pub fn dma_5(&mut self) -> DMA_5_W

Bit 30 - DMA Channel 5 Interrupt Enable

pub fn dma_6(&mut self) -> DMA_6_W

Bit 31 - DMA Channel 6 Interrupt Enable

impl W<u32, Reg<u32, _USBHS_HSTPIP>>

pub fn pen0(&mut self) -> PEN0_W

Bit 0 - Pipe 0 Enable

pub fn pen1(&mut self) -> PEN1_W

Bit 1 - Pipe 1 Enable

pub fn pen2(&mut self) -> PEN2_W

Bit 2 - Pipe 2 Enable

pub fn pen3(&mut self) -> PEN3_W

Bit 3 - Pipe 3 Enable

pub fn pen4(&mut self) -> PEN4_W

Bit 4 - Pipe 4 Enable

pub fn pen5(&mut self) -> PEN5_W

Bit 5 - Pipe 5 Enable

pub fn pen6(&mut self) -> PEN6_W

Bit 6 - Pipe 6 Enable

pub fn pen7(&mut self) -> PEN7_W

Bit 7 - Pipe 7 Enable

pub fn pen8(&mut self) -> PEN8_W

Bit 8 - Pipe 8 Enable

pub fn prst0(&mut self) -> PRST0_W

Bit 16 - Pipe 0 Reset

pub fn prst1(&mut self) -> PRST1_W

Bit 17 - Pipe 1 Reset

pub fn prst2(&mut self) -> PRST2_W

Bit 18 - Pipe 2 Reset

pub fn prst3(&mut self) -> PRST3_W

Bit 19 - Pipe 3 Reset

pub fn prst4(&mut self) -> PRST4_W

Bit 20 - Pipe 4 Reset

pub fn prst5(&mut self) -> PRST5_W

Bit 21 - Pipe 5 Reset

pub fn prst6(&mut self) -> PRST6_W

Bit 22 - Pipe 6 Reset

pub fn prst7(&mut self) -> PRST7_W

Bit 23 - Pipe 7 Reset

pub fn prst8(&mut self) -> PRST8_W

Bit 24 - Pipe 8 Reset

impl W<u32, Reg<u32, _USBHS_HSTFNUM>>

pub fn mfnum(&mut self) -> MFNUM_W

Bits 0:2 - Micro Frame Number

pub fn fnum(&mut self) -> FNUM_W

Bits 3:13 - Frame Number

pub fn flenhigh(&mut self) -> FLENHIGH_W

Bits 16:23 - Frame Length

impl W<u32, Reg<u32, _USBHS_HSTADDR1>>

pub fn hstaddrp0(&mut self) -> HSTADDRP0_W

Bits 0:6 - USB Host Address

pub fn hstaddrp1(&mut self) -> HSTADDRP1_W

Bits 8:14 - USB Host Address

pub fn hstaddrp2(&mut self) -> HSTADDRP2_W

Bits 16:22 - USB Host Address

pub fn hstaddrp3(&mut self) -> HSTADDRP3_W

Bits 24:30 - USB Host Address

impl W<u32, Reg<u32, _USBHS_HSTADDR2>>

pub fn hstaddrp4(&mut self) -> HSTADDRP4_W

Bits 0:6 - USB Host Address

pub fn hstaddrp5(&mut self) -> HSTADDRP5_W

Bits 8:14 - USB Host Address

pub fn hstaddrp6(&mut self) -> HSTADDRP6_W

Bits 16:22 - USB Host Address

pub fn hstaddrp7(&mut self) -> HSTADDRP7_W

Bits 24:30 - USB Host Address

impl W<u32, Reg<u32, _USBHS_HSTADDR3>>

pub fn hstaddrp8(&mut self) -> HSTADDRP8_W

Bits 0:6 - USB Host Address

pub fn hstaddrp9(&mut self) -> HSTADDRP9_W

Bits 8:14 - USB Host Address

impl W<u32, Reg<u32, _USBHS_HSTPIPCFG>>

pub fn alloc(&mut self) -> ALLOC_W

Bit 1 - Pipe Memory Allocate

pub fn pbk(&mut self) -> PBK_W

Bits 2:3 - Pipe Banks

pub fn psize(&mut self) -> PSIZE_W

Bits 4:6 - Pipe Size

pub fn ptoken(&mut self) -> PTOKEN_W

Bits 8:9 - Pipe Token

pub fn autosw(&mut self) -> AUTOSW_W

Bit 10 - Automatic Switch

pub fn ptype(&mut self) -> PTYPE_W

Bits 12:13 - Pipe Type

pub fn pepnum(&mut self) -> PEPNUM_W

Bits 16:19 - Pipe Endpoint Number

pub fn intfrq(&mut self) -> INTFRQ_W

Bits 24:31 - Pipe Interrupt Request Frequency

impl W<u32, Reg<u32, _USBHS_HSTPIPCFG_CTRL_BULK_MODE>>

pub fn alloc(&mut self) -> ALLOC_W

Bit 1 - Pipe Memory Allocate

pub fn pbk(&mut self) -> PBK_W

Bits 2:3 - Pipe Banks

pub fn psize(&mut self) -> PSIZE_W

Bits 4:6 - Pipe Size

pub fn ptoken(&mut self) -> PTOKEN_W

Bits 8:9 - Pipe Token

pub fn autosw(&mut self) -> AUTOSW_W

Bit 10 - Automatic Switch

pub fn ptype(&mut self) -> PTYPE_W

Bits 12:13 - Pipe Type

pub fn pepnum(&mut self) -> PEPNUM_W

Bits 16:19 - Pipe Endpoint Number

pub fn pingen(&mut self) -> PINGEN_W

Bit 20 - Ping Enable

pub fn binterval(&mut self) -> BINTERVAL_W

Bits 24:31 - bInterval Parameter for the Bulk-Out/Ping Transaction

impl W<u32, Reg<u32, _USBHS_HSTPIPICR_CTRL_MODE>>

pub fn rxinic(&mut self) -> RXINIC_W

Bit 0 - Received IN Data Interrupt Clear

pub fn txoutic(&mut self) -> TXOUTIC_W

Bit 1 - Transmitted OUT Data Interrupt Clear

pub fn txstpic(&mut self) -> TXSTPIC_W

Bit 2 - Transmitted SETUP Interrupt Clear

pub fn nakedic(&mut self) -> NAKEDIC_W

Bit 4 - NAKed Interrupt Clear

pub fn overfic(&mut self) -> OVERFIC_W

Bit 5 - Overflow Interrupt Clear

pub fn rxstalldic(&mut self) -> RXSTALLDIC_W

Bit 6 - Received STALLed Interrupt Clear

pub fn shortpacketic(&mut self) -> SHORTPACKETIC_W

Bit 7 - Short Packet Interrupt Clear

impl W<u32, Reg<u32, _USBHS_HSTPIPICR_ISO_MODE>>

pub fn rxinic(&mut self) -> RXINIC_W

Bit 0 - Received IN Data Interrupt Clear

pub fn txoutic(&mut self) -> TXOUTIC_W

Bit 1 - Transmitted OUT Data Interrupt Clear

pub fn underfic(&mut self) -> UNDERFIC_W

Bit 2 - Underflow Interrupt Clear

pub fn nakedic(&mut self) -> NAKEDIC_W

Bit 4 - NAKed Interrupt Clear

pub fn overfic(&mut self) -> OVERFIC_W

Bit 5 - Overflow Interrupt Clear

pub fn crcerric(&mut self) -> CRCERRIC_W

Bit 6 - CRC Error Interrupt Clear

pub fn shortpacketic(&mut self) -> SHORTPACKETIC_W

Bit 7 - Short Packet Interrupt Clear

impl W<u32, Reg<u32, _USBHS_HSTPIPICR_BLK_MODE>>

pub fn rxinic(&mut self) -> RXINIC_W

Bit 0 - Received IN Data Interrupt Clear

pub fn txoutic(&mut self) -> TXOUTIC_W

Bit 1 - Transmitted OUT Data Interrupt Clear

pub fn txstpic(&mut self) -> TXSTPIC_W

Bit 2 - Transmitted SETUP Interrupt Clear

pub fn nakedic(&mut self) -> NAKEDIC_W

Bit 4 - NAKed Interrupt Clear

pub fn overfic(&mut self) -> OVERFIC_W

Bit 5 - Overflow Interrupt Clear

pub fn rxstalldic(&mut self) -> RXSTALLDIC_W

Bit 6 - Received STALLed Interrupt Clear

pub fn shortpacketic(&mut self) -> SHORTPACKETIC_W

Bit 7 - Short Packet Interrupt Clear

impl W<u32, Reg<u32, _USBHS_HSTPIPICR_INTRPT_MODE>>

pub fn rxinic(&mut self) -> RXINIC_W

Bit 0 - Received IN Data Interrupt Clear

pub fn txoutic(&mut self) -> TXOUTIC_W

Bit 1 - Transmitted OUT Data Interrupt Clear

pub fn underfic(&mut self) -> UNDERFIC_W

Bit 2 - Underflow Interrupt Clear

pub fn nakedic(&mut self) -> NAKEDIC_W

Bit 4 - NAKed Interrupt Clear

pub fn overfic(&mut self) -> OVERFIC_W

Bit 5 - Overflow Interrupt Clear

pub fn rxstalldic(&mut self) -> RXSTALLDIC_W

Bit 6 - Received STALLed Interrupt Clear

pub fn shortpacketic(&mut self) -> SHORTPACKETIC_W

Bit 7 - Short Packet Interrupt Clear

impl W<u32, Reg<u32, _USBHS_HSTPIPIFR_CTRL_MODE>>

pub fn rxinis(&mut self) -> RXINIS_W

Bit 0 - Received IN Data Interrupt Set

pub fn txoutis(&mut self) -> TXOUTIS_W

Bit 1 - Transmitted OUT Data Interrupt Set

pub fn txstpis(&mut self) -> TXSTPIS_W

Bit 2 - Transmitted SETUP Interrupt Set

pub fn perris(&mut self) -> PERRIS_W

Bit 3 - Pipe Error Interrupt Set

pub fn nakedis(&mut self) -> NAKEDIS_W

Bit 4 - NAKed Interrupt Set

pub fn overfis(&mut self) -> OVERFIS_W

Bit 5 - Overflow Interrupt Set

pub fn rxstalldis(&mut self) -> RXSTALLDIS_W

Bit 6 - Received STALLed Interrupt Set

pub fn shortpacketis(&mut self) -> SHORTPACKETIS_W

Bit 7 - Short Packet Interrupt Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W

Bit 12 - Number of Busy Banks Set

impl W<u32, Reg<u32, _USBHS_HSTPIPIFR_ISO_MODE>>

pub fn rxinis(&mut self) -> RXINIS_W

Bit 0 - Received IN Data Interrupt Set

pub fn txoutis(&mut self) -> TXOUTIS_W

Bit 1 - Transmitted OUT Data Interrupt Set

pub fn underfis(&mut self) -> UNDERFIS_W

Bit 2 - Underflow Interrupt Set

pub fn perris(&mut self) -> PERRIS_W

Bit 3 - Pipe Error Interrupt Set

pub fn nakedis(&mut self) -> NAKEDIS_W

Bit 4 - NAKed Interrupt Set

pub fn overfis(&mut self) -> OVERFIS_W

Bit 5 - Overflow Interrupt Set

pub fn crcerris(&mut self) -> CRCERRIS_W

Bit 6 - CRC Error Interrupt Set

pub fn shortpacketis(&mut self) -> SHORTPACKETIS_W

Bit 7 - Short Packet Interrupt Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W

Bit 12 - Number of Busy Banks Set

impl W<u32, Reg<u32, _USBHS_HSTPIPIFR_BLK_MODE>>

pub fn rxinis(&mut self) -> RXINIS_W

Bit 0 - Received IN Data Interrupt Set

pub fn txoutis(&mut self) -> TXOUTIS_W

Bit 1 - Transmitted OUT Data Interrupt Set

pub fn txstpis(&mut self) -> TXSTPIS_W

Bit 2 - Transmitted SETUP Interrupt Set

pub fn perris(&mut self) -> PERRIS_W

Bit 3 - Pipe Error Interrupt Set

pub fn nakedis(&mut self) -> NAKEDIS_W

Bit 4 - NAKed Interrupt Set

pub fn overfis(&mut self) -> OVERFIS_W

Bit 5 - Overflow Interrupt Set

pub fn rxstalldis(&mut self) -> RXSTALLDIS_W

Bit 6 - Received STALLed Interrupt Set

pub fn shortpacketis(&mut self) -> SHORTPACKETIS_W

Bit 7 - Short Packet Interrupt Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W

Bit 12 - Number of Busy Banks Set

impl W<u32, Reg<u32, _USBHS_HSTPIPIFR_INTRPT_MODE>>

pub fn rxinis(&mut self) -> RXINIS_W

Bit 0 - Received IN Data Interrupt Set

pub fn txoutis(&mut self) -> TXOUTIS_W

Bit 1 - Transmitted OUT Data Interrupt Set

pub fn underfis(&mut self) -> UNDERFIS_W

Bit 2 - Underflow Interrupt Set

pub fn perris(&mut self) -> PERRIS_W

Bit 3 - Pipe Error Interrupt Set

pub fn nakedis(&mut self) -> NAKEDIS_W

Bit 4 - NAKed Interrupt Set

pub fn overfis(&mut self) -> OVERFIS_W

Bit 5 - Overflow Interrupt Set

pub fn rxstalldis(&mut self) -> RXSTALLDIS_W

Bit 6 - Received STALLed Interrupt Set

pub fn shortpacketis(&mut self) -> SHORTPACKETIS_W

Bit 7 - Short Packet Interrupt Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W

Bit 12 - Number of Busy Banks Set

impl W<u32, Reg<u32, _USBHS_HSTPIPIER_CTRL_MODE>>

pub fn rxines(&mut self) -> RXINES_W

Bit 0 - Received IN Data Interrupt Enable

pub fn txoutes(&mut self) -> TXOUTES_W

Bit 1 - Transmitted OUT Data Interrupt Enable

pub fn txstpes(&mut self) -> TXSTPES_W

Bit 2 - Transmitted SETUP Interrupt Enable

pub fn perres(&mut self) -> PERRES_W

Bit 3 - Pipe Error Interrupt Enable

pub fn nakedes(&mut self) -> NAKEDES_W

Bit 4 - NAKed Interrupt Enable

pub fn overfies(&mut self) -> OVERFIES_W

Bit 5 - Overflow Interrupt Enable

pub fn rxstalldes(&mut self) -> RXSTALLDES_W

Bit 6 - Received STALLed Interrupt Enable

pub fn shortpacketies(&mut self) -> SHORTPACKETIES_W

Bit 7 - Short Packet Interrupt Enable

pub fn nbusybkes(&mut self) -> NBUSYBKES_W

Bit 12 - Number of Busy Banks Enable

pub fn pdishdmas(&mut self) -> PDISHDMAS_W

Bit 16 - Pipe Interrupts Disable HDMA Request Enable

pub fn pfreezes(&mut self) -> PFREEZES_W

Bit 17 - Pipe Freeze Enable

pub fn rstdts(&mut self) -> RSTDTS_W

Bit 18 - Reset Data Toggle Enable

impl W<u32, Reg<u32, _USBHS_HSTPIPIER_ISO_MODE>>

pub fn rxines(&mut self) -> RXINES_W

Bit 0 - Received IN Data Interrupt Enable

pub fn txoutes(&mut self) -> TXOUTES_W

Bit 1 - Transmitted OUT Data Interrupt Enable

pub fn underfies(&mut self) -> UNDERFIES_W

Bit 2 - Underflow Interrupt Enable

pub fn perres(&mut self) -> PERRES_W

Bit 3 - Pipe Error Interrupt Enable

pub fn nakedes(&mut self) -> NAKEDES_W

Bit 4 - NAKed Interrupt Enable

pub fn overfies(&mut self) -> OVERFIES_W

Bit 5 - Overflow Interrupt Enable

pub fn crcerres(&mut self) -> CRCERRES_W

Bit 6 - CRC Error Interrupt Enable

pub fn shortpacketies(&mut self) -> SHORTPACKETIES_W

Bit 7 - Short Packet Interrupt Enable

pub fn nbusybkes(&mut self) -> NBUSYBKES_W

Bit 12 - Number of Busy Banks Enable

pub fn pdishdmas(&mut self) -> PDISHDMAS_W

Bit 16 - Pipe Interrupts Disable HDMA Request Enable

pub fn pfreezes(&mut self) -> PFREEZES_W

Bit 17 - Pipe Freeze Enable

pub fn rstdts(&mut self) -> RSTDTS_W

Bit 18 - Reset Data Toggle Enable

impl W<u32, Reg<u32, _USBHS_HSTPIPIER_BLK_MODE>>

pub fn rxines(&mut self) -> RXINES_W

Bit 0 - Received IN Data Interrupt Enable

pub fn txoutes(&mut self) -> TXOUTES_W

Bit 1 - Transmitted OUT Data Interrupt Enable

pub fn txstpes(&mut self) -> TXSTPES_W

Bit 2 - Transmitted SETUP Interrupt Enable

pub fn perres(&mut self) -> PERRES_W

Bit 3 - Pipe Error Interrupt Enable

pub fn nakedes(&mut self) -> NAKEDES_W

Bit 4 - NAKed Interrupt Enable

pub fn overfies(&mut self) -> OVERFIES_W

Bit 5 - Overflow Interrupt Enable

pub fn rxstalldes(&mut self) -> RXSTALLDES_W

Bit 6 - Received STALLed Interrupt Enable

pub fn shortpacketies(&mut self) -> SHORTPACKETIES_W

Bit 7 - Short Packet Interrupt Enable

pub fn nbusybkes(&mut self) -> NBUSYBKES_W

Bit 12 - Number of Busy Banks Enable

pub fn pdishdmas(&mut self) -> PDISHDMAS_W

Bit 16 - Pipe Interrupts Disable HDMA Request Enable

pub fn pfreezes(&mut self) -> PFREEZES_W

Bit 17 - Pipe Freeze Enable

pub fn rstdts(&mut self) -> RSTDTS_W

Bit 18 - Reset Data Toggle Enable

impl W<u32, Reg<u32, _USBHS_HSTPIPIER_INTRPT_MODE>>

pub fn rxines(&mut self) -> RXINES_W

Bit 0 - Received IN Data Interrupt Enable

pub fn txoutes(&mut self) -> TXOUTES_W

Bit 1 - Transmitted OUT Data Interrupt Enable

pub fn underfies(&mut self) -> UNDERFIES_W

Bit 2 - Underflow Interrupt Enable

pub fn perres(&mut self) -> PERRES_W

Bit 3 - Pipe Error Interrupt Enable

pub fn nakedes(&mut self) -> NAKEDES_W

Bit 4 - NAKed Interrupt Enable

pub fn overfies(&mut self) -> OVERFIES_W

Bit 5 - Overflow Interrupt Enable

pub fn rxstalldes(&mut self) -> RXSTALLDES_W

Bit 6 - Received STALLed Interrupt Enable

pub fn shortpacketies(&mut self) -> SHORTPACKETIES_W

Bit 7 - Short Packet Interrupt Enable

pub fn nbusybkes(&mut self) -> NBUSYBKES_W

Bit 12 - Number of Busy Banks Enable

pub fn pdishdmas(&mut self) -> PDISHDMAS_W

Bit 16 - Pipe Interrupts Disable HDMA Request Enable

pub fn pfreezes(&mut self) -> PFREEZES_W

Bit 17 - Pipe Freeze Enable

pub fn rstdts(&mut self) -> RSTDTS_W

Bit 18 - Reset Data Toggle Enable

impl W<u32, Reg<u32, _USBHS_HSTPIPIDR_CTRL_MODE>>

pub fn rxinec(&mut self) -> RXINEC_W

Bit 0 - Received IN Data Interrupt Disable

pub fn txoutec(&mut self) -> TXOUTEC_W

Bit 1 - Transmitted OUT Data Interrupt Disable

pub fn txstpec(&mut self) -> TXSTPEC_W

Bit 2 - Transmitted SETUP Interrupt Disable

pub fn perrec(&mut self) -> PERREC_W

Bit 3 - Pipe Error Interrupt Disable

pub fn nakedec(&mut self) -> NAKEDEC_W

Bit 4 - NAKed Interrupt Disable

pub fn overfiec(&mut self) -> OVERFIEC_W

Bit 5 - Overflow Interrupt Disable

pub fn rxstalldec(&mut self) -> RXSTALLDEC_W

Bit 6 - Received STALLed Interrupt Disable

pub fn shortpacketiec(&mut self) -> SHORTPACKETIEC_W

Bit 7 - Short Packet Interrupt Disable

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W

Bit 12 - Number of Busy Banks Disable

pub fn fifoconc(&mut self) -> FIFOCONC_W

Bit 14 - FIFO Control Disable

pub fn pdishdmac(&mut self) -> PDISHDMAC_W

Bit 16 - Pipe Interrupts Disable HDMA Request Disable

pub fn pfreezec(&mut self) -> PFREEZEC_W

Bit 17 - Pipe Freeze Disable

impl W<u32, Reg<u32, _USBHS_HSTPIPIDR_ISO_MODE>>

pub fn rxinec(&mut self) -> RXINEC_W

Bit 0 - Received IN Data Interrupt Disable

pub fn txoutec(&mut self) -> TXOUTEC_W

Bit 1 - Transmitted OUT Data Interrupt Disable

pub fn underfiec(&mut self) -> UNDERFIEC_W

Bit 2 - Underflow Interrupt Disable

pub fn perrec(&mut self) -> PERREC_W

Bit 3 - Pipe Error Interrupt Disable

pub fn nakedec(&mut self) -> NAKEDEC_W

Bit 4 - NAKed Interrupt Disable

pub fn overfiec(&mut self) -> OVERFIEC_W

Bit 5 - Overflow Interrupt Disable

pub fn crcerrec(&mut self) -> CRCERREC_W

Bit 6 - CRC Error Interrupt Disable

pub fn shortpacketiec(&mut self) -> SHORTPACKETIEC_W

Bit 7 - Short Packet Interrupt Disable

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W

Bit 12 - Number of Busy Banks Disable

pub fn fifoconc(&mut self) -> FIFOCONC_W

Bit 14 - FIFO Control Disable

pub fn pdishdmac(&mut self) -> PDISHDMAC_W

Bit 16 - Pipe Interrupts Disable HDMA Request Disable

pub fn pfreezec(&mut self) -> PFREEZEC_W

Bit 17 - Pipe Freeze Disable

impl W<u32, Reg<u32, _USBHS_HSTPIPIDR_BLK_MODE>>

pub fn rxinec(&mut self) -> RXINEC_W

Bit 0 - Received IN Data Interrupt Disable

pub fn txoutec(&mut self) -> TXOUTEC_W

Bit 1 - Transmitted OUT Data Interrupt Disable

pub fn txstpec(&mut self) -> TXSTPEC_W

Bit 2 - Transmitted SETUP Interrupt Disable

pub fn perrec(&mut self) -> PERREC_W

Bit 3 - Pipe Error Interrupt Disable

pub fn nakedec(&mut self) -> NAKEDEC_W

Bit 4 - NAKed Interrupt Disable

pub fn overfiec(&mut self) -> OVERFIEC_W

Bit 5 - Overflow Interrupt Disable

pub fn rxstalldec(&mut self) -> RXSTALLDEC_W

Bit 6 - Received STALLed Interrupt Disable

pub fn shortpacketiec(&mut self) -> SHORTPACKETIEC_W

Bit 7 - Short Packet Interrupt Disable

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W

Bit 12 - Number of Busy Banks Disable

pub fn fifoconc(&mut self) -> FIFOCONC_W

Bit 14 - FIFO Control Disable

pub fn pdishdmac(&mut self) -> PDISHDMAC_W

Bit 16 - Pipe Interrupts Disable HDMA Request Disable

pub fn pfreezec(&mut self) -> PFREEZEC_W

Bit 17 - Pipe Freeze Disable

impl W<u32, Reg<u32, _USBHS_HSTPIPIDR_INTRPT_MODE>>

pub fn rxinec(&mut self) -> RXINEC_W

Bit 0 - Received IN Data Interrupt Disable

pub fn txoutec(&mut self) -> TXOUTEC_W

Bit 1 - Transmitted OUT Data Interrupt Disable

pub fn underfiec(&mut self) -> UNDERFIEC_W

Bit 2 - Underflow Interrupt Disable

pub fn perrec(&mut self) -> PERREC_W

Bit 3 - Pipe Error Interrupt Disable

pub fn nakedec(&mut self) -> NAKEDEC_W

Bit 4 - NAKed Interrupt Disable

pub fn overfiec(&mut self) -> OVERFIEC_W

Bit 5 - Overflow Interrupt Disable

pub fn rxstalldec(&mut self) -> RXSTALLDEC_W

Bit 6 - Received STALLed Interrupt Disable

pub fn shortpacketiec(&mut self) -> SHORTPACKETIEC_W

Bit 7 - Short Packet Interrupt Disable

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W

Bit 12 - Number of Busy Banks Disable

pub fn fifoconc(&mut self) -> FIFOCONC_W

Bit 14 - FIFO Control Disable

pub fn pdishdmac(&mut self) -> PDISHDMAC_W

Bit 16 - Pipe Interrupts Disable HDMA Request Disable

pub fn pfreezec(&mut self) -> PFREEZEC_W

Bit 17 - Pipe Freeze Disable

impl W<u32, Reg<u32, _USBHS_HSTPIPINRQ>>

pub fn inrq(&mut self) -> INRQ_W

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&mut self) -> INMODE_W

Bit 8 - IN Request Mode

impl W<u32, Reg<u32, _USBHS_HSTPIPERR>>

pub fn datatgl(&mut self) -> DATATGL_W

Bit 0 - Data Toggle Error

pub fn datapid(&mut self) -> DATAPID_W

Bit 1 - Data PID Error

pub fn pid(&mut self) -> PID_W

Bit 2 - Data PID Error

pub fn timeout(&mut self) -> TIMEOUT_W

Bit 3 - Time-Out Error

pub fn crc16(&mut self) -> CRC16_W

Bit 4 - CRC16 Error

pub fn counter(&mut self) -> COUNTER_W

Bits 5:6 - Error Counter

impl W<u32, Reg<u32, _USBHS_CTRL>>

pub fn rderre(&mut self) -> RDERRE_W

Bit 4 - Remote Device Connection Error Interrupt Enable

pub fn vbushwc(&mut self) -> VBUSHWC_W

Bit 8 - VBUS Hardware Control

pub fn frzclk(&mut self) -> FRZCLK_W

Bit 14 - Freeze USB Clock

pub fn usbe(&mut self) -> USBE_W

Bit 15 - USBHS Enable

pub fn uid(&mut self) -> UID_W

Bit 24 - UID Pin Enable

pub fn uimod(&mut self) -> UIMOD_W

Bit 25 - USBHS Mode

impl W<u32, Reg<u32, _USBHS_SCR>>

pub fn rderric(&mut self) -> RDERRIC_W

Bit 4 - Remote Device Connection Error Interrupt Clear

impl W<u32, Reg<u32, _USBHS_SFR>>

pub fn rderris(&mut self) -> RDERRIS_W

Bit 4 - Remote Device Connection Error Interrupt Set

pub fn vbusrqs(&mut self) -> VBUSRQS_W

Bit 9 - VBUS Request Set

impl W<u32, Reg<u32, _UTMI_OHCIICR>>

pub fn res0(&mut self) -> RES0_W

Bit 0 - USB PORTx Reset

pub fn arie(&mut self) -> ARIE_W

Bit 4 - OHCI Asynchronous Resume Interrupt Enable

pub fn appstart(&mut self) -> APPSTART_W

Bit 5

pub fn udppudis(&mut self) -> UDPPUDIS_W

Bit 23 - USB Device Pull-up Disable

impl W<u32, Reg<u32, _UTMI_CKTRIM>>

pub fn freq(&mut self) -> FREQ_W

Bits 0:1 - UTMI Reference Clock Frequency

impl W<u32, Reg<u32, _WDT_CR>>

pub fn wdrstt(&mut self) -> WDRSTT_W

Bit 0 - Watchdog Restart

pub fn key(&mut self) -> KEY_W

Bits 24:31 - Password

impl W<u32, Reg<u32, _WDT_MR>>

pub fn wdv(&mut self) -> WDV_W

Bits 0:11 - Watchdog Counter Value

pub fn wdfien(&mut self) -> WDFIEN_W

Bit 12 - Watchdog Fault Interrupt Enable

pub fn wdrsten(&mut self) -> WDRSTEN_W

Bit 13 - Watchdog Reset Enable

pub fn wddis(&mut self) -> WDDIS_W

Bit 15 - Watchdog Disable

pub fn wdd(&mut self) -> WDD_W

Bits 16:27 - Watchdog Delta Value

pub fn wddbghlt(&mut self) -> WDDBGHLT_W

Bit 28 - Watchdog Debug Halt

pub fn wdidlehlt(&mut self) -> WDIDLEHLT_W

Bit 29 - Watchdog Idle Halt

impl W<u32, Reg<u32, _XDMAC_CIE>>

pub fn bie(&mut self) -> BIE_W

Bit 0 - End of Block Interrupt Enable Bit

pub fn lie(&mut self) -> LIE_W

Bit 1 - End of Linked List Interrupt Enable Bit

pub fn die(&mut self) -> DIE_W

Bit 2 - End of Disable Interrupt Enable Bit

pub fn fie(&mut self) -> FIE_W

Bit 3 - End of Flush Interrupt Enable Bit

pub fn rbie(&mut self) -> RBIE_W

Bit 4 - Read Bus Error Interrupt Enable Bit

pub fn wbie(&mut self) -> WBIE_W

Bit 5 - Write Bus Error Interrupt Enable Bit

pub fn roie(&mut self) -> ROIE_W

Bit 6 - Request Overflow Error Interrupt Enable Bit

impl W<u32, Reg<u32, _XDMAC_CID>>

pub fn bid(&mut self) -> BID_W

Bit 0 - End of Block Interrupt Disable Bit

pub fn lid(&mut self) -> LID_W

Bit 1 - End of Linked List Interrupt Disable Bit

pub fn did(&mut self) -> DID_W

Bit 2 - End of Disable Interrupt Disable Bit

pub fn fid(&mut self) -> FID_W

Bit 3 - End of Flush Interrupt Disable Bit

pub fn rbeid(&mut self) -> RBEID_W

Bit 4 - Read Bus Error Interrupt Disable Bit

pub fn wbeid(&mut self) -> WBEID_W

Bit 5 - Write Bus Error Interrupt Disable Bit

pub fn roid(&mut self) -> ROID_W

Bit 6 - Request Overflow Error Interrupt Disable Bit

impl W<u32, Reg<u32, _XDMAC_CSA>>

pub fn sa(&mut self) -> SA_W

Bits 0:31 - Channel x Source Address

impl W<u32, Reg<u32, _XDMAC_CDA>>

pub fn da(&mut self) -> DA_W

Bits 0:31 - Channel x Destination Address

impl W<u32, Reg<u32, _XDMAC_CNDA>>

pub fn ndaif(&mut self) -> NDAIF_W

Bit 0 - Channel x Next Descriptor Interface

pub fn nda(&mut self) -> NDA_W

Bits 2:31 - Channel x Next Descriptor Address

impl W<u32, Reg<u32, _XDMAC_CNDC>>

pub fn nde(&mut self) -> NDE_W

Bit 0 - Channel x Next Descriptor Enable

pub fn ndsup(&mut self) -> NDSUP_W

Bit 1 - Channel x Next Descriptor Source Update

pub fn nddup(&mut self) -> NDDUP_W

Bit 2 - Channel x Next Descriptor Destination Update

pub fn ndview(&mut self) -> NDVIEW_W

Bits 3:4 - Channel x Next Descriptor View

impl W<u32, Reg<u32, _XDMAC_CUBC>>

pub fn ublen(&mut self) -> UBLEN_W

Bits 0:23 - Channel x Microblock Length

impl W<u32, Reg<u32, _XDMAC_CBC>>

pub fn blen(&mut self) -> BLEN_W

Bits 0:11 - Channel x Block Length

impl W<u32, Reg<u32, _XDMAC_CC>>

pub fn type_(&mut self) -> TYPE_W

Bit 0 - Channel x Transfer Type

pub fn mbsize(&mut self) -> MBSIZE_W

Bits 1:2 - Channel x Memory Burst Size

pub fn dsync(&mut self) -> DSYNC_W

Bit 4 - Channel x Synchronization

pub fn swreq(&mut self) -> SWREQ_W

Bit 6 - Channel x Software Request Trigger

pub fn memset(&mut self) -> MEMSET_W

Bit 7 - Channel x Fill Block of memory

pub fn csize(&mut self) -> CSIZE_W

Bits 8:10 - Channel x Chunk Size

pub fn dwidth(&mut self) -> DWIDTH_W

Bits 11:12 - Channel x Data Width

pub fn sif(&mut self) -> SIF_W

Bit 13 - Channel x Source Interface Identifier

pub fn dif(&mut self) -> DIF_W

Bit 14 - Channel x Destination Interface Identifier

pub fn sam(&mut self) -> SAM_W

Bits 16:17 - Channel x Source Addressing Mode

pub fn dam(&mut self) -> DAM_W

Bits 18:19 - Channel x Destination Addressing Mode

pub fn initd(&mut self) -> INITD_W

Bit 21 - Channel Initialization Terminated (this bit is read-only)

pub fn rdip(&mut self) -> RDIP_W

Bit 22 - Read in Progress (this bit is read-only)

pub fn wrip(&mut self) -> WRIP_W

Bit 23 - Write in Progress (this bit is read-only)

pub fn perid(&mut self) -> PERID_W

Bits 24:30 - Channel x Peripheral Hardware Request Line Identifier

impl W<u32, Reg<u32, _XDMAC_CDS_MSP>>

pub fn sds_msp(&mut self) -> SDS_MSP_W

Bits 0:15 - Channel x Source Data stride or Memory Set Pattern

pub fn dds_msp(&mut self) -> DDS_MSP_W

Bits 16:31 - Channel x Destination Data Stride or Memory Set Pattern

impl W<u32, Reg<u32, _XDMAC_CSUS>>

pub fn subs(&mut self) -> SUBS_W

Bits 0:23 - Channel x Source Microblock Stride

impl W<u32, Reg<u32, _XDMAC_CDUS>>

pub fn dubs(&mut self) -> DUBS_W

Bits 0:23 - Channel x Destination Microblock Stride

impl W<u32, Reg<u32, _XDMAC_GCFG>>

pub fn cgdisreg(&mut self) -> CGDISREG_W

Bit 0 - Configuration Registers Clock Gating Disable

pub fn cgdispipe(&mut self) -> CGDISPIPE_W

Bit 1 - Pipeline Clock Gating Disable

pub fn cgdisfifo(&mut self) -> CGDISFIFO_W

Bit 2 - FIFO Clock Gating Disable

pub fn cgdisif(&mut self) -> CGDISIF_W

Bit 3 - Bus Interface Clock Gating Disable

pub fn bxkben(&mut self) -> BXKBEN_W

Bit 8 - Boundary X Kilobyte Enable

impl W<u32, Reg<u32, _XDMAC_GWAC>>

pub fn pw0(&mut self) -> PW0_W

Bits 0:3 - Pool Weight 0

pub fn pw1(&mut self) -> PW1_W

Bits 4:7 - Pool Weight 1

pub fn pw2(&mut self) -> PW2_W

Bits 8:11 - Pool Weight 2

pub fn pw3(&mut self) -> PW3_W

Bits 12:15 - Pool Weight 3

impl W<u32, Reg<u32, _XDMAC_GIE>>

pub fn ie0(&mut self) -> IE0_W

Bit 0 - XDMAC Channel 0 Interrupt Enable Bit

pub fn ie1(&mut self) -> IE1_W

Bit 1 - XDMAC Channel 1 Interrupt Enable Bit

pub fn ie2(&mut self) -> IE2_W

Bit 2 - XDMAC Channel 2 Interrupt Enable Bit

pub fn ie3(&mut self) -> IE3_W

Bit 3 - XDMAC Channel 3 Interrupt Enable Bit

pub fn ie4(&mut self) -> IE4_W

Bit 4 - XDMAC Channel 4 Interrupt Enable Bit

pub fn ie5(&mut self) -> IE5_W

Bit 5 - XDMAC Channel 5 Interrupt Enable Bit

pub fn ie6(&mut self) -> IE6_W

Bit 6 - XDMAC Channel 6 Interrupt Enable Bit

pub fn ie7(&mut self) -> IE7_W

Bit 7 - XDMAC Channel 7 Interrupt Enable Bit

pub fn ie8(&mut self) -> IE8_W

Bit 8 - XDMAC Channel 8 Interrupt Enable Bit

pub fn ie9(&mut self) -> IE9_W

Bit 9 - XDMAC Channel 9 Interrupt Enable Bit

pub fn ie10(&mut self) -> IE10_W

Bit 10 - XDMAC Channel 10 Interrupt Enable Bit

pub fn ie11(&mut self) -> IE11_W

Bit 11 - XDMAC Channel 11 Interrupt Enable Bit

pub fn ie12(&mut self) -> IE12_W

Bit 12 - XDMAC Channel 12 Interrupt Enable Bit

pub fn ie13(&mut self) -> IE13_W

Bit 13 - XDMAC Channel 13 Interrupt Enable Bit

pub fn ie14(&mut self) -> IE14_W

Bit 14 - XDMAC Channel 14 Interrupt Enable Bit

pub fn ie15(&mut self) -> IE15_W

Bit 15 - XDMAC Channel 15 Interrupt Enable Bit

pub fn ie16(&mut self) -> IE16_W

Bit 16 - XDMAC Channel 16 Interrupt Enable Bit

pub fn ie17(&mut self) -> IE17_W

Bit 17 - XDMAC Channel 17 Interrupt Enable Bit

pub fn ie18(&mut self) -> IE18_W

Bit 18 - XDMAC Channel 18 Interrupt Enable Bit

pub fn ie19(&mut self) -> IE19_W

Bit 19 - XDMAC Channel 19 Interrupt Enable Bit

pub fn ie20(&mut self) -> IE20_W

Bit 20 - XDMAC Channel 20 Interrupt Enable Bit

pub fn ie21(&mut self) -> IE21_W

Bit 21 - XDMAC Channel 21 Interrupt Enable Bit

pub fn ie22(&mut self) -> IE22_W

Bit 22 - XDMAC Channel 22 Interrupt Enable Bit

pub fn ie23(&mut self) -> IE23_W

Bit 23 - XDMAC Channel 23 Interrupt Enable Bit

impl W<u32, Reg<u32, _XDMAC_GID>>

pub fn id0(&mut self) -> ID0_W

Bit 0 - XDMAC Channel 0 Interrupt Disable Bit

pub fn id1(&mut self) -> ID1_W

Bit 1 - XDMAC Channel 1 Interrupt Disable Bit

pub fn id2(&mut self) -> ID2_W

Bit 2 - XDMAC Channel 2 Interrupt Disable Bit

pub fn id3(&mut self) -> ID3_W

Bit 3 - XDMAC Channel 3 Interrupt Disable Bit

pub fn id4(&mut self) -> ID4_W

Bit 4 - XDMAC Channel 4 Interrupt Disable Bit

pub fn id5(&mut self) -> ID5_W

Bit 5 - XDMAC Channel 5 Interrupt Disable Bit

pub fn id6(&mut self) -> ID6_W

Bit 6 - XDMAC Channel 6 Interrupt Disable Bit

pub fn id7(&mut self) -> ID7_W

Bit 7 - XDMAC Channel 7 Interrupt Disable Bit

pub fn id8(&mut self) -> ID8_W

Bit 8 - XDMAC Channel 8 Interrupt Disable Bit

pub fn id9(&mut self) -> ID9_W

Bit 9 - XDMAC Channel 9 Interrupt Disable Bit

pub fn id10(&mut self) -> ID10_W

Bit 10 - XDMAC Channel 10 Interrupt Disable Bit

pub fn id11(&mut self) -> ID11_W

Bit 11 - XDMAC Channel 11 Interrupt Disable Bit

pub fn id12(&mut self) -> ID12_W

Bit 12 - XDMAC Channel 12 Interrupt Disable Bit

pub fn id13(&mut self) -> ID13_W

Bit 13 - XDMAC Channel 13 Interrupt Disable Bit

pub fn id14(&mut self) -> ID14_W

Bit 14 - XDMAC Channel 14 Interrupt Disable Bit

pub fn id15(&mut self) -> ID15_W

Bit 15 - XDMAC Channel 15 Interrupt Disable Bit

pub fn id16(&mut self) -> ID16_W

Bit 16 - XDMAC Channel 16 Interrupt Disable Bit

pub fn id17(&mut self) -> ID17_W

Bit 17 - XDMAC Channel 17 Interrupt Disable Bit

pub fn id18(&mut self) -> ID18_W

Bit 18 - XDMAC Channel 18 Interrupt Disable Bit

pub fn id19(&mut self) -> ID19_W

Bit 19 - XDMAC Channel 19 Interrupt Disable Bit

pub fn id20(&mut self) -> ID20_W

Bit 20 - XDMAC Channel 20 Interrupt Disable Bit

pub fn id21(&mut self) -> ID21_W

Bit 21 - XDMAC Channel 21 Interrupt Disable Bit

pub fn id22(&mut self) -> ID22_W

Bit 22 - XDMAC Channel 22 Interrupt Disable Bit

pub fn id23(&mut self) -> ID23_W

Bit 23 - XDMAC Channel 23 Interrupt Disable Bit

impl W<u32, Reg<u32, _XDMAC_GE>>

pub fn en0(&mut self) -> EN0_W

Bit 0 - XDMAC Channel 0 Enable Bit

pub fn en1(&mut self) -> EN1_W

Bit 1 - XDMAC Channel 1 Enable Bit

pub fn en2(&mut self) -> EN2_W

Bit 2 - XDMAC Channel 2 Enable Bit

pub fn en3(&mut self) -> EN3_W

Bit 3 - XDMAC Channel 3 Enable Bit

pub fn en4(&mut self) -> EN4_W

Bit 4 - XDMAC Channel 4 Enable Bit

pub fn en5(&mut self) -> EN5_W

Bit 5 - XDMAC Channel 5 Enable Bit

pub fn en6(&mut self) -> EN6_W

Bit 6 - XDMAC Channel 6 Enable Bit

pub fn en7(&mut self) -> EN7_W

Bit 7 - XDMAC Channel 7 Enable Bit

pub fn en8(&mut self) -> EN8_W

Bit 8 - XDMAC Channel 8 Enable Bit

pub fn en9(&mut self) -> EN9_W

Bit 9 - XDMAC Channel 9 Enable Bit

pub fn en10(&mut self) -> EN10_W

Bit 10 - XDMAC Channel 10 Enable Bit

pub fn en11(&mut self) -> EN11_W

Bit 11 - XDMAC Channel 11 Enable Bit

pub fn en12(&mut self) -> EN12_W

Bit 12 - XDMAC Channel 12 Enable Bit

pub fn en13(&mut self) -> EN13_W

Bit 13 - XDMAC Channel 13 Enable Bit

pub fn en14(&mut self) -> EN14_W

Bit 14 - XDMAC Channel 14 Enable Bit

pub fn en15(&mut self) -> EN15_W

Bit 15 - XDMAC Channel 15 Enable Bit

pub fn en16(&mut self) -> EN16_W

Bit 16 - XDMAC Channel 16 Enable Bit

pub fn en17(&mut self) -> EN17_W

Bit 17 - XDMAC Channel 17 Enable Bit

pub fn en18(&mut self) -> EN18_W

Bit 18 - XDMAC Channel 18 Enable Bit

pub fn en19(&mut self) -> EN19_W

Bit 19 - XDMAC Channel 19 Enable Bit

pub fn en20(&mut self) -> EN20_W

Bit 20 - XDMAC Channel 20 Enable Bit

pub fn en21(&mut self) -> EN21_W

Bit 21 - XDMAC Channel 21 Enable Bit

pub fn en22(&mut self) -> EN22_W

Bit 22 - XDMAC Channel 22 Enable Bit

pub fn en23(&mut self) -> EN23_W

Bit 23 - XDMAC Channel 23 Enable Bit

impl W<u32, Reg<u32, _XDMAC_GD>>

pub fn di0(&mut self) -> DI0_W

Bit 0 - XDMAC Channel 0 Disable Bit

pub fn di1(&mut self) -> DI1_W

Bit 1 - XDMAC Channel 1 Disable Bit

pub fn di2(&mut self) -> DI2_W

Bit 2 - XDMAC Channel 2 Disable Bit

pub fn di3(&mut self) -> DI3_W

Bit 3 - XDMAC Channel 3 Disable Bit

pub fn di4(&mut self) -> DI4_W

Bit 4 - XDMAC Channel 4 Disable Bit

pub fn di5(&mut self) -> DI5_W

Bit 5 - XDMAC Channel 5 Disable Bit

pub fn di6(&mut self) -> DI6_W

Bit 6 - XDMAC Channel 6 Disable Bit

pub fn di7(&mut self) -> DI7_W

Bit 7 - XDMAC Channel 7 Disable Bit

pub fn di8(&mut self) -> DI8_W

Bit 8 - XDMAC Channel 8 Disable Bit

pub fn di9(&mut self) -> DI9_W

Bit 9 - XDMAC Channel 9 Disable Bit

pub fn di10(&mut self) -> DI10_W

Bit 10 - XDMAC Channel 10 Disable Bit

pub fn di11(&mut self) -> DI11_W

Bit 11 - XDMAC Channel 11 Disable Bit

pub fn di12(&mut self) -> DI12_W

Bit 12 - XDMAC Channel 12 Disable Bit

pub fn di13(&mut self) -> DI13_W

Bit 13 - XDMAC Channel 13 Disable Bit

pub fn di14(&mut self) -> DI14_W

Bit 14 - XDMAC Channel 14 Disable Bit

pub fn di15(&mut self) -> DI15_W

Bit 15 - XDMAC Channel 15 Disable Bit

pub fn di16(&mut self) -> DI16_W

Bit 16 - XDMAC Channel 16 Disable Bit

pub fn di17(&mut self) -> DI17_W

Bit 17 - XDMAC Channel 17 Disable Bit

pub fn di18(&mut self) -> DI18_W

Bit 18 - XDMAC Channel 18 Disable Bit

pub fn di19(&mut self) -> DI19_W

Bit 19 - XDMAC Channel 19 Disable Bit

pub fn di20(&mut self) -> DI20_W

Bit 20 - XDMAC Channel 20 Disable Bit

pub fn di21(&mut self) -> DI21_W

Bit 21 - XDMAC Channel 21 Disable Bit

pub fn di22(&mut self) -> DI22_W

Bit 22 - XDMAC Channel 22 Disable Bit

pub fn di23(&mut self) -> DI23_W

Bit 23 - XDMAC Channel 23 Disable Bit

impl W<u32, Reg<u32, _XDMAC_GRS>>

pub fn rs0(&mut self) -> RS0_W

Bit 0 - XDMAC Channel 0 Read Suspend Bit

pub fn rs1(&mut self) -> RS1_W

Bit 1 - XDMAC Channel 1 Read Suspend Bit

pub fn rs2(&mut self) -> RS2_W

Bit 2 - XDMAC Channel 2 Read Suspend Bit

pub fn rs3(&mut self) -> RS3_W

Bit 3 - XDMAC Channel 3 Read Suspend Bit

pub fn rs4(&mut self) -> RS4_W

Bit 4 - XDMAC Channel 4 Read Suspend Bit

pub fn rs5(&mut self) -> RS5_W

Bit 5 - XDMAC Channel 5 Read Suspend Bit

pub fn rs6(&mut self) -> RS6_W

Bit 6 - XDMAC Channel 6 Read Suspend Bit

pub fn rs7(&mut self) -> RS7_W

Bit 7 - XDMAC Channel 7 Read Suspend Bit

pub fn rs8(&mut self) -> RS8_W

Bit 8 - XDMAC Channel 8 Read Suspend Bit

pub fn rs9(&mut self) -> RS9_W

Bit 9 - XDMAC Channel 9 Read Suspend Bit

pub fn rs10(&mut self) -> RS10_W

Bit 10 - XDMAC Channel 10 Read Suspend Bit

pub fn rs11(&mut self) -> RS11_W

Bit 11 - XDMAC Channel 11 Read Suspend Bit

pub fn rs12(&mut self) -> RS12_W

Bit 12 - XDMAC Channel 12 Read Suspend Bit

pub fn rs13(&mut self) -> RS13_W

Bit 13 - XDMAC Channel 13 Read Suspend Bit

pub fn rs14(&mut self) -> RS14_W

Bit 14 - XDMAC Channel 14 Read Suspend Bit

pub fn rs15(&mut self) -> RS15_W

Bit 15 - XDMAC Channel 15 Read Suspend Bit

pub fn rs16(&mut self) -> RS16_W

Bit 16 - XDMAC Channel 16 Read Suspend Bit

pub fn rs17(&mut self) -> RS17_W

Bit 17 - XDMAC Channel 17 Read Suspend Bit

pub fn rs18(&mut self) -> RS18_W

Bit 18 - XDMAC Channel 18 Read Suspend Bit

pub fn rs19(&mut self) -> RS19_W

Bit 19 - XDMAC Channel 19 Read Suspend Bit

pub fn rs20(&mut self) -> RS20_W

Bit 20 - XDMAC Channel 20 Read Suspend Bit

pub fn rs21(&mut self) -> RS21_W

Bit 21 - XDMAC Channel 21 Read Suspend Bit

pub fn rs22(&mut self) -> RS22_W

Bit 22 - XDMAC Channel 22 Read Suspend Bit

pub fn rs23(&mut self) -> RS23_W

Bit 23 - XDMAC Channel 23 Read Suspend Bit

impl W<u32, Reg<u32, _XDMAC_GWS>>

pub fn ws0(&mut self) -> WS0_W

Bit 0 - XDMAC Channel 0 Write Suspend Bit

pub fn ws1(&mut self) -> WS1_W

Bit 1 - XDMAC Channel 1 Write Suspend Bit

pub fn ws2(&mut self) -> WS2_W

Bit 2 - XDMAC Channel 2 Write Suspend Bit

pub fn ws3(&mut self) -> WS3_W

Bit 3 - XDMAC Channel 3 Write Suspend Bit

pub fn ws4(&mut self) -> WS4_W

Bit 4 - XDMAC Channel 4 Write Suspend Bit

pub fn ws5(&mut self) -> WS5_W

Bit 5 - XDMAC Channel 5 Write Suspend Bit

pub fn ws6(&mut self) -> WS6_W

Bit 6 - XDMAC Channel 6 Write Suspend Bit

pub fn ws7(&mut self) -> WS7_W

Bit 7 - XDMAC Channel 7 Write Suspend Bit

pub fn ws8(&mut self) -> WS8_W

Bit 8 - XDMAC Channel 8 Write Suspend Bit

pub fn ws9(&mut self) -> WS9_W

Bit 9 - XDMAC Channel 9 Write Suspend Bit

pub fn ws10(&mut self) -> WS10_W

Bit 10 - XDMAC Channel 10 Write Suspend Bit

pub fn ws11(&mut self) -> WS11_W

Bit 11 - XDMAC Channel 11 Write Suspend Bit

pub fn ws12(&mut self) -> WS12_W

Bit 12 - XDMAC Channel 12 Write Suspend Bit

pub fn ws13(&mut self) -> WS13_W

Bit 13 - XDMAC Channel 13 Write Suspend Bit

pub fn ws14(&mut self) -> WS14_W

Bit 14 - XDMAC Channel 14 Write Suspend Bit

pub fn ws15(&mut self) -> WS15_W

Bit 15 - XDMAC Channel 15 Write Suspend Bit

pub fn ws16(&mut self) -> WS16_W

Bit 16 - XDMAC Channel 16 Write Suspend Bit

pub fn ws17(&mut self) -> WS17_W

Bit 17 - XDMAC Channel 17 Write Suspend Bit

pub fn ws18(&mut self) -> WS18_W

Bit 18 - XDMAC Channel 18 Write Suspend Bit

pub fn ws19(&mut self) -> WS19_W

Bit 19 - XDMAC Channel 19 Write Suspend Bit

pub fn ws20(&mut self) -> WS20_W

Bit 20 - XDMAC Channel 20 Write Suspend Bit

pub fn ws21(&mut self) -> WS21_W

Bit 21 - XDMAC Channel 21 Write Suspend Bit

pub fn ws22(&mut self) -> WS22_W

Bit 22 - XDMAC Channel 22 Write Suspend Bit

pub fn ws23(&mut self) -> WS23_W

Bit 23 - XDMAC Channel 23 Write Suspend Bit

impl W<u32, Reg<u32, _XDMAC_GRWS>>

pub fn rws0(&mut self) -> RWS0_W

Bit 0 - XDMAC Channel 0 Read Write Suspend Bit

pub fn rws1(&mut self) -> RWS1_W

Bit 1 - XDMAC Channel 1 Read Write Suspend Bit

pub fn rws2(&mut self) -> RWS2_W

Bit 2 - XDMAC Channel 2 Read Write Suspend Bit

pub fn rws3(&mut self) -> RWS3_W

Bit 3 - XDMAC Channel 3 Read Write Suspend Bit

pub fn rws4(&mut self) -> RWS4_W

Bit 4 - XDMAC Channel 4 Read Write Suspend Bit

pub fn rws5(&mut self) -> RWS5_W

Bit 5 - XDMAC Channel 5 Read Write Suspend Bit

pub fn rws6(&mut self) -> RWS6_W

Bit 6 - XDMAC Channel 6 Read Write Suspend Bit

pub fn rws7(&mut self) -> RWS7_W

Bit 7 - XDMAC Channel 7 Read Write Suspend Bit

pub fn rws8(&mut self) -> RWS8_W

Bit 8 - XDMAC Channel 8 Read Write Suspend Bit

pub fn rws9(&mut self) -> RWS9_W

Bit 9 - XDMAC Channel 9 Read Write Suspend Bit

pub fn rws10(&mut self) -> RWS10_W

Bit 10 - XDMAC Channel 10 Read Write Suspend Bit

pub fn rws11(&mut self) -> RWS11_W

Bit 11 - XDMAC Channel 11 Read Write Suspend Bit

pub fn rws12(&mut self) -> RWS12_W

Bit 12 - XDMAC Channel 12 Read Write Suspend Bit

pub fn rws13(&mut self) -> RWS13_W

Bit 13 - XDMAC Channel 13 Read Write Suspend Bit

pub fn rws14(&mut self) -> RWS14_W

Bit 14 - XDMAC Channel 14 Read Write Suspend Bit

pub fn rws15(&mut self) -> RWS15_W

Bit 15 - XDMAC Channel 15 Read Write Suspend Bit

pub fn rws16(&mut self) -> RWS16_W

Bit 16 - XDMAC Channel 16 Read Write Suspend Bit

pub fn rws17(&mut self) -> RWS17_W

Bit 17 - XDMAC Channel 17 Read Write Suspend Bit

pub fn rws18(&mut self) -> RWS18_W

Bit 18 - XDMAC Channel 18 Read Write Suspend Bit

pub fn rws19(&mut self) -> RWS19_W

Bit 19 - XDMAC Channel 19 Read Write Suspend Bit

pub fn rws20(&mut self) -> RWS20_W

Bit 20 - XDMAC Channel 20 Read Write Suspend Bit

pub fn rws21(&mut self) -> RWS21_W

Bit 21 - XDMAC Channel 21 Read Write Suspend Bit

pub fn rws22(&mut self) -> RWS22_W

Bit 22 - XDMAC Channel 22 Read Write Suspend Bit

pub fn rws23(&mut self) -> RWS23_W

Bit 23 - XDMAC Channel 23 Read Write Suspend Bit

impl W<u32, Reg<u32, _XDMAC_GRWR>>

pub fn rwr0(&mut self) -> RWR0_W

Bit 0 - XDMAC Channel 0 Read Write Resume Bit

pub fn rwr1(&mut self) -> RWR1_W

Bit 1 - XDMAC Channel 1 Read Write Resume Bit

pub fn rwr2(&mut self) -> RWR2_W

Bit 2 - XDMAC Channel 2 Read Write Resume Bit

pub fn rwr3(&mut self) -> RWR3_W

Bit 3 - XDMAC Channel 3 Read Write Resume Bit

pub fn rwr4(&mut self) -> RWR4_W

Bit 4 - XDMAC Channel 4 Read Write Resume Bit

pub fn rwr5(&mut self) -> RWR5_W

Bit 5 - XDMAC Channel 5 Read Write Resume Bit

pub fn rwr6(&mut self) -> RWR6_W

Bit 6 - XDMAC Channel 6 Read Write Resume Bit

pub fn rwr7(&mut self) -> RWR7_W

Bit 7 - XDMAC Channel 7 Read Write Resume Bit

pub fn rwr8(&mut self) -> RWR8_W

Bit 8 - XDMAC Channel 8 Read Write Resume Bit

pub fn rwr9(&mut self) -> RWR9_W

Bit 9 - XDMAC Channel 9 Read Write Resume Bit

pub fn rwr10(&mut self) -> RWR10_W

Bit 10 - XDMAC Channel 10 Read Write Resume Bit

pub fn rwr11(&mut self) -> RWR11_W

Bit 11 - XDMAC Channel 11 Read Write Resume Bit

pub fn rwr12(&mut self) -> RWR12_W

Bit 12 - XDMAC Channel 12 Read Write Resume Bit

pub fn rwr13(&mut self) -> RWR13_W

Bit 13 - XDMAC Channel 13 Read Write Resume Bit

pub fn rwr14(&mut self) -> RWR14_W

Bit 14 - XDMAC Channel 14 Read Write Resume Bit

pub fn rwr15(&mut self) -> RWR15_W

Bit 15 - XDMAC Channel 15 Read Write Resume Bit

pub fn rwr16(&mut self) -> RWR16_W

Bit 16 - XDMAC Channel 16 Read Write Resume Bit

pub fn rwr17(&mut self) -> RWR17_W

Bit 17 - XDMAC Channel 17 Read Write Resume Bit

pub fn rwr18(&mut self) -> RWR18_W

Bit 18 - XDMAC Channel 18 Read Write Resume Bit

pub fn rwr19(&mut self) -> RWR19_W

Bit 19 - XDMAC Channel 19 Read Write Resume Bit

pub fn rwr20(&mut self) -> RWR20_W

Bit 20 - XDMAC Channel 20 Read Write Resume Bit

pub fn rwr21(&mut self) -> RWR21_W

Bit 21 - XDMAC Channel 21 Read Write Resume Bit

pub fn rwr22(&mut self) -> RWR22_W

Bit 22 - XDMAC Channel 22 Read Write Resume Bit

pub fn rwr23(&mut self) -> RWR23_W

Bit 23 - XDMAC Channel 23 Read Write Resume Bit

impl W<u32, Reg<u32, _XDMAC_GSWR>>

pub fn swreq0(&mut self) -> SWREQ0_W

Bit 0 - XDMAC Channel 0 Software Request Bit

pub fn swreq1(&mut self) -> SWREQ1_W

Bit 1 - XDMAC Channel 1 Software Request Bit

pub fn swreq2(&mut self) -> SWREQ2_W

Bit 2 - XDMAC Channel 2 Software Request Bit

pub fn swreq3(&mut self) -> SWREQ3_W

Bit 3 - XDMAC Channel 3 Software Request Bit

pub fn swreq4(&mut self) -> SWREQ4_W

Bit 4 - XDMAC Channel 4 Software Request Bit

pub fn swreq5(&mut self) -> SWREQ5_W

Bit 5 - XDMAC Channel 5 Software Request Bit

pub fn swreq6(&mut self) -> SWREQ6_W

Bit 6 - XDMAC Channel 6 Software Request Bit

pub fn swreq7(&mut self) -> SWREQ7_W

Bit 7 - XDMAC Channel 7 Software Request Bit

pub fn swreq8(&mut self) -> SWREQ8_W

Bit 8 - XDMAC Channel 8 Software Request Bit

pub fn swreq9(&mut self) -> SWREQ9_W

Bit 9 - XDMAC Channel 9 Software Request Bit

pub fn swreq10(&mut self) -> SWREQ10_W

Bit 10 - XDMAC Channel 10 Software Request Bit

pub fn swreq11(&mut self) -> SWREQ11_W

Bit 11 - XDMAC Channel 11 Software Request Bit

pub fn swreq12(&mut self) -> SWREQ12_W

Bit 12 - XDMAC Channel 12 Software Request Bit

pub fn swreq13(&mut self) -> SWREQ13_W

Bit 13 - XDMAC Channel 13 Software Request Bit

pub fn swreq14(&mut self) -> SWREQ14_W

Bit 14 - XDMAC Channel 14 Software Request Bit

pub fn swreq15(&mut self) -> SWREQ15_W

Bit 15 - XDMAC Channel 15 Software Request Bit

pub fn swreq16(&mut self) -> SWREQ16_W

Bit 16 - XDMAC Channel 16 Software Request Bit

pub fn swreq17(&mut self) -> SWREQ17_W

Bit 17 - XDMAC Channel 17 Software Request Bit

pub fn swreq18(&mut self) -> SWREQ18_W

Bit 18 - XDMAC Channel 18 Software Request Bit

pub fn swreq19(&mut self) -> SWREQ19_W

Bit 19 - XDMAC Channel 19 Software Request Bit

pub fn swreq20(&mut self) -> SWREQ20_W

Bit 20 - XDMAC Channel 20 Software Request Bit

pub fn swreq21(&mut self) -> SWREQ21_W

Bit 21 - XDMAC Channel 21 Software Request Bit

pub fn swreq22(&mut self) -> SWREQ22_W

Bit 22 - XDMAC Channel 22 Software Request Bit

pub fn swreq23(&mut self) -> SWREQ23_W

Bit 23 - XDMAC Channel 23 Software Request Bit

impl W<u32, Reg<u32, _XDMAC_GSWF>>

pub fn swf0(&mut self) -> SWF0_W

Bit 0 - XDMAC Channel 0 Software Flush Request Bit

pub fn swf1(&mut self) -> SWF1_W

Bit 1 - XDMAC Channel 1 Software Flush Request Bit

pub fn swf2(&mut self) -> SWF2_W

Bit 2 - XDMAC Channel 2 Software Flush Request Bit

pub fn swf3(&mut self) -> SWF3_W

Bit 3 - XDMAC Channel 3 Software Flush Request Bit

pub fn swf4(&mut self) -> SWF4_W

Bit 4 - XDMAC Channel 4 Software Flush Request Bit

pub fn swf5(&mut self) -> SWF5_W

Bit 5 - XDMAC Channel 5 Software Flush Request Bit

pub fn swf6(&mut self) -> SWF6_W

Bit 6 - XDMAC Channel 6 Software Flush Request Bit

pub fn swf7(&mut self) -> SWF7_W

Bit 7 - XDMAC Channel 7 Software Flush Request Bit

pub fn swf8(&mut self) -> SWF8_W

Bit 8 - XDMAC Channel 8 Software Flush Request Bit

pub fn swf9(&mut self) -> SWF9_W

Bit 9 - XDMAC Channel 9 Software Flush Request Bit

pub fn swf10(&mut self) -> SWF10_W

Bit 10 - XDMAC Channel 10 Software Flush Request Bit

pub fn swf11(&mut self) -> SWF11_W

Bit 11 - XDMAC Channel 11 Software Flush Request Bit

pub fn swf12(&mut self) -> SWF12_W

Bit 12 - XDMAC Channel 12 Software Flush Request Bit

pub fn swf13(&mut self) -> SWF13_W

Bit 13 - XDMAC Channel 13 Software Flush Request Bit

pub fn swf14(&mut self) -> SWF14_W

Bit 14 - XDMAC Channel 14 Software Flush Request Bit

pub fn swf15(&mut self) -> SWF15_W

Bit 15 - XDMAC Channel 15 Software Flush Request Bit

pub fn swf16(&mut self) -> SWF16_W

Bit 16 - XDMAC Channel 16 Software Flush Request Bit

pub fn swf17(&mut self) -> SWF17_W

Bit 17 - XDMAC Channel 17 Software Flush Request Bit

pub fn swf18(&mut self) -> SWF18_W

Bit 18 - XDMAC Channel 18 Software Flush Request Bit

pub fn swf19(&mut self) -> SWF19_W

Bit 19 - XDMAC Channel 19 Software Flush Request Bit

pub fn swf20(&mut self) -> SWF20_W

Bit 20 - XDMAC Channel 20 Software Flush Request Bit

pub fn swf21(&mut self) -> SWF21_W

Bit 21 - XDMAC Channel 21 Software Flush Request Bit

pub fn swf22(&mut self) -> SWF22_W

Bit 22 - XDMAC Channel 22 Software Flush Request Bit

pub fn swf23(&mut self) -> SWF23_W

Bit 23 - XDMAC Channel 23 Software Flush Request Bit

impl W<u32, Reg<u32, _LOCKBIT_WORD0>>

pub fn lock_region_0(&mut self) -> LOCK_REGION_0_W

Bit 0 - Lock Region 0

pub fn lock_region_1(&mut self) -> LOCK_REGION_1_W

Bit 1 - Lock Region 1

pub fn lock_region_2(&mut self) -> LOCK_REGION_2_W

Bit 2 - Lock Region 2

pub fn lock_region_3(&mut self) -> LOCK_REGION_3_W

Bit 3 - Lock Region 3

pub fn lock_region_4(&mut self) -> LOCK_REGION_4_W

Bit 4 - Lock Region 4

pub fn lock_region_5(&mut self) -> LOCK_REGION_5_W

Bit 5 - Lock Region 5

pub fn lock_region_6(&mut self) -> LOCK_REGION_6_W

Bit 6 - Lock Region 6

pub fn lock_region_7(&mut self) -> LOCK_REGION_7_W

Bit 7 - Lock Region 7

pub fn lock_region_8(&mut self) -> LOCK_REGION_8_W

Bit 8 - Lock Region 8

pub fn lock_region_9(&mut self) -> LOCK_REGION_9_W

Bit 9 - Lock Region 9

pub fn lock_region_10(&mut self) -> LOCK_REGION_10_W

Bit 10 - Lock Region 10

pub fn lock_region_11(&mut self) -> LOCK_REGION_11_W

Bit 11 - Lock Region 11

pub fn lock_region_12(&mut self) -> LOCK_REGION_12_W

Bit 12 - Lock Region 12

pub fn lock_region_13(&mut self) -> LOCK_REGION_13_W

Bit 13 - Lock Region 13

pub fn lock_region_14(&mut self) -> LOCK_REGION_14_W

Bit 14 - Lock Region 14

pub fn lock_region_15(&mut self) -> LOCK_REGION_15_W

Bit 15 - Lock Region 15

pub fn lock_region_16(&mut self) -> LOCK_REGION_16_W

Bit 16 - Lock Region 16

pub fn lock_region_17(&mut self) -> LOCK_REGION_17_W

Bit 17 - Lock Region 17

pub fn lock_region_18(&mut self) -> LOCK_REGION_18_W

Bit 18 - Lock Region 18

pub fn lock_region_19(&mut self) -> LOCK_REGION_19_W

Bit 19 - Lock Region 19

pub fn lock_region_20(&mut self) -> LOCK_REGION_20_W

Bit 20 - Lock Region 20

pub fn lock_region_21(&mut self) -> LOCK_REGION_21_W

Bit 21 - Lock Region 21

pub fn lock_region_22(&mut self) -> LOCK_REGION_22_W

Bit 22 - Lock Region 22

pub fn lock_region_23(&mut self) -> LOCK_REGION_23_W

Bit 23 - Lock Region 23

pub fn lock_region_24(&mut self) -> LOCK_REGION_24_W

Bit 24 - Lock Region 24

pub fn lock_region_25(&mut self) -> LOCK_REGION_25_W

Bit 25 - Lock Region 25

pub fn lock_region_26(&mut self) -> LOCK_REGION_26_W

Bit 26 - Lock Region 26

pub fn lock_region_27(&mut self) -> LOCK_REGION_27_W

Bit 27 - Lock Region 27

pub fn lock_region_28(&mut self) -> LOCK_REGION_28_W

Bit 28 - Lock Region 28

pub fn lock_region_29(&mut self) -> LOCK_REGION_29_W

Bit 29 - Lock Region 29

pub fn lock_region_30(&mut self) -> LOCK_REGION_30_W

Bit 30 - Lock Region 30

pub fn lock_region_31(&mut self) -> LOCK_REGION_31_W

Bit 31 - Lock Region 31

impl W<u32, Reg<u32, _LOCKBIT_WORD1>>

pub fn lock_region_32(&mut self) -> LOCK_REGION_32_W

Bit 0 - Lock Region 32

pub fn lock_region_33(&mut self) -> LOCK_REGION_33_W

Bit 1 - Lock Region 33

pub fn lock_region_34(&mut self) -> LOCK_REGION_34_W

Bit 2 - Lock Region 34

pub fn lock_region_35(&mut self) -> LOCK_REGION_35_W

Bit 3 - Lock Region 35

pub fn lock_region_36(&mut self) -> LOCK_REGION_36_W

Bit 4 - Lock Region 36

pub fn lock_region_37(&mut self) -> LOCK_REGION_37_W

Bit 5 - Lock Region 37

pub fn lock_region_38(&mut self) -> LOCK_REGION_38_W

Bit 6 - Lock Region 38

pub fn lock_region_39(&mut self) -> LOCK_REGION_39_W

Bit 7 - Lock Region 39

pub fn lock_region_40(&mut self) -> LOCK_REGION_40_W

Bit 8 - Lock Region 40

pub fn lock_region_41(&mut self) -> LOCK_REGION_41_W

Bit 9 - Lock Region 41

pub fn lock_region_42(&mut self) -> LOCK_REGION_42_W

Bit 10 - Lock Region 42

pub fn lock_region_43(&mut self) -> LOCK_REGION_43_W

Bit 11 - Lock Region 43

pub fn lock_region_44(&mut self) -> LOCK_REGION_44_W

Bit 12 - Lock Region 44

pub fn lock_region_45(&mut self) -> LOCK_REGION_45_W

Bit 13 - Lock Region 45

pub fn lock_region_46(&mut self) -> LOCK_REGION_46_W

Bit 14 - Lock Region 46

pub fn lock_region_47(&mut self) -> LOCK_REGION_47_W

Bit 15 - Lock Region 47

pub fn lock_region_48(&mut self) -> LOCK_REGION_48_W

Bit 16 - Lock Region 48

pub fn lock_region_49(&mut self) -> LOCK_REGION_49_W

Bit 17 - Lock Region 49

pub fn lock_region_50(&mut self) -> LOCK_REGION_50_W

Bit 18 - Lock Region 50

pub fn lock_region_51(&mut self) -> LOCK_REGION_51_W

Bit 19 - Lock Region 51

pub fn lock_region_52(&mut self) -> LOCK_REGION_52_W

Bit 20 - Lock Region 52

pub fn lock_region_53(&mut self) -> LOCK_REGION_53_W

Bit 21 - Lock Region 53

pub fn lock_region_54(&mut self) -> LOCK_REGION_54_W

Bit 22 - Lock Region 54

pub fn lock_region_55(&mut self) -> LOCK_REGION_55_W

Bit 23 - Lock Region 55

pub fn lock_region_56(&mut self) -> LOCK_REGION_56_W

Bit 24 - Lock Region 56

pub fn lock_region_57(&mut self) -> LOCK_REGION_57_W

Bit 25 - Lock Region 57

pub fn lock_region_58(&mut self) -> LOCK_REGION_58_W

Bit 26 - Lock Region 58

pub fn lock_region_59(&mut self) -> LOCK_REGION_59_W

Bit 27 - Lock Region 59

pub fn lock_region_60(&mut self) -> LOCK_REGION_60_W

Bit 28 - Lock Region 60

pub fn lock_region_61(&mut self) -> LOCK_REGION_61_W

Bit 29 - Lock Region 61

pub fn lock_region_62(&mut self) -> LOCK_REGION_62_W

Bit 30 - Lock Region 62

pub fn lock_region_63(&mut self) -> LOCK_REGION_63_W

Bit 31 - Lock Region 63

impl W<u32, Reg<u32, _LOCKBIT_WORD2>>

pub fn lock_region_64(&mut self) -> LOCK_REGION_64_W

Bit 0 - Lock Region 64

pub fn lock_region_65(&mut self) -> LOCK_REGION_65_W

Bit 1 - Lock Region 65

pub fn lock_region_66(&mut self) -> LOCK_REGION_66_W

Bit 2 - Lock Region 66

pub fn lock_region_67(&mut self) -> LOCK_REGION_67_W

Bit 3 - Lock Region 67

pub fn lock_region_68(&mut self) -> LOCK_REGION_68_W

Bit 4 - Lock Region 68

pub fn lock_region_69(&mut self) -> LOCK_REGION_69_W

Bit 5 - Lock Region 69

pub fn lock_region_70(&mut self) -> LOCK_REGION_70_W

Bit 6 - Lock Region 70

pub fn lock_region_71(&mut self) -> LOCK_REGION_71_W

Bit 7 - Lock Region 71

pub fn lock_region_72(&mut self) -> LOCK_REGION_72_W

Bit 8 - Lock Region 72

pub fn lock_region_73(&mut self) -> LOCK_REGION_73_W

Bit 9 - Lock Region 73

pub fn lock_region_74(&mut self) -> LOCK_REGION_74_W

Bit 10 - Lock Region 74

pub fn lock_region_75(&mut self) -> LOCK_REGION_75_W

Bit 11 - Lock Region 75

pub fn lock_region_76(&mut self) -> LOCK_REGION_76_W

Bit 12 - Lock Region 76

pub fn lock_region_77(&mut self) -> LOCK_REGION_77_W

Bit 13 - Lock Region 77

pub fn lock_region_78(&mut self) -> LOCK_REGION_78_W

Bit 14 - Lock Region 78

pub fn lock_region_79(&mut self) -> LOCK_REGION_79_W

Bit 15 - Lock Region 79

pub fn lock_region_80(&mut self) -> LOCK_REGION_80_W

Bit 16 - Lock Region 80

pub fn lock_region_81(&mut self) -> LOCK_REGION_81_W

Bit 17 - Lock Region 81

pub fn lock_region_82(&mut self) -> LOCK_REGION_82_W

Bit 18 - Lock Region 82

pub fn lock_region_83(&mut self) -> LOCK_REGION_83_W

Bit 19 - Lock Region 83

pub fn lock_region_84(&mut self) -> LOCK_REGION_84_W

Bit 20 - Lock Region 84

pub fn lock_region_85(&mut self) -> LOCK_REGION_85_W

Bit 21 - Lock Region 85

pub fn lock_region_86(&mut self) -> LOCK_REGION_86_W

Bit 22 - Lock Region 86

pub fn lock_region_87(&mut self) -> LOCK_REGION_87_W

Bit 23 - Lock Region 87

pub fn lock_region_88(&mut self) -> LOCK_REGION_88_W

Bit 24 - Lock Region 88

pub fn lock_region_89(&mut self) -> LOCK_REGION_89_W

Bit 25 - Lock Region 89

pub fn lock_region_90(&mut self) -> LOCK_REGION_90_W

Bit 26 - Lock Region 90

pub fn lock_region_91(&mut self) -> LOCK_REGION_91_W

Bit 27 - Lock Region 91

pub fn lock_region_92(&mut self) -> LOCK_REGION_92_W

Bit 28 - Lock Region 92

pub fn lock_region_93(&mut self) -> LOCK_REGION_93_W

Bit 29 - Lock Region 93

pub fn lock_region_94(&mut self) -> LOCK_REGION_94_W

Bit 30 - Lock Region 94

pub fn lock_region_95(&mut self) -> LOCK_REGION_95_W

Bit 31 - Lock Region 95

impl W<u32, Reg<u32, _LOCKBIT_WORD3>>

pub fn lock_region_96(&mut self) -> LOCK_REGION_96_W

Bit 0 - Lock Region 96

pub fn lock_region_97(&mut self) -> LOCK_REGION_97_W

Bit 1 - Lock Region 97

pub fn lock_region_98(&mut self) -> LOCK_REGION_98_W

Bit 2 - Lock Region 98

pub fn lock_region_99(&mut self) -> LOCK_REGION_99_W

Bit 3 - Lock Region 99

pub fn lock_region_100(&mut self) -> LOCK_REGION_100_W

Bit 4 - Lock Region 100

pub fn lock_region_101(&mut self) -> LOCK_REGION_101_W

Bit 5 - Lock Region 101

pub fn lock_region_102(&mut self) -> LOCK_REGION_102_W

Bit 6 - Lock Region 102

pub fn lock_region_103(&mut self) -> LOCK_REGION_103_W

Bit 7 - Lock Region 103

pub fn lock_region_104(&mut self) -> LOCK_REGION_104_W

Bit 8 - Lock Region 104

pub fn lock_region_105(&mut self) -> LOCK_REGION_105_W

Bit 9 - Lock Region 105

pub fn lock_region_106(&mut self) -> LOCK_REGION_106_W

Bit 10 - Lock Region 106

pub fn lock_region_107(&mut self) -> LOCK_REGION_107_W

Bit 11 - Lock Region 107

pub fn lock_region_108(&mut self) -> LOCK_REGION_108_W

Bit 12 - Lock Region 108

pub fn lock_region_109(&mut self) -> LOCK_REGION_109_W

Bit 13 - Lock Region 109

pub fn lock_region_110(&mut self) -> LOCK_REGION_110_W

Bit 14 - Lock Region 110

pub fn lock_region_111(&mut self) -> LOCK_REGION_111_W

Bit 15 - Lock Region 111

pub fn lock_region_112(&mut self) -> LOCK_REGION_112_W

Bit 16 - Lock Region 112

pub fn lock_region_113(&mut self) -> LOCK_REGION_113_W

Bit 17 - Lock Region 113

pub fn lock_region_114(&mut self) -> LOCK_REGION_114_W

Bit 18 - Lock Region 114

pub fn lock_region_115(&mut self) -> LOCK_REGION_115_W

Bit 19 - Lock Region 115

pub fn lock_region_116(&mut self) -> LOCK_REGION_116_W

Bit 20 - Lock Region 116

pub fn lock_region_117(&mut self) -> LOCK_REGION_117_W

Bit 21 - Lock Region 117

pub fn lock_region_118(&mut self) -> LOCK_REGION_118_W

Bit 22 - Lock Region 118

pub fn lock_region_119(&mut self) -> LOCK_REGION_119_W

Bit 23 - Lock Region 119

pub fn lock_region_120(&mut self) -> LOCK_REGION_120_W

Bit 24 - Lock Region 120

pub fn lock_region_121(&mut self) -> LOCK_REGION_121_W

Bit 25 - Lock Region 121

pub fn lock_region_122(&mut self) -> LOCK_REGION_122_W

Bit 26 - Lock Region 122

pub fn lock_region_123(&mut self) -> LOCK_REGION_123_W

Bit 27 - Lock Region 123

pub fn lock_region_124(&mut self) -> LOCK_REGION_124_W

Bit 28 - Lock Region 124

pub fn lock_region_125(&mut self) -> LOCK_REGION_125_W

Bit 29 - Lock Region 125

pub fn lock_region_126(&mut self) -> LOCK_REGION_126_W

Bit 30 - Lock Region 126

pub fn lock_region_127(&mut self) -> LOCK_REGION_127_W

Bit 31 - Lock Region 127

impl W<u32, Reg<u32, _ACTLR>>

pub fn disfold(&mut self) -> DISFOLD_W

Bit 2 - Disables folding of IT instructions

pub fn fpexcodis(&mut self) -> FPEXCODIS_W

Bit 10 - Disables FPU exception outputs

pub fn disramode(&mut self) -> DISRAMODE_W

Bit 11 - Disables dynamic read allocate mode for Write-Back Write-Allocate memory regions

pub fn disitmatbflush(&mut self) -> DISITMATBFLUSH_W

Bit 12 - Disables ITM and DWT ATB flush

pub fn disbtacread(&mut self) -> DISBTACREAD_W

Bit 13

pub fn disbtacalloc(&mut self) -> DISBTACALLOC_W

Bit 14

pub fn discritaxirur(&mut self) -> DISCRITAXIRUR_W

Bit 15

pub fn disdi(&mut self) -> DISDI_W

Bits 16:20

pub fn disissch1(&mut self) -> DISISSCH1_W

Bits 21:25

pub fn disdynadd(&mut self) -> DISDYNADD_W

Bit 26 - Disables dynamic allocation of ADD and SUB instructions

pub fn discritaxiruw(&mut self) -> DISCRITAXIRUW_W

Bit 27 - Disable critical AXI read-under-write

pub fn disfpuissopt(&mut self) -> DISFPUISSOPT_W

Bit 28 - Disables dynamic allocation of ADD and SUB instructions

impl W<u32, Reg<u32, _CSR>>

pub fn enable(&mut self) -> ENABLE_W

Bit 0 - Enables the counter

pub fn tickint(&mut self) -> TICKINT_W

Bit 1 - Enables SysTick exception request

pub fn clksource(&mut self) -> CLKSOURCE_W

Bit 2 - Indicates the clock source

pub fn countflag(&mut self) -> COUNTFLAG_W

Bit 16 - Returns 1 if timer counted to 0 since last time this was read

impl W<u32, Reg<u32, _RVR>>

pub fn reload(&mut self) -> RELOAD_W

Bits 0:23 - Value to load into the SysTick Current Value Register when the counter reaches 0

impl W<u32, Reg<u32, _CVR>>

pub fn current(&mut self) -> CURRENT_W

Bits 0:23 - Current value at the time the register is accessed