Type Definition atsame70j21b::twihs0::twihs_ier::W

type W = W<u32, TWIHS_IER>;

Writer for register TWIHS_IER

Implementations

impl W

pub fn txcomp(&mut self) -> TXCOMP_W

Bit 0 - Transmission Completed Interrupt Enable

pub fn rxrdy(&mut self) -> RXRDY_W

Bit 1 - Receive Holding Register Ready Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W

Bit 2 - Transmit Holding Register Ready Interrupt Enable

pub fn svacc(&mut self) -> SVACC_W

Bit 4 - Slave Access Interrupt Enable

pub fn gacc(&mut self) -> GACC_W

Bit 5 - General Call Access Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W

Bit 6 - Overrun Error Interrupt Enable

pub fn unre(&mut self) -> UNRE_W

Bit 7 - Underrun Error Interrupt Enable

pub fn nack(&mut self) -> NACK_W

Bit 8 - Not Acknowledge Interrupt Enable

pub fn arblst(&mut self) -> ARBLST_W

Bit 9 - Arbitration Lost Interrupt Enable

pub fn scl_ws(&mut self) -> SCL_WS_W

Bit 10 - Clock Wait State Interrupt Enable

pub fn eosacc(&mut self) -> EOSACC_W

Bit 11 - End Of Slave Access Interrupt Enable

pub fn mcack(&mut self) -> MCACK_W

Bit 16 - Master Code Acknowledge Interrupt Enable

pub fn tout(&mut self) -> TOUT_W

Bit 18 - Timeout Error Interrupt Enable

pub fn pecerr(&mut self) -> PECERR_W

Bit 19 - PEC Error Interrupt Enable

pub fn smbdam(&mut self) -> SMBDAM_W

Bit 20 - SMBus Default Address Match Interrupt Enable

pub fn smbhhm(&mut self) -> SMBHHM_W

Bit 21 - SMBus Host Header Address Match Interrupt Enable