[−][src]Struct atsame70j19b::generic::R
Register/field reader
Result of the read method of a register.
Also it can be used in the modify method
Implementations
impl<U, T> R<U, T> where
U: Copy, [src]
U: Copy,
impl<FI> R<bool, FI>[src]
pub fn bit(&self) -> bool[src]
Value of the field as raw bits
pub fn bit_is_clear(&self) -> bool[src]
Returns true if the bit is clear (0)
pub fn bit_is_set(&self) -> bool[src]
Returns true if the bit is set (1)
impl R<u8, SELMINUS_A>[src]
pub fn variant(&self) -> SELMINUS_A[src]
Get enumerated values variant
pub fn is_ts(&self) -> bool[src]
Checks if the value of the field is TS
pub fn is_vrefp(&self) -> bool[src]
Checks if the value of the field is VREFP
pub fn is_dac0(&self) -> bool[src]
Checks if the value of the field is DAC0
pub fn is_dac1(&self) -> bool[src]
Checks if the value of the field is DAC1
pub fn is_afe0_ad0(&self) -> bool[src]
Checks if the value of the field is AFE0_AD0
pub fn is_afe0_ad1(&self) -> bool[src]
Checks if the value of the field is AFE0_AD1
pub fn is_afe0_ad2(&self) -> bool[src]
Checks if the value of the field is AFE0_AD2
pub fn is_afe0_ad3(&self) -> bool[src]
Checks if the value of the field is AFE0_AD3
impl R<u8, SELPLUS_A>[src]
pub fn variant(&self) -> SELPLUS_A[src]
Get enumerated values variant
pub fn is_afe0_ad0(&self) -> bool[src]
Checks if the value of the field is AFE0_AD0
pub fn is_afe0_ad1(&self) -> bool[src]
Checks if the value of the field is AFE0_AD1
pub fn is_afe0_ad2(&self) -> bool[src]
Checks if the value of the field is AFE0_AD2
pub fn is_afe0_ad3(&self) -> bool[src]
Checks if the value of the field is AFE0_AD3
pub fn is_afe0_ad4(&self) -> bool[src]
Checks if the value of the field is AFE0_AD4
pub fn is_afe0_ad5(&self) -> bool[src]
Checks if the value of the field is AFE0_AD5
pub fn is_afe1_ad0(&self) -> bool[src]
Checks if the value of the field is AFE1_AD0
pub fn is_afe1_ad1(&self) -> bool[src]
Checks if the value of the field is AFE1_AD1
impl R<bool, ACEN_A>[src]
pub fn variant(&self) -> ACEN_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<u8, EDGETYP_A>[src]
pub fn variant(&self) -> Variant<u8, EDGETYP_A>[src]
Get enumerated values variant
pub fn is_rising(&self) -> bool[src]
Checks if the value of the field is RISING
pub fn is_falling(&self) -> bool[src]
Checks if the value of the field is FALLING
pub fn is_any(&self) -> bool[src]
Checks if the value of the field is ANY
impl R<bool, INV_A>[src]
pub fn variant(&self) -> INV_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, SELFS_A>[src]
pub fn variant(&self) -> SELFS_A[src]
Get enumerated values variant
pub fn is_ce(&self) -> bool[src]
Checks if the value of the field is CE
pub fn is_output(&self) -> bool[src]
Checks if the value of the field is OUTPUT
impl R<bool, FE_A>[src]
pub fn variant(&self) -> FE_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<u32, Reg<u32, _ACC_MR>>[src]
pub fn selminus(&self) -> SELMINUS_R[src]
Bits 0:2 - Selection for Minus Comparator Input
pub fn selplus(&self) -> SELPLUS_R[src]
Bits 4:6 - Selection For Plus Comparator Input
pub fn acen(&self) -> ACEN_R[src]
Bit 8 - Analog Comparator Enable
pub fn edgetyp(&self) -> EDGETYP_R[src]
Bits 9:10 - Edge Type
pub fn inv(&self) -> INV_R[src]
Bit 12 - Invert Comparator Output
pub fn selfs(&self) -> SELFS_R[src]
Bit 13 - Selection Of Fault Source
pub fn fe(&self) -> FE_R[src]
Bit 14 - Fault Enable
impl R<u32, Reg<u32, _ACC_IMR>>[src]
impl R<u32, Reg<u32, _ACC_ISR>>[src]
pub fn ce(&self) -> CE_R[src]
Bit 0 - Comparison Edge (cleared on read)
pub fn sco(&self) -> SCO_R[src]
Bit 1 - Synchronized Comparator Output
pub fn mask(&self) -> MASK_R[src]
Bit 31 - Flag Mask
impl R<bool, ISEL_A>[src]
pub fn variant(&self) -> ISEL_A[src]
Get enumerated values variant
pub fn is_lopw(&self) -> bool[src]
Checks if the value of the field is LOPW
pub fn is_hisp(&self) -> bool[src]
Checks if the value of the field is HISP
impl R<u32, Reg<u32, _ACC_ACR>>[src]
pub fn isel(&self) -> ISEL_R[src]
Bit 0 - Current Selection
pub fn hyst(&self) -> HYST_R[src]
Bits 1:2 - Hysteresis Selection
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _ACC_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key
impl R<u32, Reg<u32, _ACC_WPSR>>[src]
impl R<bool, DUALBUFF_A>[src]
pub fn variant(&self) -> DUALBUFF_A[src]
Get enumerated values variant
pub fn is_inactive(&self) -> bool[src]
Checks if the value of the field is INACTIVE
pub fn is_active(&self) -> bool[src]
Checks if the value of the field is ACTIVE
impl R<u8, SMOD_A>[src]
pub fn variant(&self) -> Variant<u8, SMOD_A>[src]
Get enumerated values variant
pub fn is_manual_start(&self) -> bool[src]
Checks if the value of the field is MANUAL_START
pub fn is_auto_start(&self) -> bool[src]
Checks if the value of the field is AUTO_START
pub fn is_idatar0_start(&self) -> bool[src]
Checks if the value of the field is IDATAR0_START
impl R<u8, KEYSIZE_A>[src]
pub fn variant(&self) -> Variant<u8, KEYSIZE_A>[src]
Get enumerated values variant
pub fn is_aes128(&self) -> bool[src]
Checks if the value of the field is AES128
pub fn is_aes192(&self) -> bool[src]
Checks if the value of the field is AES192
pub fn is_aes256(&self) -> bool[src]
Checks if the value of the field is AES256
impl R<u8, OPMOD_A>[src]
pub fn variant(&self) -> Variant<u8, OPMOD_A>[src]
Get enumerated values variant
pub fn is_ecb(&self) -> bool[src]
Checks if the value of the field is ECB
pub fn is_cbc(&self) -> bool[src]
Checks if the value of the field is CBC
pub fn is_ofb(&self) -> bool[src]
Checks if the value of the field is OFB
pub fn is_cfb(&self) -> bool[src]
Checks if the value of the field is CFB
pub fn is_ctr(&self) -> bool[src]
Checks if the value of the field is CTR
pub fn is_gcm(&self) -> bool[src]
Checks if the value of the field is GCM
impl R<u8, CFBS_A>[src]
pub fn variant(&self) -> Variant<u8, CFBS_A>[src]
Get enumerated values variant
pub fn is_size_128bit(&self) -> bool[src]
Checks if the value of the field is SIZE_128BIT
pub fn is_size_64bit(&self) -> bool[src]
Checks if the value of the field is SIZE_64BIT
pub fn is_size_32bit(&self) -> bool[src]
Checks if the value of the field is SIZE_32BIT
pub fn is_size_16bit(&self) -> bool[src]
Checks if the value of the field is SIZE_16BIT
pub fn is_size_8bit(&self) -> bool[src]
Checks if the value of the field is SIZE_8BIT
impl R<u8, CKEY_A>[src]
pub fn variant(&self) -> Variant<u8, CKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _AES_MR>>[src]
pub fn cipher(&self) -> CIPHER_R[src]
Bit 0 - Processing Mode
pub fn gtagen(&self) -> GTAGEN_R[src]
Bit 1 - GCM Automatic Tag Generation Enable
pub fn dualbuff(&self) -> DUALBUFF_R[src]
Bit 3 - Dual Input Buffer
pub fn procdly(&self) -> PROCDLY_R[src]
Bits 4:7 - Processing Delay
pub fn smod(&self) -> SMOD_R[src]
Bits 8:9 - Start Mode
pub fn keysize(&self) -> KEYSIZE_R[src]
Bits 10:11 - Key Size
pub fn opmod(&self) -> OPMOD_R[src]
Bits 12:14 - Operating Mode
pub fn lod(&self) -> LOD_R[src]
Bit 15 - Last Output Data Mode
pub fn cfbs(&self) -> CFBS_R[src]
Bits 16:18 - Cipher Feedback Data Size
pub fn ckey(&self) -> CKEY_R[src]
Bits 20:23 - Countermeasure Key
impl R<u32, Reg<u32, _AES_IMR>>[src]
pub fn datrdy(&self) -> DATRDY_R[src]
Bit 0 - Data Ready Interrupt Mask
pub fn urad(&self) -> URAD_R[src]
Bit 8 - Unspecified Register Access Detection Interrupt Mask
pub fn tagrdy(&self) -> TAGRDY_R[src]
Bit 16 - GCM Tag Ready Interrupt Mask
impl R<u8, URAT_A>[src]
pub fn variant(&self) -> Variant<u8, URAT_A>[src]
Get enumerated values variant
pub fn is_idr_wr_processing(&self) -> bool[src]
Checks if the value of the field is IDR_WR_PROCESSING
pub fn is_odr_rd_processing(&self) -> bool[src]
Checks if the value of the field is ODR_RD_PROCESSING
pub fn is_mr_wr_processing(&self) -> bool[src]
Checks if the value of the field is MR_WR_PROCESSING
pub fn is_odr_rd_subkgen(&self) -> bool[src]
Checks if the value of the field is ODR_RD_SUBKGEN
pub fn is_mr_wr_subkgen(&self) -> bool[src]
Checks if the value of the field is MR_WR_SUBKGEN
pub fn is_wor_rd_access(&self) -> bool[src]
Checks if the value of the field is WOR_RD_ACCESS
impl R<u32, Reg<u32, _AES_ISR>>[src]
pub fn datrdy(&self) -> DATRDY_R[src]
Bit 0 - Data Ready (cleared by setting bit START or bit SWRST in AES_CR or by reading AES_ODATARx)
pub fn urad(&self) -> URAD_R[src]
Bit 8 - Unspecified Register Access Detection Status (cleared by writing SWRST in AES_CR)
pub fn urat(&self) -> URAT_R[src]
Bits 12:15 - Unspecified Register Access (cleared by writing SWRST in AES_CR)
pub fn tagrdy(&self) -> TAGRDY_R[src]
Bit 16 - GCM Tag Ready
impl R<u32, Reg<u32, _AES_ODATAR>>[src]
impl R<u32, Reg<u32, _AES_AADLENR>>[src]
impl R<u32, Reg<u32, _AES_CLENR>>[src]
impl R<u32, Reg<u32, _AES_GHASHR>>[src]
impl R<u32, Reg<u32, _AES_TAGR>>[src]
impl R<u32, Reg<u32, _AES_CTRR>>[src]
impl R<u32, Reg<u32, _AES_GCMHR>>[src]
impl R<bool, TRGEN_A>[src]
pub fn variant(&self) -> TRGEN_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<u8, TRGSEL_A>[src]
pub fn variant(&self) -> Variant<u8, TRGSEL_A>[src]
Get enumerated values variant
pub fn is_afec_trig0(&self) -> bool[src]
Checks if the value of the field is AFEC_TRIG0
pub fn is_afec_trig1(&self) -> bool[src]
Checks if the value of the field is AFEC_TRIG1
pub fn is_afec_trig2(&self) -> bool[src]
Checks if the value of the field is AFEC_TRIG2
pub fn is_afec_trig3(&self) -> bool[src]
Checks if the value of the field is AFEC_TRIG3
pub fn is_afec_trig4(&self) -> bool[src]
Checks if the value of the field is AFEC_TRIG4
pub fn is_afec_trig5(&self) -> bool[src]
Checks if the value of the field is AFEC_TRIG5
pub fn is_afec_trig6(&self) -> bool[src]
Checks if the value of the field is AFEC_TRIG6
impl R<bool, SLEEP_A>[src]
pub fn variant(&self) -> SLEEP_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_sleep(&self) -> bool[src]
Checks if the value of the field is SLEEP
impl R<bool, FWUP_A>[src]
pub fn variant(&self) -> FWUP_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<bool, FREERUN_A>[src]
pub fn variant(&self) -> FREERUN_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool[src]
Checks if the value of the field is ON
impl R<u8, STARTUP_A>[src]
pub fn variant(&self) -> STARTUP_A[src]
Get enumerated values variant
pub fn is_sut0(&self) -> bool[src]
Checks if the value of the field is SUT0
pub fn is_sut8(&self) -> bool[src]
Checks if the value of the field is SUT8
pub fn is_sut16(&self) -> bool[src]
Checks if the value of the field is SUT16
pub fn is_sut24(&self) -> bool[src]
Checks if the value of the field is SUT24
pub fn is_sut64(&self) -> bool[src]
Checks if the value of the field is SUT64
pub fn is_sut80(&self) -> bool[src]
Checks if the value of the field is SUT80
pub fn is_sut96(&self) -> bool[src]
Checks if the value of the field is SUT96
pub fn is_sut112(&self) -> bool[src]
Checks if the value of the field is SUT112
pub fn is_sut512(&self) -> bool[src]
Checks if the value of the field is SUT512
pub fn is_sut576(&self) -> bool[src]
Checks if the value of the field is SUT576
pub fn is_sut640(&self) -> bool[src]
Checks if the value of the field is SUT640
pub fn is_sut704(&self) -> bool[src]
Checks if the value of the field is SUT704
pub fn is_sut768(&self) -> bool[src]
Checks if the value of the field is SUT768
pub fn is_sut832(&self) -> bool[src]
Checks if the value of the field is SUT832
pub fn is_sut896(&self) -> bool[src]
Checks if the value of the field is SUT896
pub fn is_sut960(&self) -> bool[src]
Checks if the value of the field is SUT960
impl R<bool, USEQ_A>[src]
pub fn variant(&self) -> USEQ_A[src]
Get enumerated values variant
pub fn is_num_order(&self) -> bool[src]
Checks if the value of the field is NUM_ORDER
pub fn is_reg_order(&self) -> bool[src]
Checks if the value of the field is REG_ORDER
impl R<u32, Reg<u32, _AFEC_MR>>[src]
pub fn trgen(&self) -> TRGEN_R[src]
Bit 0 - Trigger Enable
pub fn trgsel(&self) -> TRGSEL_R[src]
Bits 1:3 - Trigger Selection
pub fn sleep(&self) -> SLEEP_R[src]
Bit 5 - Sleep Mode
pub fn fwup(&self) -> FWUP_R[src]
Bit 6 - Fast Wake-up
pub fn freerun(&self) -> FREERUN_R[src]
Bit 7 - Free Run Mode
pub fn prescal(&self) -> PRESCAL_R[src]
Bits 8:15 - Prescaler Rate Selection
pub fn startup(&self) -> STARTUP_R[src]
Bits 16:19 - Start-up Time
pub fn one(&self) -> ONE_R[src]
Bit 23 - One
pub fn tracktim(&self) -> TRACKTIM_R[src]
Bits 24:27 - Tracking Time
pub fn transfer(&self) -> TRANSFER_R[src]
Bits 28:29 - Transfer Period
pub fn useq(&self) -> USEQ_R[src]
Bit 31 - User Sequence Enable
impl R<u8, CMPMODE_A>[src]
pub fn variant(&self) -> CMPMODE_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_in_(&self) -> bool[src]
Checks if the value of the field is IN
pub fn is_out(&self) -> bool[src]
Checks if the value of the field is OUT
impl R<u8, RES_A>[src]
pub fn variant(&self) -> Variant<u8, RES_A>[src]
Get enumerated values variant
pub fn is_no_average(&self) -> bool[src]
Checks if the value of the field is NO_AVERAGE
pub fn is_osr4(&self) -> bool[src]
Checks if the value of the field is OSR4
pub fn is_osr16(&self) -> bool[src]
Checks if the value of the field is OSR16
pub fn is_osr64(&self) -> bool[src]
Checks if the value of the field is OSR64
pub fn is_osr256(&self) -> bool[src]
Checks if the value of the field is OSR256
impl R<u8, SIGNMODE_A>[src]
pub fn variant(&self) -> SIGNMODE_A[src]
Get enumerated values variant
pub fn is_se_unsg_df_sign(&self) -> bool[src]
Checks if the value of the field is SE_UNSG_DF_SIGN
pub fn is_se_sign_df_unsg(&self) -> bool[src]
Checks if the value of the field is SE_SIGN_DF_UNSG
pub fn is_all_unsigned(&self) -> bool[src]
Checks if the value of the field is ALL_UNSIGNED
pub fn is_all_signed(&self) -> bool[src]
Checks if the value of the field is ALL_SIGNED
impl R<u32, Reg<u32, _AFEC_EMR>>[src]
pub fn cmpmode(&self) -> CMPMODE_R[src]
Bits 0:1 - Comparison Mode
pub fn cmpsel(&self) -> CMPSEL_R[src]
Bits 3:7 - Comparison Selected Channel
pub fn cmpall(&self) -> CMPALL_R[src]
Bit 9 - Compare All Channels
pub fn cmpfilter(&self) -> CMPFILTER_R[src]
Bits 12:13 - Compare Event Filtering
pub fn res(&self) -> RES_R[src]
Bits 16:18 - Resolution
pub fn tag(&self) -> TAG_R[src]
Bit 24 - TAG of the AFEC_LDCR
pub fn stm(&self) -> STM_R[src]
Bit 25 - Single Trigger Mode
pub fn signmode(&self) -> SIGNMODE_R[src]
Bits 28:29 - Sign Mode
impl R<u32, Reg<u32, _AFEC_SEQ1R>>[src]
pub fn usch0(&self) -> USCH0_R[src]
Bits 0:3 - User Sequence Number 0
pub fn usch1(&self) -> USCH1_R[src]
Bits 4:7 - User Sequence Number 1
pub fn usch2(&self) -> USCH2_R[src]
Bits 8:11 - User Sequence Number 2
pub fn usch3(&self) -> USCH3_R[src]
Bits 12:15 - User Sequence Number 3
pub fn usch4(&self) -> USCH4_R[src]
Bits 16:19 - User Sequence Number 4
pub fn usch5(&self) -> USCH5_R[src]
Bits 20:23 - User Sequence Number 5
pub fn usch6(&self) -> USCH6_R[src]
Bits 24:27 - User Sequence Number 6
pub fn usch7(&self) -> USCH7_R[src]
Bits 28:31 - User Sequence Number 7
impl R<u32, Reg<u32, _AFEC_SEQ2R>>[src]
pub fn usch8(&self) -> USCH8_R[src]
Bits 0:3 - User Sequence Number 8
pub fn usch9(&self) -> USCH9_R[src]
Bits 4:7 - User Sequence Number 9
pub fn usch10(&self) -> USCH10_R[src]
Bits 8:11 - User Sequence Number 10
pub fn usch11(&self) -> USCH11_R[src]
Bits 12:15 - User Sequence Number 11
impl R<u32, Reg<u32, _AFEC_CHSR>>[src]
pub fn ch0(&self) -> CH0_R[src]
Bit 0 - Channel 0 Status
pub fn ch1(&self) -> CH1_R[src]
Bit 1 - Channel 1 Status
pub fn ch2(&self) -> CH2_R[src]
Bit 2 - Channel 2 Status
pub fn ch3(&self) -> CH3_R[src]
Bit 3 - Channel 3 Status
pub fn ch4(&self) -> CH4_R[src]
Bit 4 - Channel 4 Status
pub fn ch5(&self) -> CH5_R[src]
Bit 5 - Channel 5 Status
pub fn ch6(&self) -> CH6_R[src]
Bit 6 - Channel 6 Status
pub fn ch7(&self) -> CH7_R[src]
Bit 7 - Channel 7 Status
pub fn ch8(&self) -> CH8_R[src]
Bit 8 - Channel 8 Status
pub fn ch9(&self) -> CH9_R[src]
Bit 9 - Channel 9 Status
pub fn ch10(&self) -> CH10_R[src]
Bit 10 - Channel 10 Status
pub fn ch11(&self) -> CH11_R[src]
Bit 11 - Channel 11 Status
impl R<u32, Reg<u32, _AFEC_LCDR>>[src]
pub fn ldata(&self) -> LDATA_R[src]
Bits 0:15 - Last Data Converted
pub fn chnb(&self) -> CHNB_R[src]
Bits 24:27 - Channel Number
impl R<u32, Reg<u32, _AFEC_IMR>>[src]
pub fn eoc0(&self) -> EOC0_R[src]
Bit 0 - End of Conversion Interrupt Mask 0
pub fn eoc1(&self) -> EOC1_R[src]
Bit 1 - End of Conversion Interrupt Mask 1
pub fn eoc2(&self) -> EOC2_R[src]
Bit 2 - End of Conversion Interrupt Mask 2
pub fn eoc3(&self) -> EOC3_R[src]
Bit 3 - End of Conversion Interrupt Mask 3
pub fn eoc4(&self) -> EOC4_R[src]
Bit 4 - End of Conversion Interrupt Mask 4
pub fn eoc5(&self) -> EOC5_R[src]
Bit 5 - End of Conversion Interrupt Mask 5
pub fn eoc6(&self) -> EOC6_R[src]
Bit 6 - End of Conversion Interrupt Mask 6
pub fn eoc7(&self) -> EOC7_R[src]
Bit 7 - End of Conversion Interrupt Mask 7
pub fn eoc8(&self) -> EOC8_R[src]
Bit 8 - End of Conversion Interrupt Mask 8
pub fn eoc9(&self) -> EOC9_R[src]
Bit 9 - End of Conversion Interrupt Mask 9
pub fn eoc10(&self) -> EOC10_R[src]
Bit 10 - End of Conversion Interrupt Mask 10
pub fn eoc11(&self) -> EOC11_R[src]
Bit 11 - End of Conversion Interrupt Mask 11
pub fn drdy(&self) -> DRDY_R[src]
Bit 24 - Data Ready Interrupt Mask
pub fn govre(&self) -> GOVRE_R[src]
Bit 25 - General Overrun Error Interrupt Mask
pub fn compe(&self) -> COMPE_R[src]
Bit 26 - Comparison Event Interrupt Mask
pub fn tempchg(&self) -> TEMPCHG_R[src]
Bit 30 - Temperature Change Interrupt Mask
impl R<u32, Reg<u32, _AFEC_ISR>>[src]
pub fn eoc0(&self) -> EOC0_R[src]
Bit 0 - End of Conversion 0 (cleared by reading AFEC_CDRx)
pub fn eoc1(&self) -> EOC1_R[src]
Bit 1 - End of Conversion 1 (cleared by reading AFEC_CDRx)
pub fn eoc2(&self) -> EOC2_R[src]
Bit 2 - End of Conversion 2 (cleared by reading AFEC_CDRx)
pub fn eoc3(&self) -> EOC3_R[src]
Bit 3 - End of Conversion 3 (cleared by reading AFEC_CDRx)
pub fn eoc4(&self) -> EOC4_R[src]
Bit 4 - End of Conversion 4 (cleared by reading AFEC_CDRx)
pub fn eoc5(&self) -> EOC5_R[src]
Bit 5 - End of Conversion 5 (cleared by reading AFEC_CDRx)
pub fn eoc6(&self) -> EOC6_R[src]
Bit 6 - End of Conversion 6 (cleared by reading AFEC_CDRx)
pub fn eoc7(&self) -> EOC7_R[src]
Bit 7 - End of Conversion 7 (cleared by reading AFEC_CDRx)
pub fn eoc8(&self) -> EOC8_R[src]
Bit 8 - End of Conversion 8 (cleared by reading AFEC_CDRx)
pub fn eoc9(&self) -> EOC9_R[src]
Bit 9 - End of Conversion 9 (cleared by reading AFEC_CDRx)
pub fn eoc10(&self) -> EOC10_R[src]
Bit 10 - End of Conversion 10 (cleared by reading AFEC_CDRx)
pub fn eoc11(&self) -> EOC11_R[src]
Bit 11 - End of Conversion 11 (cleared by reading AFEC_CDRx)
pub fn drdy(&self) -> DRDY_R[src]
Bit 24 - Data Ready (cleared by reading AFEC_LCDR)
pub fn govre(&self) -> GOVRE_R[src]
Bit 25 - General Overrun Error (cleared by reading AFEC_ISR)
pub fn compe(&self) -> COMPE_R[src]
Bit 26 - Comparison Error (cleared by reading AFEC_ISR)
pub fn tempchg(&self) -> TEMPCHG_R[src]
Bit 30 - Temperature Change (cleared on read)
impl R<u32, Reg<u32, _AFEC_OVER>>[src]
pub fn ovre0(&self) -> OVRE0_R[src]
Bit 0 - Overrun Error 0
pub fn ovre1(&self) -> OVRE1_R[src]
Bit 1 - Overrun Error 1
pub fn ovre2(&self) -> OVRE2_R[src]
Bit 2 - Overrun Error 2
pub fn ovre3(&self) -> OVRE3_R[src]
Bit 3 - Overrun Error 3
pub fn ovre4(&self) -> OVRE4_R[src]
Bit 4 - Overrun Error 4
pub fn ovre5(&self) -> OVRE5_R[src]
Bit 5 - Overrun Error 5
pub fn ovre6(&self) -> OVRE6_R[src]
Bit 6 - Overrun Error 6
pub fn ovre7(&self) -> OVRE7_R[src]
Bit 7 - Overrun Error 7
pub fn ovre8(&self) -> OVRE8_R[src]
Bit 8 - Overrun Error 8
pub fn ovre9(&self) -> OVRE9_R[src]
Bit 9 - Overrun Error 9
pub fn ovre10(&self) -> OVRE10_R[src]
Bit 10 - Overrun Error 10
pub fn ovre11(&self) -> OVRE11_R[src]
Bit 11 - Overrun Error 11
impl R<u32, Reg<u32, _AFEC_CWR>>[src]
pub fn lowthres(&self) -> LOWTHRES_R[src]
Bits 0:15 - Low Threshold
pub fn highthres(&self) -> HIGHTHRES_R[src]
Bits 16:31 - High Threshold
impl R<u32, Reg<u32, _AFEC_CGR>>[src]
pub fn gain0(&self) -> GAIN0_R[src]
Bits 0:1 - Gain for Channel 0
pub fn gain1(&self) -> GAIN1_R[src]
Bits 2:3 - Gain for Channel 1
pub fn gain2(&self) -> GAIN2_R[src]
Bits 4:5 - Gain for Channel 2
pub fn gain3(&self) -> GAIN3_R[src]
Bits 6:7 - Gain for Channel 3
pub fn gain4(&self) -> GAIN4_R[src]
Bits 8:9 - Gain for Channel 4
pub fn gain5(&self) -> GAIN5_R[src]
Bits 10:11 - Gain for Channel 5
pub fn gain6(&self) -> GAIN6_R[src]
Bits 12:13 - Gain for Channel 6
pub fn gain7(&self) -> GAIN7_R[src]
Bits 14:15 - Gain for Channel 7
pub fn gain8(&self) -> GAIN8_R[src]
Bits 16:17 - Gain for Channel 8
pub fn gain9(&self) -> GAIN9_R[src]
Bits 18:19 - Gain for Channel 9
pub fn gain10(&self) -> GAIN10_R[src]
Bits 20:21 - Gain for Channel 10
pub fn gain11(&self) -> GAIN11_R[src]
Bits 22:23 - Gain for Channel 11
impl R<u32, Reg<u32, _AFEC_DIFFR>>[src]
pub fn diff0(&self) -> DIFF0_R[src]
Bit 0 - Differential inputs for channel 0
pub fn diff1(&self) -> DIFF1_R[src]
Bit 1 - Differential inputs for channel 1
pub fn diff2(&self) -> DIFF2_R[src]
Bit 2 - Differential inputs for channel 2
pub fn diff3(&self) -> DIFF3_R[src]
Bit 3 - Differential inputs for channel 3
pub fn diff4(&self) -> DIFF4_R[src]
Bit 4 - Differential inputs for channel 4
pub fn diff5(&self) -> DIFF5_R[src]
Bit 5 - Differential inputs for channel 5
pub fn diff6(&self) -> DIFF6_R[src]
Bit 6 - Differential inputs for channel 6
pub fn diff7(&self) -> DIFF7_R[src]
Bit 7 - Differential inputs for channel 7
pub fn diff8(&self) -> DIFF8_R[src]
Bit 8 - Differential inputs for channel 8
pub fn diff9(&self) -> DIFF9_R[src]
Bit 9 - Differential inputs for channel 9
pub fn diff10(&self) -> DIFF10_R[src]
Bit 10 - Differential inputs for channel 10
pub fn diff11(&self) -> DIFF11_R[src]
Bit 11 - Differential inputs for channel 11
impl R<u32, Reg<u32, _AFEC_CSELR>>[src]
impl R<u32, Reg<u32, _AFEC_CDR>>[src]
impl R<u32, Reg<u32, _AFEC_COCR>>[src]
impl R<u8, TEMPCMPMOD_A>[src]
pub fn variant(&self) -> TEMPCMPMOD_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_in_(&self) -> bool[src]
Checks if the value of the field is IN
pub fn is_out(&self) -> bool[src]
Checks if the value of the field is OUT
impl R<u32, Reg<u32, _AFEC_TEMPMR>>[src]
pub fn rtct(&self) -> RTCT_R[src]
Bit 0 - Temperature Sensor RTC Trigger Mode
pub fn tempcmpmod(&self) -> TEMPCMPMOD_R[src]
Bits 4:5 - Temperature Comparison Mode
impl R<u32, Reg<u32, _AFEC_TEMPCWR>>[src]
pub fn tlowthres(&self) -> TLOWTHRES_R[src]
Bits 0:15 - Temperature Low Threshold
pub fn thighthres(&self) -> THIGHTHRES_R[src]
Bits 16:31 - Temperature High Threshold
impl R<u32, Reg<u32, _AFEC_ACR>>[src]
pub fn pga0en(&self) -> PGA0EN_R[src]
Bit 2 - PGA0 Enable
pub fn pga1en(&self) -> PGA1EN_R[src]
Bit 3 - PGA1 Enable
pub fn ibctl(&self) -> IBCTL_R[src]
Bits 8:9 - AFE Bias Current Control
impl R<u32, Reg<u32, _AFEC_SHMR>>[src]
pub fn dual0(&self) -> DUAL0_R[src]
Bit 0 - Dual Sample & Hold for channel 0
pub fn dual1(&self) -> DUAL1_R[src]
Bit 1 - Dual Sample & Hold for channel 1
pub fn dual2(&self) -> DUAL2_R[src]
Bit 2 - Dual Sample & Hold for channel 2
pub fn dual3(&self) -> DUAL3_R[src]
Bit 3 - Dual Sample & Hold for channel 3
pub fn dual4(&self) -> DUAL4_R[src]
Bit 4 - Dual Sample & Hold for channel 4
pub fn dual5(&self) -> DUAL5_R[src]
Bit 5 - Dual Sample & Hold for channel 5
pub fn dual6(&self) -> DUAL6_R[src]
Bit 6 - Dual Sample & Hold for channel 6
pub fn dual7(&self) -> DUAL7_R[src]
Bit 7 - Dual Sample & Hold for channel 7
pub fn dual8(&self) -> DUAL8_R[src]
Bit 8 - Dual Sample & Hold for channel 8
pub fn dual9(&self) -> DUAL9_R[src]
Bit 9 - Dual Sample & Hold for channel 9
pub fn dual10(&self) -> DUAL10_R[src]
Bit 10 - Dual Sample & Hold for channel 10
pub fn dual11(&self) -> DUAL11_R[src]
Bit 11 - Dual Sample & Hold for channel 11
impl R<u32, Reg<u32, _AFEC_COSR>>[src]
impl R<u32, Reg<u32, _AFEC_CVR>>[src]
pub fn offsetcorr(&self) -> OFFSETCORR_R[src]
Bits 0:15 - Offset Correction
pub fn gaincorr(&self) -> GAINCORR_R[src]
Bits 16:31 - Gain Correction
impl R<u32, Reg<u32, _AFEC_CECR>>[src]
pub fn ecorr0(&self) -> ECORR0_R[src]
Bit 0 - Error Correction Enable for channel 0
pub fn ecorr1(&self) -> ECORR1_R[src]
Bit 1 - Error Correction Enable for channel 1
pub fn ecorr2(&self) -> ECORR2_R[src]
Bit 2 - Error Correction Enable for channel 2
pub fn ecorr3(&self) -> ECORR3_R[src]
Bit 3 - Error Correction Enable for channel 3
pub fn ecorr4(&self) -> ECORR4_R[src]
Bit 4 - Error Correction Enable for channel 4
pub fn ecorr5(&self) -> ECORR5_R[src]
Bit 5 - Error Correction Enable for channel 5
pub fn ecorr6(&self) -> ECORR6_R[src]
Bit 6 - Error Correction Enable for channel 6
pub fn ecorr7(&self) -> ECORR7_R[src]
Bit 7 - Error Correction Enable for channel 7
pub fn ecorr8(&self) -> ECORR8_R[src]
Bit 8 - Error Correction Enable for channel 8
pub fn ecorr9(&self) -> ECORR9_R[src]
Bit 9 - Error Correction Enable for channel 9
pub fn ecorr10(&self) -> ECORR10_R[src]
Bit 10 - Error Correction Enable for channel 10
pub fn ecorr11(&self) -> ECORR11_R[src]
Bit 11 - Error Correction Enable for channel 11
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _AFEC_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protect KEY
impl R<u32, Reg<u32, _AFEC_WPSR>>[src]
pub fn wpvs(&self) -> WPVS_R[src]
Bit 0 - Write Protect Violation Status
pub fn wpvsrc(&self) -> WPVSRC_R[src]
Bits 8:23 - Write Protect Violation Source
impl R<u8, EPROC_A>[src]
pub fn variant(&self) -> EPROC_A[src]
Get enumerated values variant
pub fn is_samx7(&self) -> bool[src]
Checks if the value of the field is SAMX7
pub fn is_arm946es(&self) -> bool[src]
Checks if the value of the field is ARM946ES
pub fn is_arm7tdmi(&self) -> bool[src]
Checks if the value of the field is ARM7TDMI
pub fn is_cm3(&self) -> bool[src]
Checks if the value of the field is CM3
pub fn is_arm920t(&self) -> bool[src]
Checks if the value of the field is ARM920T
pub fn is_arm926ejs(&self) -> bool[src]
Checks if the value of the field is ARM926EJS
pub fn is_ca5(&self) -> bool[src]
Checks if the value of the field is CA5
pub fn is_cm4(&self) -> bool[src]
Checks if the value of the field is CM4
impl R<u8, NVPSIZ_A>[src]
pub fn variant(&self) -> Variant<u8, NVPSIZ_A>[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_8k(&self) -> bool[src]
Checks if the value of the field is _8K
pub fn is_16k(&self) -> bool[src]
Checks if the value of the field is _16K
pub fn is_32k(&self) -> bool[src]
Checks if the value of the field is _32K
pub fn is_64k(&self) -> bool[src]
Checks if the value of the field is _64K
pub fn is_128k(&self) -> bool[src]
Checks if the value of the field is _128K
pub fn is_160k(&self) -> bool[src]
Checks if the value of the field is _160K
pub fn is_256k(&self) -> bool[src]
Checks if the value of the field is _256K
pub fn is_512k(&self) -> bool[src]
Checks if the value of the field is _512K
pub fn is_1024k(&self) -> bool[src]
Checks if the value of the field is _1024K
pub fn is_2048k(&self) -> bool[src]
Checks if the value of the field is _2048K
impl R<u8, NVPSIZ2_A>[src]
pub fn variant(&self) -> Variant<u8, NVPSIZ2_A>[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_8k(&self) -> bool[src]
Checks if the value of the field is _8K
pub fn is_16k(&self) -> bool[src]
Checks if the value of the field is _16K
pub fn is_32k(&self) -> bool[src]
Checks if the value of the field is _32K
pub fn is_64k(&self) -> bool[src]
Checks if the value of the field is _64K
pub fn is_128k(&self) -> bool[src]
Checks if the value of the field is _128K
pub fn is_256k(&self) -> bool[src]
Checks if the value of the field is _256K
pub fn is_512k(&self) -> bool[src]
Checks if the value of the field is _512K
pub fn is_1024k(&self) -> bool[src]
Checks if the value of the field is _1024K
pub fn is_2048k(&self) -> bool[src]
Checks if the value of the field is _2048K
impl R<u8, SRAMSIZ_A>[src]
pub fn variant(&self) -> SRAMSIZ_A[src]
Get enumerated values variant
pub fn is_48k(&self) -> bool[src]
Checks if the value of the field is _48K
pub fn is_192k(&self) -> bool[src]
Checks if the value of the field is _192K
pub fn is_384k(&self) -> bool[src]
Checks if the value of the field is _384K
pub fn is_6k(&self) -> bool[src]
Checks if the value of the field is _6K
pub fn is_24k(&self) -> bool[src]
Checks if the value of the field is _24K
pub fn is_4k(&self) -> bool[src]
Checks if the value of the field is _4K
pub fn is_80k(&self) -> bool[src]
Checks if the value of the field is _80K
pub fn is_160k(&self) -> bool[src]
Checks if the value of the field is _160K
pub fn is_8k(&self) -> bool[src]
Checks if the value of the field is _8K
pub fn is_16k(&self) -> bool[src]
Checks if the value of the field is _16K
pub fn is_32k(&self) -> bool[src]
Checks if the value of the field is _32K
pub fn is_64k(&self) -> bool[src]
Checks if the value of the field is _64K
pub fn is_128k(&self) -> bool[src]
Checks if the value of the field is _128K
pub fn is_256k(&self) -> bool[src]
Checks if the value of the field is _256K
pub fn is_96k(&self) -> bool[src]
Checks if the value of the field is _96K
pub fn is_512k(&self) -> bool[src]
Checks if the value of the field is _512K
impl R<u8, ARCH_A>[src]
pub fn variant(&self) -> Variant<u8, ARCH_A>[src]
Get enumerated values variant
pub fn is_same70(&self) -> bool[src]
Checks if the value of the field is SAME70
pub fn is_sams70(&self) -> bool[src]
Checks if the value of the field is SAMS70
pub fn is_samv71(&self) -> bool[src]
Checks if the value of the field is SAMV71
pub fn is_samv70(&self) -> bool[src]
Checks if the value of the field is SAMV70
impl R<u8, NVPTYP_A>[src]
pub fn variant(&self) -> Variant<u8, NVPTYP_A>[src]
Get enumerated values variant
pub fn is_rom(&self) -> bool[src]
Checks if the value of the field is ROM
pub fn is_romless(&self) -> bool[src]
Checks if the value of the field is ROMLESS
pub fn is_flash(&self) -> bool[src]
Checks if the value of the field is FLASH
pub fn is_rom_flash(&self) -> bool[src]
Checks if the value of the field is ROM_FLASH
pub fn is_sram(&self) -> bool[src]
Checks if the value of the field is SRAM
impl R<u32, Reg<u32, _CHIPID_CIDR>>[src]
pub fn version(&self) -> VERSION_R[src]
Bits 0:4 - Version of the Device
pub fn eproc(&self) -> EPROC_R[src]
Bits 5:7 - Embedded Processor
pub fn nvpsiz(&self) -> NVPSIZ_R[src]
Bits 8:11 - Nonvolatile Program Memory Size
pub fn nvpsiz2(&self) -> NVPSIZ2_R[src]
Bits 12:15 - Second Nonvolatile Program Memory Size
pub fn sramsiz(&self) -> SRAMSIZ_R[src]
Bits 16:19 - Internal SRAM Size
pub fn arch(&self) -> ARCH_R[src]
Bits 20:27 - Architecture Identifier
pub fn nvptyp(&self) -> NVPTYP_R[src]
Bits 28:30 - Nonvolatile Program Memory Type
pub fn ext(&self) -> EXT_R[src]
Bit 31 - Extension Flag
impl R<u32, Reg<u32, _CHIPID_EXID>>[src]
impl R<bool, MAXS0_A>[src]
pub fn variant(&self) -> MAXS0_A[src]
Get enumerated values variant
pub fn is_trig_event(&self) -> bool[src]
Checks if the value of the field is TRIG_EVENT
pub fn is_maximum(&self) -> bool[src]
Checks if the value of the field is MAXIMUM
impl R<bool, MAXS1_A>[src]
pub fn variant(&self) -> MAXS1_A[src]
Get enumerated values variant
pub fn is_trig_event(&self) -> bool[src]
Checks if the value of the field is TRIG_EVENT
pub fn is_maximum(&self) -> bool[src]
Checks if the value of the field is MAXIMUM
impl R<bool, WORD_A>[src]
pub fn variant(&self) -> WORD_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DIFF_A>[src]
pub fn variant(&self) -> DIFF_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _DACC_MR>>[src]
pub fn maxs0(&self) -> MAXS0_R[src]
Bit 0 - Max Speed Mode for Channel 0
pub fn maxs1(&self) -> MAXS1_R[src]
Bit 1 - Max Speed Mode for Channel 1
pub fn word(&self) -> WORD_R[src]
Bit 4 - Word Transfer Mode
pub fn zero(&self) -> ZERO_R[src]
Bit 5 - Must always be written to 0.
pub fn diff(&self) -> DIFF_R[src]
Bit 23 - Differential Mode
pub fn prescaler(&self) -> PRESCALER_R[src]
Bits 24:27 - Peripheral Clock to DAC Clock Ratio
impl R<bool, TRGEN0_A>[src]
pub fn variant(&self) -> TRGEN0_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, TRGEN1_A>[src]
pub fn variant(&self) -> TRGEN1_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<u8, TRGSEL0_A>[src]
pub fn variant(&self) -> TRGSEL0_A[src]
Get enumerated values variant
pub fn is_trgsel0(&self) -> bool[src]
Checks if the value of the field is TRGSEL0
pub fn is_trgsel1(&self) -> bool[src]
Checks if the value of the field is TRGSEL1
pub fn is_trgsel2(&self) -> bool[src]
Checks if the value of the field is TRGSEL2
pub fn is_trgsel3(&self) -> bool[src]
Checks if the value of the field is TRGSEL3
pub fn is_trgsel4(&self) -> bool[src]
Checks if the value of the field is TRGSEL4
pub fn is_trgsel5(&self) -> bool[src]
Checks if the value of the field is TRGSEL5
pub fn is_trgsel6(&self) -> bool[src]
Checks if the value of the field is TRGSEL6
pub fn is_trgsel7(&self) -> bool[src]
Checks if the value of the field is TRGSEL7
impl R<u8, TRGSEL1_A>[src]
pub fn variant(&self) -> TRGSEL1_A[src]
Get enumerated values variant
pub fn is_trgsel0(&self) -> bool[src]
Checks if the value of the field is TRGSEL0
pub fn is_trgsel1(&self) -> bool[src]
Checks if the value of the field is TRGSEL1
pub fn is_trgsel2(&self) -> bool[src]
Checks if the value of the field is TRGSEL2
pub fn is_trgsel3(&self) -> bool[src]
Checks if the value of the field is TRGSEL3
pub fn is_trgsel4(&self) -> bool[src]
Checks if the value of the field is TRGSEL4
pub fn is_trgsel5(&self) -> bool[src]
Checks if the value of the field is TRGSEL5
pub fn is_trgsel6(&self) -> bool[src]
Checks if the value of the field is TRGSEL6
pub fn is_trgsel7(&self) -> bool[src]
Checks if the value of the field is TRGSEL7
impl R<u8, OSR0_A>[src]
pub fn variant(&self) -> Variant<u8, OSR0_A>[src]
Get enumerated values variant
pub fn is_osr_1(&self) -> bool[src]
Checks if the value of the field is OSR_1
pub fn is_osr_2(&self) -> bool[src]
Checks if the value of the field is OSR_2
pub fn is_osr_4(&self) -> bool[src]
Checks if the value of the field is OSR_4
pub fn is_osr_8(&self) -> bool[src]
Checks if the value of the field is OSR_8
pub fn is_osr_16(&self) -> bool[src]
Checks if the value of the field is OSR_16
pub fn is_osr_32(&self) -> bool[src]
Checks if the value of the field is OSR_32
impl R<u8, OSR1_A>[src]
pub fn variant(&self) -> Variant<u8, OSR1_A>[src]
Get enumerated values variant
pub fn is_osr_1(&self) -> bool[src]
Checks if the value of the field is OSR_1
pub fn is_osr_2(&self) -> bool[src]
Checks if the value of the field is OSR_2
pub fn is_osr_4(&self) -> bool[src]
Checks if the value of the field is OSR_4
pub fn is_osr_8(&self) -> bool[src]
Checks if the value of the field is OSR_8
pub fn is_osr_16(&self) -> bool[src]
Checks if the value of the field is OSR_16
pub fn is_osr_32(&self) -> bool[src]
Checks if the value of the field is OSR_32
impl R<u32, Reg<u32, _DACC_TRIGR>>[src]
pub fn trgen0(&self) -> TRGEN0_R[src]
Bit 0 - Trigger Enable of Channel 0
pub fn trgen1(&self) -> TRGEN1_R[src]
Bit 1 - Trigger Enable of Channel 1
pub fn trgsel0(&self) -> TRGSEL0_R[src]
Bits 4:6 - Trigger Selection of Channel 0
pub fn trgsel1(&self) -> TRGSEL1_R[src]
Bits 8:10 - Trigger Selection of Channel 1
pub fn osr0(&self) -> OSR0_R[src]
Bits 16:18 - Over Sampling Ratio of Channel 0
pub fn osr1(&self) -> OSR1_R[src]
Bits 20:22 - Over Sampling Ratio of Channel 1
impl R<u32, Reg<u32, _DACC_CHSR>>[src]
pub fn ch0(&self) -> CH0_R[src]
Bit 0 - Channel 0 Status
pub fn ch1(&self) -> CH1_R[src]
Bit 1 - Channel 1 Status
pub fn dacrdy0(&self) -> DACRDY0_R[src]
Bit 8 - DAC Ready Flag
pub fn dacrdy1(&self) -> DACRDY1_R[src]
Bit 9 - DAC Ready Flag
impl R<u32, Reg<u32, _DACC_IMR>>[src]
pub fn txrdy0(&self) -> TXRDY0_R[src]
Bit 0 - Transmit Ready Interrupt Mask of channel 0
pub fn txrdy1(&self) -> TXRDY1_R[src]
Bit 1 - Transmit Ready Interrupt Mask of channel 1
pub fn eoc0(&self) -> EOC0_R[src]
Bit 4 - End of Conversion Interrupt Mask of channel 0
pub fn eoc1(&self) -> EOC1_R[src]
Bit 5 - End of Conversion Interrupt Mask of channel 1
impl R<u32, Reg<u32, _DACC_ISR>>[src]
pub fn txrdy0(&self) -> TXRDY0_R[src]
Bit 0 - Transmit Ready Interrupt Flag of channel 0
pub fn txrdy1(&self) -> TXRDY1_R[src]
Bit 1 - Transmit Ready Interrupt Flag of channel 1
pub fn eoc0(&self) -> EOC0_R[src]
Bit 4 - End of Conversion Interrupt Flag of channel 0
pub fn eoc1(&self) -> EOC1_R[src]
Bit 5 - End of Conversion Interrupt Flag of channel 1
impl R<u32, Reg<u32, _DACC_ACR>>[src]
pub fn ibctlch0(&self) -> IBCTLCH0_R[src]
Bits 0:1 - Analog Output Current Control
pub fn ibctlch1(&self) -> IBCTLCH1_R[src]
Bits 2:3 - Analog Output Current Control
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _DACC_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protect Key
impl R<u32, Reg<u32, _DACC_WPSR>>[src]
pub fn wpvs(&self) -> WPVS_R[src]
Bit 0 - Write Protection Violation Status
pub fn wpvsrc(&self) -> WPVSRC_R[src]
Bits 8:15 - Write Protection Violation Source
impl R<u32, Reg<u32, _EEFC_FMR>>[src]
pub fn frdy(&self) -> FRDY_R[src]
Bit 0 - Flash Ready Interrupt Enable
pub fn fws(&self) -> FWS_R[src]
Bits 8:11 - Flash Wait State
pub fn scod(&self) -> SCOD_R[src]
Bit 16 - Sequential Code Optimization Disable
pub fn cloe(&self) -> CLOE_R[src]
Bit 26 - Code Loop Optimization Enable
impl R<u32, Reg<u32, _EEFC_FSR>>[src]
pub fn frdy(&self) -> FRDY_R[src]
Bit 0 - Flash Ready Status (cleared when Flash is busy)
pub fn fcmde(&self) -> FCMDE_R[src]
Bit 1 - Flash Command Error Status (cleared on read or by writing EEFC_FCR)
pub fn flocke(&self) -> FLOCKE_R[src]
Bit 2 - Flash Lock Error Status (cleared on read)
pub fn flerr(&self) -> FLERR_R[src]
Bit 3 - Flash Error Status (cleared when a programming operation starts)
pub fn ueccelsb(&self) -> UECCELSB_R[src]
Bit 16 - Unique ECC Error on LSB Part of the Memory Flash Data Bus (cleared on read)
pub fn meccelsb(&self) -> MECCELSB_R[src]
Bit 17 - Multiple ECC Error on LSB Part of the Memory Flash Data Bus (cleared on read)
pub fn ueccemsb(&self) -> UECCEMSB_R[src]
Bit 18 - Unique ECC Error on MSB Part of the Memory Flash Data Bus (cleared on read)
pub fn meccemsb(&self) -> MECCEMSB_R[src]
Bit 19 - Multiple ECC Error on MSB Part of the Memory Flash Data Bus (cleared on read)
impl R<u32, Reg<u32, _EEFC_FRR>>[src]
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _EEFC_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key
impl R<u32, Reg<u32, _GMAC_SAB>>[src]
impl R<u32, Reg<u32, _GMAC_SAT>>[src]
impl R<u32, Reg<u32, _GMAC_ST2CW0>>[src]
pub fn maskval(&self) -> MASKVAL_R[src]
Bits 0:15 - Mask Value
pub fn compval(&self) -> COMPVAL_R[src]
Bits 16:31 - Compare Value
impl R<u8, OFFSSTRT_A>[src]
pub fn variant(&self) -> OFFSSTRT_A[src]
Get enumerated values variant
pub fn is_framestart(&self) -> bool[src]
Checks if the value of the field is FRAMESTART
pub fn is_ethertype(&self) -> bool[src]
Checks if the value of the field is ETHERTYPE
pub fn is_ip(&self) -> bool[src]
Checks if the value of the field is IP
pub fn is_tcp_udp(&self) -> bool[src]
Checks if the value of the field is TCP_UDP
impl R<u32, Reg<u32, _GMAC_ST2CW1>>[src]
pub fn offsval(&self) -> OFFSVAL_R[src]
Bits 0:6 - Offset Value in Bytes
pub fn offsstrt(&self) -> OFFSSTRT_R[src]
Bits 7:8 - Ethernet Frame Offset Start
impl R<u32, Reg<u32, _GMAC_NCR>>[src]
pub fn lbl(&self) -> LBL_R[src]
Bit 1 - Loop Back Local
pub fn rxen(&self) -> RXEN_R[src]
Bit 2 - Receive Enable
pub fn txen(&self) -> TXEN_R[src]
Bit 3 - Transmit Enable
pub fn mpe(&self) -> MPE_R[src]
Bit 4 - Management Port Enable
pub fn clrstat(&self) -> CLRSTAT_R[src]
Bit 5 - Clear Statistics Registers
pub fn incstat(&self) -> INCSTAT_R[src]
Bit 6 - Increment Statistics Registers
pub fn westat(&self) -> WESTAT_R[src]
Bit 7 - Write Enable for Statistics Registers
pub fn bp(&self) -> BP_R[src]
Bit 8 - Back pressure
pub fn tstart(&self) -> TSTART_R[src]
Bit 9 - Start Transmission
pub fn thalt(&self) -> THALT_R[src]
Bit 10 - Transmit Halt
pub fn txpf(&self) -> TXPF_R[src]
Bit 11 - Transmit Pause Frame
pub fn txzqpf(&self) -> TXZQPF_R[src]
Bit 12 - Transmit Zero Quantum Pause Frame
pub fn srtsm(&self) -> SRTSM_R[src]
Bit 15 - Store Receive Time Stamp to Memory
pub fn enpbpr(&self) -> ENPBPR_R[src]
Bit 16 - Enable PFC Priority-based Pause Reception
pub fn txpbpf(&self) -> TXPBPF_R[src]
Bit 17 - Transmit PFC Priority-based Pause Frame
pub fn fnp(&self) -> FNP_R[src]
Bit 18 - Flush Next Packet
pub fn txlpien(&self) -> TXLPIEN_R[src]
Bit 19 - Enable LPI Transmission
impl R<u8, CLK_A>[src]
pub fn variant(&self) -> Variant<u8, CLK_A>[src]
Get enumerated values variant
pub fn is_mck_8(&self) -> bool[src]
Checks if the value of the field is MCK_8
pub fn is_mck_16(&self) -> bool[src]
Checks if the value of the field is MCK_16
pub fn is_mck_32(&self) -> bool[src]
Checks if the value of the field is MCK_32
pub fn is_mck_48(&self) -> bool[src]
Checks if the value of the field is MCK_48
pub fn is_mck_64(&self) -> bool[src]
Checks if the value of the field is MCK_64
pub fn is_mck_96(&self) -> bool[src]
Checks if the value of the field is MCK_96
impl R<u32, Reg<u32, _GMAC_NCFGR>>[src]
pub fn spd(&self) -> SPD_R[src]
Bit 0 - Speed
pub fn fd(&self) -> FD_R[src]
Bit 1 - Full Duplex
pub fn dnvlan(&self) -> DNVLAN_R[src]
Bit 2 - Discard Non-VLAN FRAMES
pub fn jframe(&self) -> JFRAME_R[src]
Bit 3 - Jumbo Frame Size
pub fn caf(&self) -> CAF_R[src]
Bit 4 - Copy All Frames
pub fn nbc(&self) -> NBC_R[src]
Bit 5 - No Broadcast
pub fn mtihen(&self) -> MTIHEN_R[src]
Bit 6 - Multicast Hash Enable
pub fn unihen(&self) -> UNIHEN_R[src]
Bit 7 - Unicast Hash Enable
pub fn maxfs(&self) -> MAXFS_R[src]
Bit 8 - 1536 Maximum Frame Size
pub fn rty(&self) -> RTY_R[src]
Bit 12 - Retry Test
pub fn pen(&self) -> PEN_R[src]
Bit 13 - Pause Enable
pub fn rxbufo(&self) -> RXBUFO_R[src]
Bits 14:15 - Receive Buffer Offset
pub fn lferd(&self) -> LFERD_R[src]
Bit 16 - Length Field Error Frame Discard
pub fn rfcs(&self) -> RFCS_R[src]
Bit 17 - Remove FCS
pub fn clk(&self) -> CLK_R[src]
Bits 18:20 - MDC CLock Division
pub fn dbw(&self) -> DBW_R[src]
Bits 21:22 - Data Bus Width
pub fn dcpf(&self) -> DCPF_R[src]
Bit 23 - Disable Copy of Pause Frames
pub fn rxcoen(&self) -> RXCOEN_R[src]
Bit 24 - Receive Checksum Offload Enable
pub fn efrhd(&self) -> EFRHD_R[src]
Bit 25 - Enable Frames Received in Half Duplex
pub fn irxfcs(&self) -> IRXFCS_R[src]
Bit 26 - Ignore RX FCS
pub fn ipgsen(&self) -> IPGSEN_R[src]
Bit 28 - IP Stretch Enable
pub fn rxbp(&self) -> RXBP_R[src]
Bit 29 - Receive Bad Preamble
pub fn irxer(&self) -> IRXER_R[src]
Bit 30 - Ignore IPG GRXER
impl R<u32, Reg<u32, _GMAC_NSR>>[src]
pub fn mdio(&self) -> MDIO_R[src]
Bit 1 - MDIO Input Status
pub fn idle(&self) -> IDLE_R[src]
Bit 2 - PHY Management Logic Idle
pub fn rxlpis(&self) -> RXLPIS_R[src]
Bit 7 - LPI Indication
impl R<u32, Reg<u32, _GMAC_UR>>[src]
impl R<u8, FBLDO_A>[src]
pub fn variant(&self) -> Variant<u8, FBLDO_A>[src]
Get enumerated values variant
pub fn is_single(&self) -> bool[src]
Checks if the value of the field is SINGLE
pub fn is_incr4(&self) -> bool[src]
Checks if the value of the field is INCR4
pub fn is_incr8(&self) -> bool[src]
Checks if the value of the field is INCR8
pub fn is_incr16(&self) -> bool[src]
Checks if the value of the field is INCR16
impl R<u8, RXBMS_A>[src]
pub fn variant(&self) -> RXBMS_A[src]
Get enumerated values variant
pub fn is_eighth(&self) -> bool[src]
Checks if the value of the field is EIGHTH
pub fn is_quarter(&self) -> bool[src]
Checks if the value of the field is QUARTER
pub fn is_half(&self) -> bool[src]
Checks if the value of the field is HALF
pub fn is_full(&self) -> bool[src]
Checks if the value of the field is FULL
impl R<u32, Reg<u32, _GMAC_DCFGR>>[src]
pub fn fbldo(&self) -> FBLDO_R[src]
Bits 0:4 - Fixed Burst Length for DMA Data Operations:
pub fn esma(&self) -> ESMA_R[src]
Bit 6 - Endian Swap Mode Enable for Management Descriptor Accesses
pub fn espa(&self) -> ESPA_R[src]
Bit 7 - Endian Swap Mode Enable for Packet Data Accesses
pub fn rxbms(&self) -> RXBMS_R[src]
Bits 8:9 - Receiver Packet Buffer Memory Size Select
pub fn txpbms(&self) -> TXPBMS_R[src]
Bit 10 - Transmitter Packet Buffer Memory Size Select
pub fn txcoen(&self) -> TXCOEN_R[src]
Bit 11 - Transmitter Checksum Generation Offload Enable
pub fn drbs(&self) -> DRBS_R[src]
Bits 16:23 - DMA Receive Buffer Size
pub fn ddrp(&self) -> DDRP_R[src]
Bit 24 - DMA Discard Receive Packets
impl R<u32, Reg<u32, _GMAC_TSR>>[src]
pub fn ubr(&self) -> UBR_R[src]
Bit 0 - Used Bit Read
pub fn col(&self) -> COL_R[src]
Bit 1 - Collision Occurred
pub fn rle(&self) -> RLE_R[src]
Bit 2 - Retry Limit Exceeded
pub fn txgo(&self) -> TXGO_R[src]
Bit 3 - Transmit Go
pub fn tfc(&self) -> TFC_R[src]
Bit 4 - Transmit Frame Corruption Due to AHB Error
pub fn txcomp(&self) -> TXCOMP_R[src]
Bit 5 - Transmit Complete
pub fn hresp(&self) -> HRESP_R[src]
Bit 8 - HRESP Not OK
impl R<u32, Reg<u32, _GMAC_RBQB>>[src]
impl R<u32, Reg<u32, _GMAC_TBQB>>[src]
impl R<u32, Reg<u32, _GMAC_RSR>>[src]
pub fn bna(&self) -> BNA_R[src]
Bit 0 - Buffer Not Available
pub fn rec(&self) -> REC_R[src]
Bit 1 - Frame Received
pub fn rxovr(&self) -> RXOVR_R[src]
Bit 2 - Receive Overrun
pub fn hno(&self) -> HNO_R[src]
Bit 3 - HRESP Not OK
impl R<u32, Reg<u32, _GMAC_ISR>>[src]
pub fn mfs(&self) -> MFS_R[src]
Bit 0 - Management Frame Sent
pub fn rcomp(&self) -> RCOMP_R[src]
Bit 1 - Receive Complete
pub fn rxubr(&self) -> RXUBR_R[src]
Bit 2 - RX Used Bit Read
pub fn txubr(&self) -> TXUBR_R[src]
Bit 3 - TX Used Bit Read
pub fn tur(&self) -> TUR_R[src]
Bit 4 - Transmit Underrun
pub fn rlex(&self) -> RLEX_R[src]
Bit 5 - Retry Limit Exceeded
pub fn tfc(&self) -> TFC_R[src]
Bit 6 - Transmit Frame Corruption Due to AHB Error
pub fn tcomp(&self) -> TCOMP_R[src]
Bit 7 - Transmit Complete
pub fn rovr(&self) -> ROVR_R[src]
Bit 10 - Receive Overrun
pub fn hresp(&self) -> HRESP_R[src]
Bit 11 - HRESP Not OK
pub fn pfnz(&self) -> PFNZ_R[src]
Bit 12 - Pause Frame with Non-zero Pause Quantum Received
pub fn ptz(&self) -> PTZ_R[src]
Bit 13 - Pause Time Zero
pub fn pftr(&self) -> PFTR_R[src]
Bit 14 - Pause Frame Transmitted
pub fn drqfr(&self) -> DRQFR_R[src]
Bit 18 - PTP Delay Request Frame Received
pub fn sfr(&self) -> SFR_R[src]
Bit 19 - PTP Sync Frame Received
pub fn drqft(&self) -> DRQFT_R[src]
Bit 20 - PTP Delay Request Frame Transmitted
pub fn sft(&self) -> SFT_R[src]
Bit 21 - PTP Sync Frame Transmitted
pub fn pdrqfr(&self) -> PDRQFR_R[src]
Bit 22 - PDelay Request Frame Received
pub fn pdrsfr(&self) -> PDRSFR_R[src]
Bit 23 - PDelay Response Frame Received
pub fn pdrqft(&self) -> PDRQFT_R[src]
Bit 24 - PDelay Request Frame Transmitted
pub fn pdrsft(&self) -> PDRSFT_R[src]
Bit 25 - PDelay Response Frame Transmitted
pub fn sri(&self) -> SRI_R[src]
Bit 26 - TSU Seconds Register Increment
pub fn rxlpisbc(&self) -> RXLPISBC_R[src]
Bit 27 - Receive LPI indication Status Bit Change
pub fn wol(&self) -> WOL_R[src]
Bit 28 - Wake On LAN
pub fn tsutimcomp(&self) -> TSUTIMCOMP_R[src]
Bit 29 - TSU Timer Comparison
impl R<u32, Reg<u32, _GMAC_IMR>>[src]
pub fn mfs(&self) -> MFS_R[src]
Bit 0 - Management Frame Sent
pub fn rcomp(&self) -> RCOMP_R[src]
Bit 1 - Receive Complete
pub fn rxubr(&self) -> RXUBR_R[src]
Bit 2 - RX Used Bit Read
pub fn txubr(&self) -> TXUBR_R[src]
Bit 3 - TX Used Bit Read
pub fn tur(&self) -> TUR_R[src]
Bit 4 - Transmit Underrun
pub fn rlex(&self) -> RLEX_R[src]
Bit 5 - Retry Limit Exceeded
pub fn tfc(&self) -> TFC_R[src]
Bit 6 - Transmit Frame Corruption Due to AHB Error
pub fn tcomp(&self) -> TCOMP_R[src]
Bit 7 - Transmit Complete
pub fn rovr(&self) -> ROVR_R[src]
Bit 10 - Receive Overrun
pub fn hresp(&self) -> HRESP_R[src]
Bit 11 - HRESP Not OK
pub fn pfnz(&self) -> PFNZ_R[src]
Bit 12 - Pause Frame with Non-zero Pause Quantum Received
pub fn ptz(&self) -> PTZ_R[src]
Bit 13 - Pause Time Zero
pub fn pftr(&self) -> PFTR_R[src]
Bit 14 - Pause Frame Transmitted
pub fn exint(&self) -> EXINT_R[src]
Bit 15 - External Interrupt
pub fn drqfr(&self) -> DRQFR_R[src]
Bit 18 - PTP Delay Request Frame Received
pub fn sfr(&self) -> SFR_R[src]
Bit 19 - PTP Sync Frame Received
pub fn drqft(&self) -> DRQFT_R[src]
Bit 20 - PTP Delay Request Frame Transmitted
pub fn sft(&self) -> SFT_R[src]
Bit 21 - PTP Sync Frame Transmitted
pub fn pdrqfr(&self) -> PDRQFR_R[src]
Bit 22 - PDelay Request Frame Received
pub fn pdrsfr(&self) -> PDRSFR_R[src]
Bit 23 - PDelay Response Frame Received
pub fn pdrqft(&self) -> PDRQFT_R[src]
Bit 24 - PDelay Request Frame Transmitted
pub fn pdrsft(&self) -> PDRSFT_R[src]
Bit 25 - PDelay Response Frame Transmitted
pub fn sri(&self) -> SRI_R[src]
Bit 26 - TSU Seconds Register Increment
pub fn rxlpisbc(&self) -> RXLPISBC_R[src]
Bit 27 - Enable RX LPI Indication
pub fn wol(&self) -> WOL_R[src]
Bit 28 - Wake On LAN
pub fn tsutimcomp(&self) -> TSUTIMCOMP_R[src]
Bit 29 - TSU Timer Comparison
impl R<u32, Reg<u32, _GMAC_MAN>>[src]
pub fn data(&self) -> DATA_R[src]
Bits 0:15 - PHY Data
pub fn wtn(&self) -> WTN_R[src]
Bits 16:17 - Write Ten
pub fn rega(&self) -> REGA_R[src]
Bits 18:22 - Register Address
pub fn phya(&self) -> PHYA_R[src]
Bits 23:27 - PHY Address
pub fn op(&self) -> OP_R[src]
Bits 28:29 - Operation
pub fn cltto(&self) -> CLTTO_R[src]
Bit 30 - Clause 22 Operation
pub fn wzo(&self) -> WZO_R[src]
Bit 31 - Write ZERO
impl R<u32, Reg<u32, _GMAC_RPQ>>[src]
impl R<u32, Reg<u32, _GMAC_TPQ>>[src]
impl R<u32, Reg<u32, _GMAC_TPSF>>[src]
pub fn tpb1adr(&self) -> TPB1ADR_R[src]
Bits 0:11 - Transmit Partial Store and Forward Address
pub fn entxp(&self) -> ENTXP_R[src]
Bit 31 - Enable TX Partial Store and Forward Operation
impl R<u32, Reg<u32, _GMAC_RPSF>>[src]
pub fn rpb1adr(&self) -> RPB1ADR_R[src]
Bits 0:11 - Receive Partial Store and Forward Address
pub fn enrxp(&self) -> ENRXP_R[src]
Bit 31 - Enable RX Partial Store and Forward Operation
impl R<u32, Reg<u32, _GMAC_RJFML>>[src]
impl R<u32, Reg<u32, _GMAC_HRB>>[src]
impl R<u32, Reg<u32, _GMAC_HRT>>[src]
impl R<u32, Reg<u32, _GMAC_TIDM1>>[src]
pub fn tid(&self) -> TID_R[src]
Bits 0:15 - Type ID Match 1
pub fn enid1(&self) -> ENID1_R[src]
Bit 31 - Enable Copying of TID Matched Frames
impl R<u32, Reg<u32, _GMAC_TIDM2>>[src]
pub fn tid(&self) -> TID_R[src]
Bits 0:15 - Type ID Match 2
pub fn enid2(&self) -> ENID2_R[src]
Bit 31 - Enable Copying of TID Matched Frames
impl R<u32, Reg<u32, _GMAC_TIDM3>>[src]
pub fn tid(&self) -> TID_R[src]
Bits 0:15 - Type ID Match 3
pub fn enid3(&self) -> ENID3_R[src]
Bit 31 - Enable Copying of TID Matched Frames
impl R<u32, Reg<u32, _GMAC_TIDM4>>[src]
pub fn tid(&self) -> TID_R[src]
Bits 0:15 - Type ID Match 4
pub fn enid4(&self) -> ENID4_R[src]
Bit 31 - Enable Copying of TID Matched Frames
impl R<u32, Reg<u32, _GMAC_WOL>>[src]
pub fn ip(&self) -> IP_R[src]
Bits 0:15 - ARP Request IP Address
pub fn mag(&self) -> MAG_R[src]
Bit 16 - Magic Packet Event Enable
pub fn arp(&self) -> ARP_R[src]
Bit 17 - ARP Request IP Address
pub fn sa1(&self) -> SA1_R[src]
Bit 18 - Specific Address Register 1 Event Enable
pub fn mti(&self) -> MTI_R[src]
Bit 19 - Multicast Hash Event Enable
impl R<u32, Reg<u32, _GMAC_IPGS>>[src]
impl R<u32, Reg<u32, _GMAC_SVLAN>>[src]
pub fn vlan_type(&self) -> VLAN_TYPE_R[src]
Bits 0:15 - User Defined VLAN_TYPE Field
pub fn esvlan(&self) -> ESVLAN_R[src]
Bit 31 - Enable Stacked VLAN Processing Mode
impl R<u32, Reg<u32, _GMAC_TPFCP>>[src]
pub fn pev(&self) -> PEV_R[src]
Bits 0:7 - Priority Enable Vector
pub fn pq(&self) -> PQ_R[src]
Bits 8:15 - Pause Quantum
impl R<u32, Reg<u32, _GMAC_SAMB1>>[src]
impl R<u32, Reg<u32, _GMAC_SAMT1>>[src]
impl R<u32, Reg<u32, _GMAC_NSC>>[src]
impl R<u32, Reg<u32, _GMAC_SCL>>[src]
impl R<u32, Reg<u32, _GMAC_SCH>>[src]
impl R<u32, Reg<u32, _GMAC_EFTSH>>[src]
impl R<u32, Reg<u32, _GMAC_EFRSH>>[src]
impl R<u32, Reg<u32, _GMAC_PEFTSH>>[src]
impl R<u32, Reg<u32, _GMAC_PEFRSH>>[src]
impl R<u32, Reg<u32, _GMAC_OTLO>>[src]
impl R<u32, Reg<u32, _GMAC_OTHI>>[src]
impl R<u32, Reg<u32, _GMAC_FT>>[src]
impl R<u32, Reg<u32, _GMAC_BCFT>>[src]
impl R<u32, Reg<u32, _GMAC_MFT>>[src]
impl R<u32, Reg<u32, _GMAC_PFT>>[src]
impl R<u32, Reg<u32, _GMAC_BFT64>>[src]
impl R<u32, Reg<u32, _GMAC_TBFT127>>[src]
impl R<u32, Reg<u32, _GMAC_TBFT255>>[src]
impl R<u32, Reg<u32, _GMAC_TBFT511>>[src]
impl R<u32, Reg<u32, _GMAC_TBFT1023>>[src]
impl R<u32, Reg<u32, _GMAC_TBFT1518>>[src]
impl R<u32, Reg<u32, _GMAC_GTBFT1518>>[src]
pub fn nftx(&self) -> NFTX_R[src]
Bits 0:31 - Greater than 1518 Byte Frames Transmitted without Error
impl R<u32, Reg<u32, _GMAC_TUR>>[src]
impl R<u32, Reg<u32, _GMAC_SCF>>[src]
impl R<u32, Reg<u32, _GMAC_MCF>>[src]
impl R<u32, Reg<u32, _GMAC_EC>>[src]
impl R<u32, Reg<u32, _GMAC_LC>>[src]
impl R<u32, Reg<u32, _GMAC_DTF>>[src]
impl R<u32, Reg<u32, _GMAC_CSE>>[src]
impl R<u32, Reg<u32, _GMAC_ORLO>>[src]
impl R<u32, Reg<u32, _GMAC_ORHI>>[src]
impl R<u32, Reg<u32, _GMAC_FR>>[src]
impl R<u32, Reg<u32, _GMAC_BCFR>>[src]
impl R<u32, Reg<u32, _GMAC_MFR>>[src]
impl R<u32, Reg<u32, _GMAC_PFR>>[src]
impl R<u32, Reg<u32, _GMAC_BFR64>>[src]
impl R<u32, Reg<u32, _GMAC_TBFR127>>[src]
impl R<u32, Reg<u32, _GMAC_TBFR255>>[src]
impl R<u32, Reg<u32, _GMAC_TBFR511>>[src]
impl R<u32, Reg<u32, _GMAC_TBFR1023>>[src]
impl R<u32, Reg<u32, _GMAC_TBFR1518>>[src]
impl R<u32, Reg<u32, _GMAC_TMXBFR>>[src]
impl R<u32, Reg<u32, _GMAC_UFR>>[src]
impl R<u32, Reg<u32, _GMAC_OFR>>[src]
impl R<u32, Reg<u32, _GMAC_JR>>[src]
impl R<u32, Reg<u32, _GMAC_FCSE>>[src]
impl R<u32, Reg<u32, _GMAC_LFFE>>[src]
impl R<u32, Reg<u32, _GMAC_RSE>>[src]
impl R<u32, Reg<u32, _GMAC_AE>>[src]
impl R<u32, Reg<u32, _GMAC_RRE>>[src]
impl R<u32, Reg<u32, _GMAC_ROE>>[src]
impl R<u32, Reg<u32, _GMAC_IHCE>>[src]
impl R<u32, Reg<u32, _GMAC_TCE>>[src]
impl R<u32, Reg<u32, _GMAC_UCE>>[src]
impl R<u32, Reg<u32, _GMAC_TISUBN>>[src]
impl R<u32, Reg<u32, _GMAC_TSH>>[src]
impl R<u32, Reg<u32, _GMAC_TSL>>[src]
impl R<u32, Reg<u32, _GMAC_TN>>[src]
impl R<u32, Reg<u32, _GMAC_TI>>[src]
pub fn cns(&self) -> CNS_R[src]
Bits 0:7 - Count Nanoseconds
pub fn acns(&self) -> ACNS_R[src]
Bits 8:15 - Alternative Count Nanoseconds
pub fn nit(&self) -> NIT_R[src]
Bits 16:23 - Number of Increments
impl R<u32, Reg<u32, _GMAC_EFTSL>>[src]
impl R<u32, Reg<u32, _GMAC_EFTN>>[src]
impl R<u32, Reg<u32, _GMAC_EFRSL>>[src]
impl R<u32, Reg<u32, _GMAC_EFRN>>[src]
impl R<u32, Reg<u32, _GMAC_PEFTSL>>[src]
impl R<u32, Reg<u32, _GMAC_PEFTN>>[src]
impl R<u32, Reg<u32, _GMAC_PEFRSL>>[src]
impl R<u32, Reg<u32, _GMAC_PEFRN>>[src]
impl R<u32, Reg<u32, _GMAC_RXLPI>>[src]
impl R<u32, Reg<u32, _GMAC_RXLPITIME>>[src]
impl R<u32, Reg<u32, _GMAC_TXLPI>>[src]
impl R<u32, Reg<u32, _GMAC_TXLPITIME>>[src]
impl R<u32, Reg<u32, _GMAC_ISRPQ>>[src]
pub fn rcomp(&self) -> RCOMP_R[src]
Bit 1 - Receive Complete
pub fn rxubr(&self) -> RXUBR_R[src]
Bit 2 - RX Used Bit Read
pub fn rlex(&self) -> RLEX_R[src]
Bit 5 - Retry Limit Exceeded or Late Collision
pub fn tfc(&self) -> TFC_R[src]
Bit 6 - Transmit Frame Corruption Due to AHB Error
pub fn tcomp(&self) -> TCOMP_R[src]
Bit 7 - Transmit Complete
pub fn rovr(&self) -> ROVR_R[src]
Bit 10 - Receive Overrun
pub fn hresp(&self) -> HRESP_R[src]
Bit 11 - HRESP Not OK
impl R<u32, Reg<u32, _GMAC_TBQBAPQ>>[src]
impl R<u32, Reg<u32, _GMAC_RBQBAPQ>>[src]
impl R<u32, Reg<u32, _GMAC_RBSRPQ>>[src]
impl R<u32, Reg<u32, _GMAC_CBSCR>>[src]
pub fn qbe(&self) -> QBE_R[src]
Bit 0 - Queue B CBS Enable
pub fn qae(&self) -> QAE_R[src]
Bit 1 - Queue A CBS Enable
impl R<u32, Reg<u32, _GMAC_CBSISQA>>[src]
impl R<u32, Reg<u32, _GMAC_CBSISQB>>[src]
impl R<u32, Reg<u32, _GMAC_ST1RPQ>>[src]
pub fn qnb(&self) -> QNB_R[src]
Bits 0:2 - Queue Number (0-5)
pub fn dstcm(&self) -> DSTCM_R[src]
Bits 4:11 - Differentiated Services or Traffic Class Match
pub fn udpm(&self) -> UDPM_R[src]
Bits 12:27 - UDP Port Match
pub fn dstce(&self) -> DSTCE_R[src]
Bit 28 - Differentiated Services or Traffic Class Match Enable
pub fn udpe(&self) -> UDPE_R[src]
Bit 29 - UDP Port Match Enable
impl R<u32, Reg<u32, _GMAC_ST2RPQ>>[src]
pub fn qnb(&self) -> QNB_R[src]
Bits 0:2 - Queue Number (0-5)
pub fn vlanp(&self) -> VLANP_R[src]
Bits 4:6 - VLAN Priority
pub fn vlane(&self) -> VLANE_R[src]
Bit 8 - VLAN Enable
pub fn i2eth(&self) -> I2ETH_R[src]
Bits 9:11 - Index of Screening Type 2 EtherType register x
pub fn ethe(&self) -> ETHE_R[src]
Bit 12 - EtherType Enable
pub fn compa(&self) -> COMPA_R[src]
Bits 13:17 - Index of Screening Type 2 Compare Word 0/Word 1 register x
pub fn compae(&self) -> COMPAE_R[src]
Bit 18 - Compare A Enable
pub fn compb(&self) -> COMPB_R[src]
Bits 19:23 - Index of Screening Type 2 Compare Word 0/Word 1 register x
pub fn compbe(&self) -> COMPBE_R[src]
Bit 24 - Compare B Enable
pub fn compc(&self) -> COMPC_R[src]
Bits 25:29 - Index of Screening Type 2 Compare Word 0/Word 1 register x
pub fn compce(&self) -> COMPCE_R[src]
Bit 30 - Compare C Enable
impl R<u32, Reg<u32, _GMAC_IMRPQ>>[src]
pub fn rcomp(&self) -> RCOMP_R[src]
Bit 1 - Receive Complete
pub fn rxubr(&self) -> RXUBR_R[src]
Bit 2 - RX Used Bit Read
pub fn rlex(&self) -> RLEX_R[src]
Bit 5 - Retry Limit Exceeded or Late Collision
pub fn ahb(&self) -> AHB_R[src]
Bit 6 - AHB Error
pub fn tcomp(&self) -> TCOMP_R[src]
Bit 7 - Transmit Complete
pub fn rovr(&self) -> ROVR_R[src]
Bit 10 - Receive Overrun
pub fn hresp(&self) -> HRESP_R[src]
Bit 11 - HRESP Not OK
impl R<u32, Reg<u32, _GMAC_ST2ER>>[src]
impl R<u32, Reg<u32, _SYS_GPBR>>[src]
pub fn gpbr_value(&self) -> GPBR_VALUE_R[src]
Bits 0:31 - Value of GPBR x
impl R<u8, UALGO_A>[src]
pub fn variant(&self) -> Variant<u8, UALGO_A>[src]
Get enumerated values variant
pub fn is_sha1(&self) -> bool[src]
Checks if the value of the field is SHA1
pub fn is_sha256(&self) -> bool[src]
Checks if the value of the field is SHA256
pub fn is_sha224(&self) -> bool[src]
Checks if the value of the field is SHA224
impl R<u32, Reg<u32, _ICM_CFG>>[src]
pub fn wbdis(&self) -> WBDIS_R[src]
Bit 0 - Write Back Disable
pub fn eomdis(&self) -> EOMDIS_R[src]
Bit 1 - End of Monitoring Disable
pub fn slbdis(&self) -> SLBDIS_R[src]
Bit 2 - Secondary List Branching Disable
pub fn bbc(&self) -> BBC_R[src]
Bits 4:7 - Bus Burden Control
pub fn ascd(&self) -> ASCD_R[src]
Bit 8 - Automatic Switch To Compare Digest
pub fn dualbuff(&self) -> DUALBUFF_R[src]
Bit 9 - Dual Input Buffer
pub fn uihash(&self) -> UIHASH_R[src]
Bit 12 - User Initial Hash Value
pub fn ualgo(&self) -> UALGO_R[src]
Bits 13:15 - User SHA Algorithm
impl R<u32, Reg<u32, _ICM_SR>>[src]
pub fn enable(&self) -> ENABLE_R[src]
Bit 0 - ICM Controller Enable Register
pub fn rawrmdis(&self) -> RAWRMDIS_R[src]
Bits 8:11 - Region Monitoring Disabled Raw Status
pub fn rmdis(&self) -> RMDIS_R[src]
Bits 12:15 - Region Monitoring Disabled Status
impl R<u32, Reg<u32, _ICM_IMR>>[src]
pub fn rhc(&self) -> RHC_R[src]
Bits 0:3 - Region Hash Completed Interrupt Mask
pub fn rdm(&self) -> RDM_R[src]
Bits 4:7 - Region Digest Mismatch Interrupt Mask
pub fn rbe(&self) -> RBE_R[src]
Bits 8:11 - Region Bus Error Interrupt Mask
pub fn rwc(&self) -> RWC_R[src]
Bits 12:15 - Region Wrap Condition Detected Interrupt Mask
pub fn rec(&self) -> REC_R[src]
Bits 16:19 - Region End bit Condition Detected Interrupt Mask
pub fn rsu(&self) -> RSU_R[src]
Bits 20:23 - Region Status Updated Interrupt Mask
pub fn urad(&self) -> URAD_R[src]
Bit 24 - Undefined Register Access Detection Interrupt Mask
impl R<u32, Reg<u32, _ICM_ISR>>[src]
pub fn rhc(&self) -> RHC_R[src]
Bits 0:3 - Region Hash Completed
pub fn rdm(&self) -> RDM_R[src]
Bits 4:7 - Region Digest Mismatch
pub fn rbe(&self) -> RBE_R[src]
Bits 8:11 - Region Bus Error
pub fn rwc(&self) -> RWC_R[src]
Bits 12:15 - Region Wrap Condition Detected
pub fn rec(&self) -> REC_R[src]
Bits 16:19 - Region End bit Condition Detected
pub fn rsu(&self) -> RSU_R[src]
Bits 20:23 - Region Status Updated Detected
pub fn urad(&self) -> URAD_R[src]
Bit 24 - Undefined Register Access Detection Status
impl R<u8, URAT_A>[src]
pub fn variant(&self) -> Variant<u8, URAT_A>[src]
Get enumerated values variant
pub fn is_unspec_struct_member(&self) -> bool[src]
Checks if the value of the field is UNSPEC_STRUCT_MEMBER
pub fn is_icm_cfg_modified(&self) -> bool[src]
Checks if the value of the field is ICM_CFG_MODIFIED
pub fn is_icm_dscr_modified(&self) -> bool[src]
Checks if the value of the field is ICM_DSCR_MODIFIED
pub fn is_icm_hash_modified(&self) -> bool[src]
Checks if the value of the field is ICM_HASH_MODIFIED
pub fn is_read_access(&self) -> bool[src]
Checks if the value of the field is READ_ACCESS
impl R<u32, Reg<u32, _ICM_UASR>>[src]
impl R<u32, Reg<u32, _ICM_DSCR>>[src]
impl R<u32, Reg<u32, _ICM_HASH>>[src]
impl R<u8, THMASK_A>[src]
pub fn variant(&self) -> Variant<u8, THMASK_A>[src]
Get enumerated values variant
pub fn is_beats_4(&self) -> bool[src]
Checks if the value of the field is BEATS_4
pub fn is_beats_8(&self) -> bool[src]
Checks if the value of the field is BEATS_8
pub fn is_beats_16(&self) -> bool[src]
Checks if the value of the field is BEATS_16
impl R<u32, Reg<u32, _ISI_CFG1>>[src]
pub fn hsync_pol(&self) -> HSYNC_POL_R[src]
Bit 2 - Horizontal Synchronization Polarity
pub fn vsync_pol(&self) -> VSYNC_POL_R[src]
Bit 3 - Vertical Synchronization Polarity
pub fn pixclk_pol(&self) -> PIXCLK_POL_R[src]
Bit 4 - Pixel Clock Polarity
pub fn grayle(&self) -> GRAYLE_R[src]
Bit 5 - Grayscale Little Endian
pub fn emb_sync(&self) -> EMB_SYNC_R[src]
Bit 6 - Embedded Synchronization
pub fn crc_sync(&self) -> CRC_SYNC_R[src]
Bit 7 - Embedded Synchronization Correction
pub fn frate(&self) -> FRATE_R[src]
Bits 8:10 - Frame Rate [0..7]
pub fn discr(&self) -> DISCR_R[src]
Bit 11 - Disable Codec Request
pub fn full(&self) -> FULL_R[src]
Bit 12 - Full Mode is Allowed
pub fn thmask(&self) -> THMASK_R[src]
Bits 13:14 - Threshold Mask
pub fn sld(&self) -> SLD_R[src]
Bits 16:23 - Start of Line Delay
pub fn sfd(&self) -> SFD_R[src]
Bits 24:31 - Start of Frame Delay
impl R<u8, YCC_SWAP_A>[src]
pub fn variant(&self) -> YCC_SWAP_A[src]
Get enumerated values variant
pub fn is_default(&self) -> bool[src]
Checks if the value of the field is DEFAULT
pub fn is_mode1(&self) -> bool[src]
Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool[src]
Checks if the value of the field is MODE2
pub fn is_mode3(&self) -> bool[src]
Checks if the value of the field is MODE3
impl R<u8, RGB_CFG_A>[src]
pub fn variant(&self) -> RGB_CFG_A[src]
Get enumerated values variant
pub fn is_default(&self) -> bool[src]
Checks if the value of the field is DEFAULT
pub fn is_mode1(&self) -> bool[src]
Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool[src]
Checks if the value of the field is MODE2
pub fn is_mode3(&self) -> bool[src]
Checks if the value of the field is MODE3
impl R<u32, Reg<u32, _ISI_CFG2>>[src]
pub fn im_vsize(&self) -> IM_VSIZE_R[src]
Bits 0:10 - Vertical Size of the Image Sensor [0..2047]
pub fn gs_mode(&self) -> GS_MODE_R[src]
Bit 11 - Grayscale Pixel Format Mode
pub fn rgb_mode(&self) -> RGB_MODE_R[src]
Bit 12 - RGB Input Mode
pub fn grayscale(&self) -> GRAYSCALE_R[src]
Bit 13 - Grayscale Mode Format Enable
pub fn rgb_swap(&self) -> RGB_SWAP_R[src]
Bit 14 - RGB Format Swap Mode
pub fn col_space(&self) -> COL_SPACE_R[src]
Bit 15 - Color Space for the Image Data
pub fn im_hsize(&self) -> IM_HSIZE_R[src]
Bits 16:26 - Horizontal Size of the Image Sensor [0..2047]
pub fn ycc_swap(&self) -> YCC_SWAP_R[src]
Bits 28:29 - YCrCb Format Swap Mode
pub fn rgb_cfg(&self) -> RGB_CFG_R[src]
Bits 30:31 - RGB Pixel Mapping Configuration
impl R<u32, Reg<u32, _ISI_PSIZE>>[src]
pub fn prev_vsize(&self) -> PREV_VSIZE_R[src]
Bits 0:9 - Vertical Size for the Preview Path
pub fn prev_hsize(&self) -> PREV_HSIZE_R[src]
Bits 16:25 - Horizontal Size for the Preview Path
impl R<u32, Reg<u32, _ISI_PDECF>>[src]
pub fn dec_factor(&self) -> DEC_FACTOR_R[src]
Bits 0:7 - Decimation Factor
impl R<u32, Reg<u32, _ISI_Y2R_SET0>>[src]
pub fn c0(&self) -> C0_R[src]
Bits 0:7 - Color Space Conversion Matrix Coefficient C0
pub fn c1(&self) -> C1_R[src]
Bits 8:15 - Color Space Conversion Matrix Coefficient C1
pub fn c2(&self) -> C2_R[src]
Bits 16:23 - Color Space Conversion Matrix Coefficient C2
pub fn c3(&self) -> C3_R[src]
Bits 24:31 - Color Space Conversion Matrix Coefficient C3
impl R<u32, Reg<u32, _ISI_Y2R_SET1>>[src]
pub fn c4(&self) -> C4_R[src]
Bits 0:8 - Color Space Conversion Matrix Coefficient C4
pub fn yoff(&self) -> YOFF_R[src]
Bit 12 - Color Space Conversion Luminance Default Offset
pub fn croff(&self) -> CROFF_R[src]
Bit 13 - Color Space Conversion Red Chrominance Default Offset
pub fn cboff(&self) -> CBOFF_R[src]
Bit 14 - Color Space Conversion Blue Chrominance Default Offset
impl R<u32, Reg<u32, _ISI_R2Y_SET0>>[src]
pub fn c0(&self) -> C0_R[src]
Bits 0:6 - Color Space Conversion Matrix Coefficient C0
pub fn c1(&self) -> C1_R[src]
Bits 8:14 - Color Space Conversion Matrix Coefficient C1
pub fn c2(&self) -> C2_R[src]
Bits 16:22 - Color Space Conversion Matrix Coefficient C2
pub fn roff(&self) -> ROFF_R[src]
Bit 24 - Color Space Conversion Red Component Offset
impl R<u32, Reg<u32, _ISI_R2Y_SET1>>[src]
pub fn c3(&self) -> C3_R[src]
Bits 0:6 - Color Space Conversion Matrix Coefficient C3
pub fn c4(&self) -> C4_R[src]
Bits 8:14 - Color Space Conversion Matrix Coefficient C4
pub fn c5(&self) -> C5_R[src]
Bits 16:22 - Color Space Conversion Matrix Coefficient C5
pub fn goff(&self) -> GOFF_R[src]
Bit 24 - Color Space Conversion Green Component Offset
impl R<u32, Reg<u32, _ISI_R2Y_SET2>>[src]
pub fn c6(&self) -> C6_R[src]
Bits 0:6 - Color Space Conversion Matrix Coefficient C6
pub fn c7(&self) -> C7_R[src]
Bits 8:14 - Color Space Conversion Matrix Coefficient C7
pub fn c8(&self) -> C8_R[src]
Bits 16:22 - Color Space Conversion Matrix Coefficient C8
pub fn boff(&self) -> BOFF_R[src]
Bit 24 - Color Space Conversion Blue Component Offset
impl R<u32, Reg<u32, _ISI_SR>>[src]
pub fn enable(&self) -> ENABLE_R[src]
Bit 0 - Module Enable
pub fn dis_done(&self) -> DIS_DONE_R[src]
Bit 1 - Module Disable Request has Terminated (cleared on read)
pub fn srst(&self) -> SRST_R[src]
Bit 2 - Module Software Reset Request has Terminated (cleared on read)
pub fn cdc_pnd(&self) -> CDC_PND_R[src]
Bit 8 - Pending Codec Request
pub fn vsync(&self) -> VSYNC_R[src]
Bit 10 - Vertical Synchronization (cleared on read)
pub fn pxfr_done(&self) -> PXFR_DONE_R[src]
Bit 16 - Preview DMA Transfer has Terminated (cleared on read)
pub fn cxfr_done(&self) -> CXFR_DONE_R[src]
Bit 17 - Codec DMA Transfer has Terminated (cleared on read)
pub fn sip(&self) -> SIP_R[src]
Bit 19 - Synchronization in Progress
pub fn p_ovr(&self) -> P_OVR_R[src]
Bit 24 - Preview Datapath Overflow (cleared on read)
pub fn c_ovr(&self) -> C_OVR_R[src]
Bit 25 - Codec Datapath Overflow (cleared on read)
pub fn crc_err(&self) -> CRC_ERR_R[src]
Bit 26 - CRC Synchronization Error (cleared on read)
pub fn fr_ovr(&self) -> FR_OVR_R[src]
Bit 27 - Frame Rate Overrun (cleared on read)
impl R<u32, Reg<u32, _ISI_IMR>>[src]
pub fn dis_done(&self) -> DIS_DONE_R[src]
Bit 1 - Module Disable Operation Completed
pub fn srst(&self) -> SRST_R[src]
Bit 2 - Software Reset Completed
pub fn vsync(&self) -> VSYNC_R[src]
Bit 10 - Vertical Synchronization
pub fn pxfr_done(&self) -> PXFR_DONE_R[src]
Bit 16 - Preview DMA Transfer Completed
pub fn cxfr_done(&self) -> CXFR_DONE_R[src]
Bit 17 - Codec DMA Transfer Completed
pub fn p_ovr(&self) -> P_OVR_R[src]
Bit 24 - Preview FIFO Overflow
pub fn c_ovr(&self) -> C_OVR_R[src]
Bit 25 - Codec FIFO Overflow
pub fn crc_err(&self) -> CRC_ERR_R[src]
Bit 26 - CRC Synchronization Error
pub fn fr_ovr(&self) -> FR_OVR_R[src]
Bit 27 - Frame Rate Overrun
impl R<u32, Reg<u32, _ISI_DMA_CHSR>>[src]
pub fn p_ch_s(&self) -> P_CH_S_R[src]
Bit 0 - Preview DMA Channel Status
pub fn c_ch_s(&self) -> C_CH_S_R[src]
Bit 1 - Code DMA Channel Status
impl R<u32, Reg<u32, _ISI_DMA_P_ADDR>>[src]
impl R<u32, Reg<u32, _ISI_DMA_P_CTRL>>[src]
pub fn p_fetch(&self) -> P_FETCH_R[src]
Bit 0 - Descriptor Fetch Control Bit
pub fn p_wb(&self) -> P_WB_R[src]
Bit 1 - Descriptor Writeback Control Bit
pub fn p_ien(&self) -> P_IEN_R[src]
Bit 2 - Transfer Done Flag Control
pub fn p_done(&self) -> P_DONE_R[src]
Bit 3 - Preview Transfer Done
impl R<u32, Reg<u32, _ISI_DMA_P_DSCR>>[src]
impl R<u32, Reg<u32, _ISI_DMA_C_ADDR>>[src]
impl R<u32, Reg<u32, _ISI_DMA_C_CTRL>>[src]
pub fn c_fetch(&self) -> C_FETCH_R[src]
Bit 0 - Descriptor Fetch Control Bit
pub fn c_wb(&self) -> C_WB_R[src]
Bit 1 - Descriptor Writeback Control Bit
pub fn c_ien(&self) -> C_IEN_R[src]
Bit 2 - Transfer Done Flag Control
pub fn c_done(&self) -> C_DONE_R[src]
Bit 3 - Codec Transfer Done
impl R<u32, Reg<u32, _ISI_DMA_C_DSCR>>[src]
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _ISI_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key Password
impl R<u32, Reg<u32, _ISI_WPSR>>[src]
pub fn wpvs(&self) -> WPVS_R[src]
Bit 0 - Write Protection Violation Status
pub fn wpvsrc(&self) -> WPVSRC_R[src]
Bits 8:23 - Write Protection Violation Source
impl R<u32, Reg<u32, _MATRIX_PRAS>>[src]
pub fn m0pr(&self) -> M0PR_R[src]
Bits 0:1 - Master 0 Priority
pub fn m1pr(&self) -> M1PR_R[src]
Bits 4:5 - Master 1 Priority
pub fn m2pr(&self) -> M2PR_R[src]
Bits 8:9 - Master 2 Priority
pub fn m3pr(&self) -> M3PR_R[src]
Bits 12:13 - Master 3 Priority
pub fn m4pr(&self) -> M4PR_R[src]
Bits 16:17 - Master 4 Priority
pub fn m5pr(&self) -> M5PR_R[src]
Bits 20:21 - Master 5 Priority
pub fn m6pr(&self) -> M6PR_R[src]
Bits 24:25 - Master 6 Priority
impl R<u32, Reg<u32, _MATRIX_PRBS>>[src]
pub fn m8pr(&self) -> M8PR_R[src]
Bits 0:1 - Master 8 Priority
pub fn m9pr(&self) -> M9PR_R[src]
Bits 4:5 - Master 9 Priority
pub fn m10pr(&self) -> M10PR_R[src]
Bits 8:9 - Master 10 Priority
pub fn m11pr(&self) -> M11PR_R[src]
Bits 12:13 - Master 11 Priority
pub fn m12pr(&self) -> M12PR_R[src]
Bits 16:17 - Master 12 Priority
impl R<u8, ULBT_A>[src]
pub fn variant(&self) -> ULBT_A[src]
Get enumerated values variant
pub fn is_unltd_length(&self) -> bool[src]
Checks if the value of the field is UNLTD_LENGTH
pub fn is_single_access(&self) -> bool[src]
Checks if the value of the field is SINGLE_ACCESS
pub fn is_4beat_burst(&self) -> bool[src]
Checks if the value of the field is _4BEAT_BURST
pub fn is_8beat_burst(&self) -> bool[src]
Checks if the value of the field is _8BEAT_BURST
pub fn is_16beat_burst(&self) -> bool[src]
Checks if the value of the field is _16BEAT_BURST
pub fn is_32beat_burst(&self) -> bool[src]
Checks if the value of the field is _32BEAT_BURST
pub fn is_64beat_burst(&self) -> bool[src]
Checks if the value of the field is _64BEAT_BURST
pub fn is_128beat_burst(&self) -> bool[src]
Checks if the value of the field is _128BEAT_BURST
impl R<u32, Reg<u32, _MATRIX_MCFG>>[src]
impl R<u8, DEFMSTR_TYPE_A>[src]
pub fn variant(&self) -> Variant<u8, DEFMSTR_TYPE_A>[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_last(&self) -> bool[src]
Checks if the value of the field is LAST
pub fn is_fixed(&self) -> bool[src]
Checks if the value of the field is FIXED
impl R<u32, Reg<u32, _MATRIX_SCFG>>[src]
pub fn slot_cycle(&self) -> SLOT_CYCLE_R[src]
Bits 0:8 - Maximum Bus Grant Duration for Masters
pub fn defmstr_type(&self) -> DEFMSTR_TYPE_R[src]
Bits 16:17 - Default Master Type
pub fn fixed_defmstr(&self) -> FIXED_DEFMSTR_R[src]
Bits 18:21 - Fixed Default Master
impl R<u32, Reg<u32, _MATRIX_MRCR>>[src]
pub fn rcb0(&self) -> RCB0_R[src]
Bit 0 - Remap Command Bit for Master 0
pub fn rcb1(&self) -> RCB1_R[src]
Bit 1 - Remap Command Bit for Master 1
pub fn rcb2(&self) -> RCB2_R[src]
Bit 2 - Remap Command Bit for Master 2
pub fn rcb3(&self) -> RCB3_R[src]
Bit 3 - Remap Command Bit for Master 3
pub fn rcb4(&self) -> RCB4_R[src]
Bit 4 - Remap Command Bit for Master 4
pub fn rcb5(&self) -> RCB5_R[src]
Bit 5 - Remap Command Bit for Master 5
pub fn rcb6(&self) -> RCB6_R[src]
Bit 6 - Remap Command Bit for Master 6
pub fn rcb8(&self) -> RCB8_R[src]
Bit 8 - Remap Command Bit for Master 8
pub fn rcb9(&self) -> RCB9_R[src]
Bit 9 - Remap Command Bit for Master 9
pub fn rcb10(&self) -> RCB10_R[src]
Bit 10 - Remap Command Bit for Master 10
pub fn rcb11(&self) -> RCB11_R[src]
Bit 11 - Remap Command Bit for Master 11
pub fn rcb12(&self) -> RCB12_R[src]
Bit 12 - Remap Command Bit for Master 12
impl R<u32, Reg<u32, _CCFG_CAN0>>[src]
pub fn can0dmaba(&self) -> CAN0DMABA_R[src]
Bits 16:31 - CAN0 DMA Base Address
impl R<u32, Reg<u32, _CCFG_SYSIO>>[src]
pub fn sysio4(&self) -> SYSIO4_R[src]
Bit 4 - PB4 or TDI Assignment
pub fn sysio5(&self) -> SYSIO5_R[src]
Bit 5 - PB5 or TDO/TRACESWO Assignment
pub fn sysio6(&self) -> SYSIO6_R[src]
Bit 6 - PB6 or TMS/SWDIO Assignment
pub fn sysio7(&self) -> SYSIO7_R[src]
Bit 7 - PB7 or TCK/SWCLK Assignment
pub fn sysio12(&self) -> SYSIO12_R[src]
Bit 12 - PB12 or ERASE Assignment
impl R<u32, Reg<u32, _CCFG_PCCR>>[src]
pub fn tc0cc(&self) -> TC0CC_R[src]
Bit 20 - TC0 Clock Configuration
pub fn i2sc0cc(&self) -> I2SC0CC_R[src]
Bit 21 - I2SC0 Clock Configuration
pub fn i2sc1cc(&self) -> I2SC1CC_R[src]
Bit 22 - I2SC1 Clock Configuration
impl R<u32, Reg<u32, _CCFG_DYNCKG>>[src]
pub fn matckg(&self) -> MATCKG_R[src]
Bit 0 - MATRIX Dynamic Clock Gating
pub fn bridckg(&self) -> BRIDCKG_R[src]
Bit 1 - Bridge Dynamic Clock Gating Enable
pub fn efcckg(&self) -> EFCCKG_R[src]
Bit 2 - EFC Dynamic Clock Gating Enable
impl R<u32, Reg<u32, _CCFG_SMCNFCS>>[src]
pub fn smc_nfcs0(&self) -> SMC_NFCS0_R[src]
Bit 0 - SMC NAND Flash Chip Select 0 Assignment
pub fn smc_nfcs1(&self) -> SMC_NFCS1_R[src]
Bit 1 - SMC NAND Flash Chip Select 1 Assignment
pub fn smc_nfcs2(&self) -> SMC_NFCS2_R[src]
Bit 2 - SMC NAND Flash Chip Select 2 Assignment
pub fn smc_nfcs3(&self) -> SMC_NFCS3_R[src]
Bit 3 - SMC NAND Flash Chip Select 3 Assignment
pub fn sdramen(&self) -> SDRAMEN_R[src]
Bit 4 - SDRAM Enable
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _MATRIX_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key
impl R<u32, Reg<u32, _MATRIX_WPSR>>[src]
pub fn wpvs(&self) -> WPVS_R[src]
Bit 0 - Write Protection Violation Status
pub fn wpvsrc(&self) -> WPVSRC_R[src]
Bits 8:23 - Write Protection Violation Source
impl R<u32, Reg<u32, _MCAN_CREL>>[src]
pub fn day(&self) -> DAY_R[src]
Bits 0:7 - Timestamp Day
pub fn mon(&self) -> MON_R[src]
Bits 8:15 - Timestamp Month
pub fn year(&self) -> YEAR_R[src]
Bits 16:19 - Timestamp Year
pub fn substep(&self) -> SUBSTEP_R[src]
Bits 20:23 - Sub-step of Core Release
pub fn step(&self) -> STEP_R[src]
Bits 24:27 - Step of Core Release
pub fn rel(&self) -> REL_R[src]
Bits 28:31 - Core Release
impl R<u32, Reg<u32, _MCAN_ENDN>>[src]
impl R<u32, Reg<u32, _MCAN_CUST>>[src]
impl R<bool, TDC_A>[src]
pub fn variant(&self) -> TDC_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _MCAN_DBTP>>[src]
pub fn dsjw(&self) -> DSJW_R[src]
Bits 0:2 - Data (Re) Synchronization Jump Width
pub fn dtseg2(&self) -> DTSEG2_R[src]
Bits 4:7 - Data Time Segment After Sample Point
pub fn dtseg1(&self) -> DTSEG1_R[src]
Bits 8:12 - Data Time Segment Before Sample Point
pub fn dbrp(&self) -> DBRP_R[src]
Bits 16:20 - Data Bit Rate Prescaler
pub fn tdc(&self) -> TDC_R[src]
Bit 23 - Transmitter Delay Compensation
impl R<bool, LBCK_A>[src]
pub fn variant(&self) -> LBCK_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, TX_A>[src]
pub fn variant(&self) -> TX_A[src]
Get enumerated values variant
pub fn is_reset(&self) -> bool[src]
Checks if the value of the field is RESET
pub fn is_sample_point_monitoring(&self) -> bool[src]
Checks if the value of the field is SAMPLE_POINT_MONITORING
pub fn is_dominant(&self) -> bool[src]
Checks if the value of the field is DOMINANT
pub fn is_recessive(&self) -> bool[src]
Checks if the value of the field is RECESSIVE
impl R<u32, Reg<u32, _MCAN_TEST>>[src]
pub fn lbck(&self) -> LBCK_R[src]
Bit 4 - Loop Back Mode (read/write)
pub fn tx(&self) -> TX_R[src]
Bits 5:6 - Control of Transmit Pin (read/write)
pub fn rx(&self) -> RX_R[src]
Bit 7 - Receive Pin (read-only)
impl R<u32, Reg<u32, _MCAN_RWD>>[src]
pub fn wdc(&self) -> WDC_R[src]
Bits 0:7 - Watchdog Configuration (read/write)
pub fn wdv(&self) -> WDV_R[src]
Bits 8:15 - Watchdog Value (read-only)
impl R<bool, INIT_A>[src]
pub fn variant(&self) -> INIT_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, CCE_A>[src]
pub fn variant(&self) -> CCE_A[src]
Get enumerated values variant
pub fn is_protected(&self) -> bool[src]
Checks if the value of the field is PROTECTED
pub fn is_configurable(&self) -> bool[src]
Checks if the value of the field is CONFIGURABLE
impl R<bool, ASM_A>[src]
pub fn variant(&self) -> ASM_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_restricted(&self) -> bool[src]
Checks if the value of the field is RESTRICTED
impl R<bool, CSR_A>[src]
pub fn variant(&self) -> CSR_A[src]
Get enumerated values variant
pub fn is_no_clock_stop(&self) -> bool[src]
Checks if the value of the field is NO_CLOCK_STOP
pub fn is_clock_stop(&self) -> bool[src]
Checks if the value of the field is CLOCK_STOP
impl R<bool, MON_A>[src]
pub fn variant(&self) -> MON_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, DAR_A>[src]
pub fn variant(&self) -> DAR_A[src]
Get enumerated values variant
pub fn is_auto_retx(&self) -> bool[src]
Checks if the value of the field is AUTO_RETX
pub fn is_no_auto_retx(&self) -> bool[src]
Checks if the value of the field is NO_AUTO_RETX
impl R<bool, TEST_A>[src]
pub fn variant(&self) -> TEST_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, FDOE_A>[src]
pub fn variant(&self) -> FDOE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, BRSE_A>[src]
pub fn variant(&self) -> BRSE_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _MCAN_CCCR>>[src]
pub fn init(&self) -> INIT_R[src]
Bit 0 - Initialization (read/write)
pub fn cce(&self) -> CCE_R[src]
Bit 1 - Configuration Change Enable (read/write, write protection)
pub fn asm(&self) -> ASM_R[src]
Bit 2 - Restricted Operation Mode (read/write, write protection against '1')
pub fn csa(&self) -> CSA_R[src]
Bit 3 - Clock Stop Acknowledge (read-only)
pub fn csr(&self) -> CSR_R[src]
Bit 4 - Clock Stop Request (read/write)
pub fn mon(&self) -> MON_R[src]
Bit 5 - Bus Monitoring Mode (read/write, write protection against '1')
pub fn dar(&self) -> DAR_R[src]
Bit 6 - Disable Automatic Retransmission (read/write, write protection)
pub fn test(&self) -> TEST_R[src]
Bit 7 - Test Mode Enable (read/write, write protection against '1')
pub fn fdoe(&self) -> FDOE_R[src]
Bit 8 - CAN FD Operation Enable (read/write, write protection)
pub fn brse(&self) -> BRSE_R[src]
Bit 9 - Bit Rate Switching Enable (read/write, write protection)
pub fn pxhd(&self) -> PXHD_R[src]
Bit 12 - Protocol Exception Event Handling (read/write, write protection)
pub fn efbi(&self) -> EFBI_R[src]
Bit 13 - Edge Filtering during Bus Integration (read/write, write protection)
pub fn txp(&self) -> TXP_R[src]
Bit 14 - Transmit Pause (read/write, write protection)
pub fn niso(&self) -> NISO_R[src]
Bit 15 - Non-ISO Operation
impl R<u32, Reg<u32, _MCAN_NBTP>>[src]
pub fn ntseg2(&self) -> NTSEG2_R[src]
Bits 0:6 - Nominal Time Segment After Sample Point
pub fn ntseg1(&self) -> NTSEG1_R[src]
Bits 8:15 - Nominal Time Segment Before Sample Point
pub fn nbrp(&self) -> NBRP_R[src]
Bits 16:24 - Nominal Bit Rate Prescaler
pub fn nsjw(&self) -> NSJW_R[src]
Bits 25:31 - Nominal (Re) Synchronization Jump Width
impl R<u8, TSS_A>[src]
pub fn variant(&self) -> Variant<u8, TSS_A>[src]
Get enumerated values variant
pub fn is_always_0(&self) -> bool[src]
Checks if the value of the field is ALWAYS_0
pub fn is_tcp_inc(&self) -> bool[src]
Checks if the value of the field is TCP_INC
pub fn is_ext_timestamp(&self) -> bool[src]
Checks if the value of the field is EXT_TIMESTAMP
impl R<u32, Reg<u32, _MCAN_TSCC>>[src]
pub fn tss(&self) -> TSS_R[src]
Bits 0:1 - Timestamp Select
pub fn tcp(&self) -> TCP_R[src]
Bits 16:19 - Timestamp Counter Prescaler
impl R<u32, Reg<u32, _MCAN_TSCV>>[src]
impl R<bool, ETOC_A>[src]
pub fn variant(&self) -> ETOC_A[src]
Get enumerated values variant
pub fn is_no_timeout(&self) -> bool[src]
Checks if the value of the field is NO_TIMEOUT
pub fn is_tos_controlled(&self) -> bool[src]
Checks if the value of the field is TOS_CONTROLLED
impl R<u8, TOS_A>[src]
pub fn variant(&self) -> TOS_A[src]
Get enumerated values variant
pub fn is_continuous(&self) -> bool[src]
Checks if the value of the field is CONTINUOUS
pub fn is_tx_ev_timeout(&self) -> bool[src]
Checks if the value of the field is TX_EV_TIMEOUT
pub fn is_rx0_ev_timeout(&self) -> bool[src]
Checks if the value of the field is RX0_EV_TIMEOUT
pub fn is_rx1_ev_timeout(&self) -> bool[src]
Checks if the value of the field is RX1_EV_TIMEOUT
impl R<u32, Reg<u32, _MCAN_TOCC>>[src]
pub fn etoc(&self) -> ETOC_R[src]
Bit 0 - Enable Timeout Counter
pub fn tos(&self) -> TOS_R[src]
Bits 1:2 - Timeout Select
pub fn top(&self) -> TOP_R[src]
Bits 16:31 - Timeout Period
impl R<u32, Reg<u32, _MCAN_TOCV>>[src]
impl R<u32, Reg<u32, _MCAN_ECR>>[src]
pub fn tec(&self) -> TEC_R[src]
Bits 0:7 - Transmit Error Counter
pub fn rec(&self) -> REC_R[src]
Bits 8:14 - Receive Error Counter
pub fn rp(&self) -> RP_R[src]
Bit 15 - Receive Error Passive
pub fn cel(&self) -> CEL_R[src]
Bits 16:23 - CAN Error Logging (cleared on read)
impl R<u8, LEC_A>[src]
pub fn variant(&self) -> LEC_A[src]
Get enumerated values variant
pub fn is_no_error(&self) -> bool[src]
Checks if the value of the field is NO_ERROR
pub fn is_stuff_error(&self) -> bool[src]
Checks if the value of the field is STUFF_ERROR
pub fn is_form_error(&self) -> bool[src]
Checks if the value of the field is FORM_ERROR
pub fn is_ack_error(&self) -> bool[src]
Checks if the value of the field is ACK_ERROR
pub fn is_bit1_error(&self) -> bool[src]
Checks if the value of the field is BIT1_ERROR
pub fn is_bit0_error(&self) -> bool[src]
Checks if the value of the field is BIT0_ERROR
pub fn is_crc_error(&self) -> bool[src]
Checks if the value of the field is CRC_ERROR
pub fn is_no_change(&self) -> bool[src]
Checks if the value of the field is NO_CHANGE
impl R<u8, ACT_A>[src]
pub fn variant(&self) -> ACT_A[src]
Get enumerated values variant
pub fn is_synchronizing(&self) -> bool[src]
Checks if the value of the field is SYNCHRONIZING
pub fn is_idle(&self) -> bool[src]
Checks if the value of the field is IDLE
pub fn is_receiver(&self) -> bool[src]
Checks if the value of the field is RECEIVER
pub fn is_transmitter(&self) -> bool[src]
Checks if the value of the field is TRANSMITTER
impl R<u32, Reg<u32, _MCAN_PSR>>[src]
pub fn lec(&self) -> LEC_R[src]
Bits 0:2 - Last Error Code (set to 111 on read)
pub fn act(&self) -> ACT_R[src]
Bits 3:4 - Activity
pub fn ep(&self) -> EP_R[src]
Bit 5 - Error Passive
pub fn ew(&self) -> EW_R[src]
Bit 6 - Warning Status
pub fn bo(&self) -> BO_R[src]
Bit 7 - Bus_Off Status
pub fn dlec(&self) -> DLEC_R[src]
Bits 8:10 - Data Phase Last Error Code (set to 111 on read)
pub fn resi(&self) -> RESI_R[src]
Bit 11 - ESI Flag of Last Received CAN FD Message (cleared on read)
pub fn rbrs(&self) -> RBRS_R[src]
Bit 12 - BRS Flag of Last Received CAN FD Message (cleared on read)
pub fn rfdf(&self) -> RFDF_R[src]
Bit 13 - Received a CAN FD Message (cleared on read)
pub fn pxe(&self) -> PXE_R[src]
Bit 14 - Protocol Exception Event (cleared on read)
pub fn tdcv(&self) -> TDCV_R[src]
Bits 16:22 - Transmitter Delay Compensation Value
impl R<u32, Reg<u32, _MCAN_TDCR>>[src]
pub fn tdcf(&self) -> TDCF_R[src]
Bits 0:6 - Transmitter Delay Compensation Filter
pub fn tdco(&self) -> TDCO_R[src]
Bits 8:14 - Transmitter Delay Compensation Offset
impl R<u32, Reg<u32, _MCAN_IR>>[src]
pub fn rf0n(&self) -> RF0N_R[src]
Bit 0 - Receive FIFO 0 New Message
pub fn rf0w(&self) -> RF0W_R[src]
Bit 1 - Receive FIFO 0 Watermark Reached
pub fn rf0f(&self) -> RF0F_R[src]
Bit 2 - Receive FIFO 0 Full
pub fn rf0l(&self) -> RF0L_R[src]
Bit 3 - Receive FIFO 0 Message Lost
pub fn rf1n(&self) -> RF1N_R[src]
Bit 4 - Receive FIFO 1 New Message
pub fn rf1w(&self) -> RF1W_R[src]
Bit 5 - Receive FIFO 1 Watermark Reached
pub fn rf1f(&self) -> RF1F_R[src]
Bit 6 - Receive FIFO 1 Full
pub fn rf1l(&self) -> RF1L_R[src]
Bit 7 - Receive FIFO 1 Message Lost
pub fn hpm(&self) -> HPM_R[src]
Bit 8 - High Priority Message
pub fn tc(&self) -> TC_R[src]
Bit 9 - Transmission Completed
pub fn tcf(&self) -> TCF_R[src]
Bit 10 - Transmission Cancellation Finished
pub fn tfe(&self) -> TFE_R[src]
Bit 11 - Tx FIFO Empty
pub fn tefn(&self) -> TEFN_R[src]
Bit 12 - Tx Event FIFO New Entry
pub fn tefw(&self) -> TEFW_R[src]
Bit 13 - Tx Event FIFO Watermark Reached
pub fn teff(&self) -> TEFF_R[src]
Bit 14 - Tx Event FIFO Full
pub fn tefl(&self) -> TEFL_R[src]
Bit 15 - Tx Event FIFO Element Lost
pub fn tsw(&self) -> TSW_R[src]
Bit 16 - Timestamp Wraparound
pub fn mraf(&self) -> MRAF_R[src]
Bit 17 - Message RAM Access Failure
pub fn too(&self) -> TOO_R[src]
Bit 18 - Timeout Occurred
pub fn drx(&self) -> DRX_R[src]
Bit 19 - Message stored to Dedicated Receive Buffer
pub fn elo(&self) -> ELO_R[src]
Bit 22 - Error Logging Overflow
pub fn ep(&self) -> EP_R[src]
Bit 23 - Error Passive
pub fn ew(&self) -> EW_R[src]
Bit 24 - Warning Status
pub fn bo(&self) -> BO_R[src]
Bit 25 - Bus_Off Status
pub fn wdi(&self) -> WDI_R[src]
Bit 26 - Watchdog Interrupt
pub fn pea(&self) -> PEA_R[src]
Bit 27 - Protocol Error in Arbitration Phase
pub fn ped(&self) -> PED_R[src]
Bit 28 - Protocol Error in Data Phase
pub fn ara(&self) -> ARA_R[src]
Bit 29 - Access to Reserved Address
impl R<u32, Reg<u32, _MCAN_IE>>[src]
pub fn rf0ne(&self) -> RF0NE_R[src]
Bit 0 - Receive FIFO 0 New Message Interrupt Enable
pub fn rf0we(&self) -> RF0WE_R[src]
Bit 1 - Receive FIFO 0 Watermark Reached Interrupt Enable
pub fn rf0fe(&self) -> RF0FE_R[src]
Bit 2 - Receive FIFO 0 Full Interrupt Enable
pub fn rf0le(&self) -> RF0LE_R[src]
Bit 3 - Receive FIFO 0 Message Lost Interrupt Enable
pub fn rf1ne(&self) -> RF1NE_R[src]
Bit 4 - Receive FIFO 1 New Message Interrupt Enable
pub fn rf1we(&self) -> RF1WE_R[src]
Bit 5 - Receive FIFO 1 Watermark Reached Interrupt Enable
pub fn rf1fe(&self) -> RF1FE_R[src]
Bit 6 - Receive FIFO 1 Full Interrupt Enable
pub fn rf1le(&self) -> RF1LE_R[src]
Bit 7 - Receive FIFO 1 Message Lost Interrupt Enable
pub fn hpme(&self) -> HPME_R[src]
Bit 8 - High Priority Message Interrupt Enable
pub fn tce(&self) -> TCE_R[src]
Bit 9 - Transmission Completed Interrupt Enable
pub fn tcfe(&self) -> TCFE_R[src]
Bit 10 - Transmission Cancellation Finished Interrupt Enable
pub fn tfee(&self) -> TFEE_R[src]
Bit 11 - Tx FIFO Empty Interrupt Enable
pub fn tefne(&self) -> TEFNE_R[src]
Bit 12 - Tx Event FIFO New Entry Interrupt Enable
pub fn tefwe(&self) -> TEFWE_R[src]
Bit 13 - Tx Event FIFO Watermark Reached Interrupt Enable
pub fn teffe(&self) -> TEFFE_R[src]
Bit 14 - Tx Event FIFO Full Interrupt Enable
pub fn tefle(&self) -> TEFLE_R[src]
Bit 15 - Tx Event FIFO Event Lost Interrupt Enable
pub fn tswe(&self) -> TSWE_R[src]
Bit 16 - Timestamp Wraparound Interrupt Enable
pub fn mrafe(&self) -> MRAFE_R[src]
Bit 17 - Message RAM Access Failure Interrupt Enable
pub fn tooe(&self) -> TOOE_R[src]
Bit 18 - Timeout Occurred Interrupt Enable
pub fn drxe(&self) -> DRXE_R[src]
Bit 19 - Message stored to Dedicated Receive Buffer Interrupt Enable
pub fn eloe(&self) -> ELOE_R[src]
Bit 22 - Error Logging Overflow Interrupt Enable
pub fn epe(&self) -> EPE_R[src]
Bit 23 - Error Passive Interrupt Enable
pub fn ewe(&self) -> EWE_R[src]
Bit 24 - Warning Status Interrupt Enable
pub fn boe(&self) -> BOE_R[src]
Bit 25 - Bus_Off Status Interrupt Enable
pub fn wdie(&self) -> WDIE_R[src]
Bit 26 - Watchdog Interrupt Enable
pub fn peae(&self) -> PEAE_R[src]
Bit 27 - Protocol Error in Arbitration Phase Enable
pub fn pede(&self) -> PEDE_R[src]
Bit 28 - Protocol Error in Data Phase Enable
pub fn arae(&self) -> ARAE_R[src]
Bit 29 - Access to Reserved Address Enable
impl R<u32, Reg<u32, _MCAN_ILS>>[src]
pub fn rf0nl(&self) -> RF0NL_R[src]
Bit 0 - Receive FIFO 0 New Message Interrupt Line
pub fn rf0wl(&self) -> RF0WL_R[src]
Bit 1 - Receive FIFO 0 Watermark Reached Interrupt Line
pub fn rf0fl(&self) -> RF0FL_R[src]
Bit 2 - Receive FIFO 0 Full Interrupt Line
pub fn rf0ll(&self) -> RF0LL_R[src]
Bit 3 - Receive FIFO 0 Message Lost Interrupt Line
pub fn rf1nl(&self) -> RF1NL_R[src]
Bit 4 - Receive FIFO 1 New Message Interrupt Line
pub fn rf1wl(&self) -> RF1WL_R[src]
Bit 5 - Receive FIFO 1 Watermark Reached Interrupt Line
pub fn rf1fl(&self) -> RF1FL_R[src]
Bit 6 - Receive FIFO 1 Full Interrupt Line
pub fn rf1ll(&self) -> RF1LL_R[src]
Bit 7 - Receive FIFO 1 Message Lost Interrupt Line
pub fn hpml(&self) -> HPML_R[src]
Bit 8 - High Priority Message Interrupt Line
pub fn tcl(&self) -> TCL_R[src]
Bit 9 - Transmission Completed Interrupt Line
pub fn tcfl(&self) -> TCFL_R[src]
Bit 10 - Transmission Cancellation Finished Interrupt Line
pub fn tfel(&self) -> TFEL_R[src]
Bit 11 - Tx FIFO Empty Interrupt Line
pub fn tefnl(&self) -> TEFNL_R[src]
Bit 12 - Tx Event FIFO New Entry Interrupt Line
pub fn tefwl(&self) -> TEFWL_R[src]
Bit 13 - Tx Event FIFO Watermark Reached Interrupt Line
pub fn teffl(&self) -> TEFFL_R[src]
Bit 14 - Tx Event FIFO Full Interrupt Line
pub fn tefll(&self) -> TEFLL_R[src]
Bit 15 - Tx Event FIFO Event Lost Interrupt Line
pub fn tswl(&self) -> TSWL_R[src]
Bit 16 - Timestamp Wraparound Interrupt Line
pub fn mrafl(&self) -> MRAFL_R[src]
Bit 17 - Message RAM Access Failure Interrupt Line
pub fn tool(&self) -> TOOL_R[src]
Bit 18 - Timeout Occurred Interrupt Line
pub fn drxl(&self) -> DRXL_R[src]
Bit 19 - Message stored to Dedicated Receive Buffer Interrupt Line
pub fn elol(&self) -> ELOL_R[src]
Bit 22 - Error Logging Overflow Interrupt Line
pub fn epl(&self) -> EPL_R[src]
Bit 23 - Error Passive Interrupt Line
pub fn ewl(&self) -> EWL_R[src]
Bit 24 - Warning Status Interrupt Line
pub fn bol(&self) -> BOL_R[src]
Bit 25 - Bus_Off Status Interrupt Line
pub fn wdil(&self) -> WDIL_R[src]
Bit 26 - Watchdog Interrupt Line
pub fn peal(&self) -> PEAL_R[src]
Bit 27 - Protocol Error in Arbitration Phase Line
pub fn pedl(&self) -> PEDL_R[src]
Bit 28 - Protocol Error in Data Phase Line
pub fn aral(&self) -> ARAL_R[src]
Bit 29 - Access to Reserved Address Line
impl R<u32, Reg<u32, _MCAN_ILE>>[src]
pub fn eint0(&self) -> EINT0_R[src]
Bit 0 - Enable Interrupt Line 0
pub fn eint1(&self) -> EINT1_R[src]
Bit 1 - Enable Interrupt Line 1
impl R<bool, RRFE_A>[src]
pub fn variant(&self) -> RRFE_A[src]
Get enumerated values variant
pub fn is_filter(&self) -> bool[src]
Checks if the value of the field is FILTER
pub fn is_reject(&self) -> bool[src]
Checks if the value of the field is REJECT
impl R<bool, RRFS_A>[src]
pub fn variant(&self) -> RRFS_A[src]
Get enumerated values variant
pub fn is_filter(&self) -> bool[src]
Checks if the value of the field is FILTER
pub fn is_reject(&self) -> bool[src]
Checks if the value of the field is REJECT
impl R<u8, ANFE_A>[src]
pub fn variant(&self) -> Variant<u8, ANFE_A>[src]
Get enumerated values variant
pub fn is_rx_fifo_0(&self) -> bool[src]
Checks if the value of the field is RX_FIFO_0
pub fn is_rx_fifo_1(&self) -> bool[src]
Checks if the value of the field is RX_FIFO_1
impl R<u8, ANFS_A>[src]
pub fn variant(&self) -> Variant<u8, ANFS_A>[src]
Get enumerated values variant
pub fn is_rx_fifo_0(&self) -> bool[src]
Checks if the value of the field is RX_FIFO_0
pub fn is_rx_fifo_1(&self) -> bool[src]
Checks if the value of the field is RX_FIFO_1
impl R<u32, Reg<u32, _MCAN_GFC>>[src]
pub fn rrfe(&self) -> RRFE_R[src]
Bit 0 - Reject Remote Frames Extended
pub fn rrfs(&self) -> RRFS_R[src]
Bit 1 - Reject Remote Frames Standard
pub fn anfe(&self) -> ANFE_R[src]
Bits 2:3 - Accept Non-matching Frames Extended
pub fn anfs(&self) -> ANFS_R[src]
Bits 4:5 - Accept Non-matching Frames Standard
impl R<u32, Reg<u32, _MCAN_SIDFC>>[src]
pub fn flssa(&self) -> FLSSA_R[src]
Bits 2:15 - Filter List Standard Start Address
pub fn lss(&self) -> LSS_R[src]
Bits 16:23 - List Size Standard
impl R<u32, Reg<u32, _MCAN_XIDFC>>[src]
pub fn flesa(&self) -> FLESA_R[src]
Bits 2:15 - Filter List Extended Start Address
pub fn lse(&self) -> LSE_R[src]
Bits 16:22 - List Size Extended
impl R<u32, Reg<u32, _MCAN_XIDAM>>[src]
impl R<u8, MSI_A>[src]
pub fn variant(&self) -> MSI_A[src]
Get enumerated values variant
pub fn is_no_fifo_sel(&self) -> bool[src]
Checks if the value of the field is NO_FIFO_SEL
pub fn is_lost(&self) -> bool[src]
Checks if the value of the field is LOST
pub fn is_fifo_0(&self) -> bool[src]
Checks if the value of the field is FIFO_0
pub fn is_fifo_1(&self) -> bool[src]
Checks if the value of the field is FIFO_1
impl R<u32, Reg<u32, _MCAN_HPMS>>[src]
pub fn bidx(&self) -> BIDX_R[src]
Bits 0:5 - Buffer Index
pub fn msi(&self) -> MSI_R[src]
Bits 6:7 - Message Storage Indicator
pub fn fidx(&self) -> FIDX_R[src]
Bits 8:14 - Filter Index
pub fn flst(&self) -> FLST_R[src]
Bit 15 - Filter List
impl R<u32, Reg<u32, _MCAN_NDAT1>>[src]
pub fn nd0(&self) -> ND0_R[src]
Bit 0 - New Data
pub fn nd1(&self) -> ND1_R[src]
Bit 1 - New Data
pub fn nd2(&self) -> ND2_R[src]
Bit 2 - New Data
pub fn nd3(&self) -> ND3_R[src]
Bit 3 - New Data
pub fn nd4(&self) -> ND4_R[src]
Bit 4 - New Data
pub fn nd5(&self) -> ND5_R[src]
Bit 5 - New Data
pub fn nd6(&self) -> ND6_R[src]
Bit 6 - New Data
pub fn nd7(&self) -> ND7_R[src]
Bit 7 - New Data
pub fn nd8(&self) -> ND8_R[src]
Bit 8 - New Data
pub fn nd9(&self) -> ND9_R[src]
Bit 9 - New Data
pub fn nd10(&self) -> ND10_R[src]
Bit 10 - New Data
pub fn nd11(&self) -> ND11_R[src]
Bit 11 - New Data
pub fn nd12(&self) -> ND12_R[src]
Bit 12 - New Data
pub fn nd13(&self) -> ND13_R[src]
Bit 13 - New Data
pub fn nd14(&self) -> ND14_R[src]
Bit 14 - New Data
pub fn nd15(&self) -> ND15_R[src]
Bit 15 - New Data
pub fn nd16(&self) -> ND16_R[src]
Bit 16 - New Data
pub fn nd17(&self) -> ND17_R[src]
Bit 17 - New Data
pub fn nd18(&self) -> ND18_R[src]
Bit 18 - New Data
pub fn nd19(&self) -> ND19_R[src]
Bit 19 - New Data
pub fn nd20(&self) -> ND20_R[src]
Bit 20 - New Data
pub fn nd21(&self) -> ND21_R[src]
Bit 21 - New Data
pub fn nd22(&self) -> ND22_R[src]
Bit 22 - New Data
pub fn nd23(&self) -> ND23_R[src]
Bit 23 - New Data
pub fn nd24(&self) -> ND24_R[src]
Bit 24 - New Data
pub fn nd25(&self) -> ND25_R[src]
Bit 25 - New Data
pub fn nd26(&self) -> ND26_R[src]
Bit 26 - New Data
pub fn nd27(&self) -> ND27_R[src]
Bit 27 - New Data
pub fn nd28(&self) -> ND28_R[src]
Bit 28 - New Data
pub fn nd29(&self) -> ND29_R[src]
Bit 29 - New Data
pub fn nd30(&self) -> ND30_R[src]
Bit 30 - New Data
pub fn nd31(&self) -> ND31_R[src]
Bit 31 - New Data
impl R<u32, Reg<u32, _MCAN_NDAT2>>[src]
pub fn nd32(&self) -> ND32_R[src]
Bit 0 - New Data
pub fn nd33(&self) -> ND33_R[src]
Bit 1 - New Data
pub fn nd34(&self) -> ND34_R[src]
Bit 2 - New Data
pub fn nd35(&self) -> ND35_R[src]
Bit 3 - New Data
pub fn nd36(&self) -> ND36_R[src]
Bit 4 - New Data
pub fn nd37(&self) -> ND37_R[src]
Bit 5 - New Data
pub fn nd38(&self) -> ND38_R[src]
Bit 6 - New Data
pub fn nd39(&self) -> ND39_R[src]
Bit 7 - New Data
pub fn nd40(&self) -> ND40_R[src]
Bit 8 - New Data
pub fn nd41(&self) -> ND41_R[src]
Bit 9 - New Data
pub fn nd42(&self) -> ND42_R[src]
Bit 10 - New Data
pub fn nd43(&self) -> ND43_R[src]
Bit 11 - New Data
pub fn nd44(&self) -> ND44_R[src]
Bit 12 - New Data
pub fn nd45(&self) -> ND45_R[src]
Bit 13 - New Data
pub fn nd46(&self) -> ND46_R[src]
Bit 14 - New Data
pub fn nd47(&self) -> ND47_R[src]
Bit 15 - New Data
pub fn nd48(&self) -> ND48_R[src]
Bit 16 - New Data
pub fn nd49(&self) -> ND49_R[src]
Bit 17 - New Data
pub fn nd50(&self) -> ND50_R[src]
Bit 18 - New Data
pub fn nd51(&self) -> ND51_R[src]
Bit 19 - New Data
pub fn nd52(&self) -> ND52_R[src]
Bit 20 - New Data
pub fn nd53(&self) -> ND53_R[src]
Bit 21 - New Data
pub fn nd54(&self) -> ND54_R[src]
Bit 22 - New Data
pub fn nd55(&self) -> ND55_R[src]
Bit 23 - New Data
pub fn nd56(&self) -> ND56_R[src]
Bit 24 - New Data
pub fn nd57(&self) -> ND57_R[src]
Bit 25 - New Data
pub fn nd58(&self) -> ND58_R[src]
Bit 26 - New Data
pub fn nd59(&self) -> ND59_R[src]
Bit 27 - New Data
pub fn nd60(&self) -> ND60_R[src]
Bit 28 - New Data
pub fn nd61(&self) -> ND61_R[src]
Bit 29 - New Data
pub fn nd62(&self) -> ND62_R[src]
Bit 30 - New Data
pub fn nd63(&self) -> ND63_R[src]
Bit 31 - New Data
impl R<u32, Reg<u32, _MCAN_RXF0C>>[src]
pub fn f0sa(&self) -> F0SA_R[src]
Bits 2:15 - Receive FIFO 0 Start Address
pub fn f0s(&self) -> F0S_R[src]
Bits 16:22 - Receive FIFO 0 Start Address
pub fn f0wm(&self) -> F0WM_R[src]
Bits 24:30 - Receive FIFO 0 Watermark
pub fn f0om(&self) -> F0OM_R[src]
Bit 31 - FIFO 0 Operation Mode
impl R<u32, Reg<u32, _MCAN_RXF0S>>[src]
pub fn f0fl(&self) -> F0FL_R[src]
Bits 0:6 - Receive FIFO 0 Fill Level
pub fn f0gi(&self) -> F0GI_R[src]
Bits 8:13 - Receive FIFO 0 Get Index
pub fn f0pi(&self) -> F0PI_R[src]
Bits 16:21 - Receive FIFO 0 Put Index
pub fn f0f(&self) -> F0F_R[src]
Bit 24 - Receive FIFO 0 Fill Level
pub fn rf0l(&self) -> RF0L_R[src]
Bit 25 - Receive FIFO 0 Message Lost
impl R<u32, Reg<u32, _MCAN_RXF0A>>[src]
impl R<u32, Reg<u32, _MCAN_RXBC>>[src]
impl R<u32, Reg<u32, _MCAN_RXF1C>>[src]
pub fn f1sa(&self) -> F1SA_R[src]
Bits 2:15 - Receive FIFO 1 Start Address
pub fn f1s(&self) -> F1S_R[src]
Bits 16:22 - Receive FIFO 1 Start Address
pub fn f1wm(&self) -> F1WM_R[src]
Bits 24:30 - Receive FIFO 1 Watermark
pub fn f1om(&self) -> F1OM_R[src]
Bit 31 - FIFO 1 Operation Mode
impl R<u8, DMS_A>[src]
pub fn variant(&self) -> DMS_A[src]
Get enumerated values variant
pub fn is_idle(&self) -> bool[src]
Checks if the value of the field is IDLE
pub fn is_msg_a(&self) -> bool[src]
Checks if the value of the field is MSG_A
pub fn is_msg_ab(&self) -> bool[src]
Checks if the value of the field is MSG_AB
pub fn is_msg_abc(&self) -> bool[src]
Checks if the value of the field is MSG_ABC
impl R<u32, Reg<u32, _MCAN_RXF1S>>[src]
pub fn f1fl(&self) -> F1FL_R[src]
Bits 0:6 - Receive FIFO 1 Fill Level
pub fn f1gi(&self) -> F1GI_R[src]
Bits 8:13 - Receive FIFO 1 Get Index
pub fn f1pi(&self) -> F1PI_R[src]
Bits 16:21 - Receive FIFO 1 Put Index
pub fn f1f(&self) -> F1F_R[src]
Bit 24 - Receive FIFO 1 Fill Level
pub fn rf1l(&self) -> RF1L_R[src]
Bit 25 - Receive FIFO 1 Message Lost
pub fn dms(&self) -> DMS_R[src]
Bits 30:31 - Debug Message Status
impl R<u32, Reg<u32, _MCAN_RXF1A>>[src]
impl R<u8, F0DS_A>[src]
pub fn variant(&self) -> F0DS_A[src]
Get enumerated values variant
pub fn is_8_byte(&self) -> bool[src]
Checks if the value of the field is _8_BYTE
pub fn is_12_byte(&self) -> bool[src]
Checks if the value of the field is _12_BYTE
pub fn is_16_byte(&self) -> bool[src]
Checks if the value of the field is _16_BYTE
pub fn is_20_byte(&self) -> bool[src]
Checks if the value of the field is _20_BYTE
pub fn is_24_byte(&self) -> bool[src]
Checks if the value of the field is _24_BYTE
pub fn is_32_byte(&self) -> bool[src]
Checks if the value of the field is _32_BYTE
pub fn is_48_byte(&self) -> bool[src]
Checks if the value of the field is _48_BYTE
pub fn is_64_byte(&self) -> bool[src]
Checks if the value of the field is _64_BYTE
impl R<u8, F1DS_A>[src]
pub fn variant(&self) -> F1DS_A[src]
Get enumerated values variant
pub fn is_8_byte(&self) -> bool[src]
Checks if the value of the field is _8_BYTE
pub fn is_12_byte(&self) -> bool[src]
Checks if the value of the field is _12_BYTE
pub fn is_16_byte(&self) -> bool[src]
Checks if the value of the field is _16_BYTE
pub fn is_20_byte(&self) -> bool[src]
Checks if the value of the field is _20_BYTE
pub fn is_24_byte(&self) -> bool[src]
Checks if the value of the field is _24_BYTE
pub fn is_32_byte(&self) -> bool[src]
Checks if the value of the field is _32_BYTE
pub fn is_48_byte(&self) -> bool[src]
Checks if the value of the field is _48_BYTE
pub fn is_64_byte(&self) -> bool[src]
Checks if the value of the field is _64_BYTE
impl R<u8, RBDS_A>[src]
pub fn variant(&self) -> RBDS_A[src]
Get enumerated values variant
pub fn is_8_byte(&self) -> bool[src]
Checks if the value of the field is _8_BYTE
pub fn is_12_byte(&self) -> bool[src]
Checks if the value of the field is _12_BYTE
pub fn is_16_byte(&self) -> bool[src]
Checks if the value of the field is _16_BYTE
pub fn is_20_byte(&self) -> bool[src]
Checks if the value of the field is _20_BYTE
pub fn is_24_byte(&self) -> bool[src]
Checks if the value of the field is _24_BYTE
pub fn is_32_byte(&self) -> bool[src]
Checks if the value of the field is _32_BYTE
pub fn is_48_byte(&self) -> bool[src]
Checks if the value of the field is _48_BYTE
pub fn is_64_byte(&self) -> bool[src]
Checks if the value of the field is _64_BYTE
impl R<u32, Reg<u32, _MCAN_RXESC>>[src]
pub fn f0ds(&self) -> F0DS_R[src]
Bits 0:2 - Receive FIFO 0 Data Field Size
pub fn f1ds(&self) -> F1DS_R[src]
Bits 4:6 - Receive FIFO 1 Data Field Size
pub fn rbds(&self) -> RBDS_R[src]
Bits 8:10 - Receive Buffer Data Field Size
impl R<u32, Reg<u32, _MCAN_TXBC>>[src]
pub fn tbsa(&self) -> TBSA_R[src]
Bits 2:15 - Tx Buffers Start Address
pub fn ndtb(&self) -> NDTB_R[src]
Bits 16:21 - Number of Dedicated Transmit Buffers
pub fn tfqs(&self) -> TFQS_R[src]
Bits 24:29 - Transmit FIFO/Queue Size
pub fn tfqm(&self) -> TFQM_R[src]
Bit 30 - Tx FIFO/Queue Mode
impl R<u32, Reg<u32, _MCAN_TXFQS>>[src]
pub fn tffl(&self) -> TFFL_R[src]
Bits 0:5 - Tx FIFO Free Level
pub fn tfgi(&self) -> TFGI_R[src]
Bits 8:12 - Tx FIFO Get Index
pub fn tfqpi(&self) -> TFQPI_R[src]
Bits 16:20 - Tx FIFO/Queue Put Index
pub fn tfqf(&self) -> TFQF_R[src]
Bit 21 - Tx FIFO/Queue Full
impl R<u8, TBDS_A>[src]
pub fn variant(&self) -> TBDS_A[src]
Get enumerated values variant
pub fn is_8_byte(&self) -> bool[src]
Checks if the value of the field is _8_BYTE
pub fn is_12_byte(&self) -> bool[src]
Checks if the value of the field is _12_BYTE
pub fn is_16_byte(&self) -> bool[src]
Checks if the value of the field is _16_BYTE
pub fn is_20_byte(&self) -> bool[src]
Checks if the value of the field is _20_BYTE
pub fn is_24_byte(&self) -> bool[src]
Checks if the value of the field is _24_BYTE
pub fn is_32_byte(&self) -> bool[src]
Checks if the value of the field is _32_BYTE
pub fn is_48_byte(&self) -> bool[src]
Checks if the value of the field is _48_BYTE
pub fn is_64_byte(&self) -> bool[src]
Checks if the value of the field is _64_BYTE
impl R<u32, Reg<u32, _MCAN_TXESC>>[src]
impl R<u32, Reg<u32, _MCAN_TXBRP>>[src]
pub fn trp0(&self) -> TRP0_R[src]
Bit 0 - Transmission Request Pending for Buffer 0
pub fn trp1(&self) -> TRP1_R[src]
Bit 1 - Transmission Request Pending for Buffer 1
pub fn trp2(&self) -> TRP2_R[src]
Bit 2 - Transmission Request Pending for Buffer 2
pub fn trp3(&self) -> TRP3_R[src]
Bit 3 - Transmission Request Pending for Buffer 3
pub fn trp4(&self) -> TRP4_R[src]
Bit 4 - Transmission Request Pending for Buffer 4
pub fn trp5(&self) -> TRP5_R[src]
Bit 5 - Transmission Request Pending for Buffer 5
pub fn trp6(&self) -> TRP6_R[src]
Bit 6 - Transmission Request Pending for Buffer 6
pub fn trp7(&self) -> TRP7_R[src]
Bit 7 - Transmission Request Pending for Buffer 7
pub fn trp8(&self) -> TRP8_R[src]
Bit 8 - Transmission Request Pending for Buffer 8
pub fn trp9(&self) -> TRP9_R[src]
Bit 9 - Transmission Request Pending for Buffer 9
pub fn trp10(&self) -> TRP10_R[src]
Bit 10 - Transmission Request Pending for Buffer 10
pub fn trp11(&self) -> TRP11_R[src]
Bit 11 - Transmission Request Pending for Buffer 11
pub fn trp12(&self) -> TRP12_R[src]
Bit 12 - Transmission Request Pending for Buffer 12
pub fn trp13(&self) -> TRP13_R[src]
Bit 13 - Transmission Request Pending for Buffer 13
pub fn trp14(&self) -> TRP14_R[src]
Bit 14 - Transmission Request Pending for Buffer 14
pub fn trp15(&self) -> TRP15_R[src]
Bit 15 - Transmission Request Pending for Buffer 15
pub fn trp16(&self) -> TRP16_R[src]
Bit 16 - Transmission Request Pending for Buffer 16
pub fn trp17(&self) -> TRP17_R[src]
Bit 17 - Transmission Request Pending for Buffer 17
pub fn trp18(&self) -> TRP18_R[src]
Bit 18 - Transmission Request Pending for Buffer 18
pub fn trp19(&self) -> TRP19_R[src]
Bit 19 - Transmission Request Pending for Buffer 19
pub fn trp20(&self) -> TRP20_R[src]
Bit 20 - Transmission Request Pending for Buffer 20
pub fn trp21(&self) -> TRP21_R[src]
Bit 21 - Transmission Request Pending for Buffer 21
pub fn trp22(&self) -> TRP22_R[src]
Bit 22 - Transmission Request Pending for Buffer 22
pub fn trp23(&self) -> TRP23_R[src]
Bit 23 - Transmission Request Pending for Buffer 23
pub fn trp24(&self) -> TRP24_R[src]
Bit 24 - Transmission Request Pending for Buffer 24
pub fn trp25(&self) -> TRP25_R[src]
Bit 25 - Transmission Request Pending for Buffer 25
pub fn trp26(&self) -> TRP26_R[src]
Bit 26 - Transmission Request Pending for Buffer 26
pub fn trp27(&self) -> TRP27_R[src]
Bit 27 - Transmission Request Pending for Buffer 27
pub fn trp28(&self) -> TRP28_R[src]
Bit 28 - Transmission Request Pending for Buffer 28
pub fn trp29(&self) -> TRP29_R[src]
Bit 29 - Transmission Request Pending for Buffer 29
pub fn trp30(&self) -> TRP30_R[src]
Bit 30 - Transmission Request Pending for Buffer 30
pub fn trp31(&self) -> TRP31_R[src]
Bit 31 - Transmission Request Pending for Buffer 31
impl R<u32, Reg<u32, _MCAN_TXBAR>>[src]
pub fn ar0(&self) -> AR0_R[src]
Bit 0 - Add Request for Transmit Buffer 0
pub fn ar1(&self) -> AR1_R[src]
Bit 1 - Add Request for Transmit Buffer 1
pub fn ar2(&self) -> AR2_R[src]
Bit 2 - Add Request for Transmit Buffer 2
pub fn ar3(&self) -> AR3_R[src]
Bit 3 - Add Request for Transmit Buffer 3
pub fn ar4(&self) -> AR4_R[src]
Bit 4 - Add Request for Transmit Buffer 4
pub fn ar5(&self) -> AR5_R[src]
Bit 5 - Add Request for Transmit Buffer 5
pub fn ar6(&self) -> AR6_R[src]
Bit 6 - Add Request for Transmit Buffer 6
pub fn ar7(&self) -> AR7_R[src]
Bit 7 - Add Request for Transmit Buffer 7
pub fn ar8(&self) -> AR8_R[src]
Bit 8 - Add Request for Transmit Buffer 8
pub fn ar9(&self) -> AR9_R[src]
Bit 9 - Add Request for Transmit Buffer 9
pub fn ar10(&self) -> AR10_R[src]
Bit 10 - Add Request for Transmit Buffer 10
pub fn ar11(&self) -> AR11_R[src]
Bit 11 - Add Request for Transmit Buffer 11
pub fn ar12(&self) -> AR12_R[src]
Bit 12 - Add Request for Transmit Buffer 12
pub fn ar13(&self) -> AR13_R[src]
Bit 13 - Add Request for Transmit Buffer 13
pub fn ar14(&self) -> AR14_R[src]
Bit 14 - Add Request for Transmit Buffer 14
pub fn ar15(&self) -> AR15_R[src]
Bit 15 - Add Request for Transmit Buffer 15
pub fn ar16(&self) -> AR16_R[src]
Bit 16 - Add Request for Transmit Buffer 16
pub fn ar17(&self) -> AR17_R[src]
Bit 17 - Add Request for Transmit Buffer 17
pub fn ar18(&self) -> AR18_R[src]
Bit 18 - Add Request for Transmit Buffer 18
pub fn ar19(&self) -> AR19_R[src]
Bit 19 - Add Request for Transmit Buffer 19
pub fn ar20(&self) -> AR20_R[src]
Bit 20 - Add Request for Transmit Buffer 20
pub fn ar21(&self) -> AR21_R[src]
Bit 21 - Add Request for Transmit Buffer 21
pub fn ar22(&self) -> AR22_R[src]
Bit 22 - Add Request for Transmit Buffer 22
pub fn ar23(&self) -> AR23_R[src]
Bit 23 - Add Request for Transmit Buffer 23
pub fn ar24(&self) -> AR24_R[src]
Bit 24 - Add Request for Transmit Buffer 24
pub fn ar25(&self) -> AR25_R[src]
Bit 25 - Add Request for Transmit Buffer 25
pub fn ar26(&self) -> AR26_R[src]
Bit 26 - Add Request for Transmit Buffer 26
pub fn ar27(&self) -> AR27_R[src]
Bit 27 - Add Request for Transmit Buffer 27
pub fn ar28(&self) -> AR28_R[src]
Bit 28 - Add Request for Transmit Buffer 28
pub fn ar29(&self) -> AR29_R[src]
Bit 29 - Add Request for Transmit Buffer 29
pub fn ar30(&self) -> AR30_R[src]
Bit 30 - Add Request for Transmit Buffer 30
pub fn ar31(&self) -> AR31_R[src]
Bit 31 - Add Request for Transmit Buffer 31
impl R<u32, Reg<u32, _MCAN_TXBCR>>[src]
pub fn cr0(&self) -> CR0_R[src]
Bit 0 - Cancellation Request for Transmit Buffer 0
pub fn cr1(&self) -> CR1_R[src]
Bit 1 - Cancellation Request for Transmit Buffer 1
pub fn cr2(&self) -> CR2_R[src]
Bit 2 - Cancellation Request for Transmit Buffer 2
pub fn cr3(&self) -> CR3_R[src]
Bit 3 - Cancellation Request for Transmit Buffer 3
pub fn cr4(&self) -> CR4_R[src]
Bit 4 - Cancellation Request for Transmit Buffer 4
pub fn cr5(&self) -> CR5_R[src]
Bit 5 - Cancellation Request for Transmit Buffer 5
pub fn cr6(&self) -> CR6_R[src]
Bit 6 - Cancellation Request for Transmit Buffer 6
pub fn cr7(&self) -> CR7_R[src]
Bit 7 - Cancellation Request for Transmit Buffer 7
pub fn cr8(&self) -> CR8_R[src]
Bit 8 - Cancellation Request for Transmit Buffer 8
pub fn cr9(&self) -> CR9_R[src]
Bit 9 - Cancellation Request for Transmit Buffer 9
pub fn cr10(&self) -> CR10_R[src]
Bit 10 - Cancellation Request for Transmit Buffer 10
pub fn cr11(&self) -> CR11_R[src]
Bit 11 - Cancellation Request for Transmit Buffer 11
pub fn cr12(&self) -> CR12_R[src]
Bit 12 - Cancellation Request for Transmit Buffer 12
pub fn cr13(&self) -> CR13_R[src]
Bit 13 - Cancellation Request for Transmit Buffer 13
pub fn cr14(&self) -> CR14_R[src]
Bit 14 - Cancellation Request for Transmit Buffer 14
pub fn cr15(&self) -> CR15_R[src]
Bit 15 - Cancellation Request for Transmit Buffer 15
pub fn cr16(&self) -> CR16_R[src]
Bit 16 - Cancellation Request for Transmit Buffer 16
pub fn cr17(&self) -> CR17_R[src]
Bit 17 - Cancellation Request for Transmit Buffer 17
pub fn cr18(&self) -> CR18_R[src]
Bit 18 - Cancellation Request for Transmit Buffer 18
pub fn cr19(&self) -> CR19_R[src]
Bit 19 - Cancellation Request for Transmit Buffer 19
pub fn cr20(&self) -> CR20_R[src]
Bit 20 - Cancellation Request for Transmit Buffer 20
pub fn cr21(&self) -> CR21_R[src]
Bit 21 - Cancellation Request for Transmit Buffer 21
pub fn cr22(&self) -> CR22_R[src]
Bit 22 - Cancellation Request for Transmit Buffer 22
pub fn cr23(&self) -> CR23_R[src]
Bit 23 - Cancellation Request for Transmit Buffer 23
pub fn cr24(&self) -> CR24_R[src]
Bit 24 - Cancellation Request for Transmit Buffer 24
pub fn cr25(&self) -> CR25_R[src]
Bit 25 - Cancellation Request for Transmit Buffer 25
pub fn cr26(&self) -> CR26_R[src]
Bit 26 - Cancellation Request for Transmit Buffer 26
pub fn cr27(&self) -> CR27_R[src]
Bit 27 - Cancellation Request for Transmit Buffer 27
pub fn cr28(&self) -> CR28_R[src]
Bit 28 - Cancellation Request for Transmit Buffer 28
pub fn cr29(&self) -> CR29_R[src]
Bit 29 - Cancellation Request for Transmit Buffer 29
pub fn cr30(&self) -> CR30_R[src]
Bit 30 - Cancellation Request for Transmit Buffer 30
pub fn cr31(&self) -> CR31_R[src]
Bit 31 - Cancellation Request for Transmit Buffer 31
impl R<u32, Reg<u32, _MCAN_TXBTO>>[src]
pub fn to0(&self) -> TO0_R[src]
Bit 0 - Transmission Occurred for Buffer 0
pub fn to1(&self) -> TO1_R[src]
Bit 1 - Transmission Occurred for Buffer 1
pub fn to2(&self) -> TO2_R[src]
Bit 2 - Transmission Occurred for Buffer 2
pub fn to3(&self) -> TO3_R[src]
Bit 3 - Transmission Occurred for Buffer 3
pub fn to4(&self) -> TO4_R[src]
Bit 4 - Transmission Occurred for Buffer 4
pub fn to5(&self) -> TO5_R[src]
Bit 5 - Transmission Occurred for Buffer 5
pub fn to6(&self) -> TO6_R[src]
Bit 6 - Transmission Occurred for Buffer 6
pub fn to7(&self) -> TO7_R[src]
Bit 7 - Transmission Occurred for Buffer 7
pub fn to8(&self) -> TO8_R[src]
Bit 8 - Transmission Occurred for Buffer 8
pub fn to9(&self) -> TO9_R[src]
Bit 9 - Transmission Occurred for Buffer 9
pub fn to10(&self) -> TO10_R[src]
Bit 10 - Transmission Occurred for Buffer 10
pub fn to11(&self) -> TO11_R[src]
Bit 11 - Transmission Occurred for Buffer 11
pub fn to12(&self) -> TO12_R[src]
Bit 12 - Transmission Occurred for Buffer 12
pub fn to13(&self) -> TO13_R[src]
Bit 13 - Transmission Occurred for Buffer 13
pub fn to14(&self) -> TO14_R[src]
Bit 14 - Transmission Occurred for Buffer 14
pub fn to15(&self) -> TO15_R[src]
Bit 15 - Transmission Occurred for Buffer 15
pub fn to16(&self) -> TO16_R[src]
Bit 16 - Transmission Occurred for Buffer 16
pub fn to17(&self) -> TO17_R[src]
Bit 17 - Transmission Occurred for Buffer 17
pub fn to18(&self) -> TO18_R[src]
Bit 18 - Transmission Occurred for Buffer 18
pub fn to19(&self) -> TO19_R[src]
Bit 19 - Transmission Occurred for Buffer 19
pub fn to20(&self) -> TO20_R[src]
Bit 20 - Transmission Occurred for Buffer 20
pub fn to21(&self) -> TO21_R[src]
Bit 21 - Transmission Occurred for Buffer 21
pub fn to22(&self) -> TO22_R[src]
Bit 22 - Transmission Occurred for Buffer 22
pub fn to23(&self) -> TO23_R[src]
Bit 23 - Transmission Occurred for Buffer 23
pub fn to24(&self) -> TO24_R[src]
Bit 24 - Transmission Occurred for Buffer 24
pub fn to25(&self) -> TO25_R[src]
Bit 25 - Transmission Occurred for Buffer 25
pub fn to26(&self) -> TO26_R[src]
Bit 26 - Transmission Occurred for Buffer 26
pub fn to27(&self) -> TO27_R[src]
Bit 27 - Transmission Occurred for Buffer 27
pub fn to28(&self) -> TO28_R[src]
Bit 28 - Transmission Occurred for Buffer 28
pub fn to29(&self) -> TO29_R[src]
Bit 29 - Transmission Occurred for Buffer 29
pub fn to30(&self) -> TO30_R[src]
Bit 30 - Transmission Occurred for Buffer 30
pub fn to31(&self) -> TO31_R[src]
Bit 31 - Transmission Occurred for Buffer 31
impl R<u32, Reg<u32, _MCAN_TXBCF>>[src]
pub fn cf0(&self) -> CF0_R[src]
Bit 0 - Cancellation Finished for Transmit Buffer 0
pub fn cf1(&self) -> CF1_R[src]
Bit 1 - Cancellation Finished for Transmit Buffer 1
pub fn cf2(&self) -> CF2_R[src]
Bit 2 - Cancellation Finished for Transmit Buffer 2
pub fn cf3(&self) -> CF3_R[src]
Bit 3 - Cancellation Finished for Transmit Buffer 3
pub fn cf4(&self) -> CF4_R[src]
Bit 4 - Cancellation Finished for Transmit Buffer 4
pub fn cf5(&self) -> CF5_R[src]
Bit 5 - Cancellation Finished for Transmit Buffer 5
pub fn cf6(&self) -> CF6_R[src]
Bit 6 - Cancellation Finished for Transmit Buffer 6
pub fn cf7(&self) -> CF7_R[src]
Bit 7 - Cancellation Finished for Transmit Buffer 7
pub fn cf8(&self) -> CF8_R[src]
Bit 8 - Cancellation Finished for Transmit Buffer 8
pub fn cf9(&self) -> CF9_R[src]
Bit 9 - Cancellation Finished for Transmit Buffer 9
pub fn cf10(&self) -> CF10_R[src]
Bit 10 - Cancellation Finished for Transmit Buffer 10
pub fn cf11(&self) -> CF11_R[src]
Bit 11 - Cancellation Finished for Transmit Buffer 11
pub fn cf12(&self) -> CF12_R[src]
Bit 12 - Cancellation Finished for Transmit Buffer 12
pub fn cf13(&self) -> CF13_R[src]
Bit 13 - Cancellation Finished for Transmit Buffer 13
pub fn cf14(&self) -> CF14_R[src]
Bit 14 - Cancellation Finished for Transmit Buffer 14
pub fn cf15(&self) -> CF15_R[src]
Bit 15 - Cancellation Finished for Transmit Buffer 15
pub fn cf16(&self) -> CF16_R[src]
Bit 16 - Cancellation Finished for Transmit Buffer 16
pub fn cf17(&self) -> CF17_R[src]
Bit 17 - Cancellation Finished for Transmit Buffer 17
pub fn cf18(&self) -> CF18_R[src]
Bit 18 - Cancellation Finished for Transmit Buffer 18
pub fn cf19(&self) -> CF19_R[src]
Bit 19 - Cancellation Finished for Transmit Buffer 19
pub fn cf20(&self) -> CF20_R[src]
Bit 20 - Cancellation Finished for Transmit Buffer 20
pub fn cf21(&self) -> CF21_R[src]
Bit 21 - Cancellation Finished for Transmit Buffer 21
pub fn cf22(&self) -> CF22_R[src]
Bit 22 - Cancellation Finished for Transmit Buffer 22
pub fn cf23(&self) -> CF23_R[src]
Bit 23 - Cancellation Finished for Transmit Buffer 23
pub fn cf24(&self) -> CF24_R[src]
Bit 24 - Cancellation Finished for Transmit Buffer 24
pub fn cf25(&self) -> CF25_R[src]
Bit 25 - Cancellation Finished for Transmit Buffer 25
pub fn cf26(&self) -> CF26_R[src]
Bit 26 - Cancellation Finished for Transmit Buffer 26
pub fn cf27(&self) -> CF27_R[src]
Bit 27 - Cancellation Finished for Transmit Buffer 27
pub fn cf28(&self) -> CF28_R[src]
Bit 28 - Cancellation Finished for Transmit Buffer 28
pub fn cf29(&self) -> CF29_R[src]
Bit 29 - Cancellation Finished for Transmit Buffer 29
pub fn cf30(&self) -> CF30_R[src]
Bit 30 - Cancellation Finished for Transmit Buffer 30
pub fn cf31(&self) -> CF31_R[src]
Bit 31 - Cancellation Finished for Transmit Buffer 31
impl R<u32, Reg<u32, _MCAN_TXBTIE>>[src]
pub fn tie0(&self) -> TIE0_R[src]
Bit 0 - Transmission Interrupt Enable for Buffer 0
pub fn tie1(&self) -> TIE1_R[src]
Bit 1 - Transmission Interrupt Enable for Buffer 1
pub fn tie2(&self) -> TIE2_R[src]
Bit 2 - Transmission Interrupt Enable for Buffer 2
pub fn tie3(&self) -> TIE3_R[src]
Bit 3 - Transmission Interrupt Enable for Buffer 3
pub fn tie4(&self) -> TIE4_R[src]
Bit 4 - Transmission Interrupt Enable for Buffer 4
pub fn tie5(&self) -> TIE5_R[src]
Bit 5 - Transmission Interrupt Enable for Buffer 5
pub fn tie6(&self) -> TIE6_R[src]
Bit 6 - Transmission Interrupt Enable for Buffer 6
pub fn tie7(&self) -> TIE7_R[src]
Bit 7 - Transmission Interrupt Enable for Buffer 7
pub fn tie8(&self) -> TIE8_R[src]
Bit 8 - Transmission Interrupt Enable for Buffer 8
pub fn tie9(&self) -> TIE9_R[src]
Bit 9 - Transmission Interrupt Enable for Buffer 9
pub fn tie10(&self) -> TIE10_R[src]
Bit 10 - Transmission Interrupt Enable for Buffer 10
pub fn tie11(&self) -> TIE11_R[src]
Bit 11 - Transmission Interrupt Enable for Buffer 11
pub fn tie12(&self) -> TIE12_R[src]
Bit 12 - Transmission Interrupt Enable for Buffer 12
pub fn tie13(&self) -> TIE13_R[src]
Bit 13 - Transmission Interrupt Enable for Buffer 13
pub fn tie14(&self) -> TIE14_R[src]
Bit 14 - Transmission Interrupt Enable for Buffer 14
pub fn tie15(&self) -> TIE15_R[src]
Bit 15 - Transmission Interrupt Enable for Buffer 15
pub fn tie16(&self) -> TIE16_R[src]
Bit 16 - Transmission Interrupt Enable for Buffer 16
pub fn tie17(&self) -> TIE17_R[src]
Bit 17 - Transmission Interrupt Enable for Buffer 17
pub fn tie18(&self) -> TIE18_R[src]
Bit 18 - Transmission Interrupt Enable for Buffer 18
pub fn tie19(&self) -> TIE19_R[src]
Bit 19 - Transmission Interrupt Enable for Buffer 19
pub fn tie20(&self) -> TIE20_R[src]
Bit 20 - Transmission Interrupt Enable for Buffer 20
pub fn tie21(&self) -> TIE21_R[src]
Bit 21 - Transmission Interrupt Enable for Buffer 21
pub fn tie22(&self) -> TIE22_R[src]
Bit 22 - Transmission Interrupt Enable for Buffer 22
pub fn tie23(&self) -> TIE23_R[src]
Bit 23 - Transmission Interrupt Enable for Buffer 23
pub fn tie24(&self) -> TIE24_R[src]
Bit 24 - Transmission Interrupt Enable for Buffer 24
pub fn tie25(&self) -> TIE25_R[src]
Bit 25 - Transmission Interrupt Enable for Buffer 25
pub fn tie26(&self) -> TIE26_R[src]
Bit 26 - Transmission Interrupt Enable for Buffer 26
pub fn tie27(&self) -> TIE27_R[src]
Bit 27 - Transmission Interrupt Enable for Buffer 27
pub fn tie28(&self) -> TIE28_R[src]
Bit 28 - Transmission Interrupt Enable for Buffer 28
pub fn tie29(&self) -> TIE29_R[src]
Bit 29 - Transmission Interrupt Enable for Buffer 29
pub fn tie30(&self) -> TIE30_R[src]
Bit 30 - Transmission Interrupt Enable for Buffer 30
pub fn tie31(&self) -> TIE31_R[src]
Bit 31 - Transmission Interrupt Enable for Buffer 31
impl R<u32, Reg<u32, _MCAN_TXBCIE>>[src]
pub fn cfie0(&self) -> CFIE0_R[src]
Bit 0 - Cancellation Finished Interrupt Enable for Transmit Buffer 0
pub fn cfie1(&self) -> CFIE1_R[src]
Bit 1 - Cancellation Finished Interrupt Enable for Transmit Buffer 1
pub fn cfie2(&self) -> CFIE2_R[src]
Bit 2 - Cancellation Finished Interrupt Enable for Transmit Buffer 2
pub fn cfie3(&self) -> CFIE3_R[src]
Bit 3 - Cancellation Finished Interrupt Enable for Transmit Buffer 3
pub fn cfie4(&self) -> CFIE4_R[src]
Bit 4 - Cancellation Finished Interrupt Enable for Transmit Buffer 4
pub fn cfie5(&self) -> CFIE5_R[src]
Bit 5 - Cancellation Finished Interrupt Enable for Transmit Buffer 5
pub fn cfie6(&self) -> CFIE6_R[src]
Bit 6 - Cancellation Finished Interrupt Enable for Transmit Buffer 6
pub fn cfie7(&self) -> CFIE7_R[src]
Bit 7 - Cancellation Finished Interrupt Enable for Transmit Buffer 7
pub fn cfie8(&self) -> CFIE8_R[src]
Bit 8 - Cancellation Finished Interrupt Enable for Transmit Buffer 8
pub fn cfie9(&self) -> CFIE9_R[src]
Bit 9 - Cancellation Finished Interrupt Enable for Transmit Buffer 9
pub fn cfie10(&self) -> CFIE10_R[src]
Bit 10 - Cancellation Finished Interrupt Enable for Transmit Buffer 10
pub fn cfie11(&self) -> CFIE11_R[src]
Bit 11 - Cancellation Finished Interrupt Enable for Transmit Buffer 11
pub fn cfie12(&self) -> CFIE12_R[src]
Bit 12 - Cancellation Finished Interrupt Enable for Transmit Buffer 12
pub fn cfie13(&self) -> CFIE13_R[src]
Bit 13 - Cancellation Finished Interrupt Enable for Transmit Buffer 13
pub fn cfie14(&self) -> CFIE14_R[src]
Bit 14 - Cancellation Finished Interrupt Enable for Transmit Buffer 14
pub fn cfie15(&self) -> CFIE15_R[src]
Bit 15 - Cancellation Finished Interrupt Enable for Transmit Buffer 15
pub fn cfie16(&self) -> CFIE16_R[src]
Bit 16 - Cancellation Finished Interrupt Enable for Transmit Buffer 16
pub fn cfie17(&self) -> CFIE17_R[src]
Bit 17 - Cancellation Finished Interrupt Enable for Transmit Buffer 17
pub fn cfie18(&self) -> CFIE18_R[src]
Bit 18 - Cancellation Finished Interrupt Enable for Transmit Buffer 18
pub fn cfie19(&self) -> CFIE19_R[src]
Bit 19 - Cancellation Finished Interrupt Enable for Transmit Buffer 19
pub fn cfie20(&self) -> CFIE20_R[src]
Bit 20 - Cancellation Finished Interrupt Enable for Transmit Buffer 20
pub fn cfie21(&self) -> CFIE21_R[src]
Bit 21 - Cancellation Finished Interrupt Enable for Transmit Buffer 21
pub fn cfie22(&self) -> CFIE22_R[src]
Bit 22 - Cancellation Finished Interrupt Enable for Transmit Buffer 22
pub fn cfie23(&self) -> CFIE23_R[src]
Bit 23 - Cancellation Finished Interrupt Enable for Transmit Buffer 23
pub fn cfie24(&self) -> CFIE24_R[src]
Bit 24 - Cancellation Finished Interrupt Enable for Transmit Buffer 24
pub fn cfie25(&self) -> CFIE25_R[src]
Bit 25 - Cancellation Finished Interrupt Enable for Transmit Buffer 25
pub fn cfie26(&self) -> CFIE26_R[src]
Bit 26 - Cancellation Finished Interrupt Enable for Transmit Buffer 26
pub fn cfie27(&self) -> CFIE27_R[src]
Bit 27 - Cancellation Finished Interrupt Enable for Transmit Buffer 27
pub fn cfie28(&self) -> CFIE28_R[src]
Bit 28 - Cancellation Finished Interrupt Enable for Transmit Buffer 28
pub fn cfie29(&self) -> CFIE29_R[src]
Bit 29 - Cancellation Finished Interrupt Enable for Transmit Buffer 29
pub fn cfie30(&self) -> CFIE30_R[src]
Bit 30 - Cancellation Finished Interrupt Enable for Transmit Buffer 30
pub fn cfie31(&self) -> CFIE31_R[src]
Bit 31 - Cancellation Finished Interrupt Enable for Transmit Buffer 31
impl R<u32, Reg<u32, _MCAN_TXEFC>>[src]
pub fn efsa(&self) -> EFSA_R[src]
Bits 2:15 - Event FIFO Start Address
pub fn efs(&self) -> EFS_R[src]
Bits 16:21 - Event FIFO Size
pub fn efwm(&self) -> EFWM_R[src]
Bits 24:29 - Event FIFO Watermark
impl R<u32, Reg<u32, _MCAN_TXEFS>>[src]
pub fn effl(&self) -> EFFL_R[src]
Bits 0:5 - Event FIFO Fill Level
pub fn efgi(&self) -> EFGI_R[src]
Bits 8:12 - Event FIFO Get Index
pub fn efpi(&self) -> EFPI_R[src]
Bits 16:20 - Event FIFO Put Index
pub fn eff(&self) -> EFF_R[src]
Bit 24 - Event FIFO Full
pub fn tefl(&self) -> TEFL_R[src]
Bit 25 - Tx Event FIFO Element Lost
impl R<u32, Reg<u32, _MCAN_TXEFA>>[src]
impl R<u32, Reg<u32, _PIO_PSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - PIO Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - PIO Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - PIO Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - PIO Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - PIO Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - PIO Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - PIO Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - PIO Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - PIO Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - PIO Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - PIO Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - PIO Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - PIO Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - PIO Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - PIO Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - PIO Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - PIO Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - PIO Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - PIO Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - PIO Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - PIO Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - PIO Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - PIO Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - PIO Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - PIO Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - PIO Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - PIO Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - PIO Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - PIO Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - PIO Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - PIO Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - PIO Status
impl R<u32, Reg<u32, _PIO_OSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Output Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - Output Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - Output Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - Output Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - Output Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - Output Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - Output Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - Output Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - Output Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - Output Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - Output Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - Output Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - Output Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - Output Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - Output Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - Output Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - Output Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - Output Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - Output Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - Output Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - Output Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - Output Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - Output Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - Output Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - Output Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - Output Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - Output Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - Output Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - Output Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - Output Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - Output Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - Output Status
impl R<u32, Reg<u32, _PIO_IFSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Input Filter Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - Input Filter Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - Input Filter Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - Input Filter Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - Input Filter Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - Input Filter Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - Input Filter Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - Input Filter Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - Input Filter Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - Input Filter Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - Input Filter Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - Input Filter Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - Input Filter Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - Input Filter Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - Input Filter Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - Input Filter Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - Input Filter Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - Input Filter Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - Input Filter Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - Input Filter Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - Input Filter Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - Input Filter Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - Input Filter Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - Input Filter Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - Input Filter Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - Input Filter Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - Input Filter Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - Input Filter Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - Input Filter Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - Input Filter Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - Input Filter Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - Input Filter Status
impl R<u32, Reg<u32, _PIO_ODSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Output Data Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - Output Data Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - Output Data Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - Output Data Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - Output Data Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - Output Data Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - Output Data Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - Output Data Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - Output Data Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - Output Data Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - Output Data Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - Output Data Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - Output Data Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - Output Data Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - Output Data Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - Output Data Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - Output Data Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - Output Data Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - Output Data Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - Output Data Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - Output Data Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - Output Data Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - Output Data Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - Output Data Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - Output Data Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - Output Data Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - Output Data Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - Output Data Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - Output Data Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - Output Data Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - Output Data Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - Output Data Status
impl R<u32, Reg<u32, _PIO_PDSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Output Data Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - Output Data Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - Output Data Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - Output Data Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - Output Data Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - Output Data Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - Output Data Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - Output Data Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - Output Data Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - Output Data Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - Output Data Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - Output Data Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - Output Data Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - Output Data Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - Output Data Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - Output Data Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - Output Data Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - Output Data Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - Output Data Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - Output Data Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - Output Data Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - Output Data Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - Output Data Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - Output Data Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - Output Data Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - Output Data Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - Output Data Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - Output Data Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - Output Data Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - Output Data Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - Output Data Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - Output Data Status
impl R<u32, Reg<u32, _PIO_IMR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Input Change Interrupt Mask
pub fn p1(&self) -> P1_R[src]
Bit 1 - Input Change Interrupt Mask
pub fn p2(&self) -> P2_R[src]
Bit 2 - Input Change Interrupt Mask
pub fn p3(&self) -> P3_R[src]
Bit 3 - Input Change Interrupt Mask
pub fn p4(&self) -> P4_R[src]
Bit 4 - Input Change Interrupt Mask
pub fn p5(&self) -> P5_R[src]
Bit 5 - Input Change Interrupt Mask
pub fn p6(&self) -> P6_R[src]
Bit 6 - Input Change Interrupt Mask
pub fn p7(&self) -> P7_R[src]
Bit 7 - Input Change Interrupt Mask
pub fn p8(&self) -> P8_R[src]
Bit 8 - Input Change Interrupt Mask
pub fn p9(&self) -> P9_R[src]
Bit 9 - Input Change Interrupt Mask
pub fn p10(&self) -> P10_R[src]
Bit 10 - Input Change Interrupt Mask
pub fn p11(&self) -> P11_R[src]
Bit 11 - Input Change Interrupt Mask
pub fn p12(&self) -> P12_R[src]
Bit 12 - Input Change Interrupt Mask
pub fn p13(&self) -> P13_R[src]
Bit 13 - Input Change Interrupt Mask
pub fn p14(&self) -> P14_R[src]
Bit 14 - Input Change Interrupt Mask
pub fn p15(&self) -> P15_R[src]
Bit 15 - Input Change Interrupt Mask
pub fn p16(&self) -> P16_R[src]
Bit 16 - Input Change Interrupt Mask
pub fn p17(&self) -> P17_R[src]
Bit 17 - Input Change Interrupt Mask
pub fn p18(&self) -> P18_R[src]
Bit 18 - Input Change Interrupt Mask
pub fn p19(&self) -> P19_R[src]
Bit 19 - Input Change Interrupt Mask
pub fn p20(&self) -> P20_R[src]
Bit 20 - Input Change Interrupt Mask
pub fn p21(&self) -> P21_R[src]
Bit 21 - Input Change Interrupt Mask
pub fn p22(&self) -> P22_R[src]
Bit 22 - Input Change Interrupt Mask
pub fn p23(&self) -> P23_R[src]
Bit 23 - Input Change Interrupt Mask
pub fn p24(&self) -> P24_R[src]
Bit 24 - Input Change Interrupt Mask
pub fn p25(&self) -> P25_R[src]
Bit 25 - Input Change Interrupt Mask
pub fn p26(&self) -> P26_R[src]
Bit 26 - Input Change Interrupt Mask
pub fn p27(&self) -> P27_R[src]
Bit 27 - Input Change Interrupt Mask
pub fn p28(&self) -> P28_R[src]
Bit 28 - Input Change Interrupt Mask
pub fn p29(&self) -> P29_R[src]
Bit 29 - Input Change Interrupt Mask
pub fn p30(&self) -> P30_R[src]
Bit 30 - Input Change Interrupt Mask
pub fn p31(&self) -> P31_R[src]
Bit 31 - Input Change Interrupt Mask
impl R<u32, Reg<u32, _PIO_ISR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Input Change Interrupt Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - Input Change Interrupt Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - Input Change Interrupt Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - Input Change Interrupt Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - Input Change Interrupt Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - Input Change Interrupt Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - Input Change Interrupt Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - Input Change Interrupt Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - Input Change Interrupt Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - Input Change Interrupt Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - Input Change Interrupt Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - Input Change Interrupt Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - Input Change Interrupt Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - Input Change Interrupt Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - Input Change Interrupt Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - Input Change Interrupt Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - Input Change Interrupt Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - Input Change Interrupt Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - Input Change Interrupt Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - Input Change Interrupt Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - Input Change Interrupt Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - Input Change Interrupt Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - Input Change Interrupt Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - Input Change Interrupt Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - Input Change Interrupt Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - Input Change Interrupt Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - Input Change Interrupt Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - Input Change Interrupt Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - Input Change Interrupt Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - Input Change Interrupt Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - Input Change Interrupt Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - Input Change Interrupt Status
impl R<u32, Reg<u32, _PIO_MDSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Multi-drive Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - Multi-drive Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - Multi-drive Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - Multi-drive Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - Multi-drive Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - Multi-drive Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - Multi-drive Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - Multi-drive Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - Multi-drive Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - Multi-drive Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - Multi-drive Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - Multi-drive Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - Multi-drive Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - Multi-drive Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - Multi-drive Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - Multi-drive Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - Multi-drive Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - Multi-drive Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - Multi-drive Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - Multi-drive Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - Multi-drive Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - Multi-drive Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - Multi-drive Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - Multi-drive Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - Multi-drive Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - Multi-drive Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - Multi-drive Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - Multi-drive Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - Multi-drive Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - Multi-drive Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - Multi-drive Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - Multi-drive Status
impl R<u32, Reg<u32, _PIO_PUSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Pull-Up Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - Pull-Up Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - Pull-Up Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - Pull-Up Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - Pull-Up Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - Pull-Up Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - Pull-Up Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - Pull-Up Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - Pull-Up Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - Pull-Up Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - Pull-Up Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - Pull-Up Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - Pull-Up Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - Pull-Up Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - Pull-Up Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - Pull-Up Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - Pull-Up Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - Pull-Up Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - Pull-Up Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - Pull-Up Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - Pull-Up Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - Pull-Up Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - Pull-Up Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - Pull-Up Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - Pull-Up Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - Pull-Up Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - Pull-Up Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - Pull-Up Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - Pull-Up Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - Pull-Up Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - Pull-Up Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - Pull-Up Status
impl R<u32, Reg<u32, _PIO_ABCDSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Peripheral Select
pub fn p1(&self) -> P1_R[src]
Bit 1 - Peripheral Select
pub fn p2(&self) -> P2_R[src]
Bit 2 - Peripheral Select
pub fn p3(&self) -> P3_R[src]
Bit 3 - Peripheral Select
pub fn p4(&self) -> P4_R[src]
Bit 4 - Peripheral Select
pub fn p5(&self) -> P5_R[src]
Bit 5 - Peripheral Select
pub fn p6(&self) -> P6_R[src]
Bit 6 - Peripheral Select
pub fn p7(&self) -> P7_R[src]
Bit 7 - Peripheral Select
pub fn p8(&self) -> P8_R[src]
Bit 8 - Peripheral Select
pub fn p9(&self) -> P9_R[src]
Bit 9 - Peripheral Select
pub fn p10(&self) -> P10_R[src]
Bit 10 - Peripheral Select
pub fn p11(&self) -> P11_R[src]
Bit 11 - Peripheral Select
pub fn p12(&self) -> P12_R[src]
Bit 12 - Peripheral Select
pub fn p13(&self) -> P13_R[src]
Bit 13 - Peripheral Select
pub fn p14(&self) -> P14_R[src]
Bit 14 - Peripheral Select
pub fn p15(&self) -> P15_R[src]
Bit 15 - Peripheral Select
pub fn p16(&self) -> P16_R[src]
Bit 16 - Peripheral Select
pub fn p17(&self) -> P17_R[src]
Bit 17 - Peripheral Select
pub fn p18(&self) -> P18_R[src]
Bit 18 - Peripheral Select
pub fn p19(&self) -> P19_R[src]
Bit 19 - Peripheral Select
pub fn p20(&self) -> P20_R[src]
Bit 20 - Peripheral Select
pub fn p21(&self) -> P21_R[src]
Bit 21 - Peripheral Select
pub fn p22(&self) -> P22_R[src]
Bit 22 - Peripheral Select
pub fn p23(&self) -> P23_R[src]
Bit 23 - Peripheral Select
pub fn p24(&self) -> P24_R[src]
Bit 24 - Peripheral Select
pub fn p25(&self) -> P25_R[src]
Bit 25 - Peripheral Select
pub fn p26(&self) -> P26_R[src]
Bit 26 - Peripheral Select
pub fn p27(&self) -> P27_R[src]
Bit 27 - Peripheral Select
pub fn p28(&self) -> P28_R[src]
Bit 28 - Peripheral Select
pub fn p29(&self) -> P29_R[src]
Bit 29 - Peripheral Select
pub fn p30(&self) -> P30_R[src]
Bit 30 - Peripheral Select
pub fn p31(&self) -> P31_R[src]
Bit 31 - Peripheral Select
impl R<u32, Reg<u32, _PIO_IFSCSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Glitch or Debouncing Filter Selection Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - Glitch or Debouncing Filter Selection Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - Glitch or Debouncing Filter Selection Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - Glitch or Debouncing Filter Selection Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - Glitch or Debouncing Filter Selection Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - Glitch or Debouncing Filter Selection Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - Glitch or Debouncing Filter Selection Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - Glitch or Debouncing Filter Selection Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - Glitch or Debouncing Filter Selection Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - Glitch or Debouncing Filter Selection Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - Glitch or Debouncing Filter Selection Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - Glitch or Debouncing Filter Selection Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - Glitch or Debouncing Filter Selection Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - Glitch or Debouncing Filter Selection Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - Glitch or Debouncing Filter Selection Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - Glitch or Debouncing Filter Selection Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - Glitch or Debouncing Filter Selection Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - Glitch or Debouncing Filter Selection Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - Glitch or Debouncing Filter Selection Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - Glitch or Debouncing Filter Selection Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - Glitch or Debouncing Filter Selection Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - Glitch or Debouncing Filter Selection Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - Glitch or Debouncing Filter Selection Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - Glitch or Debouncing Filter Selection Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - Glitch or Debouncing Filter Selection Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - Glitch or Debouncing Filter Selection Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - Glitch or Debouncing Filter Selection Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - Glitch or Debouncing Filter Selection Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - Glitch or Debouncing Filter Selection Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - Glitch or Debouncing Filter Selection Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - Glitch or Debouncing Filter Selection Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - Glitch or Debouncing Filter Selection Status
impl R<u32, Reg<u32, _PIO_SCDR>>[src]
impl R<u32, Reg<u32, _PIO_PPDSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Pull-Down Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - Pull-Down Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - Pull-Down Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - Pull-Down Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - Pull-Down Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - Pull-Down Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - Pull-Down Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - Pull-Down Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - Pull-Down Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - Pull-Down Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - Pull-Down Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - Pull-Down Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - Pull-Down Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - Pull-Down Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - Pull-Down Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - Pull-Down Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - Pull-Down Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - Pull-Down Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - Pull-Down Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - Pull-Down Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - Pull-Down Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - Pull-Down Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - Pull-Down Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - Pull-Down Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - Pull-Down Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - Pull-Down Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - Pull-Down Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - Pull-Down Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - Pull-Down Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - Pull-Down Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - Pull-Down Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - Pull-Down Status
impl R<u32, Reg<u32, _PIO_OWSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Output Write Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - Output Write Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - Output Write Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - Output Write Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - Output Write Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - Output Write Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - Output Write Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - Output Write Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - Output Write Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - Output Write Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - Output Write Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - Output Write Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - Output Write Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - Output Write Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - Output Write Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - Output Write Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - Output Write Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - Output Write Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - Output Write Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - Output Write Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - Output Write Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - Output Write Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - Output Write Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - Output Write Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - Output Write Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - Output Write Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - Output Write Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - Output Write Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - Output Write Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - Output Write Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - Output Write Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - Output Write Status
impl R<u32, Reg<u32, _PIO_AIMMR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - IO Line Index
pub fn p1(&self) -> P1_R[src]
Bit 1 - IO Line Index
pub fn p2(&self) -> P2_R[src]
Bit 2 - IO Line Index
pub fn p3(&self) -> P3_R[src]
Bit 3 - IO Line Index
pub fn p4(&self) -> P4_R[src]
Bit 4 - IO Line Index
pub fn p5(&self) -> P5_R[src]
Bit 5 - IO Line Index
pub fn p6(&self) -> P6_R[src]
Bit 6 - IO Line Index
pub fn p7(&self) -> P7_R[src]
Bit 7 - IO Line Index
pub fn p8(&self) -> P8_R[src]
Bit 8 - IO Line Index
pub fn p9(&self) -> P9_R[src]
Bit 9 - IO Line Index
pub fn p10(&self) -> P10_R[src]
Bit 10 - IO Line Index
pub fn p11(&self) -> P11_R[src]
Bit 11 - IO Line Index
pub fn p12(&self) -> P12_R[src]
Bit 12 - IO Line Index
pub fn p13(&self) -> P13_R[src]
Bit 13 - IO Line Index
pub fn p14(&self) -> P14_R[src]
Bit 14 - IO Line Index
pub fn p15(&self) -> P15_R[src]
Bit 15 - IO Line Index
pub fn p16(&self) -> P16_R[src]
Bit 16 - IO Line Index
pub fn p17(&self) -> P17_R[src]
Bit 17 - IO Line Index
pub fn p18(&self) -> P18_R[src]
Bit 18 - IO Line Index
pub fn p19(&self) -> P19_R[src]
Bit 19 - IO Line Index
pub fn p20(&self) -> P20_R[src]
Bit 20 - IO Line Index
pub fn p21(&self) -> P21_R[src]
Bit 21 - IO Line Index
pub fn p22(&self) -> P22_R[src]
Bit 22 - IO Line Index
pub fn p23(&self) -> P23_R[src]
Bit 23 - IO Line Index
pub fn p24(&self) -> P24_R[src]
Bit 24 - IO Line Index
pub fn p25(&self) -> P25_R[src]
Bit 25 - IO Line Index
pub fn p26(&self) -> P26_R[src]
Bit 26 - IO Line Index
pub fn p27(&self) -> P27_R[src]
Bit 27 - IO Line Index
pub fn p28(&self) -> P28_R[src]
Bit 28 - IO Line Index
pub fn p29(&self) -> P29_R[src]
Bit 29 - IO Line Index
pub fn p30(&self) -> P30_R[src]
Bit 30 - IO Line Index
pub fn p31(&self) -> P31_R[src]
Bit 31 - IO Line Index
impl R<u32, Reg<u32, _PIO_ELSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Edge/Level Interrupt Source Selection
pub fn p1(&self) -> P1_R[src]
Bit 1 - Edge/Level Interrupt Source Selection
pub fn p2(&self) -> P2_R[src]
Bit 2 - Edge/Level Interrupt Source Selection
pub fn p3(&self) -> P3_R[src]
Bit 3 - Edge/Level Interrupt Source Selection
pub fn p4(&self) -> P4_R[src]
Bit 4 - Edge/Level Interrupt Source Selection
pub fn p5(&self) -> P5_R[src]
Bit 5 - Edge/Level Interrupt Source Selection
pub fn p6(&self) -> P6_R[src]
Bit 6 - Edge/Level Interrupt Source Selection
pub fn p7(&self) -> P7_R[src]
Bit 7 - Edge/Level Interrupt Source Selection
pub fn p8(&self) -> P8_R[src]
Bit 8 - Edge/Level Interrupt Source Selection
pub fn p9(&self) -> P9_R[src]
Bit 9 - Edge/Level Interrupt Source Selection
pub fn p10(&self) -> P10_R[src]
Bit 10 - Edge/Level Interrupt Source Selection
pub fn p11(&self) -> P11_R[src]
Bit 11 - Edge/Level Interrupt Source Selection
pub fn p12(&self) -> P12_R[src]
Bit 12 - Edge/Level Interrupt Source Selection
pub fn p13(&self) -> P13_R[src]
Bit 13 - Edge/Level Interrupt Source Selection
pub fn p14(&self) -> P14_R[src]
Bit 14 - Edge/Level Interrupt Source Selection
pub fn p15(&self) -> P15_R[src]
Bit 15 - Edge/Level Interrupt Source Selection
pub fn p16(&self) -> P16_R[src]
Bit 16 - Edge/Level Interrupt Source Selection
pub fn p17(&self) -> P17_R[src]
Bit 17 - Edge/Level Interrupt Source Selection
pub fn p18(&self) -> P18_R[src]
Bit 18 - Edge/Level Interrupt Source Selection
pub fn p19(&self) -> P19_R[src]
Bit 19 - Edge/Level Interrupt Source Selection
pub fn p20(&self) -> P20_R[src]
Bit 20 - Edge/Level Interrupt Source Selection
pub fn p21(&self) -> P21_R[src]
Bit 21 - Edge/Level Interrupt Source Selection
pub fn p22(&self) -> P22_R[src]
Bit 22 - Edge/Level Interrupt Source Selection
pub fn p23(&self) -> P23_R[src]
Bit 23 - Edge/Level Interrupt Source Selection
pub fn p24(&self) -> P24_R[src]
Bit 24 - Edge/Level Interrupt Source Selection
pub fn p25(&self) -> P25_R[src]
Bit 25 - Edge/Level Interrupt Source Selection
pub fn p26(&self) -> P26_R[src]
Bit 26 - Edge/Level Interrupt Source Selection
pub fn p27(&self) -> P27_R[src]
Bit 27 - Edge/Level Interrupt Source Selection
pub fn p28(&self) -> P28_R[src]
Bit 28 - Edge/Level Interrupt Source Selection
pub fn p29(&self) -> P29_R[src]
Bit 29 - Edge/Level Interrupt Source Selection
pub fn p30(&self) -> P30_R[src]
Bit 30 - Edge/Level Interrupt Source Selection
pub fn p31(&self) -> P31_R[src]
Bit 31 - Edge/Level Interrupt Source Selection
impl R<u32, Reg<u32, _PIO_FRLHSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Edge/Level Interrupt Source Selection
pub fn p1(&self) -> P1_R[src]
Bit 1 - Edge/Level Interrupt Source Selection
pub fn p2(&self) -> P2_R[src]
Bit 2 - Edge/Level Interrupt Source Selection
pub fn p3(&self) -> P3_R[src]
Bit 3 - Edge/Level Interrupt Source Selection
pub fn p4(&self) -> P4_R[src]
Bit 4 - Edge/Level Interrupt Source Selection
pub fn p5(&self) -> P5_R[src]
Bit 5 - Edge/Level Interrupt Source Selection
pub fn p6(&self) -> P6_R[src]
Bit 6 - Edge/Level Interrupt Source Selection
pub fn p7(&self) -> P7_R[src]
Bit 7 - Edge/Level Interrupt Source Selection
pub fn p8(&self) -> P8_R[src]
Bit 8 - Edge/Level Interrupt Source Selection
pub fn p9(&self) -> P9_R[src]
Bit 9 - Edge/Level Interrupt Source Selection
pub fn p10(&self) -> P10_R[src]
Bit 10 - Edge/Level Interrupt Source Selection
pub fn p11(&self) -> P11_R[src]
Bit 11 - Edge/Level Interrupt Source Selection
pub fn p12(&self) -> P12_R[src]
Bit 12 - Edge/Level Interrupt Source Selection
pub fn p13(&self) -> P13_R[src]
Bit 13 - Edge/Level Interrupt Source Selection
pub fn p14(&self) -> P14_R[src]
Bit 14 - Edge/Level Interrupt Source Selection
pub fn p15(&self) -> P15_R[src]
Bit 15 - Edge/Level Interrupt Source Selection
pub fn p16(&self) -> P16_R[src]
Bit 16 - Edge/Level Interrupt Source Selection
pub fn p17(&self) -> P17_R[src]
Bit 17 - Edge/Level Interrupt Source Selection
pub fn p18(&self) -> P18_R[src]
Bit 18 - Edge/Level Interrupt Source Selection
pub fn p19(&self) -> P19_R[src]
Bit 19 - Edge/Level Interrupt Source Selection
pub fn p20(&self) -> P20_R[src]
Bit 20 - Edge/Level Interrupt Source Selection
pub fn p21(&self) -> P21_R[src]
Bit 21 - Edge/Level Interrupt Source Selection
pub fn p22(&self) -> P22_R[src]
Bit 22 - Edge/Level Interrupt Source Selection
pub fn p23(&self) -> P23_R[src]
Bit 23 - Edge/Level Interrupt Source Selection
pub fn p24(&self) -> P24_R[src]
Bit 24 - Edge/Level Interrupt Source Selection
pub fn p25(&self) -> P25_R[src]
Bit 25 - Edge/Level Interrupt Source Selection
pub fn p26(&self) -> P26_R[src]
Bit 26 - Edge/Level Interrupt Source Selection
pub fn p27(&self) -> P27_R[src]
Bit 27 - Edge/Level Interrupt Source Selection
pub fn p28(&self) -> P28_R[src]
Bit 28 - Edge/Level Interrupt Source Selection
pub fn p29(&self) -> P29_R[src]
Bit 29 - Edge/Level Interrupt Source Selection
pub fn p30(&self) -> P30_R[src]
Bit 30 - Edge/Level Interrupt Source Selection
pub fn p31(&self) -> P31_R[src]
Bit 31 - Edge/Level Interrupt Source Selection
impl R<u32, Reg<u32, _PIO_LOCKSR>>[src]
pub fn p0(&self) -> P0_R[src]
Bit 0 - Lock Status
pub fn p1(&self) -> P1_R[src]
Bit 1 - Lock Status
pub fn p2(&self) -> P2_R[src]
Bit 2 - Lock Status
pub fn p3(&self) -> P3_R[src]
Bit 3 - Lock Status
pub fn p4(&self) -> P4_R[src]
Bit 4 - Lock Status
pub fn p5(&self) -> P5_R[src]
Bit 5 - Lock Status
pub fn p6(&self) -> P6_R[src]
Bit 6 - Lock Status
pub fn p7(&self) -> P7_R[src]
Bit 7 - Lock Status
pub fn p8(&self) -> P8_R[src]
Bit 8 - Lock Status
pub fn p9(&self) -> P9_R[src]
Bit 9 - Lock Status
pub fn p10(&self) -> P10_R[src]
Bit 10 - Lock Status
pub fn p11(&self) -> P11_R[src]
Bit 11 - Lock Status
pub fn p12(&self) -> P12_R[src]
Bit 12 - Lock Status
pub fn p13(&self) -> P13_R[src]
Bit 13 - Lock Status
pub fn p14(&self) -> P14_R[src]
Bit 14 - Lock Status
pub fn p15(&self) -> P15_R[src]
Bit 15 - Lock Status
pub fn p16(&self) -> P16_R[src]
Bit 16 - Lock Status
pub fn p17(&self) -> P17_R[src]
Bit 17 - Lock Status
pub fn p18(&self) -> P18_R[src]
Bit 18 - Lock Status
pub fn p19(&self) -> P19_R[src]
Bit 19 - Lock Status
pub fn p20(&self) -> P20_R[src]
Bit 20 - Lock Status
pub fn p21(&self) -> P21_R[src]
Bit 21 - Lock Status
pub fn p22(&self) -> P22_R[src]
Bit 22 - Lock Status
pub fn p23(&self) -> P23_R[src]
Bit 23 - Lock Status
pub fn p24(&self) -> P24_R[src]
Bit 24 - Lock Status
pub fn p25(&self) -> P25_R[src]
Bit 25 - Lock Status
pub fn p26(&self) -> P26_R[src]
Bit 26 - Lock Status
pub fn p27(&self) -> P27_R[src]
Bit 27 - Lock Status
pub fn p28(&self) -> P28_R[src]
Bit 28 - Lock Status
pub fn p29(&self) -> P29_R[src]
Bit 29 - Lock Status
pub fn p30(&self) -> P30_R[src]
Bit 30 - Lock Status
pub fn p31(&self) -> P31_R[src]
Bit 31 - Lock Status
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _PIO_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key
impl R<u32, Reg<u32, _PIO_WPSR>>[src]
pub fn wpvs(&self) -> WPVS_R[src]
Bit 0 - Write Protection Violation Status
pub fn wpvsrc(&self) -> WPVSRC_R[src]
Bits 8:23 - Write Protection Violation Source
impl R<u32, Reg<u32, _PIO_SCHMITT>>[src]
pub fn schmitt0(&self) -> SCHMITT0_R[src]
Bit 0 - Schmitt Trigger Control
pub fn schmitt1(&self) -> SCHMITT1_R[src]
Bit 1 - Schmitt Trigger Control
pub fn schmitt2(&self) -> SCHMITT2_R[src]
Bit 2 - Schmitt Trigger Control
pub fn schmitt3(&self) -> SCHMITT3_R[src]
Bit 3 - Schmitt Trigger Control
pub fn schmitt4(&self) -> SCHMITT4_R[src]
Bit 4 - Schmitt Trigger Control
pub fn schmitt5(&self) -> SCHMITT5_R[src]
Bit 5 - Schmitt Trigger Control
pub fn schmitt6(&self) -> SCHMITT6_R[src]
Bit 6 - Schmitt Trigger Control
pub fn schmitt7(&self) -> SCHMITT7_R[src]
Bit 7 - Schmitt Trigger Control
pub fn schmitt8(&self) -> SCHMITT8_R[src]
Bit 8 - Schmitt Trigger Control
pub fn schmitt9(&self) -> SCHMITT9_R[src]
Bit 9 - Schmitt Trigger Control
pub fn schmitt10(&self) -> SCHMITT10_R[src]
Bit 10 - Schmitt Trigger Control
pub fn schmitt11(&self) -> SCHMITT11_R[src]
Bit 11 - Schmitt Trigger Control
pub fn schmitt12(&self) -> SCHMITT12_R[src]
Bit 12 - Schmitt Trigger Control
pub fn schmitt13(&self) -> SCHMITT13_R[src]
Bit 13 - Schmitt Trigger Control
pub fn schmitt14(&self) -> SCHMITT14_R[src]
Bit 14 - Schmitt Trigger Control
pub fn schmitt15(&self) -> SCHMITT15_R[src]
Bit 15 - Schmitt Trigger Control
pub fn schmitt16(&self) -> SCHMITT16_R[src]
Bit 16 - Schmitt Trigger Control
pub fn schmitt17(&self) -> SCHMITT17_R[src]
Bit 17 - Schmitt Trigger Control
pub fn schmitt18(&self) -> SCHMITT18_R[src]
Bit 18 - Schmitt Trigger Control
pub fn schmitt19(&self) -> SCHMITT19_R[src]
Bit 19 - Schmitt Trigger Control
pub fn schmitt20(&self) -> SCHMITT20_R[src]
Bit 20 - Schmitt Trigger Control
pub fn schmitt21(&self) -> SCHMITT21_R[src]
Bit 21 - Schmitt Trigger Control
pub fn schmitt22(&self) -> SCHMITT22_R[src]
Bit 22 - Schmitt Trigger Control
pub fn schmitt23(&self) -> SCHMITT23_R[src]
Bit 23 - Schmitt Trigger Control
pub fn schmitt24(&self) -> SCHMITT24_R[src]
Bit 24 - Schmitt Trigger Control
pub fn schmitt25(&self) -> SCHMITT25_R[src]
Bit 25 - Schmitt Trigger Control
pub fn schmitt26(&self) -> SCHMITT26_R[src]
Bit 26 - Schmitt Trigger Control
pub fn schmitt27(&self) -> SCHMITT27_R[src]
Bit 27 - Schmitt Trigger Control
pub fn schmitt28(&self) -> SCHMITT28_R[src]
Bit 28 - Schmitt Trigger Control
pub fn schmitt29(&self) -> SCHMITT29_R[src]
Bit 29 - Schmitt Trigger Control
pub fn schmitt30(&self) -> SCHMITT30_R[src]
Bit 30 - Schmitt Trigger Control
pub fn schmitt31(&self) -> SCHMITT31_R[src]
Bit 31 - Schmitt Trigger Control
impl R<bool, LINE0_A>[src]
pub fn variant(&self) -> LINE0_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE1_A>[src]
pub fn variant(&self) -> LINE1_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE2_A>[src]
pub fn variant(&self) -> LINE2_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE3_A>[src]
pub fn variant(&self) -> LINE3_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE4_A>[src]
pub fn variant(&self) -> LINE4_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE5_A>[src]
pub fn variant(&self) -> LINE5_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE6_A>[src]
pub fn variant(&self) -> LINE6_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE7_A>[src]
pub fn variant(&self) -> LINE7_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE8_A>[src]
pub fn variant(&self) -> LINE8_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE9_A>[src]
pub fn variant(&self) -> LINE9_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE10_A>[src]
pub fn variant(&self) -> LINE10_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE11_A>[src]
pub fn variant(&self) -> LINE11_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE12_A>[src]
pub fn variant(&self) -> LINE12_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE13_A>[src]
pub fn variant(&self) -> LINE13_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE14_A>[src]
pub fn variant(&self) -> LINE14_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE15_A>[src]
pub fn variant(&self) -> LINE15_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE16_A>[src]
pub fn variant(&self) -> LINE16_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE17_A>[src]
pub fn variant(&self) -> LINE17_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE18_A>[src]
pub fn variant(&self) -> LINE18_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE19_A>[src]
pub fn variant(&self) -> LINE19_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE20_A>[src]
pub fn variant(&self) -> LINE20_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE21_A>[src]
pub fn variant(&self) -> LINE21_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE22_A>[src]
pub fn variant(&self) -> LINE22_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE23_A>[src]
pub fn variant(&self) -> LINE23_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE24_A>[src]
pub fn variant(&self) -> LINE24_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE25_A>[src]
pub fn variant(&self) -> LINE25_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE26_A>[src]
pub fn variant(&self) -> LINE26_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE27_A>[src]
pub fn variant(&self) -> LINE27_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE28_A>[src]
pub fn variant(&self) -> LINE28_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE29_A>[src]
pub fn variant(&self) -> LINE29_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE30_A>[src]
pub fn variant(&self) -> LINE30_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<bool, LINE31_A>[src]
pub fn variant(&self) -> LINE31_A[src]
Get enumerated values variant
pub fn is_low_drive(&self) -> bool[src]
Checks if the value of the field is LOW_DRIVE
pub fn is_high_drive(&self) -> bool[src]
Checks if the value of the field is HIGH_DRIVE
impl R<u32, Reg<u32, _PIO_DRIVER>>[src]
pub fn line0(&self) -> LINE0_R[src]
Bit 0 - Drive of PIO Line 0
pub fn line1(&self) -> LINE1_R[src]
Bit 1 - Drive of PIO Line 1
pub fn line2(&self) -> LINE2_R[src]
Bit 2 - Drive of PIO Line 2
pub fn line3(&self) -> LINE3_R[src]
Bit 3 - Drive of PIO Line 3
pub fn line4(&self) -> LINE4_R[src]
Bit 4 - Drive of PIO Line 4
pub fn line5(&self) -> LINE5_R[src]
Bit 5 - Drive of PIO Line 5
pub fn line6(&self) -> LINE6_R[src]
Bit 6 - Drive of PIO Line 6
pub fn line7(&self) -> LINE7_R[src]
Bit 7 - Drive of PIO Line 7
pub fn line8(&self) -> LINE8_R[src]
Bit 8 - Drive of PIO Line 8
pub fn line9(&self) -> LINE9_R[src]
Bit 9 - Drive of PIO Line 9
pub fn line10(&self) -> LINE10_R[src]
Bit 10 - Drive of PIO Line 10
pub fn line11(&self) -> LINE11_R[src]
Bit 11 - Drive of PIO Line 11
pub fn line12(&self) -> LINE12_R[src]
Bit 12 - Drive of PIO Line 12
pub fn line13(&self) -> LINE13_R[src]
Bit 13 - Drive of PIO Line 13
pub fn line14(&self) -> LINE14_R[src]
Bit 14 - Drive of PIO Line 14
pub fn line15(&self) -> LINE15_R[src]
Bit 15 - Drive of PIO Line 15
pub fn line16(&self) -> LINE16_R[src]
Bit 16 - Drive of PIO Line 16
pub fn line17(&self) -> LINE17_R[src]
Bit 17 - Drive of PIO Line 17
pub fn line18(&self) -> LINE18_R[src]
Bit 18 - Drive of PIO Line 18
pub fn line19(&self) -> LINE19_R[src]
Bit 19 - Drive of PIO Line 19
pub fn line20(&self) -> LINE20_R[src]
Bit 20 - Drive of PIO Line 20
pub fn line21(&self) -> LINE21_R[src]
Bit 21 - Drive of PIO Line 21
pub fn line22(&self) -> LINE22_R[src]
Bit 22 - Drive of PIO Line 22
pub fn line23(&self) -> LINE23_R[src]
Bit 23 - Drive of PIO Line 23
pub fn line24(&self) -> LINE24_R[src]
Bit 24 - Drive of PIO Line 24
pub fn line25(&self) -> LINE25_R[src]
Bit 25 - Drive of PIO Line 25
pub fn line26(&self) -> LINE26_R[src]
Bit 26 - Drive of PIO Line 26
pub fn line27(&self) -> LINE27_R[src]
Bit 27 - Drive of PIO Line 27
pub fn line28(&self) -> LINE28_R[src]
Bit 28 - Drive of PIO Line 28
pub fn line29(&self) -> LINE29_R[src]
Bit 29 - Drive of PIO Line 29
pub fn line30(&self) -> LINE30_R[src]
Bit 30 - Drive of PIO Line 30
pub fn line31(&self) -> LINE31_R[src]
Bit 31 - Drive of PIO Line 31
impl R<u8, DSIZE_A>[src]
pub fn variant(&self) -> Variant<u8, DSIZE_A>[src]
Get enumerated values variant
pub fn is_byte(&self) -> bool[src]
Checks if the value of the field is BYTE
pub fn is_halfword(&self) -> bool[src]
Checks if the value of the field is HALFWORD
pub fn is_word(&self) -> bool[src]
Checks if the value of the field is WORD
impl R<u32, Reg<u32, _PIO_PCMR>>[src]
pub fn pcen(&self) -> PCEN_R[src]
Bit 0 - Parallel Capture Mode Enable
pub fn dsize(&self) -> DSIZE_R[src]
Bits 4:5 - Parallel Capture Mode Data Size
pub fn alwys(&self) -> ALWYS_R[src]
Bit 9 - Parallel Capture Mode Always Sampling
pub fn halfs(&self) -> HALFS_R[src]
Bit 10 - Parallel Capture Mode Half Sampling
pub fn frsts(&self) -> FRSTS_R[src]
Bit 11 - Parallel Capture Mode First Sample
impl R<u32, Reg<u32, _PIO_PCIMR>>[src]
pub fn drdy(&self) -> DRDY_R[src]
Bit 0 - Parallel Capture Mode Data Ready Interrupt Mask
pub fn ovre(&self) -> OVRE_R[src]
Bit 1 - Parallel Capture Mode Overrun Error Interrupt Mask
pub fn endrx(&self) -> ENDRX_R[src]
Bit 2 - End of Reception Transfer Interrupt Mask
pub fn rxbuff(&self) -> RXBUFF_R[src]
Bit 3 - Reception Buffer Full Interrupt Mask
impl R<u32, Reg<u32, _PIO_PCISR>>[src]
pub fn drdy(&self) -> DRDY_R[src]
Bit 0 - Parallel Capture Mode Data Ready
pub fn ovre(&self) -> OVRE_R[src]
Bit 1 - Parallel Capture Mode Overrun Error
impl R<u32, Reg<u32, _PIO_PCRHR>>[src]
impl R<u32, Reg<u32, _PMC_SCSR>>[src]
pub fn hclks(&self) -> HCLKS_R[src]
Bit 0 - HCLK Status
pub fn usbclk(&self) -> USBCLK_R[src]
Bit 5 - USB FS Clock Status
pub fn pck0(&self) -> PCK0_R[src]
Bit 8 - Programmable Clock 0 Output Status
pub fn pck1(&self) -> PCK1_R[src]
Bit 9 - Programmable Clock 1 Output Status
pub fn pck2(&self) -> PCK2_R[src]
Bit 10 - Programmable Clock 2 Output Status
pub fn pck3(&self) -> PCK3_R[src]
Bit 11 - Programmable Clock 3 Output Status
pub fn pck4(&self) -> PCK4_R[src]
Bit 12 - Programmable Clock 4 Output Status
pub fn pck5(&self) -> PCK5_R[src]
Bit 13 - Programmable Clock 5 Output Status
pub fn pck6(&self) -> PCK6_R[src]
Bit 14 - Programmable Clock 6 Output Status
pub fn pck7(&self) -> PCK7_R[src]
Bit 15 - Programmable Clock 7 Output Status
impl R<u32, Reg<u32, _PMC_PCSR0>>[src]
pub fn pid7(&self) -> PID7_R[src]
Bit 7 - Peripheral Clock 7 Status
pub fn pid8(&self) -> PID8_R[src]
Bit 8 - Peripheral Clock 8 Status
pub fn pid10(&self) -> PID10_R[src]
Bit 10 - Peripheral Clock 10 Status
pub fn pid11(&self) -> PID11_R[src]
Bit 11 - Peripheral Clock 11 Status
pub fn pid13(&self) -> PID13_R[src]
Bit 13 - Peripheral Clock 13 Status
pub fn pid14(&self) -> PID14_R[src]
Bit 14 - Peripheral Clock 14 Status
pub fn pid16(&self) -> PID16_R[src]
Bit 16 - Peripheral Clock 16 Status
pub fn pid19(&self) -> PID19_R[src]
Bit 19 - Peripheral Clock 19 Status
pub fn pid20(&self) -> PID20_R[src]
Bit 20 - Peripheral Clock 20 Status
pub fn pid22(&self) -> PID22_R[src]
Bit 22 - Peripheral Clock 22 Status
pub fn pid23(&self) -> PID23_R[src]
Bit 23 - Peripheral Clock 23 Status
pub fn pid24(&self) -> PID24_R[src]
Bit 24 - Peripheral Clock 24 Status
pub fn pid25(&self) -> PID25_R[src]
Bit 25 - Peripheral Clock 25 Status
pub fn pid26(&self) -> PID26_R[src]
Bit 26 - Peripheral Clock 26 Status
pub fn pid27(&self) -> PID27_R[src]
Bit 27 - Peripheral Clock 27 Status
pub fn pid28(&self) -> PID28_R[src]
Bit 28 - Peripheral Clock 28 Status
pub fn pid29(&self) -> PID29_R[src]
Bit 29 - Peripheral Clock 29 Status
pub fn pid30(&self) -> PID30_R[src]
Bit 30 - Peripheral Clock 30 Status
pub fn pid31(&self) -> PID31_R[src]
Bit 31 - Peripheral Clock 31 Status
impl R<u32, Reg<u32, _CKGR_UCKR>>[src]
pub fn upllen(&self) -> UPLLEN_R[src]
Bit 16 - UTMI PLL Enable
pub fn upllcount(&self) -> UPLLCOUNT_R[src]
Bits 20:23 - UTMI PLL Start-up Time
impl R<u8, MOSCRCF_A>[src]
pub fn variant(&self) -> Variant<u8, MOSCRCF_A>[src]
Get enumerated values variant
pub fn is_4_mhz(&self) -> bool[src]
Checks if the value of the field is _4_MHZ
pub fn is_8_mhz(&self) -> bool[src]
Checks if the value of the field is _8_MHZ
pub fn is_12_mhz(&self) -> bool[src]
Checks if the value of the field is _12_MHZ
impl R<u8, KEY_A>[src]
pub fn variant(&self) -> Variant<u8, KEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _CKGR_MOR>>[src]
pub fn moscxten(&self) -> MOSCXTEN_R[src]
Bit 0 - Main Crystal Oscillator Enable
pub fn moscxtby(&self) -> MOSCXTBY_R[src]
Bit 1 - Main Crystal Oscillator Bypass
pub fn waitmode(&self) -> WAITMODE_R[src]
Bit 2 - Wait Mode Command (Write-only)
pub fn moscrcen(&self) -> MOSCRCEN_R[src]
Bit 3 - Main RC Oscillator Enable
pub fn moscrcf(&self) -> MOSCRCF_R[src]
Bits 4:6 - Main RC Oscillator Frequency Selection
pub fn moscxtst(&self) -> MOSCXTST_R[src]
Bits 8:15 - Main Crystal Oscillator Startup Time
pub fn key(&self) -> KEY_R[src]
Bits 16:23 - Write Access Password
pub fn moscsel(&self) -> MOSCSEL_R[src]
Bit 24 - Main Clock Oscillator Selection
pub fn cfden(&self) -> CFDEN_R[src]
Bit 25 - Clock Failure Detector Enable
pub fn xt32kfme(&self) -> XT32KFME_R[src]
Bit 26 - 32.768 kHz Crystal Oscillator Frequency Monitoring Enable
impl R<u32, Reg<u32, _CKGR_MCFR>>[src]
pub fn mainf(&self) -> MAINF_R[src]
Bits 0:15 - Main Clock Frequency
pub fn mainfrdy(&self) -> MAINFRDY_R[src]
Bit 16 - Main Clock Frequency Measure Ready
pub fn rcmeas(&self) -> RCMEAS_R[src]
Bit 20 - RC Oscillator Frequency Measure (write-only)
pub fn ccss(&self) -> CCSS_R[src]
Bit 24 - Counter Clock Source Selection
impl R<u8, DIVA_A>[src]
pub fn variant(&self) -> Variant<u8, DIVA_A>[src]
Get enumerated values variant
pub fn is_0(&self) -> bool[src]
Checks if the value of the field is _0
pub fn is_bypass(&self) -> bool[src]
Checks if the value of the field is BYPASS
impl R<u32, Reg<u32, _CKGR_PLLAR>>[src]
pub fn diva(&self) -> DIVA_R[src]
Bits 0:7 - PLLA Front End Divider
pub fn pllacount(&self) -> PLLACOUNT_R[src]
Bits 8:13 - PLLA Counter
pub fn mula(&self) -> MULA_R[src]
Bits 16:26 - PLLA Multiplier
pub fn one(&self) -> ONE_R[src]
Bit 29 - Must Be Set to 1
impl R<u8, CSS_A>[src]
pub fn variant(&self) -> CSS_A[src]
Get enumerated values variant
pub fn is_slow_clk(&self) -> bool[src]
Checks if the value of the field is SLOW_CLK
pub fn is_main_clk(&self) -> bool[src]
Checks if the value of the field is MAIN_CLK
pub fn is_plla_clk(&self) -> bool[src]
Checks if the value of the field is PLLA_CLK
pub fn is_upll_clk(&self) -> bool[src]
Checks if the value of the field is UPLL_CLK
impl R<u8, PRES_A>[src]
pub fn variant(&self) -> PRES_A[src]
Get enumerated values variant
pub fn is_clk_1(&self) -> bool[src]
Checks if the value of the field is CLK_1
pub fn is_clk_2(&self) -> bool[src]
Checks if the value of the field is CLK_2
pub fn is_clk_4(&self) -> bool[src]
Checks if the value of the field is CLK_4
pub fn is_clk_8(&self) -> bool[src]
Checks if the value of the field is CLK_8
pub fn is_clk_16(&self) -> bool[src]
Checks if the value of the field is CLK_16
pub fn is_clk_32(&self) -> bool[src]
Checks if the value of the field is CLK_32
pub fn is_clk_64(&self) -> bool[src]
Checks if the value of the field is CLK_64
pub fn is_clk_3(&self) -> bool[src]
Checks if the value of the field is CLK_3
impl R<u8, MDIV_A>[src]
pub fn variant(&self) -> MDIV_A[src]
Get enumerated values variant
pub fn is_eq_pck(&self) -> bool[src]
Checks if the value of the field is EQ_PCK
pub fn is_pck_div2(&self) -> bool[src]
Checks if the value of the field is PCK_DIV2
pub fn is_pck_div4(&self) -> bool[src]
Checks if the value of the field is PCK_DIV4
pub fn is_pck_div3(&self) -> bool[src]
Checks if the value of the field is PCK_DIV3
impl R<u32, Reg<u32, _PMC_MCKR>>[src]
pub fn css(&self) -> CSS_R[src]
Bits 0:1 - Master Clock Source Selection
pub fn pres(&self) -> PRES_R[src]
Bits 4:6 - Processor Clock Prescaler
pub fn mdiv(&self) -> MDIV_R[src]
Bits 8:9 - Master Clock Division
pub fn uplldiv2(&self) -> UPLLDIV2_R[src]
Bit 13 - UPLL Divider by 2
impl R<u32, Reg<u32, _PMC_USB>>[src]
pub fn usbs(&self) -> USBS_R[src]
Bit 0 - USB Input Clock Selection
pub fn usbdiv(&self) -> USBDIV_R[src]
Bits 8:11 - Divider for USB_48M
impl R<u8, CSS_A>[src]
pub fn variant(&self) -> Variant<u8, CSS_A>[src]
Get enumerated values variant
pub fn is_slow_clk(&self) -> bool[src]
Checks if the value of the field is SLOW_CLK
pub fn is_main_clk(&self) -> bool[src]
Checks if the value of the field is MAIN_CLK
pub fn is_plla_clk(&self) -> bool[src]
Checks if the value of the field is PLLA_CLK
pub fn is_upll_clk(&self) -> bool[src]
Checks if the value of the field is UPLL_CLK
pub fn is_mck(&self) -> bool[src]
Checks if the value of the field is MCK
impl R<u32, Reg<u32, _PMC_PCK>>[src]
pub fn css(&self) -> CSS_R[src]
Bits 0:2 - Programmable Clock Source Selection
pub fn pres(&self) -> PRES_R[src]
Bits 4:11 - Programmable Clock Prescaler
impl R<u32, Reg<u32, _PMC_SR>>[src]
pub fn moscxts(&self) -> MOSCXTS_R[src]
Bit 0 - Main Crystal Oscillator Status
pub fn locka(&self) -> LOCKA_R[src]
Bit 1 - PLLA Lock Status
pub fn mckrdy(&self) -> MCKRDY_R[src]
Bit 3 - Master Clock Status
pub fn locku(&self) -> LOCKU_R[src]
Bit 6 - UTMI PLL Lock Status
pub fn oscsels(&self) -> OSCSELS_R[src]
Bit 7 - Slow Clock Source Oscillator Selection
pub fn pckrdy0(&self) -> PCKRDY0_R[src]
Bit 8 - Programmable Clock Ready 0 Status
pub fn pckrdy1(&self) -> PCKRDY1_R[src]
Bit 9 - Programmable Clock Ready 1 Status
pub fn pckrdy2(&self) -> PCKRDY2_R[src]
Bit 10 - Programmable Clock Ready 2 Status
pub fn pckrdy3(&self) -> PCKRDY3_R[src]
Bit 11 - Programmable Clock Ready 3 Status
pub fn pckrdy4(&self) -> PCKRDY4_R[src]
Bit 12 - Programmable Clock Ready 4 Status
pub fn pckrdy5(&self) -> PCKRDY5_R[src]
Bit 13 - Programmable Clock Ready 5 Status
pub fn pckrdy6(&self) -> PCKRDY6_R[src]
Bit 14 - Programmable Clock Ready 6 Status
pub fn pckrdy7(&self) -> PCKRDY7_R[src]
Bit 15 - Programmable Clock Ready 7 Status
pub fn moscsels(&self) -> MOSCSELS_R[src]
Bit 16 - Main Clock Source Oscillator Selection Status
pub fn moscrcs(&self) -> MOSCRCS_R[src]
Bit 17 - Main RC Oscillator Status
pub fn cfdev(&self) -> CFDEV_R[src]
Bit 18 - Clock Failure Detector Event
pub fn cfds(&self) -> CFDS_R[src]
Bit 19 - Clock Failure Detector Status
pub fn fos(&self) -> FOS_R[src]
Bit 20 - Clock Failure Detector Fault Output Status
pub fn xt32kerr(&self) -> XT32KERR_R[src]
Bit 21 - Slow Crystal Oscillator Error
impl R<u32, Reg<u32, _PMC_IMR>>[src]
pub fn moscxts(&self) -> MOSCXTS_R[src]
Bit 0 - Main Crystal Oscillator Status Interrupt Mask
pub fn locka(&self) -> LOCKA_R[src]
Bit 1 - PLLA Lock Interrupt Mask
pub fn mckrdy(&self) -> MCKRDY_R[src]
Bit 3 - Master Clock Ready Interrupt Mask
pub fn locku(&self) -> LOCKU_R[src]
Bit 6 - UTMI PLL Lock Interrupt Mask
pub fn pckrdy0(&self) -> PCKRDY0_R[src]
Bit 8 - Programmable Clock Ready 0 Interrupt Mask
pub fn pckrdy1(&self) -> PCKRDY1_R[src]
Bit 9 - Programmable Clock Ready 1 Interrupt Mask
pub fn pckrdy2(&self) -> PCKRDY2_R[src]
Bit 10 - Programmable Clock Ready 2 Interrupt Mask
pub fn pckrdy3(&self) -> PCKRDY3_R[src]
Bit 11 - Programmable Clock Ready 3 Interrupt Mask
pub fn pckrdy4(&self) -> PCKRDY4_R[src]
Bit 12 - Programmable Clock Ready 4 Interrupt Mask
pub fn pckrdy5(&self) -> PCKRDY5_R[src]
Bit 13 - Programmable Clock Ready 5 Interrupt Mask
pub fn pckrdy6(&self) -> PCKRDY6_R[src]
Bit 14 - Programmable Clock Ready 6 Interrupt Mask
pub fn pckrdy7(&self) -> PCKRDY7_R[src]
Bit 15 - Programmable Clock Ready 7 Interrupt Mask
pub fn moscsels(&self) -> MOSCSELS_R[src]
Bit 16 - Main Clock Source Oscillator Selection Status Interrupt Mask
pub fn moscrcs(&self) -> MOSCRCS_R[src]
Bit 17 - Main RC Status Interrupt Mask
pub fn cfdev(&self) -> CFDEV_R[src]
Bit 18 - Clock Failure Detector Event Interrupt Mask
pub fn xt32kerr(&self) -> XT32KERR_R[src]
Bit 21 - 32.768 kHz Crystal Oscillator Error Interrupt Mask
impl R<u8, FLPM_A>[src]
pub fn variant(&self) -> Variant<u8, FLPM_A>[src]
Get enumerated values variant
pub fn is_flash_standby(&self) -> bool[src]
Checks if the value of the field is FLASH_STANDBY
pub fn is_flash_deep_powerdown(&self) -> bool[src]
Checks if the value of the field is FLASH_DEEP_POWERDOWN
pub fn is_flash_idle(&self) -> bool[src]
Checks if the value of the field is FLASH_IDLE
impl R<u32, Reg<u32, _PMC_FSMR>>[src]
pub fn fstt0(&self) -> FSTT0_R[src]
Bit 0 - Fast Startup Input Enable 0
pub fn fstt1(&self) -> FSTT1_R[src]
Bit 1 - Fast Startup Input Enable 1
pub fn fstt2(&self) -> FSTT2_R[src]
Bit 2 - Fast Startup Input Enable 2
pub fn fstt3(&self) -> FSTT3_R[src]
Bit 3 - Fast Startup Input Enable 3
pub fn fstt4(&self) -> FSTT4_R[src]
Bit 4 - Fast Startup Input Enable 4
pub fn fstt5(&self) -> FSTT5_R[src]
Bit 5 - Fast Startup Input Enable 5
pub fn fstt6(&self) -> FSTT6_R[src]
Bit 6 - Fast Startup Input Enable 6
pub fn fstt7(&self) -> FSTT7_R[src]
Bit 7 - Fast Startup Input Enable 7
pub fn fstt8(&self) -> FSTT8_R[src]
Bit 8 - Fast Startup Input Enable 8
pub fn fstt9(&self) -> FSTT9_R[src]
Bit 9 - Fast Startup Input Enable 9
pub fn fstt10(&self) -> FSTT10_R[src]
Bit 10 - Fast Startup Input Enable 10
pub fn fstt11(&self) -> FSTT11_R[src]
Bit 11 - Fast Startup Input Enable 11
pub fn fstt12(&self) -> FSTT12_R[src]
Bit 12 - Fast Startup Input Enable 12
pub fn fstt13(&self) -> FSTT13_R[src]
Bit 13 - Fast Startup Input Enable 13
pub fn fstt14(&self) -> FSTT14_R[src]
Bit 14 - Fast Startup Input Enable 14
pub fn fstt15(&self) -> FSTT15_R[src]
Bit 15 - Fast Startup Input Enable 15
pub fn rttal(&self) -> RTTAL_R[src]
Bit 16 - RTT Alarm Enable
pub fn rtcal(&self) -> RTCAL_R[src]
Bit 17 - RTC Alarm Enable
pub fn usbal(&self) -> USBAL_R[src]
Bit 18 - USB Alarm Enable
pub fn lpm(&self) -> LPM_R[src]
Bit 20 - Low-power Mode
pub fn flpm(&self) -> FLPM_R[src]
Bits 21:22 - Flash Low-power Mode
pub fn fflpm(&self) -> FFLPM_R[src]
Bit 23 - Force Flash Low-power Mode
impl R<u32, Reg<u32, _PMC_FSPR>>[src]
pub fn fstp0(&self) -> FSTP0_R[src]
Bit 0 - Fast Startup Input Polarity 0
pub fn fstp1(&self) -> FSTP1_R[src]
Bit 1 - Fast Startup Input Polarity 1
pub fn fstp2(&self) -> FSTP2_R[src]
Bit 2 - Fast Startup Input Polarity 2
pub fn fstp3(&self) -> FSTP3_R[src]
Bit 3 - Fast Startup Input Polarity 3
pub fn fstp4(&self) -> FSTP4_R[src]
Bit 4 - Fast Startup Input Polarity 4
pub fn fstp5(&self) -> FSTP5_R[src]
Bit 5 - Fast Startup Input Polarity 5
pub fn fstp6(&self) -> FSTP6_R[src]
Bit 6 - Fast Startup Input Polarity 6
pub fn fstp7(&self) -> FSTP7_R[src]
Bit 7 - Fast Startup Input Polarity 7
pub fn fstp8(&self) -> FSTP8_R[src]
Bit 8 - Fast Startup Input Polarity 8
pub fn fstp9(&self) -> FSTP9_R[src]
Bit 9 - Fast Startup Input Polarity 9
pub fn fstp10(&self) -> FSTP10_R[src]
Bit 10 - Fast Startup Input Polarity 10
pub fn fstp11(&self) -> FSTP11_R[src]
Bit 11 - Fast Startup Input Polarity 11
pub fn fstp12(&self) -> FSTP12_R[src]
Bit 12 - Fast Startup Input Polarity 12
pub fn fstp13(&self) -> FSTP13_R[src]
Bit 13 - Fast Startup Input Polarity 13
pub fn fstp14(&self) -> FSTP14_R[src]
Bit 14 - Fast Startup Input Polarity 14
pub fn fstp15(&self) -> FSTP15_R[src]
Bit 15 - Fast Startup Input Polarity 15
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _PMC_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key
impl R<u32, Reg<u32, _PMC_WPSR>>[src]
pub fn wpvs(&self) -> WPVS_R[src]
Bit 0 - Write Protection Violation Status
pub fn wpvsrc(&self) -> WPVSRC_R[src]
Bits 8:23 - Write Protection Violation Source
impl R<u32, Reg<u32, _PMC_PCSR1>>[src]
pub fn pid32(&self) -> PID32_R[src]
Bit 0 - Peripheral Clock 32 Status
pub fn pid33(&self) -> PID33_R[src]
Bit 1 - Peripheral Clock 33 Status
pub fn pid34(&self) -> PID34_R[src]
Bit 2 - Peripheral Clock 34 Status
pub fn pid35(&self) -> PID35_R[src]
Bit 3 - Peripheral Clock 35 Status
pub fn pid39(&self) -> PID39_R[src]
Bit 7 - Peripheral Clock 39 Status
pub fn pid40(&self) -> PID40_R[src]
Bit 8 - Peripheral Clock 40 Status
pub fn pid43(&self) -> PID43_R[src]
Bit 11 - Peripheral Clock 43 Status
pub fn pid44(&self) -> PID44_R[src]
Bit 12 - Peripheral Clock 44 Status
pub fn pid45(&self) -> PID45_R[src]
Bit 13 - Peripheral Clock 45 Status
pub fn pid46(&self) -> PID46_R[src]
Bit 14 - Peripheral Clock 46 Status
pub fn pid47(&self) -> PID47_R[src]
Bit 15 - Peripheral Clock 47 Status
pub fn pid48(&self) -> PID48_R[src]
Bit 16 - Peripheral Clock 48 Status
pub fn pid49(&self) -> PID49_R[src]
Bit 17 - Peripheral Clock 49 Status
pub fn pid50(&self) -> PID50_R[src]
Bit 18 - Peripheral Clock 50 Status
pub fn pid51(&self) -> PID51_R[src]
Bit 19 - Peripheral Clock 51 Status
pub fn pid52(&self) -> PID52_R[src]
Bit 20 - Peripheral Clock 52 Status
pub fn pid56(&self) -> PID56_R[src]
Bit 24 - Peripheral Clock 56 Status
pub fn pid57(&self) -> PID57_R[src]
Bit 25 - Peripheral Clock 57 Status
pub fn pid58(&self) -> PID58_R[src]
Bit 26 - Peripheral Clock 58 Status
pub fn pid59(&self) -> PID59_R[src]
Bit 27 - Peripheral Clock 59 Status
pub fn pid60(&self) -> PID60_R[src]
Bit 28 - Peripheral Clock 60 Status
impl R<u8, GCLKCSS_A>[src]
pub fn variant(&self) -> Variant<u8, GCLKCSS_A>[src]
Get enumerated values variant
pub fn is_slow_clk(&self) -> bool[src]
Checks if the value of the field is SLOW_CLK
pub fn is_main_clk(&self) -> bool[src]
Checks if the value of the field is MAIN_CLK
pub fn is_plla_clk(&self) -> bool[src]
Checks if the value of the field is PLLA_CLK
pub fn is_upll_clk(&self) -> bool[src]
Checks if the value of the field is UPLL_CLK
pub fn is_mck_clk(&self) -> bool[src]
Checks if the value of the field is MCK_CLK
impl R<u32, Reg<u32, _PMC_PCR>>[src]
pub fn pid(&self) -> PID_R[src]
Bits 0:6 - Peripheral ID
pub fn gclkcss(&self) -> GCLKCSS_R[src]
Bits 8:10 - Generic Clock Source Selection
pub fn cmd(&self) -> CMD_R[src]
Bit 12 - Command
pub fn gclkdiv(&self) -> GCLKDIV_R[src]
Bits 20:27 - Generic Clock Division Ratio
pub fn en(&self) -> EN_R[src]
Bit 28 - Enable
pub fn gclken(&self) -> GCLKEN_R[src]
Bit 29 - Generic Clock Enable
impl R<u32, Reg<u32, _PMC_OCR>>[src]
pub fn cal4(&self) -> CAL4_R[src]
Bits 0:6 - Main RC Oscillator Calibration Bits for 4 MHz
pub fn sel4(&self) -> SEL4_R[src]
Bit 7 - Selection of Main RC Oscillator Calibration Bits for 4 MHz
pub fn cal8(&self) -> CAL8_R[src]
Bits 8:14 - Main RC Oscillator Calibration Bits for 8 MHz
pub fn sel8(&self) -> SEL8_R[src]
Bit 15 - Selection of Main RC Oscillator Calibration Bits for 8 MHz
pub fn cal12(&self) -> CAL12_R[src]
Bits 16:22 - Main RC Oscillator Calibration Bits for 12 MHz
pub fn sel12(&self) -> SEL12_R[src]
Bit 23 - Selection of Main RC Oscillator Calibration Bits for 12 MHz
impl R<u32, Reg<u32, _PMC_SLPWK_SR0>>[src]
pub fn pid7(&self) -> PID7_R[src]
Bit 7 - Peripheral 7 SleepWalking Status
pub fn pid8(&self) -> PID8_R[src]
Bit 8 - Peripheral 8 SleepWalking Status
pub fn pid10(&self) -> PID10_R[src]
Bit 10 - Peripheral 10 SleepWalking Status
pub fn pid11(&self) -> PID11_R[src]
Bit 11 - Peripheral 11 SleepWalking Status
pub fn pid13(&self) -> PID13_R[src]
Bit 13 - Peripheral 13 SleepWalking Status
pub fn pid14(&self) -> PID14_R[src]
Bit 14 - Peripheral 14 SleepWalking Status
pub fn pid16(&self) -> PID16_R[src]
Bit 16 - Peripheral 16 SleepWalking Status
pub fn pid19(&self) -> PID19_R[src]
Bit 19 - Peripheral 19 SleepWalking Status
pub fn pid20(&self) -> PID20_R[src]
Bit 20 - Peripheral 20 SleepWalking Status
pub fn pid22(&self) -> PID22_R[src]
Bit 22 - Peripheral 22 SleepWalking Status
pub fn pid23(&self) -> PID23_R[src]
Bit 23 - Peripheral 23 SleepWalking Status
pub fn pid24(&self) -> PID24_R[src]
Bit 24 - Peripheral 24 SleepWalking Status
pub fn pid25(&self) -> PID25_R[src]
Bit 25 - Peripheral 25 SleepWalking Status
pub fn pid26(&self) -> PID26_R[src]
Bit 26 - Peripheral 26 SleepWalking Status
pub fn pid27(&self) -> PID27_R[src]
Bit 27 - Peripheral 27 SleepWalking Status
pub fn pid28(&self) -> PID28_R[src]
Bit 28 - Peripheral 28 SleepWalking Status
pub fn pid29(&self) -> PID29_R[src]
Bit 29 - Peripheral 29 SleepWalking Status
pub fn pid30(&self) -> PID30_R[src]
Bit 30 - Peripheral 30 SleepWalking Status
pub fn pid31(&self) -> PID31_R[src]
Bit 31 - Peripheral 31 SleepWalking Status
impl R<u32, Reg<u32, _PMC_SLPWK_ASR0>>[src]
pub fn pid7(&self) -> PID7_R[src]
Bit 7 - Peripheral 7 Activity Status
pub fn pid8(&self) -> PID8_R[src]
Bit 8 - Peripheral 8 Activity Status
pub fn pid10(&self) -> PID10_R[src]
Bit 10 - Peripheral 10 Activity Status
pub fn pid11(&self) -> PID11_R[src]
Bit 11 - Peripheral 11 Activity Status
pub fn pid13(&self) -> PID13_R[src]
Bit 13 - Peripheral 13 Activity Status
pub fn pid14(&self) -> PID14_R[src]
Bit 14 - Peripheral 14 Activity Status
pub fn pid16(&self) -> PID16_R[src]
Bit 16 - Peripheral 16 Activity Status
pub fn pid19(&self) -> PID19_R[src]
Bit 19 - Peripheral 19 Activity Status
pub fn pid20(&self) -> PID20_R[src]
Bit 20 - Peripheral 20 Activity Status
pub fn pid22(&self) -> PID22_R[src]
Bit 22 - Peripheral 22 Activity Status
pub fn pid23(&self) -> PID23_R[src]
Bit 23 - Peripheral 23 Activity Status
pub fn pid24(&self) -> PID24_R[src]
Bit 24 - Peripheral 24 Activity Status
pub fn pid25(&self) -> PID25_R[src]
Bit 25 - Peripheral 25 Activity Status
pub fn pid26(&self) -> PID26_R[src]
Bit 26 - Peripheral 26 Activity Status
pub fn pid27(&self) -> PID27_R[src]
Bit 27 - Peripheral 27 Activity Status
pub fn pid28(&self) -> PID28_R[src]
Bit 28 - Peripheral 28 Activity Status
pub fn pid29(&self) -> PID29_R[src]
Bit 29 - Peripheral 29 Activity Status
pub fn pid30(&self) -> PID30_R[src]
Bit 30 - Peripheral 30 Activity Status
pub fn pid31(&self) -> PID31_R[src]
Bit 31 - Peripheral 31 Activity Status
impl R<u32, Reg<u32, _PMC_PMMR>>[src]
pub fn plla_mmax(&self) -> PLLA_MMAX_R[src]
Bits 0:10 - PLLA Maximum Allowed Multiplier Value
impl R<u32, Reg<u32, _PMC_SLPWK_SR1>>[src]
pub fn pid32(&self) -> PID32_R[src]
Bit 0 - Peripheral 32 SleepWalking Status
pub fn pid33(&self) -> PID33_R[src]
Bit 1 - Peripheral 33 SleepWalking Status
pub fn pid34(&self) -> PID34_R[src]
Bit 2 - Peripheral 34 SleepWalking Status
pub fn pid35(&self) -> PID35_R[src]
Bit 3 - Peripheral 35 SleepWalking Status
pub fn pid39(&self) -> PID39_R[src]
Bit 7 - Peripheral 39 SleepWalking Status
pub fn pid40(&self) -> PID40_R[src]
Bit 8 - Peripheral 40 SleepWalking Status
pub fn pid43(&self) -> PID43_R[src]
Bit 11 - Peripheral 43 SleepWalking Status
pub fn pid44(&self) -> PID44_R[src]
Bit 12 - Peripheral 44 SleepWalking Status
pub fn pid45(&self) -> PID45_R[src]
Bit 13 - Peripheral 45 SleepWalking Status
pub fn pid46(&self) -> PID46_R[src]
Bit 14 - Peripheral 46 SleepWalking Status
pub fn pid47(&self) -> PID47_R[src]
Bit 15 - Peripheral 47 SleepWalking Status
pub fn pid48(&self) -> PID48_R[src]
Bit 16 - Peripheral 48 SleepWalking Status
pub fn pid49(&self) -> PID49_R[src]
Bit 17 - Peripheral 49 SleepWalking Status
pub fn pid50(&self) -> PID50_R[src]
Bit 18 - Peripheral 50 SleepWalking Status
pub fn pid51(&self) -> PID51_R[src]
Bit 19 - Peripheral 51 SleepWalking Status
pub fn pid52(&self) -> PID52_R[src]
Bit 20 - Peripheral 52 SleepWalking Status
pub fn pid56(&self) -> PID56_R[src]
Bit 24 - Peripheral 56 SleepWalking Status
pub fn pid57(&self) -> PID57_R[src]
Bit 25 - Peripheral 57 SleepWalking Status
pub fn pid58(&self) -> PID58_R[src]
Bit 26 - Peripheral 58 SleepWalking Status
pub fn pid59(&self) -> PID59_R[src]
Bit 27 - Peripheral 59 SleepWalking Status
pub fn pid60(&self) -> PID60_R[src]
Bit 28 - Peripheral 60 SleepWalking Status
impl R<u32, Reg<u32, _PMC_SLPWK_ASR1>>[src]
pub fn pid32(&self) -> PID32_R[src]
Bit 0 - Peripheral 32 Activity Status
pub fn pid33(&self) -> PID33_R[src]
Bit 1 - Peripheral 33 Activity Status
pub fn pid34(&self) -> PID34_R[src]
Bit 2 - Peripheral 34 Activity Status
pub fn pid35(&self) -> PID35_R[src]
Bit 3 - Peripheral 35 Activity Status
pub fn pid39(&self) -> PID39_R[src]
Bit 7 - Peripheral 39 Activity Status
pub fn pid40(&self) -> PID40_R[src]
Bit 8 - Peripheral 40 Activity Status
pub fn pid43(&self) -> PID43_R[src]
Bit 11 - Peripheral 43 Activity Status
pub fn pid44(&self) -> PID44_R[src]
Bit 12 - Peripheral 44 Activity Status
pub fn pid45(&self) -> PID45_R[src]
Bit 13 - Peripheral 45 Activity Status
pub fn pid46(&self) -> PID46_R[src]
Bit 14 - Peripheral 46 Activity Status
pub fn pid47(&self) -> PID47_R[src]
Bit 15 - Peripheral 47 Activity Status
pub fn pid48(&self) -> PID48_R[src]
Bit 16 - Peripheral 48 Activity Status
pub fn pid49(&self) -> PID49_R[src]
Bit 17 - Peripheral 49 Activity Status
pub fn pid50(&self) -> PID50_R[src]
Bit 18 - Peripheral 50 Activity Status
pub fn pid51(&self) -> PID51_R[src]
Bit 19 - Peripheral 51 Activity Status
pub fn pid52(&self) -> PID52_R[src]
Bit 20 - Peripheral 52 Activity Status
pub fn pid56(&self) -> PID56_R[src]
Bit 24 - Peripheral 56 Activity Status
pub fn pid57(&self) -> PID57_R[src]
Bit 25 - Peripheral 57 Activity Status
pub fn pid58(&self) -> PID58_R[src]
Bit 26 - Peripheral 58 Activity Status
pub fn pid59(&self) -> PID59_R[src]
Bit 27 - Peripheral 59 Activity Status
pub fn pid60(&self) -> PID60_R[src]
Bit 28 - Peripheral 60 Activity Status
impl R<u32, Reg<u32, _PMC_SLPWK_AIPR>>[src]
impl R<bool, CVM_A>[src]
pub fn variant(&self) -> CVM_A[src]
Get enumerated values variant
pub fn is_compare_at_increment(&self) -> bool[src]
Checks if the value of the field is COMPARE_AT_INCREMENT
pub fn is_compare_at_decrement(&self) -> bool[src]
Checks if the value of the field is COMPARE_AT_DECREMENT
impl R<u32, Reg<u32, _PWM_CMPV>>[src]
pub fn cv(&self) -> CV_R[src]
Bits 0:23 - Comparison x Value
pub fn cvm(&self) -> CVM_R[src]
Bit 24 - Comparison x Value Mode
impl R<u32, Reg<u32, _PWM_CMPM>>[src]
pub fn cen(&self) -> CEN_R[src]
Bit 0 - Comparison x Enable
pub fn ctr(&self) -> CTR_R[src]
Bits 4:7 - Comparison x Trigger
pub fn cpr(&self) -> CPR_R[src]
Bits 8:11 - Comparison x Period
pub fn cprcnt(&self) -> CPRCNT_R[src]
Bits 12:15 - Comparison x Period Counter
pub fn cupr(&self) -> CUPR_R[src]
Bits 16:19 - Comparison x Update Period
pub fn cuprcnt(&self) -> CUPRCNT_R[src]
Bits 20:23 - Comparison x Update Period Counter
impl R<u8, CPRE_A>[src]
pub fn variant(&self) -> Variant<u8, CPRE_A>[src]
Get enumerated values variant
pub fn is_mck(&self) -> bool[src]
Checks if the value of the field is MCK
pub fn is_mck_div_2(&self) -> bool[src]
Checks if the value of the field is MCK_DIV_2
pub fn is_mck_div_4(&self) -> bool[src]
Checks if the value of the field is MCK_DIV_4
pub fn is_mck_div_8(&self) -> bool[src]
Checks if the value of the field is MCK_DIV_8
pub fn is_mck_div_16(&self) -> bool[src]
Checks if the value of the field is MCK_DIV_16
pub fn is_mck_div_32(&self) -> bool[src]
Checks if the value of the field is MCK_DIV_32
pub fn is_mck_div_64(&self) -> bool[src]
Checks if the value of the field is MCK_DIV_64
pub fn is_mck_div_128(&self) -> bool[src]
Checks if the value of the field is MCK_DIV_128
pub fn is_mck_div_256(&self) -> bool[src]
Checks if the value of the field is MCK_DIV_256
pub fn is_mck_div_512(&self) -> bool[src]
Checks if the value of the field is MCK_DIV_512
pub fn is_mck_div_1024(&self) -> bool[src]
Checks if the value of the field is MCK_DIV_1024
pub fn is_clka(&self) -> bool[src]
Checks if the value of the field is CLKA
pub fn is_clkb(&self) -> bool[src]
Checks if the value of the field is CLKB
impl R<bool, CALG_A>[src]
pub fn variant(&self) -> CALG_A[src]
Get enumerated values variant
pub fn is_left_aligned(&self) -> bool[src]
Checks if the value of the field is LEFT_ALIGNED
pub fn is_center_aligned(&self) -> bool[src]
Checks if the value of the field is CENTER_ALIGNED
impl R<bool, CPOL_A>[src]
pub fn variant(&self) -> CPOL_A[src]
Get enumerated values variant
pub fn is_low_polarity(&self) -> bool[src]
Checks if the value of the field is LOW_POLARITY
pub fn is_high_polarity(&self) -> bool[src]
Checks if the value of the field is HIGH_POLARITY
impl R<bool, CES_A>[src]
pub fn variant(&self) -> CES_A[src]
Get enumerated values variant
pub fn is_single_event(&self) -> bool[src]
Checks if the value of the field is SINGLE_EVENT
pub fn is_double_event(&self) -> bool[src]
Checks if the value of the field is DOUBLE_EVENT
impl R<bool, UPDS_A>[src]
pub fn variant(&self) -> UPDS_A[src]
Get enumerated values variant
pub fn is_update_at_period(&self) -> bool[src]
Checks if the value of the field is UPDATE_AT_PERIOD
pub fn is_update_at_half_period(&self) -> bool[src]
Checks if the value of the field is UPDATE_AT_HALF_PERIOD
impl R<u32, Reg<u32, _PWM_CMR>>[src]
pub fn cpre(&self) -> CPRE_R[src]
Bits 0:3 - Channel Pre-scaler
pub fn calg(&self) -> CALG_R[src]
Bit 8 - Channel Alignment
pub fn cpol(&self) -> CPOL_R[src]
Bit 9 - Channel Polarity
pub fn ces(&self) -> CES_R[src]
Bit 10 - Counter Event Selection
pub fn upds(&self) -> UPDS_R[src]
Bit 11 - Update Selection
pub fn dpoli(&self) -> DPOLI_R[src]
Bit 12 - Disabled Polarity Inverted
pub fn tcts(&self) -> TCTS_R[src]
Bit 13 - Timer Counter Trigger Selection
pub fn dte(&self) -> DTE_R[src]
Bit 16 - Dead-Time Generator Enable
pub fn dthi(&self) -> DTHI_R[src]
Bit 17 - Dead-Time PWMHx Output Inverted
pub fn dtli(&self) -> DTLI_R[src]
Bit 18 - Dead-Time PWMLx Output Inverted
pub fn ppm(&self) -> PPM_R[src]
Bit 19 - Push-Pull Mode
impl R<u32, Reg<u32, _PWM_CDTY>>[src]
impl R<u32, Reg<u32, _PWM_CPRD>>[src]
impl R<u32, Reg<u32, _PWM_CCNT>>[src]
impl R<u32, Reg<u32, _PWM_DT>>[src]
pub fn dth(&self) -> DTH_R[src]
Bits 0:15 - Dead-Time Value for PWMHx Output
pub fn dtl(&self) -> DTL_R[src]
Bits 16:31 - Dead-Time Value for PWMLx Output
impl R<u8, DIVA_A>[src]
pub fn variant(&self) -> Variant<u8, DIVA_A>[src]
Get enumerated values variant
pub fn is_clka_poff(&self) -> bool[src]
Checks if the value of the field is CLKA_POFF
pub fn is_prea(&self) -> bool[src]
Checks if the value of the field is PREA
impl R<u8, PREA_A>[src]
pub fn variant(&self) -> Variant<u8, PREA_A>[src]
Get enumerated values variant
pub fn is_clk(&self) -> bool[src]
Checks if the value of the field is CLK
pub fn is_clk_div2(&self) -> bool[src]
Checks if the value of the field is CLK_DIV2
pub fn is_clk_div4(&self) -> bool[src]
Checks if the value of the field is CLK_DIV4
pub fn is_clk_div8(&self) -> bool[src]
Checks if the value of the field is CLK_DIV8
pub fn is_clk_div16(&self) -> bool[src]
Checks if the value of the field is CLK_DIV16
pub fn is_clk_div32(&self) -> bool[src]
Checks if the value of the field is CLK_DIV32
pub fn is_clk_div64(&self) -> bool[src]
Checks if the value of the field is CLK_DIV64
pub fn is_clk_div128(&self) -> bool[src]
Checks if the value of the field is CLK_DIV128
pub fn is_clk_div256(&self) -> bool[src]
Checks if the value of the field is CLK_DIV256
pub fn is_clk_div512(&self) -> bool[src]
Checks if the value of the field is CLK_DIV512
pub fn is_clk_div1024(&self) -> bool[src]
Checks if the value of the field is CLK_DIV1024
impl R<u8, DIVB_A>[src]
pub fn variant(&self) -> Variant<u8, DIVB_A>[src]
Get enumerated values variant
pub fn is_clkb_poff(&self) -> bool[src]
Checks if the value of the field is CLKB_POFF
pub fn is_preb(&self) -> bool[src]
Checks if the value of the field is PREB
impl R<u8, PREB_A>[src]
pub fn variant(&self) -> Variant<u8, PREB_A>[src]
Get enumerated values variant
pub fn is_clk(&self) -> bool[src]
Checks if the value of the field is CLK
pub fn is_clk_div2(&self) -> bool[src]
Checks if the value of the field is CLK_DIV2
pub fn is_clk_div4(&self) -> bool[src]
Checks if the value of the field is CLK_DIV4
pub fn is_clk_div8(&self) -> bool[src]
Checks if the value of the field is CLK_DIV8
pub fn is_clk_div16(&self) -> bool[src]
Checks if the value of the field is CLK_DIV16
pub fn is_clk_div32(&self) -> bool[src]
Checks if the value of the field is CLK_DIV32
pub fn is_clk_div64(&self) -> bool[src]
Checks if the value of the field is CLK_DIV64
pub fn is_clk_div128(&self) -> bool[src]
Checks if the value of the field is CLK_DIV128
pub fn is_clk_div256(&self) -> bool[src]
Checks if the value of the field is CLK_DIV256
pub fn is_clk_div512(&self) -> bool[src]
Checks if the value of the field is CLK_DIV512
pub fn is_clk_div1024(&self) -> bool[src]
Checks if the value of the field is CLK_DIV1024
impl R<u32, Reg<u32, _PWM_CLK>>[src]
pub fn diva(&self) -> DIVA_R[src]
Bits 0:7 - CLKA Divide Factor
pub fn prea(&self) -> PREA_R[src]
Bits 8:11 - CLKA Source Clock Selection
pub fn divb(&self) -> DIVB_R[src]
Bits 16:23 - CLKB Divide Factor
pub fn preb(&self) -> PREB_R[src]
Bits 24:27 - CLKB Source Clock Selection
impl R<u32, Reg<u32, _PWM_SR>>[src]
pub fn chid0(&self) -> CHID0_R[src]
Bit 0 - Channel ID
pub fn chid1(&self) -> CHID1_R[src]
Bit 1 - Channel ID
pub fn chid2(&self) -> CHID2_R[src]
Bit 2 - Channel ID
pub fn chid3(&self) -> CHID3_R[src]
Bit 3 - Channel ID
impl R<u32, Reg<u32, _PWM_IMR1>>[src]
pub fn chid0(&self) -> CHID0_R[src]
Bit 0 - Counter Event on Channel 0 Interrupt Mask
pub fn chid1(&self) -> CHID1_R[src]
Bit 1 - Counter Event on Channel 1 Interrupt Mask
pub fn chid2(&self) -> CHID2_R[src]
Bit 2 - Counter Event on Channel 2 Interrupt Mask
pub fn chid3(&self) -> CHID3_R[src]
Bit 3 - Counter Event on Channel 3 Interrupt Mask
pub fn fchid0(&self) -> FCHID0_R[src]
Bit 16 - Fault Protection Trigger on Channel 0 Interrupt Mask
pub fn fchid1(&self) -> FCHID1_R[src]
Bit 17 - Fault Protection Trigger on Channel 1 Interrupt Mask
pub fn fchid2(&self) -> FCHID2_R[src]
Bit 18 - Fault Protection Trigger on Channel 2 Interrupt Mask
pub fn fchid3(&self) -> FCHID3_R[src]
Bit 19 - Fault Protection Trigger on Channel 3 Interrupt Mask
impl R<u32, Reg<u32, _PWM_ISR1>>[src]
pub fn chid0(&self) -> CHID0_R[src]
Bit 0 - Counter Event on Channel 0
pub fn chid1(&self) -> CHID1_R[src]
Bit 1 - Counter Event on Channel 1
pub fn chid2(&self) -> CHID2_R[src]
Bit 2 - Counter Event on Channel 2
pub fn chid3(&self) -> CHID3_R[src]
Bit 3 - Counter Event on Channel 3
pub fn fchid0(&self) -> FCHID0_R[src]
Bit 16 - Fault Protection Trigger on Channel 0
pub fn fchid1(&self) -> FCHID1_R[src]
Bit 17 - Fault Protection Trigger on Channel 1
pub fn fchid2(&self) -> FCHID2_R[src]
Bit 18 - Fault Protection Trigger on Channel 2
pub fn fchid3(&self) -> FCHID3_R[src]
Bit 19 - Fault Protection Trigger on Channel 3
impl R<u8, UPDM_A>[src]
pub fn variant(&self) -> Variant<u8, UPDM_A>[src]
Get enumerated values variant
pub fn is_mode0(&self) -> bool[src]
Checks if the value of the field is MODE0
pub fn is_mode1(&self) -> bool[src]
Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool[src]
Checks if the value of the field is MODE2
impl R<u32, Reg<u32, _PWM_SCM>>[src]
pub fn sync0(&self) -> SYNC0_R[src]
Bit 0 - Synchronous Channel 0
pub fn sync1(&self) -> SYNC1_R[src]
Bit 1 - Synchronous Channel 1
pub fn sync2(&self) -> SYNC2_R[src]
Bit 2 - Synchronous Channel 2
pub fn sync3(&self) -> SYNC3_R[src]
Bit 3 - Synchronous Channel 3
pub fn updm(&self) -> UPDM_R[src]
Bits 16:17 - Synchronous Channels Update Mode
pub fn ptrm(&self) -> PTRM_R[src]
Bit 20 - DMA Controller Transfer Request Mode
pub fn ptrcs(&self) -> PTRCS_R[src]
Bits 21:23 - DMA Controller Transfer Request Comparison Selection
impl R<u32, Reg<u32, _PWM_SCUC>>[src]
pub fn updulock(&self) -> UPDULOCK_R[src]
Bit 0 - Synchronous Channels Update Unlock
impl R<u32, Reg<u32, _PWM_SCUP>>[src]
pub fn upr(&self) -> UPR_R[src]
Bits 0:3 - Update Period
pub fn uprcnt(&self) -> UPRCNT_R[src]
Bits 4:7 - Update Period Counter
impl R<u32, Reg<u32, _PWM_IMR2>>[src]
pub fn wrdy(&self) -> WRDY_R[src]
Bit 0 - Write Ready for Synchronous Channels Update Interrupt Mask
pub fn unre(&self) -> UNRE_R[src]
Bit 3 - Synchronous Channels Update Underrun Error Interrupt Mask
pub fn cmpm0(&self) -> CMPM0_R[src]
Bit 8 - Comparison 0 Match Interrupt Mask
pub fn cmpm1(&self) -> CMPM1_R[src]
Bit 9 - Comparison 1 Match Interrupt Mask
pub fn cmpm2(&self) -> CMPM2_R[src]
Bit 10 - Comparison 2 Match Interrupt Mask
pub fn cmpm3(&self) -> CMPM3_R[src]
Bit 11 - Comparison 3 Match Interrupt Mask
pub fn cmpm4(&self) -> CMPM4_R[src]
Bit 12 - Comparison 4 Match Interrupt Mask
pub fn cmpm5(&self) -> CMPM5_R[src]
Bit 13 - Comparison 5 Match Interrupt Mask
pub fn cmpm6(&self) -> CMPM6_R[src]
Bit 14 - Comparison 6 Match Interrupt Mask
pub fn cmpm7(&self) -> CMPM7_R[src]
Bit 15 - Comparison 7 Match Interrupt Mask
pub fn cmpu0(&self) -> CMPU0_R[src]
Bit 16 - Comparison 0 Update Interrupt Mask
pub fn cmpu1(&self) -> CMPU1_R[src]
Bit 17 - Comparison 1 Update Interrupt Mask
pub fn cmpu2(&self) -> CMPU2_R[src]
Bit 18 - Comparison 2 Update Interrupt Mask
pub fn cmpu3(&self) -> CMPU3_R[src]
Bit 19 - Comparison 3 Update Interrupt Mask
pub fn cmpu4(&self) -> CMPU4_R[src]
Bit 20 - Comparison 4 Update Interrupt Mask
pub fn cmpu5(&self) -> CMPU5_R[src]
Bit 21 - Comparison 5 Update Interrupt Mask
pub fn cmpu6(&self) -> CMPU6_R[src]
Bit 22 - Comparison 6 Update Interrupt Mask
pub fn cmpu7(&self) -> CMPU7_R[src]
Bit 23 - Comparison 7 Update Interrupt Mask
impl R<u32, Reg<u32, _PWM_ISR2>>[src]
pub fn wrdy(&self) -> WRDY_R[src]
Bit 0 - Write Ready for Synchronous Channels Update
pub fn unre(&self) -> UNRE_R[src]
Bit 3 - Synchronous Channels Update Underrun Error
pub fn cmpm0(&self) -> CMPM0_R[src]
Bit 8 - Comparison 0 Match
pub fn cmpm1(&self) -> CMPM1_R[src]
Bit 9 - Comparison 1 Match
pub fn cmpm2(&self) -> CMPM2_R[src]
Bit 10 - Comparison 2 Match
pub fn cmpm3(&self) -> CMPM3_R[src]
Bit 11 - Comparison 3 Match
pub fn cmpm4(&self) -> CMPM4_R[src]
Bit 12 - Comparison 4 Match
pub fn cmpm5(&self) -> CMPM5_R[src]
Bit 13 - Comparison 5 Match
pub fn cmpm6(&self) -> CMPM6_R[src]
Bit 14 - Comparison 6 Match
pub fn cmpm7(&self) -> CMPM7_R[src]
Bit 15 - Comparison 7 Match
pub fn cmpu0(&self) -> CMPU0_R[src]
Bit 16 - Comparison 0 Update
pub fn cmpu1(&self) -> CMPU1_R[src]
Bit 17 - Comparison 1 Update
pub fn cmpu2(&self) -> CMPU2_R[src]
Bit 18 - Comparison 2 Update
pub fn cmpu3(&self) -> CMPU3_R[src]
Bit 19 - Comparison 3 Update
pub fn cmpu4(&self) -> CMPU4_R[src]
Bit 20 - Comparison 4 Update
pub fn cmpu5(&self) -> CMPU5_R[src]
Bit 21 - Comparison 5 Update
pub fn cmpu6(&self) -> CMPU6_R[src]
Bit 22 - Comparison 6 Update
pub fn cmpu7(&self) -> CMPU7_R[src]
Bit 23 - Comparison 7 Update
impl R<u32, Reg<u32, _PWM_OOV>>[src]
pub fn oovh0(&self) -> OOVH0_R[src]
Bit 0 - Output Override Value for PWMH output of the channel 0
pub fn oovh1(&self) -> OOVH1_R[src]
Bit 1 - Output Override Value for PWMH output of the channel 1
pub fn oovh2(&self) -> OOVH2_R[src]
Bit 2 - Output Override Value for PWMH output of the channel 2
pub fn oovh3(&self) -> OOVH3_R[src]
Bit 3 - Output Override Value for PWMH output of the channel 3
pub fn oovl0(&self) -> OOVL0_R[src]
Bit 16 - Output Override Value for PWML output of the channel 0
pub fn oovl1(&self) -> OOVL1_R[src]
Bit 17 - Output Override Value for PWML output of the channel 1
pub fn oovl2(&self) -> OOVL2_R[src]
Bit 18 - Output Override Value for PWML output of the channel 2
pub fn oovl3(&self) -> OOVL3_R[src]
Bit 19 - Output Override Value for PWML output of the channel 3
impl R<u32, Reg<u32, _PWM_OS>>[src]
pub fn osh0(&self) -> OSH0_R[src]
Bit 0 - Output Selection for PWMH output of the channel 0
pub fn osh1(&self) -> OSH1_R[src]
Bit 1 - Output Selection for PWMH output of the channel 1
pub fn osh2(&self) -> OSH2_R[src]
Bit 2 - Output Selection for PWMH output of the channel 2
pub fn osh3(&self) -> OSH3_R[src]
Bit 3 - Output Selection for PWMH output of the channel 3
pub fn osl0(&self) -> OSL0_R[src]
Bit 16 - Output Selection for PWML output of the channel 0
pub fn osl1(&self) -> OSL1_R[src]
Bit 17 - Output Selection for PWML output of the channel 1
pub fn osl2(&self) -> OSL2_R[src]
Bit 18 - Output Selection for PWML output of the channel 2
pub fn osl3(&self) -> OSL3_R[src]
Bit 19 - Output Selection for PWML output of the channel 3
impl R<u32, Reg<u32, _PWM_FMR>>[src]
pub fn fpol(&self) -> FPOL_R[src]
Bits 0:7 - Fault Polarity
pub fn fmod(&self) -> FMOD_R[src]
Bits 8:15 - Fault Activation Mode
pub fn ffil(&self) -> FFIL_R[src]
Bits 16:23 - Fault Filtering
impl R<u32, Reg<u32, _PWM_FSR>>[src]
pub fn fiv(&self) -> FIV_R[src]
Bits 0:7 - Fault Input Value
pub fn fs(&self) -> FS_R[src]
Bits 8:15 - Fault Status
impl R<u32, Reg<u32, _PWM_FPV1>>[src]
pub fn fpvh0(&self) -> FPVH0_R[src]
Bit 0 - Fault Protection Value for PWMH output on channel 0
pub fn fpvh1(&self) -> FPVH1_R[src]
Bit 1 - Fault Protection Value for PWMH output on channel 1
pub fn fpvh2(&self) -> FPVH2_R[src]
Bit 2 - Fault Protection Value for PWMH output on channel 2
pub fn fpvh3(&self) -> FPVH3_R[src]
Bit 3 - Fault Protection Value for PWMH output on channel 3
pub fn fpvl0(&self) -> FPVL0_R[src]
Bit 16 - Fault Protection Value for PWML output on channel 0
pub fn fpvl1(&self) -> FPVL1_R[src]
Bit 17 - Fault Protection Value for PWML output on channel 1
pub fn fpvl2(&self) -> FPVL2_R[src]
Bit 18 - Fault Protection Value for PWML output on channel 2
pub fn fpvl3(&self) -> FPVL3_R[src]
Bit 19 - Fault Protection Value for PWML output on channel 3
impl R<u32, Reg<u32, _PWM_FPE>>[src]
pub fn fpe0(&self) -> FPE0_R[src]
Bits 0:7 - Fault Protection Enable for channel 0
pub fn fpe1(&self) -> FPE1_R[src]
Bits 8:15 - Fault Protection Enable for channel 1
pub fn fpe2(&self) -> FPE2_R[src]
Bits 16:23 - Fault Protection Enable for channel 2
pub fn fpe3(&self) -> FPE3_R[src]
Bits 24:31 - Fault Protection Enable for channel 3
impl R<u32, Reg<u32, _PWM_ELMR>>[src]
pub fn csel0(&self) -> CSEL0_R[src]
Bit 0 - Comparison 0 Selection
pub fn csel1(&self) -> CSEL1_R[src]
Bit 1 - Comparison 1 Selection
pub fn csel2(&self) -> CSEL2_R[src]
Bit 2 - Comparison 2 Selection
pub fn csel3(&self) -> CSEL3_R[src]
Bit 3 - Comparison 3 Selection
pub fn csel4(&self) -> CSEL4_R[src]
Bit 4 - Comparison 4 Selection
pub fn csel5(&self) -> CSEL5_R[src]
Bit 5 - Comparison 5 Selection
pub fn csel6(&self) -> CSEL6_R[src]
Bit 6 - Comparison 6 Selection
pub fn csel7(&self) -> CSEL7_R[src]
Bit 7 - Comparison 7 Selection
impl R<u32, Reg<u32, _PWM_SSPR>>[src]
pub fn sprd(&self) -> SPRD_R[src]
Bits 0:23 - Spread Spectrum Limit Value
pub fn sprdm(&self) -> SPRDM_R[src]
Bit 24 - Spread Spectrum Counter Mode
impl R<u32, Reg<u32, _PWM_SMMR>>[src]
pub fn gcen0(&self) -> GCEN0_R[src]
Bit 0 - Gray Count ENable
pub fn gcen1(&self) -> GCEN1_R[src]
Bit 1 - Gray Count ENable
pub fn down0(&self) -> DOWN0_R[src]
Bit 16 - DOWN Count
pub fn down1(&self) -> DOWN1_R[src]
Bit 17 - DOWN Count
impl R<u32, Reg<u32, _PWM_FPV2>>[src]
pub fn fpzh0(&self) -> FPZH0_R[src]
Bit 0 - Fault Protection to Hi-Z for PWMH output on channel 0
pub fn fpzh1(&self) -> FPZH1_R[src]
Bit 1 - Fault Protection to Hi-Z for PWMH output on channel 1
pub fn fpzh2(&self) -> FPZH2_R[src]
Bit 2 - Fault Protection to Hi-Z for PWMH output on channel 2
pub fn fpzh3(&self) -> FPZH3_R[src]
Bit 3 - Fault Protection to Hi-Z for PWMH output on channel 3
pub fn fpzl0(&self) -> FPZL0_R[src]
Bit 16 - Fault Protection to Hi-Z for PWML output on channel 0
pub fn fpzl1(&self) -> FPZL1_R[src]
Bit 17 - Fault Protection to Hi-Z for PWML output on channel 1
pub fn fpzl2(&self) -> FPZL2_R[src]
Bit 18 - Fault Protection to Hi-Z for PWML output on channel 2
pub fn fpzl3(&self) -> FPZL3_R[src]
Bit 19 - Fault Protection to Hi-Z for PWML output on channel 3
impl R<u32, Reg<u32, _PWM_WPSR>>[src]
pub fn wpsws0(&self) -> WPSWS0_R[src]
Bit 0 - Write Protect SW Status
pub fn wpsws1(&self) -> WPSWS1_R[src]
Bit 1 - Write Protect SW Status
pub fn wpsws2(&self) -> WPSWS2_R[src]
Bit 2 - Write Protect SW Status
pub fn wpsws3(&self) -> WPSWS3_R[src]
Bit 3 - Write Protect SW Status
pub fn wpsws4(&self) -> WPSWS4_R[src]
Bit 4 - Write Protect SW Status
pub fn wpsws5(&self) -> WPSWS5_R[src]
Bit 5 - Write Protect SW Status
pub fn wpvs(&self) -> WPVS_R[src]
Bit 7 - Write Protect Violation Status
pub fn wphws0(&self) -> WPHWS0_R[src]
Bit 8 - Write Protect HW Status
pub fn wphws1(&self) -> WPHWS1_R[src]
Bit 9 - Write Protect HW Status
pub fn wphws2(&self) -> WPHWS2_R[src]
Bit 10 - Write Protect HW Status
pub fn wphws3(&self) -> WPHWS3_R[src]
Bit 11 - Write Protect HW Status
pub fn wphws4(&self) -> WPHWS4_R[src]
Bit 12 - Write Protect HW Status
pub fn wphws5(&self) -> WPHWS5_R[src]
Bit 13 - Write Protect HW Status
pub fn wpvsrc(&self) -> WPVSRC_R[src]
Bits 16:31 - Write Protect Violation Source
impl R<u8, TRGMODE_A>[src]
pub fn variant(&self) -> TRGMODE_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_mode1(&self) -> bool[src]
Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool[src]
Checks if the value of the field is MODE2
pub fn is_mode3(&self) -> bool[src]
Checks if the value of the field is MODE3
impl R<bool, TRGEDGE_A>[src]
pub fn variant(&self) -> TRGEDGE_A[src]
Get enumerated values variant
pub fn is_falling_zero(&self) -> bool[src]
Checks if the value of the field is FALLING_ZERO
pub fn is_rising_one(&self) -> bool[src]
Checks if the value of the field is RISING_ONE
impl R<u32, Reg<u32, _PWM_ETRG1>>[src]
pub fn maxcnt(&self) -> MAXCNT_R[src]
Bits 0:23 - Maximum Counter value
pub fn trgmode(&self) -> TRGMODE_R[src]
Bits 24:25 - External Trigger Mode
pub fn trgedge(&self) -> TRGEDGE_R[src]
Bit 28 - Edge Selection
pub fn trgfilt(&self) -> TRGFILT_R[src]
Bit 29 - Filtered input
pub fn trgsrc(&self) -> TRGSRC_R[src]
Bit 30 - Trigger Source
pub fn rfen(&self) -> RFEN_R[src]
Bit 31 - Recoverable Fault Enable
impl R<u32, Reg<u32, _PWM_LEBR1>>[src]
pub fn lebdelay(&self) -> LEBDELAY_R[src]
Bits 0:6 - Leading-Edge Blanking Delay for TRGINx
pub fn pwmlfen(&self) -> PWMLFEN_R[src]
Bit 16 - PWML Falling Edge Enable
pub fn pwmlren(&self) -> PWMLREN_R[src]
Bit 17 - PWML Rising Edge Enable
pub fn pwmhfen(&self) -> PWMHFEN_R[src]
Bit 18 - PWMH Falling Edge Enable
pub fn pwmhren(&self) -> PWMHREN_R[src]
Bit 19 - PWMH Rising Edge Enable
impl R<u8, TRGMODE_A>[src]
pub fn variant(&self) -> TRGMODE_A[src]
Get enumerated values variant
pub fn is_off(&self) -> bool[src]
Checks if the value of the field is OFF
pub fn is_mode1(&self) -> bool[src]
Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool[src]
Checks if the value of the field is MODE2
pub fn is_mode3(&self) -> bool[src]
Checks if the value of the field is MODE3
impl R<bool, TRGEDGE_A>[src]
pub fn variant(&self) -> TRGEDGE_A[src]
Get enumerated values variant
pub fn is_falling_zero(&self) -> bool[src]
Checks if the value of the field is FALLING_ZERO
pub fn is_rising_one(&self) -> bool[src]
Checks if the value of the field is RISING_ONE
impl R<u32, Reg<u32, _PWM_ETRG2>>[src]
pub fn maxcnt(&self) -> MAXCNT_R[src]
Bits 0:23 - Maximum Counter value
pub fn trgmode(&self) -> TRGMODE_R[src]
Bits 24:25 - External Trigger Mode
pub fn trgedge(&self) -> TRGEDGE_R[src]
Bit 28 - Edge Selection
pub fn trgfilt(&self) -> TRGFILT_R[src]
Bit 29 - Filtered input
pub fn trgsrc(&self) -> TRGSRC_R[src]
Bit 30 - Trigger Source
pub fn rfen(&self) -> RFEN_R[src]
Bit 31 - Recoverable Fault Enable
impl R<u32, Reg<u32, _PWM_LEBR2>>[src]
pub fn lebdelay(&self) -> LEBDELAY_R[src]
Bits 0:6 - Leading-Edge Blanking Delay for TRGINx
pub fn pwmlfen(&self) -> PWMLFEN_R[src]
Bit 16 - PWML Falling Edge Enable
pub fn pwmlren(&self) -> PWMLREN_R[src]
Bit 17 - PWML Rising Edge Enable
pub fn pwmhfen(&self) -> PWMHFEN_R[src]
Bit 18 - PWMH Falling Edge Enable
pub fn pwmhren(&self) -> PWMHREN_R[src]
Bit 19 - PWMH Rising Edge Enable
impl R<bool, SMM_A>[src]
pub fn variant(&self) -> SMM_A[src]
Get enumerated values variant
pub fn is_spi(&self) -> bool[src]
Checks if the value of the field is SPI
pub fn is_memory(&self) -> bool[src]
Checks if the value of the field is MEMORY
impl R<bool, LLB_A>[src]
pub fn variant(&self) -> LLB_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<bool, WDRBT_A>[src]
pub fn variant(&self) -> WDRBT_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, CSMODE_A>[src]
pub fn variant(&self) -> Variant<u8, CSMODE_A>[src]
Get enumerated values variant
pub fn is_not_reloaded(&self) -> bool[src]
Checks if the value of the field is NOT_RELOADED
pub fn is_lastxfer(&self) -> bool[src]
Checks if the value of the field is LASTXFER
pub fn is_systematically(&self) -> bool[src]
Checks if the value of the field is SYSTEMATICALLY
impl R<u8, NBBITS_A>[src]
pub fn variant(&self) -> Variant<u8, NBBITS_A>[src]
Get enumerated values variant
pub fn is_8_bit(&self) -> bool[src]
Checks if the value of the field is _8_BIT
pub fn is_16_bit(&self) -> bool[src]
Checks if the value of the field is _16_BIT
impl R<u32, Reg<u32, _QSPI_MR>>[src]
pub fn smm(&self) -> SMM_R[src]
Bit 0 - Serial Memory Mode
pub fn llb(&self) -> LLB_R[src]
Bit 1 - Local Loopback Enable
pub fn wdrbt(&self) -> WDRBT_R[src]
Bit 2 - Wait Data Read Before Transfer
pub fn csmode(&self) -> CSMODE_R[src]
Bits 4:5 - Chip Select Mode
pub fn nbbits(&self) -> NBBITS_R[src]
Bits 8:11 - Number Of Bits Per Transfer
pub fn dlybct(&self) -> DLYBCT_R[src]
Bits 16:23 - Delay Between Consecutive Transfers
pub fn dlycs(&self) -> DLYCS_R[src]
Bits 24:31 - Minimum Inactive QCS Delay
impl R<u32, Reg<u32, _QSPI_RDR>>[src]
impl R<u32, Reg<u32, _QSPI_SR>>[src]
pub fn rdrf(&self) -> RDRF_R[src]
Bit 0 - Receive Data Register Full (cleared by reading SPI_RDR)
pub fn tdre(&self) -> TDRE_R[src]
Bit 1 - Transmit Data Register Empty (cleared by writing SPI_TDR)
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 2 - Transmission Registers Empty (cleared by writing SPI_TDR)
pub fn ovres(&self) -> OVRES_R[src]
Bit 3 - Overrun Error Status (cleared on read)
pub fn csr(&self) -> CSR_R[src]
Bit 8 - Chip Select Rise (cleared on read)
pub fn css(&self) -> CSS_R[src]
Bit 9 - Chip Select Status
pub fn instre(&self) -> INSTRE_R[src]
Bit 10 - Instruction End Status (cleared on read)
pub fn qspiens(&self) -> QSPIENS_R[src]
Bit 24 - QSPI Enable Status
impl R<u32, Reg<u32, _QSPI_IMR>>[src]
pub fn rdrf(&self) -> RDRF_R[src]
Bit 0 - Receive Data Register Full Interrupt Mask
pub fn tdre(&self) -> TDRE_R[src]
Bit 1 - Transmit Data Register Empty Interrupt Mask
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 2 - Transmission Registers Empty Mask
pub fn ovres(&self) -> OVRES_R[src]
Bit 3 - Overrun Error Interrupt Mask
pub fn csr(&self) -> CSR_R[src]
Bit 8 - Chip Select Rise Interrupt Mask
pub fn css(&self) -> CSS_R[src]
Bit 9 - Chip Select Status Interrupt Mask
pub fn instre(&self) -> INSTRE_R[src]
Bit 10 - Instruction End Interrupt Mask
impl R<u32, Reg<u32, _QSPI_SCR>>[src]
pub fn cpol(&self) -> CPOL_R[src]
Bit 0 - Clock Polarity
pub fn cpha(&self) -> CPHA_R[src]
Bit 1 - Clock Phase
pub fn scbr(&self) -> SCBR_R[src]
Bits 8:15 - Serial Clock Baud Rate
pub fn dlybs(&self) -> DLYBS_R[src]
Bits 16:23 - Delay Before QSCK
impl R<u32, Reg<u32, _QSPI_IAR>>[src]
impl R<u32, Reg<u32, _QSPI_ICR>>[src]
pub fn inst(&self) -> INST_R[src]
Bits 0:7 - Instruction Code
pub fn opt(&self) -> OPT_R[src]
Bits 16:23 - Option Code
impl R<u8, WIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, WIDTH_A>[src]
Get enumerated values variant
pub fn is_single_bit_spi(&self) -> bool[src]
Checks if the value of the field is SINGLE_BIT_SPI
pub fn is_dual_output(&self) -> bool[src]
Checks if the value of the field is DUAL_OUTPUT
pub fn is_quad_output(&self) -> bool[src]
Checks if the value of the field is QUAD_OUTPUT
pub fn is_dual_io(&self) -> bool[src]
Checks if the value of the field is DUAL_IO
pub fn is_quad_io(&self) -> bool[src]
Checks if the value of the field is QUAD_IO
pub fn is_dual_cmd(&self) -> bool[src]
Checks if the value of the field is DUAL_CMD
pub fn is_quad_cmd(&self) -> bool[src]
Checks if the value of the field is QUAD_CMD
impl R<u8, OPTL_A>[src]
pub fn variant(&self) -> OPTL_A[src]
Get enumerated values variant
pub fn is_option_1bit(&self) -> bool[src]
Checks if the value of the field is OPTION_1BIT
pub fn is_option_2bit(&self) -> bool[src]
Checks if the value of the field is OPTION_2BIT
pub fn is_option_4bit(&self) -> bool[src]
Checks if the value of the field is OPTION_4BIT
pub fn is_option_8bit(&self) -> bool[src]
Checks if the value of the field is OPTION_8BIT
impl R<bool, ADDRL_A>[src]
pub fn variant(&self) -> ADDRL_A[src]
Get enumerated values variant
pub fn is_24_bit(&self) -> bool[src]
Checks if the value of the field is _24_BIT
pub fn is_32_bit(&self) -> bool[src]
Checks if the value of the field is _32_BIT
impl R<u8, TFRTYP_A>[src]
pub fn variant(&self) -> TFRTYP_A[src]
Get enumerated values variant
pub fn is_trsfr_read(&self) -> bool[src]
Checks if the value of the field is TRSFR_READ
pub fn is_trsfr_read_memory(&self) -> bool[src]
Checks if the value of the field is TRSFR_READ_MEMORY
pub fn is_trsfr_write(&self) -> bool[src]
Checks if the value of the field is TRSFR_WRITE
pub fn is_trsfr_write_memory(&self) -> bool[src]
Checks if the value of the field is TRSFR_WRITE_MEMORY
impl R<bool, CRM_A>[src]
pub fn variant(&self) -> CRM_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _QSPI_IFR>>[src]
pub fn width(&self) -> WIDTH_R[src]
Bits 0:2 - Width of Instruction Code, Address, Option Code and Data
pub fn insten(&self) -> INSTEN_R[src]
Bit 4 - Instruction Enable
pub fn addren(&self) -> ADDREN_R[src]
Bit 5 - Address Enable
pub fn opten(&self) -> OPTEN_R[src]
Bit 6 - Option Enable
pub fn dataen(&self) -> DATAEN_R[src]
Bit 7 - Data Enable
pub fn optl(&self) -> OPTL_R[src]
Bits 8:9 - Option Code Length
pub fn addrl(&self) -> ADDRL_R[src]
Bit 10 - Address Length
pub fn tfrtyp(&self) -> TFRTYP_R[src]
Bits 12:13 - Data Transfer Type
pub fn crm(&self) -> CRM_R[src]
Bit 14 - Continuous Read Mode
pub fn nbdum(&self) -> NBDUM_R[src]
Bits 16:20 - Number Of Dummy Cycles
impl R<bool, SCREN_A>[src]
pub fn variant(&self) -> SCREN_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u32, Reg<u32, _QSPI_SMR>>[src]
pub fn scren(&self) -> SCREN_R[src]
Bit 0 - Scrambling/Unscrambling Enable
pub fn rvdis(&self) -> RVDIS_R[src]
Bit 1 - Scrambling/Unscrambling Random Value Disable
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _QSPI_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key
impl R<u32, Reg<u32, _QSPI_WPSR>>[src]
pub fn wpvs(&self) -> WPVS_R[src]
Bit 0 - Write Protection Violation Status
pub fn wpvsrc(&self) -> WPVSRC_R[src]
Bits 8:15 - Write Protection Violation Source
impl R<u8, RSTTYP_A>[src]
pub fn variant(&self) -> Variant<u8, RSTTYP_A>[src]
Get enumerated values variant
pub fn is_general_rst(&self) -> bool[src]
Checks if the value of the field is GENERAL_RST
pub fn is_backup_rst(&self) -> bool[src]
Checks if the value of the field is BACKUP_RST
pub fn is_wdt_rst(&self) -> bool[src]
Checks if the value of the field is WDT_RST
pub fn is_soft_rst(&self) -> bool[src]
Checks if the value of the field is SOFT_RST
pub fn is_user_rst(&self) -> bool[src]
Checks if the value of the field is USER_RST
impl R<u32, Reg<u32, _RSTC_SR>>[src]
pub fn ursts(&self) -> URSTS_R[src]
Bit 0 - User Reset Status
pub fn rsttyp(&self) -> RSTTYP_R[src]
Bits 8:10 - Reset Type
pub fn nrstl(&self) -> NRSTL_R[src]
Bit 16 - NRST Pin Level
pub fn srcmp(&self) -> SRCMP_R[src]
Bit 17 - Software Reset Command in Progress
impl R<u8, KEY_A>[src]
pub fn variant(&self) -> Variant<u8, KEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _RSTC_MR>>[src]
pub fn ursten(&self) -> URSTEN_R[src]
Bit 0 - User Reset Enable
pub fn urstien(&self) -> URSTIEN_R[src]
Bit 4 - User Reset Interrupt Enable
pub fn erstl(&self) -> ERSTL_R[src]
Bits 8:11 - External Reset Length
pub fn key(&self) -> KEY_R[src]
Bits 24:31 - Write Access Password
impl R<u32, Reg<u32, _RSWDT_MR>>[src]
pub fn wdv(&self) -> WDV_R[src]
Bits 0:11 - Watchdog Counter Value
pub fn wdfien(&self) -> WDFIEN_R[src]
Bit 12 - Watchdog Fault Interrupt Enable
pub fn wdrsten(&self) -> WDRSTEN_R[src]
Bit 13 - Watchdog Reset Enable
pub fn wddis(&self) -> WDDIS_R[src]
Bit 15 - Watchdog Disable
pub fn allones(&self) -> ALLONES_R[src]
Bits 16:27 - Must Always Be Written with 0xFFF
pub fn wddbghlt(&self) -> WDDBGHLT_R[src]
Bit 28 - Watchdog Debug Halt
pub fn wdidlehlt(&self) -> WDIDLEHLT_R[src]
Bit 29 - Watchdog Idle Halt
impl R<u32, Reg<u32, _RSWDT_SR>>[src]
impl R<u8, TIMEVSEL_A>[src]
pub fn variant(&self) -> TIMEVSEL_A[src]
Get enumerated values variant
pub fn is_minute(&self) -> bool[src]
Checks if the value of the field is MINUTE
pub fn is_hour(&self) -> bool[src]
Checks if the value of the field is HOUR
pub fn is_midnight(&self) -> bool[src]
Checks if the value of the field is MIDNIGHT
pub fn is_noon(&self) -> bool[src]
Checks if the value of the field is NOON
impl R<u8, CALEVSEL_A>[src]
pub fn variant(&self) -> Variant<u8, CALEVSEL_A>[src]
Get enumerated values variant
pub fn is_week(&self) -> bool[src]
Checks if the value of the field is WEEK
pub fn is_month(&self) -> bool[src]
Checks if the value of the field is MONTH
pub fn is_year(&self) -> bool[src]
Checks if the value of the field is YEAR
impl R<u32, Reg<u32, _RTC_CR>>[src]
pub fn updtim(&self) -> UPDTIM_R[src]
Bit 0 - Update Request Time Register
pub fn updcal(&self) -> UPDCAL_R[src]
Bit 1 - Update Request Calendar Register
pub fn timevsel(&self) -> TIMEVSEL_R[src]
Bits 8:9 - Time Event Selection
pub fn calevsel(&self) -> CALEVSEL_R[src]
Bits 16:17 - Calendar Event Selection
impl R<u8, OUT0_A>[src]
pub fn variant(&self) -> OUT0_A[src]
Get enumerated values variant
pub fn is_no_wave(&self) -> bool[src]
Checks if the value of the field is NO_WAVE
pub fn is_freq1hz(&self) -> bool[src]
Checks if the value of the field is FREQ1HZ
pub fn is_freq32hz(&self) -> bool[src]
Checks if the value of the field is FREQ32HZ
pub fn is_freq64hz(&self) -> bool[src]
Checks if the value of the field is FREQ64HZ
pub fn is_freq512hz(&self) -> bool[src]
Checks if the value of the field is FREQ512HZ
pub fn is_alarm_toggle(&self) -> bool[src]
Checks if the value of the field is ALARM_TOGGLE
pub fn is_alarm_flag(&self) -> bool[src]
Checks if the value of the field is ALARM_FLAG
pub fn is_prog_pulse(&self) -> bool[src]
Checks if the value of the field is PROG_PULSE
impl R<u8, OUT1_A>[src]
pub fn variant(&self) -> OUT1_A[src]
Get enumerated values variant
pub fn is_no_wave(&self) -> bool[src]
Checks if the value of the field is NO_WAVE
pub fn is_freq1hz(&self) -> bool[src]
Checks if the value of the field is FREQ1HZ
pub fn is_freq32hz(&self) -> bool[src]
Checks if the value of the field is FREQ32HZ
pub fn is_freq64hz(&self) -> bool[src]
Checks if the value of the field is FREQ64HZ
pub fn is_freq512hz(&self) -> bool[src]
Checks if the value of the field is FREQ512HZ
pub fn is_alarm_toggle(&self) -> bool[src]
Checks if the value of the field is ALARM_TOGGLE
pub fn is_alarm_flag(&self) -> bool[src]
Checks if the value of the field is ALARM_FLAG
pub fn is_prog_pulse(&self) -> bool[src]
Checks if the value of the field is PROG_PULSE
impl R<u8, THIGH_A>[src]
pub fn variant(&self) -> THIGH_A[src]
Get enumerated values variant
pub fn is_h_31ms(&self) -> bool[src]
Checks if the value of the field is H_31MS
pub fn is_h_16ms(&self) -> bool[src]
Checks if the value of the field is H_16MS
pub fn is_h_4ms(&self) -> bool[src]
Checks if the value of the field is H_4MS
pub fn is_h_976us(&self) -> bool[src]
Checks if the value of the field is H_976US
pub fn is_h_488us(&self) -> bool[src]
Checks if the value of the field is H_488US
pub fn is_h_122us(&self) -> bool[src]
Checks if the value of the field is H_122US
pub fn is_h_30us(&self) -> bool[src]
Checks if the value of the field is H_30US
pub fn is_h_15us(&self) -> bool[src]
Checks if the value of the field is H_15US
impl R<u8, TPERIOD_A>[src]
pub fn variant(&self) -> TPERIOD_A[src]
Get enumerated values variant
pub fn is_p_1s(&self) -> bool[src]
Checks if the value of the field is P_1S
pub fn is_p_500ms(&self) -> bool[src]
Checks if the value of the field is P_500MS
pub fn is_p_250ms(&self) -> bool[src]
Checks if the value of the field is P_250MS
pub fn is_p_125ms(&self) -> bool[src]
Checks if the value of the field is P_125MS
impl R<u32, Reg<u32, _RTC_MR>>[src]
pub fn hrmod(&self) -> HRMOD_R[src]
Bit 0 - 12-/24-hour Mode
pub fn persian(&self) -> PERSIAN_R[src]
Bit 1 - PERSIAN Calendar
pub fn negppm(&self) -> NEGPPM_R[src]
Bit 4 - NEGative PPM Correction
pub fn correction(&self) -> CORRECTION_R[src]
Bits 8:14 - Slow Clock Correction
pub fn highppm(&self) -> HIGHPPM_R[src]
Bit 15 - HIGH PPM Correction
pub fn out0(&self) -> OUT0_R[src]
Bits 16:18 - RTCOUT0 OutputSource Selection
pub fn out1(&self) -> OUT1_R[src]
Bits 20:22 - RTCOUT1 Output Source Selection
pub fn thigh(&self) -> THIGH_R[src]
Bits 24:26 - High Duration of the Output Pulse
pub fn tperiod(&self) -> TPERIOD_R[src]
Bits 28:29 - Period of the Output Pulse
impl R<u32, Reg<u32, _RTC_TIMR>>[src]
pub fn sec(&self) -> SEC_R[src]
Bits 0:6 - Current Second
pub fn min(&self) -> MIN_R[src]
Bits 8:14 - Current Minute
pub fn hour(&self) -> HOUR_R[src]
Bits 16:21 - Current Hour
pub fn ampm(&self) -> AMPM_R[src]
Bit 22 - Ante Meridiem Post Meridiem Indicator
impl R<u32, Reg<u32, _RTC_CALR>>[src]
pub fn cent(&self) -> CENT_R[src]
Bits 0:6 - Current Century
pub fn year(&self) -> YEAR_R[src]
Bits 8:15 - Current Year
pub fn month(&self) -> MONTH_R[src]
Bits 16:20 - Current Month
pub fn day(&self) -> DAY_R[src]
Bits 21:23 - Current Day in Current Week
pub fn date(&self) -> DATE_R[src]
Bits 24:29 - Current Day in Current Month
impl R<u32, Reg<u32, _RTC_TIMALR>>[src]
pub fn sec(&self) -> SEC_R[src]
Bits 0:6 - Second Alarm
pub fn secen(&self) -> SECEN_R[src]
Bit 7 - Second Alarm Enable
pub fn min(&self) -> MIN_R[src]
Bits 8:14 - Minute Alarm
pub fn minen(&self) -> MINEN_R[src]
Bit 15 - Minute Alarm Enable
pub fn hour(&self) -> HOUR_R[src]
Bits 16:21 - Hour Alarm
pub fn ampm(&self) -> AMPM_R[src]
Bit 22 - AM/PM Indicator
pub fn houren(&self) -> HOUREN_R[src]
Bit 23 - Hour Alarm Enable
impl R<u32, Reg<u32, _RTC_CALALR>>[src]
pub fn month(&self) -> MONTH_R[src]
Bits 16:20 - Month Alarm
pub fn mthen(&self) -> MTHEN_R[src]
Bit 23 - Month Alarm Enable
pub fn date(&self) -> DATE_R[src]
Bits 24:29 - Date Alarm
pub fn dateen(&self) -> DATEEN_R[src]
Bit 31 - Date Alarm Enable
impl R<bool, ACKUPD_A>[src]
pub fn variant(&self) -> ACKUPD_A[src]
Get enumerated values variant
pub fn is_freerun(&self) -> bool[src]
Checks if the value of the field is FREERUN
pub fn is_update(&self) -> bool[src]
Checks if the value of the field is UPDATE
impl R<bool, ALARM_A>[src]
pub fn variant(&self) -> ALARM_A[src]
Get enumerated values variant
pub fn is_no_alarmevent(&self) -> bool[src]
Checks if the value of the field is NO_ALARMEVENT
pub fn is_alarmevent(&self) -> bool[src]
Checks if the value of the field is ALARMEVENT
impl R<bool, SEC_A>[src]
pub fn variant(&self) -> SEC_A[src]
Get enumerated values variant
pub fn is_no_secevent(&self) -> bool[src]
Checks if the value of the field is NO_SECEVENT
pub fn is_secevent(&self) -> bool[src]
Checks if the value of the field is SECEVENT
impl R<bool, TIMEV_A>[src]
pub fn variant(&self) -> TIMEV_A[src]
Get enumerated values variant
pub fn is_no_timevent(&self) -> bool[src]
Checks if the value of the field is NO_TIMEVENT
pub fn is_timevent(&self) -> bool[src]
Checks if the value of the field is TIMEVENT
impl R<bool, CALEV_A>[src]
pub fn variant(&self) -> CALEV_A[src]
Get enumerated values variant
pub fn is_no_calevent(&self) -> bool[src]
Checks if the value of the field is NO_CALEVENT
pub fn is_calevent(&self) -> bool[src]
Checks if the value of the field is CALEVENT
impl R<bool, TDERR_A>[src]
pub fn variant(&self) -> TDERR_A[src]
Get enumerated values variant
pub fn is_correct(&self) -> bool[src]
Checks if the value of the field is CORRECT
pub fn is_err_timedate(&self) -> bool[src]
Checks if the value of the field is ERR_TIMEDATE
impl R<u32, Reg<u32, _RTC_SR>>[src]
pub fn ackupd(&self) -> ACKUPD_R[src]
Bit 0 - Acknowledge for Update
pub fn alarm(&self) -> ALARM_R[src]
Bit 1 - Alarm Flag
pub fn sec(&self) -> SEC_R[src]
Bit 2 - Second Event
pub fn timev(&self) -> TIMEV_R[src]
Bit 3 - Time Event
pub fn calev(&self) -> CALEV_R[src]
Bit 4 - Calendar Event
pub fn tderr(&self) -> TDERR_R[src]
Bit 5 - Time and/or Date Free Running Error
impl R<u32, Reg<u32, _RTC_IMR>>[src]
pub fn ack(&self) -> ACK_R[src]
Bit 0 - Acknowledge Update Interrupt Mask
pub fn alr(&self) -> ALR_R[src]
Bit 1 - Alarm Interrupt Mask
pub fn sec(&self) -> SEC_R[src]
Bit 2 - Second Event Interrupt Mask
pub fn tim(&self) -> TIM_R[src]
Bit 3 - Time Event Interrupt Mask
pub fn cal(&self) -> CAL_R[src]
Bit 4 - Calendar Event Interrupt Mask
pub fn tderr(&self) -> TDERR_R[src]
Bit 5 - Time and/or Date Error Mask
impl R<u32, Reg<u32, _RTC_VER>>[src]
pub fn nvtim(&self) -> NVTIM_R[src]
Bit 0 - Non-valid Time
pub fn nvcal(&self) -> NVCAL_R[src]
Bit 1 - Non-valid Calendar
pub fn nvtimalr(&self) -> NVTIMALR_R[src]
Bit 2 - Non-valid Time Alarm
pub fn nvcalalr(&self) -> NVCALALR_R[src]
Bit 3 - Non-valid Calendar Alarm
impl R<u32, Reg<u32, _RTT_MR>>[src]
pub fn rtpres(&self) -> RTPRES_R[src]
Bits 0:15 - Real-time Timer Prescaler Value
pub fn almien(&self) -> ALMIEN_R[src]
Bit 16 - Alarm Interrupt Enable
pub fn rttincien(&self) -> RTTINCIEN_R[src]
Bit 17 - Real-time Timer Increment Interrupt Enable
pub fn rttrst(&self) -> RTTRST_R[src]
Bit 18 - Real-time Timer Restart
pub fn rttdis(&self) -> RTTDIS_R[src]
Bit 20 - Real-time Timer Disable
pub fn rtc1hz(&self) -> RTC1HZ_R[src]
Bit 24 - Real-Time Clock 1Hz Clock Selection
impl R<u32, Reg<u32, _RTT_AR>>[src]
impl R<u32, Reg<u32, _RTT_VR>>[src]
impl R<u32, Reg<u32, _RTT_SR>>[src]
pub fn alms(&self) -> ALMS_R[src]
Bit 0 - Real-time Alarm Status (cleared on read)
pub fn rttinc(&self) -> RTTINC_R[src]
Bit 1 - Prescaler Roll-over Status (cleared on read)
impl R<u32, Reg<u32, _SSC_CMR>>[src]
impl R<u8, CKS_A>[src]
pub fn variant(&self) -> Variant<u8, CKS_A>[src]
Get enumerated values variant
pub fn is_mck(&self) -> bool[src]
Checks if the value of the field is MCK
pub fn is_tk(&self) -> bool[src]
Checks if the value of the field is TK
pub fn is_rk(&self) -> bool[src]
Checks if the value of the field is RK
impl R<u8, CKO_A>[src]
pub fn variant(&self) -> Variant<u8, CKO_A>[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_continuous(&self) -> bool[src]
Checks if the value of the field is CONTINUOUS
pub fn is_transfer(&self) -> bool[src]
Checks if the value of the field is TRANSFER
impl R<u8, CKG_A>[src]
pub fn variant(&self) -> Variant<u8, CKG_A>[src]
Get enumerated values variant
pub fn is_continuous(&self) -> bool[src]
Checks if the value of the field is CONTINUOUS
pub fn is_en_rf_low(&self) -> bool[src]
Checks if the value of the field is EN_RF_LOW
pub fn is_en_rf_high(&self) -> bool[src]
Checks if the value of the field is EN_RF_HIGH
impl R<u8, START_A>[src]
pub fn variant(&self) -> Variant<u8, START_A>[src]
Get enumerated values variant
pub fn is_continuous(&self) -> bool[src]
Checks if the value of the field is CONTINUOUS
pub fn is_transmit(&self) -> bool[src]
Checks if the value of the field is TRANSMIT
pub fn is_rf_low(&self) -> bool[src]
Checks if the value of the field is RF_LOW
pub fn is_rf_high(&self) -> bool[src]
Checks if the value of the field is RF_HIGH
pub fn is_rf_falling(&self) -> bool[src]
Checks if the value of the field is RF_FALLING
pub fn is_rf_rising(&self) -> bool[src]
Checks if the value of the field is RF_RISING
pub fn is_rf_level(&self) -> bool[src]
Checks if the value of the field is RF_LEVEL
pub fn is_rf_edge(&self) -> bool[src]
Checks if the value of the field is RF_EDGE
pub fn is_cmp_0(&self) -> bool[src]
Checks if the value of the field is CMP_0
impl R<u32, Reg<u32, _SSC_RCMR>>[src]
pub fn cks(&self) -> CKS_R[src]
Bits 0:1 - Receive Clock Selection
pub fn cko(&self) -> CKO_R[src]
Bits 2:4 - Receive Clock Output Mode Selection
pub fn cki(&self) -> CKI_R[src]
Bit 5 - Receive Clock Inversion
pub fn ckg(&self) -> CKG_R[src]
Bits 6:7 - Receive Clock Gating Selection
pub fn start(&self) -> START_R[src]
Bits 8:11 - Receive Start Selection
pub fn stop(&self) -> STOP_R[src]
Bit 12 - Receive Stop Selection
pub fn sttdly(&self) -> STTDLY_R[src]
Bits 16:23 - Receive Start Delay
pub fn period(&self) -> PERIOD_R[src]
Bits 24:31 - Receive Period Divider Selection
impl R<u8, FSOS_A>[src]
pub fn variant(&self) -> Variant<u8, FSOS_A>[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_negative(&self) -> bool[src]
Checks if the value of the field is NEGATIVE
pub fn is_positive(&self) -> bool[src]
Checks if the value of the field is POSITIVE
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_toggling(&self) -> bool[src]
Checks if the value of the field is TOGGLING
impl R<bool, FSEDGE_A>[src]
pub fn variant(&self) -> FSEDGE_A[src]
Get enumerated values variant
pub fn is_positive(&self) -> bool[src]
Checks if the value of the field is POSITIVE
pub fn is_negative(&self) -> bool[src]
Checks if the value of the field is NEGATIVE
impl R<u32, Reg<u32, _SSC_RFMR>>[src]
pub fn datlen(&self) -> DATLEN_R[src]
Bits 0:4 - Data Length
pub fn loop_(&self) -> LOOP_R[src]
Bit 5 - Loop Mode
pub fn msbf(&self) -> MSBF_R[src]
Bit 7 - Most Significant Bit First
pub fn datnb(&self) -> DATNB_R[src]
Bits 8:11 - Data Number per Frame
pub fn fslen(&self) -> FSLEN_R[src]
Bits 16:19 - Receive Frame Sync Length
pub fn fsos(&self) -> FSOS_R[src]
Bits 20:22 - Receive Frame Sync Output Selection
pub fn fsedge(&self) -> FSEDGE_R[src]
Bit 24 - Frame Sync Edge Detection
pub fn fslen_ext(&self) -> FSLEN_EXT_R[src]
Bits 28:31 - FSLEN Field Extension
impl R<u8, CKS_A>[src]
pub fn variant(&self) -> Variant<u8, CKS_A>[src]
Get enumerated values variant
pub fn is_mck(&self) -> bool[src]
Checks if the value of the field is MCK
pub fn is_rk(&self) -> bool[src]
Checks if the value of the field is RK
pub fn is_tk(&self) -> bool[src]
Checks if the value of the field is TK
impl R<u8, CKO_A>[src]
pub fn variant(&self) -> Variant<u8, CKO_A>[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_continuous(&self) -> bool[src]
Checks if the value of the field is CONTINUOUS
pub fn is_transfer(&self) -> bool[src]
Checks if the value of the field is TRANSFER
impl R<u8, CKG_A>[src]
pub fn variant(&self) -> Variant<u8, CKG_A>[src]
Get enumerated values variant
pub fn is_continuous(&self) -> bool[src]
Checks if the value of the field is CONTINUOUS
pub fn is_en_tf_low(&self) -> bool[src]
Checks if the value of the field is EN_TF_LOW
pub fn is_en_tf_high(&self) -> bool[src]
Checks if the value of the field is EN_TF_HIGH
impl R<u8, START_A>[src]
pub fn variant(&self) -> Variant<u8, START_A>[src]
Get enumerated values variant
pub fn is_continuous(&self) -> bool[src]
Checks if the value of the field is CONTINUOUS
pub fn is_receive(&self) -> bool[src]
Checks if the value of the field is RECEIVE
pub fn is_tf_low(&self) -> bool[src]
Checks if the value of the field is TF_LOW
pub fn is_tf_high(&self) -> bool[src]
Checks if the value of the field is TF_HIGH
pub fn is_tf_falling(&self) -> bool[src]
Checks if the value of the field is TF_FALLING
pub fn is_tf_rising(&self) -> bool[src]
Checks if the value of the field is TF_RISING
pub fn is_tf_level(&self) -> bool[src]
Checks if the value of the field is TF_LEVEL
pub fn is_tf_edge(&self) -> bool[src]
Checks if the value of the field is TF_EDGE
impl R<u32, Reg<u32, _SSC_TCMR>>[src]
pub fn cks(&self) -> CKS_R[src]
Bits 0:1 - Transmit Clock Selection
pub fn cko(&self) -> CKO_R[src]
Bits 2:4 - Transmit Clock Output Mode Selection
pub fn cki(&self) -> CKI_R[src]
Bit 5 - Transmit Clock Inversion
pub fn ckg(&self) -> CKG_R[src]
Bits 6:7 - Transmit Clock Gating Selection
pub fn start(&self) -> START_R[src]
Bits 8:11 - Transmit Start Selection
pub fn sttdly(&self) -> STTDLY_R[src]
Bits 16:23 - Transmit Start Delay
pub fn period(&self) -> PERIOD_R[src]
Bits 24:31 - Transmit Period Divider Selection
impl R<u8, FSOS_A>[src]
pub fn variant(&self) -> Variant<u8, FSOS_A>[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_negative(&self) -> bool[src]
Checks if the value of the field is NEGATIVE
pub fn is_positive(&self) -> bool[src]
Checks if the value of the field is POSITIVE
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_toggling(&self) -> bool[src]
Checks if the value of the field is TOGGLING
impl R<bool, FSEDGE_A>[src]
pub fn variant(&self) -> FSEDGE_A[src]
Get enumerated values variant
pub fn is_positive(&self) -> bool[src]
Checks if the value of the field is POSITIVE
pub fn is_negative(&self) -> bool[src]
Checks if the value of the field is NEGATIVE
impl R<u32, Reg<u32, _SSC_TFMR>>[src]
pub fn datlen(&self) -> DATLEN_R[src]
Bits 0:4 - Data Length
pub fn datdef(&self) -> DATDEF_R[src]
Bit 5 - Data Default Value
pub fn msbf(&self) -> MSBF_R[src]
Bit 7 - Most Significant Bit First
pub fn datnb(&self) -> DATNB_R[src]
Bits 8:11 - Data Number per Frame
pub fn fslen(&self) -> FSLEN_R[src]
Bits 16:19 - Transmit Frame Sync Length
pub fn fsos(&self) -> FSOS_R[src]
Bits 20:22 - Transmit Frame Sync Output Selection
pub fn fsden(&self) -> FSDEN_R[src]
Bit 23 - Frame Sync Data Enable
pub fn fsedge(&self) -> FSEDGE_R[src]
Bit 24 - Frame Sync Edge Detection
pub fn fslen_ext(&self) -> FSLEN_EXT_R[src]
Bits 28:31 - FSLEN Field Extension
impl R<u32, Reg<u32, _SSC_RHR>>[src]
impl R<u32, Reg<u32, _SSC_RSHR>>[src]
impl R<u32, Reg<u32, _SSC_TSHR>>[src]
impl R<u32, Reg<u32, _SSC_RC0R>>[src]
impl R<u32, Reg<u32, _SSC_RC1R>>[src]
impl R<u32, Reg<u32, _SSC_SR>>[src]
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 0 - Transmit Ready
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 1 - Transmit Empty
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 4 - Receive Ready
pub fn ovrun(&self) -> OVRUN_R[src]
Bit 5 - Receive Overrun
pub fn cp0(&self) -> CP0_R[src]
Bit 8 - Compare 0
pub fn cp1(&self) -> CP1_R[src]
Bit 9 - Compare 1
pub fn txsyn(&self) -> TXSYN_R[src]
Bit 10 - Transmit Sync
pub fn rxsyn(&self) -> RXSYN_R[src]
Bit 11 - Receive Sync
pub fn txen(&self) -> TXEN_R[src]
Bit 16 - Transmit Enable
pub fn rxen(&self) -> RXEN_R[src]
Bit 17 - Receive Enable
impl R<u32, Reg<u32, _SSC_IMR>>[src]
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 0 - Transmit Ready Interrupt Mask
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 1 - Transmit Empty Interrupt Mask
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 4 - Receive Ready Interrupt Mask
pub fn ovrun(&self) -> OVRUN_R[src]
Bit 5 - Receive Overrun Interrupt Mask
pub fn cp0(&self) -> CP0_R[src]
Bit 8 - Compare 0 Interrupt Mask
pub fn cp1(&self) -> CP1_R[src]
Bit 9 - Compare 1 Interrupt Mask
pub fn txsyn(&self) -> TXSYN_R[src]
Bit 10 - Tx Sync Interrupt Mask
pub fn rxsyn(&self) -> RXSYN_R[src]
Bit 11 - Rx Sync Interrupt Mask
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _SSC_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key
impl R<u32, Reg<u32, _SSC_WPSR>>[src]
pub fn wpvs(&self) -> WPVS_R[src]
Bit 0 - Write Protection Violation Status
pub fn wpvsrc(&self) -> WPVSRC_R[src]
Bits 8:23 - Write Protect Violation Source
impl R<u8, SMSMPL_A>[src]
pub fn variant(&self) -> Variant<u8, SMSMPL_A>[src]
Get enumerated values variant
pub fn is_smd(&self) -> bool[src]
Checks if the value of the field is SMD
pub fn is_csm(&self) -> bool[src]
Checks if the value of the field is CSM
pub fn is_32slck(&self) -> bool[src]
Checks if the value of the field is _32SLCK
pub fn is_256slck(&self) -> bool[src]
Checks if the value of the field is _256SLCK
pub fn is_2048slck(&self) -> bool[src]
Checks if the value of the field is _2048SLCK
impl R<bool, SMRSTEN_A>[src]
pub fn variant(&self) -> SMRSTEN_A[src]
Get enumerated values variant
pub fn is_not_enable(&self) -> bool[src]
Checks if the value of the field is NOT_ENABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, SMIEN_A>[src]
pub fn variant(&self) -> SMIEN_A[src]
Get enumerated values variant
pub fn is_not_enable(&self) -> bool[src]
Checks if the value of the field is NOT_ENABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<u32, Reg<u32, _SUPC_SMMR>>[src]
pub fn smth(&self) -> SMTH_R[src]
Bits 0:3 - Supply Monitor Threshold
pub fn smsmpl(&self) -> SMSMPL_R[src]
Bits 8:10 - Supply Monitor Sampling Period
pub fn smrsten(&self) -> SMRSTEN_R[src]
Bit 12 - Supply Monitor Reset Enable
pub fn smien(&self) -> SMIEN_R[src]
Bit 13 - Supply Monitor Interrupt Enable
impl R<bool, BODRSTEN_A>[src]
pub fn variant(&self) -> BODRSTEN_A[src]
Get enumerated values variant
pub fn is_not_enable(&self) -> bool[src]
Checks if the value of the field is NOT_ENABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, BODDIS_A>[src]
pub fn variant(&self) -> BODDIS_A[src]
Get enumerated values variant
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
impl R<bool, ONREG_A>[src]
pub fn variant(&self) -> ONREG_A[src]
Get enumerated values variant
pub fn is_onreg_unused(&self) -> bool[src]
Checks if the value of the field is ONREG_UNUSED
pub fn is_onreg_used(&self) -> bool[src]
Checks if the value of the field is ONREG_USED
impl R<bool, OSCBYPASS_A>[src]
pub fn variant(&self) -> OSCBYPASS_A[src]
Get enumerated values variant
pub fn is_no_effect(&self) -> bool[src]
Checks if the value of the field is NO_EFFECT
pub fn is_bypass(&self) -> bool[src]
Checks if the value of the field is BYPASS
impl R<u8, KEY_A>[src]
pub fn variant(&self) -> Variant<u8, KEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _SUPC_MR>>[src]
pub fn bodrsten(&self) -> BODRSTEN_R[src]
Bit 12 - Brownout Detector Reset Enable
pub fn boddis(&self) -> BODDIS_R[src]
Bit 13 - Brownout Detector Disable
pub fn onreg(&self) -> ONREG_R[src]
Bit 14 - Voltage Regulator Enable
pub fn bkupreton(&self) -> BKUPRETON_R[src]
Bit 17 - SRAM On In Backup Mode
pub fn oscbypass(&self) -> OSCBYPASS_R[src]
Bit 20 - Oscillator Bypass
pub fn key(&self) -> KEY_R[src]
Bits 24:31 - Password Key
impl R<bool, SMEN_A>[src]
pub fn variant(&self) -> SMEN_A[src]
Get enumerated values variant
pub fn is_not_enable(&self) -> bool[src]
Checks if the value of the field is NOT_ENABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, RTTEN_A>[src]
pub fn variant(&self) -> RTTEN_A[src]
Get enumerated values variant
pub fn is_not_enable(&self) -> bool[src]
Checks if the value of the field is NOT_ENABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, RTCEN_A>[src]
pub fn variant(&self) -> RTCEN_A[src]
Get enumerated values variant
pub fn is_not_enable(&self) -> bool[src]
Checks if the value of the field is NOT_ENABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, LPDBCEN0_A>[src]
pub fn variant(&self) -> LPDBCEN0_A[src]
Get enumerated values variant
pub fn is_not_enable(&self) -> bool[src]
Checks if the value of the field is NOT_ENABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, LPDBCEN1_A>[src]
pub fn variant(&self) -> LPDBCEN1_A[src]
Get enumerated values variant
pub fn is_not_enable(&self) -> bool[src]
Checks if the value of the field is NOT_ENABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, LPDBCCLR_A>[src]
pub fn variant(&self) -> LPDBCCLR_A[src]
Get enumerated values variant
pub fn is_not_enable(&self) -> bool[src]
Checks if the value of the field is NOT_ENABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<u8, WKUPDBC_A>[src]
pub fn variant(&self) -> Variant<u8, WKUPDBC_A>[src]
Get enumerated values variant
pub fn is_immediate(&self) -> bool[src]
Checks if the value of the field is IMMEDIATE
pub fn is_3_slck(&self) -> bool[src]
Checks if the value of the field is _3_SLCK
pub fn is_32_slck(&self) -> bool[src]
Checks if the value of the field is _32_SLCK
pub fn is_512_slck(&self) -> bool[src]
Checks if the value of the field is _512_SLCK
pub fn is_4096_slck(&self) -> bool[src]
Checks if the value of the field is _4096_SLCK
pub fn is_32768_slck(&self) -> bool[src]
Checks if the value of the field is _32768_SLCK
impl R<u8, LPDBC_A>[src]
pub fn variant(&self) -> LPDBC_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_2_rtcout(&self) -> bool[src]
Checks if the value of the field is _2_RTCOUT
pub fn is_3_rtcout(&self) -> bool[src]
Checks if the value of the field is _3_RTCOUT
pub fn is_4_rtcout(&self) -> bool[src]
Checks if the value of the field is _4_RTCOUT
pub fn is_5_rtcout(&self) -> bool[src]
Checks if the value of the field is _5_RTCOUT
pub fn is_6_rtcout(&self) -> bool[src]
Checks if the value of the field is _6_RTCOUT
pub fn is_7_rtcout(&self) -> bool[src]
Checks if the value of the field is _7_RTCOUT
pub fn is_8_rtcout(&self) -> bool[src]
Checks if the value of the field is _8_RTCOUT
impl R<u32, Reg<u32, _SUPC_WUMR>>[src]
pub fn smen(&self) -> SMEN_R[src]
Bit 1 - Supply Monitor Wake-up Enable
pub fn rtten(&self) -> RTTEN_R[src]
Bit 2 - Real-time Timer Wake-up Enable
pub fn rtcen(&self) -> RTCEN_R[src]
Bit 3 - Real-time Clock Wake-up Enable
pub fn lpdbcen0(&self) -> LPDBCEN0_R[src]
Bit 5 - Low-power Debouncer Enable WKUP0
pub fn lpdbcen1(&self) -> LPDBCEN1_R[src]
Bit 6 - Low-power Debouncer Enable WKUP1
pub fn lpdbcclr(&self) -> LPDBCCLR_R[src]
Bit 7 - Low-power Debouncer Clear
pub fn wkupdbc(&self) -> WKUPDBC_R[src]
Bits 12:14 - Wake-up Inputs Debouncer Period
pub fn lpdbc(&self) -> LPDBC_R[src]
Bits 16:18 - Low-power Debouncer Period
impl R<bool, WKUPEN0_A>[src]
pub fn variant(&self) -> WKUPEN0_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN1_A>[src]
pub fn variant(&self) -> WKUPEN1_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN2_A>[src]
pub fn variant(&self) -> WKUPEN2_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN3_A>[src]
pub fn variant(&self) -> WKUPEN3_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN4_A>[src]
pub fn variant(&self) -> WKUPEN4_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN5_A>[src]
pub fn variant(&self) -> WKUPEN5_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN6_A>[src]
pub fn variant(&self) -> WKUPEN6_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN7_A>[src]
pub fn variant(&self) -> WKUPEN7_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN8_A>[src]
pub fn variant(&self) -> WKUPEN8_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN9_A>[src]
pub fn variant(&self) -> WKUPEN9_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN10_A>[src]
pub fn variant(&self) -> WKUPEN10_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN11_A>[src]
pub fn variant(&self) -> WKUPEN11_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN12_A>[src]
pub fn variant(&self) -> WKUPEN12_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPEN13_A>[src]
pub fn variant(&self) -> WKUPEN13_A[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool[src]
Checks if the value of the field is ENABLE
impl R<bool, WKUPT0_A>[src]
pub fn variant(&self) -> WKUPT0_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT1_A>[src]
pub fn variant(&self) -> WKUPT1_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT2_A>[src]
pub fn variant(&self) -> WKUPT2_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT3_A>[src]
pub fn variant(&self) -> WKUPT3_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT4_A>[src]
pub fn variant(&self) -> WKUPT4_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT5_A>[src]
pub fn variant(&self) -> WKUPT5_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT6_A>[src]
pub fn variant(&self) -> WKUPT6_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT7_A>[src]
pub fn variant(&self) -> WKUPT7_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT8_A>[src]
pub fn variant(&self) -> WKUPT8_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT9_A>[src]
pub fn variant(&self) -> WKUPT9_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT10_A>[src]
pub fn variant(&self) -> WKUPT10_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT11_A>[src]
pub fn variant(&self) -> WKUPT11_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT12_A>[src]
pub fn variant(&self) -> WKUPT12_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<bool, WKUPT13_A>[src]
pub fn variant(&self) -> WKUPT13_A[src]
Get enumerated values variant
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
impl R<u32, Reg<u32, _SUPC_WUIR>>[src]
pub fn wkupen0(&self) -> WKUPEN0_R[src]
Bit 0 - Wake-up Input Enable 0 to 0
pub fn wkupen1(&self) -> WKUPEN1_R[src]
Bit 1 - Wake-up Input Enable 0 to 1
pub fn wkupen2(&self) -> WKUPEN2_R[src]
Bit 2 - Wake-up Input Enable 0 to 2
pub fn wkupen3(&self) -> WKUPEN3_R[src]
Bit 3 - Wake-up Input Enable 0 to 3
pub fn wkupen4(&self) -> WKUPEN4_R[src]
Bit 4 - Wake-up Input Enable 0 to 4
pub fn wkupen5(&self) -> WKUPEN5_R[src]
Bit 5 - Wake-up Input Enable 0 to 5
pub fn wkupen6(&self) -> WKUPEN6_R[src]
Bit 6 - Wake-up Input Enable 0 to 6
pub fn wkupen7(&self) -> WKUPEN7_R[src]
Bit 7 - Wake-up Input Enable 0 to 7
pub fn wkupen8(&self) -> WKUPEN8_R[src]
Bit 8 - Wake-up Input Enable 0 to 8
pub fn wkupen9(&self) -> WKUPEN9_R[src]
Bit 9 - Wake-up Input Enable 0 to 9
pub fn wkupen10(&self) -> WKUPEN10_R[src]
Bit 10 - Wake-up Input Enable 0 to 10
pub fn wkupen11(&self) -> WKUPEN11_R[src]
Bit 11 - Wake-up Input Enable 0 to 11
pub fn wkupen12(&self) -> WKUPEN12_R[src]
Bit 12 - Wake-up Input Enable 0 to 12
pub fn wkupen13(&self) -> WKUPEN13_R[src]
Bit 13 - Wake-up Input Enable 0 to 13
pub fn wkupt0(&self) -> WKUPT0_R[src]
Bit 16 - Wake-up Input Type 0 to 0
pub fn wkupt1(&self) -> WKUPT1_R[src]
Bit 17 - Wake-up Input Type 0 to 1
pub fn wkupt2(&self) -> WKUPT2_R[src]
Bit 18 - Wake-up Input Type 0 to 2
pub fn wkupt3(&self) -> WKUPT3_R[src]
Bit 19 - Wake-up Input Type 0 to 3
pub fn wkupt4(&self) -> WKUPT4_R[src]
Bit 20 - Wake-up Input Type 0 to 4
pub fn wkupt5(&self) -> WKUPT5_R[src]
Bit 21 - Wake-up Input Type 0 to 5
pub fn wkupt6(&self) -> WKUPT6_R[src]
Bit 22 - Wake-up Input Type 0 to 6
pub fn wkupt7(&self) -> WKUPT7_R[src]
Bit 23 - Wake-up Input Type 0 to 7
pub fn wkupt8(&self) -> WKUPT8_R[src]
Bit 24 - Wake-up Input Type 0 to 8
pub fn wkupt9(&self) -> WKUPT9_R[src]
Bit 25 - Wake-up Input Type 0 to 9
pub fn wkupt10(&self) -> WKUPT10_R[src]
Bit 26 - Wake-up Input Type 0 to 10
pub fn wkupt11(&self) -> WKUPT11_R[src]
Bit 27 - Wake-up Input Type 0 to 11
pub fn wkupt12(&self) -> WKUPT12_R[src]
Bit 28 - Wake-up Input Type 0 to 12
pub fn wkupt13(&self) -> WKUPT13_R[src]
Bit 29 - Wake-up Input Type 0 to 13
impl R<bool, WKUPS_A>[src]
pub fn variant(&self) -> WKUPS_A[src]
Get enumerated values variant
pub fn is_no(&self) -> bool[src]
Checks if the value of the field is NO
pub fn is_present(&self) -> bool[src]
Checks if the value of the field is PRESENT
impl R<bool, SMWS_A>[src]
pub fn variant(&self) -> SMWS_A[src]
Get enumerated values variant
pub fn is_no(&self) -> bool[src]
Checks if the value of the field is NO
pub fn is_present(&self) -> bool[src]
Checks if the value of the field is PRESENT
impl R<bool, BODRSTS_A>[src]
pub fn variant(&self) -> BODRSTS_A[src]
Get enumerated values variant
pub fn is_no(&self) -> bool[src]
Checks if the value of the field is NO
pub fn is_present(&self) -> bool[src]
Checks if the value of the field is PRESENT
impl R<bool, SMRSTS_A>[src]
pub fn variant(&self) -> SMRSTS_A[src]
Get enumerated values variant
pub fn is_no(&self) -> bool[src]
Checks if the value of the field is NO
pub fn is_present(&self) -> bool[src]
Checks if the value of the field is PRESENT
impl R<bool, SMS_A>[src]
pub fn variant(&self) -> SMS_A[src]
Get enumerated values variant
pub fn is_no(&self) -> bool[src]
Checks if the value of the field is NO
pub fn is_present(&self) -> bool[src]
Checks if the value of the field is PRESENT
impl R<bool, SMOS_A>[src]
pub fn variant(&self) -> SMOS_A[src]
Get enumerated values variant
pub fn is_high(&self) -> bool[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool[src]
Checks if the value of the field is LOW
impl R<bool, OSCSEL_A>[src]
pub fn variant(&self) -> OSCSEL_A[src]
Get enumerated values variant
pub fn is_rc(&self) -> bool[src]
Checks if the value of the field is RC
pub fn is_cryst(&self) -> bool[src]
Checks if the value of the field is CRYST
impl R<bool, LPDBCS0_A>[src]
pub fn variant(&self) -> LPDBCS0_A[src]
Get enumerated values variant
pub fn is_no(&self) -> bool[src]
Checks if the value of the field is NO
pub fn is_present(&self) -> bool[src]
Checks if the value of the field is PRESENT
impl R<bool, LPDBCS1_A>[src]
pub fn variant(&self) -> LPDBCS1_A[src]
Get enumerated values variant
pub fn is_no(&self) -> bool[src]
Checks if the value of the field is NO
pub fn is_present(&self) -> bool[src]
Checks if the value of the field is PRESENT
impl R<bool, WKUPIS0_A>[src]
pub fn variant(&self) -> WKUPIS0_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS1_A>[src]
pub fn variant(&self) -> WKUPIS1_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS2_A>[src]
pub fn variant(&self) -> WKUPIS2_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS3_A>[src]
pub fn variant(&self) -> WKUPIS3_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS4_A>[src]
pub fn variant(&self) -> WKUPIS4_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS5_A>[src]
pub fn variant(&self) -> WKUPIS5_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS6_A>[src]
pub fn variant(&self) -> WKUPIS6_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS7_A>[src]
pub fn variant(&self) -> WKUPIS7_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS8_A>[src]
pub fn variant(&self) -> WKUPIS8_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS9_A>[src]
pub fn variant(&self) -> WKUPIS9_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS10_A>[src]
pub fn variant(&self) -> WKUPIS10_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS11_A>[src]
pub fn variant(&self) -> WKUPIS11_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS12_A>[src]
pub fn variant(&self) -> WKUPIS12_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<bool, WKUPIS13_A>[src]
pub fn variant(&self) -> WKUPIS13_A[src]
Get enumerated values variant
pub fn is_dis(&self) -> bool[src]
Checks if the value of the field is DIS
pub fn is_en(&self) -> bool[src]
Checks if the value of the field is EN
impl R<u32, Reg<u32, _SUPC_SR>>[src]
pub fn wkups(&self) -> WKUPS_R[src]
Bit 1 - WKUP Wake-up Status (cleared on read)
pub fn smws(&self) -> SMWS_R[src]
Bit 2 - Supply Monitor Detection Wake-up Status (cleared on read)
pub fn bodrsts(&self) -> BODRSTS_R[src]
Bit 3 - Brownout Detector Reset Status (cleared on read)
pub fn smrsts(&self) -> SMRSTS_R[src]
Bit 4 - Supply Monitor Reset Status (cleared on read)
pub fn sms(&self) -> SMS_R[src]
Bit 5 - Supply Monitor Status (cleared on read)
pub fn smos(&self) -> SMOS_R[src]
Bit 6 - Supply Monitor Output Status
pub fn oscsel(&self) -> OSCSEL_R[src]
Bit 7 - 32-kHz Oscillator Selection Status
pub fn lpdbcs0(&self) -> LPDBCS0_R[src]
Bit 13 - Low-power Debouncer Wake-up Status on WKUP0 (cleared on read)
pub fn lpdbcs1(&self) -> LPDBCS1_R[src]
Bit 14 - Low-power Debouncer Wake-up Status on WKUP1 (cleared on read)
pub fn wkupis0(&self) -> WKUPIS0_R[src]
Bit 16 - WKUPx Input Status (cleared on read)
pub fn wkupis1(&self) -> WKUPIS1_R[src]
Bit 17 - WKUPx Input Status (cleared on read)
pub fn wkupis2(&self) -> WKUPIS2_R[src]
Bit 18 - WKUPx Input Status (cleared on read)
pub fn wkupis3(&self) -> WKUPIS3_R[src]
Bit 19 - WKUPx Input Status (cleared on read)
pub fn wkupis4(&self) -> WKUPIS4_R[src]
Bit 20 - WKUPx Input Status (cleared on read)
pub fn wkupis5(&self) -> WKUPIS5_R[src]
Bit 21 - WKUPx Input Status (cleared on read)
pub fn wkupis6(&self) -> WKUPIS6_R[src]
Bit 22 - WKUPx Input Status (cleared on read)
pub fn wkupis7(&self) -> WKUPIS7_R[src]
Bit 23 - WKUPx Input Status (cleared on read)
pub fn wkupis8(&self) -> WKUPIS8_R[src]
Bit 24 - WKUPx Input Status (cleared on read)
pub fn wkupis9(&self) -> WKUPIS9_R[src]
Bit 25 - WKUPx Input Status (cleared on read)
pub fn wkupis10(&self) -> WKUPIS10_R[src]
Bit 26 - WKUPx Input Status (cleared on read)
pub fn wkupis11(&self) -> WKUPIS11_R[src]
Bit 27 - WKUPx Input Status (cleared on read)
pub fn wkupis12(&self) -> WKUPIS12_R[src]
Bit 28 - WKUPx Input Status (cleared on read)
pub fn wkupis13(&self) -> WKUPIS13_R[src]
Bit 29 - WKUPx Input Status (cleared on read)
impl R<u8, TCCLKS_A>[src]
pub fn variant(&self) -> TCCLKS_A[src]
Get enumerated values variant
pub fn is_timer_clock1(&self) -> bool[src]
Checks if the value of the field is TIMER_CLOCK1
pub fn is_timer_clock2(&self) -> bool[src]
Checks if the value of the field is TIMER_CLOCK2
pub fn is_timer_clock3(&self) -> bool[src]
Checks if the value of the field is TIMER_CLOCK3
pub fn is_timer_clock4(&self) -> bool[src]
Checks if the value of the field is TIMER_CLOCK4
pub fn is_timer_clock5(&self) -> bool[src]
Checks if the value of the field is TIMER_CLOCK5
pub fn is_xc0(&self) -> bool[src]
Checks if the value of the field is XC0
pub fn is_xc1(&self) -> bool[src]
Checks if the value of the field is XC1
pub fn is_xc2(&self) -> bool[src]
Checks if the value of the field is XC2
impl R<u8, BURST_A>[src]
pub fn variant(&self) -> BURST_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_xc0(&self) -> bool[src]
Checks if the value of the field is XC0
pub fn is_xc1(&self) -> bool[src]
Checks if the value of the field is XC1
pub fn is_xc2(&self) -> bool[src]
Checks if the value of the field is XC2
impl R<u8, ETRGEDG_A>[src]
pub fn variant(&self) -> ETRGEDG_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_rising(&self) -> bool[src]
Checks if the value of the field is RISING
pub fn is_falling(&self) -> bool[src]
Checks if the value of the field is FALLING
pub fn is_edge(&self) -> bool[src]
Checks if the value of the field is EDGE
impl R<u8, LDRA_A>[src]
pub fn variant(&self) -> LDRA_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_rising(&self) -> bool[src]
Checks if the value of the field is RISING
pub fn is_falling(&self) -> bool[src]
Checks if the value of the field is FALLING
pub fn is_edge(&self) -> bool[src]
Checks if the value of the field is EDGE
impl R<u8, LDRB_A>[src]
pub fn variant(&self) -> LDRB_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_rising(&self) -> bool[src]
Checks if the value of the field is RISING
pub fn is_falling(&self) -> bool[src]
Checks if the value of the field is FALLING
pub fn is_edge(&self) -> bool[src]
Checks if the value of the field is EDGE
impl R<u8, SBSMPLR_A>[src]
pub fn variant(&self) -> Variant<u8, SBSMPLR_A>[src]
Get enumerated values variant
pub fn is_one(&self) -> bool[src]
Checks if the value of the field is ONE
pub fn is_half(&self) -> bool[src]
Checks if the value of the field is HALF
pub fn is_fourth(&self) -> bool[src]
Checks if the value of the field is FOURTH
pub fn is_eighth(&self) -> bool[src]
Checks if the value of the field is EIGHTH
pub fn is_sixteenth(&self) -> bool[src]
Checks if the value of the field is SIXTEENTH
impl R<u32, Reg<u32, _TC_CMR_CAPTURE_MODE>>[src]
pub fn tcclks(&self) -> TCCLKS_R[src]
Bits 0:2 - Clock Selection
pub fn clki(&self) -> CLKI_R[src]
Bit 3 - Clock Invert
pub fn burst(&self) -> BURST_R[src]
Bits 4:5 - Burst Signal Selection
pub fn ldbstop(&self) -> LDBSTOP_R[src]
Bit 6 - Counter Clock Stopped with RB Loading
pub fn ldbdis(&self) -> LDBDIS_R[src]
Bit 7 - Counter Clock Disable with RB Loading
pub fn etrgedg(&self) -> ETRGEDG_R[src]
Bits 8:9 - External Trigger Edge Selection
pub fn abetrg(&self) -> ABETRG_R[src]
Bit 10 - TIOAx or TIOBx External Trigger Selection
pub fn cpctrg(&self) -> CPCTRG_R[src]
Bit 14 - RC Compare Trigger Enable
pub fn wave(&self) -> WAVE_R[src]
Bit 15 - Waveform Mode
pub fn ldra(&self) -> LDRA_R[src]
Bits 16:17 - RA Loading Edge Selection
pub fn ldrb(&self) -> LDRB_R[src]
Bits 18:19 - RB Loading Edge Selection
pub fn sbsmplr(&self) -> SBSMPLR_R[src]
Bits 20:22 - Loading Edge Subsampling Ratio
impl R<u8, TCCLKS_A>[src]
pub fn variant(&self) -> TCCLKS_A[src]
Get enumerated values variant
pub fn is_timer_clock1(&self) -> bool[src]
Checks if the value of the field is TIMER_CLOCK1
pub fn is_timer_clock2(&self) -> bool[src]
Checks if the value of the field is TIMER_CLOCK2
pub fn is_timer_clock3(&self) -> bool[src]
Checks if the value of the field is TIMER_CLOCK3
pub fn is_timer_clock4(&self) -> bool[src]
Checks if the value of the field is TIMER_CLOCK4
pub fn is_timer_clock5(&self) -> bool[src]
Checks if the value of the field is TIMER_CLOCK5
pub fn is_xc0(&self) -> bool[src]
Checks if the value of the field is XC0
pub fn is_xc1(&self) -> bool[src]
Checks if the value of the field is XC1
pub fn is_xc2(&self) -> bool[src]
Checks if the value of the field is XC2
impl R<u8, BURST_A>[src]
pub fn variant(&self) -> BURST_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_xc0(&self) -> bool[src]
Checks if the value of the field is XC0
pub fn is_xc1(&self) -> bool[src]
Checks if the value of the field is XC1
pub fn is_xc2(&self) -> bool[src]
Checks if the value of the field is XC2
impl R<u8, EEVTEDG_A>[src]
pub fn variant(&self) -> EEVTEDG_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_rising(&self) -> bool[src]
Checks if the value of the field is RISING
pub fn is_falling(&self) -> bool[src]
Checks if the value of the field is FALLING
pub fn is_edge(&self) -> bool[src]
Checks if the value of the field is EDGE
impl R<u8, EEVT_A>[src]
pub fn variant(&self) -> EEVT_A[src]
Get enumerated values variant
pub fn is_tiob(&self) -> bool[src]
Checks if the value of the field is TIOB
pub fn is_xc0(&self) -> bool[src]
Checks if the value of the field is XC0
pub fn is_xc1(&self) -> bool[src]
Checks if the value of the field is XC1
pub fn is_xc2(&self) -> bool[src]
Checks if the value of the field is XC2
impl R<u8, WAVSEL_A>[src]
pub fn variant(&self) -> WAVSEL_A[src]
Get enumerated values variant
pub fn is_up(&self) -> bool[src]
Checks if the value of the field is UP
pub fn is_updown(&self) -> bool[src]
Checks if the value of the field is UPDOWN
pub fn is_up_rc(&self) -> bool[src]
Checks if the value of the field is UP_RC
pub fn is_updown_rc(&self) -> bool[src]
Checks if the value of the field is UPDOWN_RC
impl R<u8, ACPA_A>[src]
pub fn variant(&self) -> ACPA_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_set(&self) -> bool[src]
Checks if the value of the field is SET
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
impl R<u8, ACPC_A>[src]
pub fn variant(&self) -> ACPC_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_set(&self) -> bool[src]
Checks if the value of the field is SET
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
impl R<u8, AEEVT_A>[src]
pub fn variant(&self) -> AEEVT_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_set(&self) -> bool[src]
Checks if the value of the field is SET
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
impl R<u8, ASWTRG_A>[src]
pub fn variant(&self) -> ASWTRG_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_set(&self) -> bool[src]
Checks if the value of the field is SET
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
impl R<u8, BCPB_A>[src]
pub fn variant(&self) -> BCPB_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_set(&self) -> bool[src]
Checks if the value of the field is SET
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
impl R<u8, BCPC_A>[src]
pub fn variant(&self) -> BCPC_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_set(&self) -> bool[src]
Checks if the value of the field is SET
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
impl R<u8, BEEVT_A>[src]
pub fn variant(&self) -> BEEVT_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_set(&self) -> bool[src]
Checks if the value of the field is SET
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
impl R<u8, BSWTRG_A>[src]
pub fn variant(&self) -> BSWTRG_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_set(&self) -> bool[src]
Checks if the value of the field is SET
pub fn is_clear(&self) -> bool[src]
Checks if the value of the field is CLEAR
pub fn is_toggle(&self) -> bool[src]
Checks if the value of the field is TOGGLE
impl R<u32, Reg<u32, _TC_CMR_WAVEFORM_MODE>>[src]
pub fn tcclks(&self) -> TCCLKS_R[src]
Bits 0:2 - Clock Selection
pub fn clki(&self) -> CLKI_R[src]
Bit 3 - Clock Invert
pub fn burst(&self) -> BURST_R[src]
Bits 4:5 - Burst Signal Selection
pub fn cpcstop(&self) -> CPCSTOP_R[src]
Bit 6 - Counter Clock Stopped with RC Compare
pub fn cpcdis(&self) -> CPCDIS_R[src]
Bit 7 - Counter Clock Disable with RC Loading
pub fn eevtedg(&self) -> EEVTEDG_R[src]
Bits 8:9 - External Event Edge Selection
pub fn eevt(&self) -> EEVT_R[src]
Bits 10:11 - External Event Selection
pub fn enetrg(&self) -> ENETRG_R[src]
Bit 12 - External Event Trigger Enable
pub fn wavsel(&self) -> WAVSEL_R[src]
Bits 13:14 - Waveform Selection
pub fn wave(&self) -> WAVE_R[src]
Bit 15 - Waveform Mode
pub fn acpa(&self) -> ACPA_R[src]
Bits 16:17 - RA Compare Effect on TIOAx
pub fn acpc(&self) -> ACPC_R[src]
Bits 18:19 - RC Compare Effect on TIOAx
pub fn aeevt(&self) -> AEEVT_R[src]
Bits 20:21 - External Event Effect on TIOAx
pub fn aswtrg(&self) -> ASWTRG_R[src]
Bits 22:23 - Software Trigger Effect on TIOAx
pub fn bcpb(&self) -> BCPB_R[src]
Bits 24:25 - RB Compare Effect on TIOBx
pub fn bcpc(&self) -> BCPC_R[src]
Bits 26:27 - RC Compare Effect on TIOBx
pub fn beevt(&self) -> BEEVT_R[src]
Bits 28:29 - External Event Effect on TIOBx
pub fn bswtrg(&self) -> BSWTRG_R[src]
Bits 30:31 - Software Trigger Effect on TIOBx
impl R<u32, Reg<u32, _TC_SMMR>>[src]
pub fn gcen(&self) -> GCEN_R[src]
Bit 0 - Gray Count Enable
pub fn down(&self) -> DOWN_R[src]
Bit 1 - Down Count
impl R<u32, Reg<u32, _TC_RAB>>[src]
impl R<u32, Reg<u32, _TC_CV>>[src]
impl R<u32, Reg<u32, _TC_RA>>[src]
impl R<u32, Reg<u32, _TC_RB>>[src]
impl R<u32, Reg<u32, _TC_RC>>[src]
impl R<u32, Reg<u32, _TC_SR>>[src]
pub fn covfs(&self) -> COVFS_R[src]
Bit 0 - Counter Overflow Status (cleared on read)
pub fn lovrs(&self) -> LOVRS_R[src]
Bit 1 - Load Overrun Status (cleared on read)
pub fn cpas(&self) -> CPAS_R[src]
Bit 2 - RA Compare Status (cleared on read)
pub fn cpbs(&self) -> CPBS_R[src]
Bit 3 - RB Compare Status (cleared on read)
pub fn cpcs(&self) -> CPCS_R[src]
Bit 4 - RC Compare Status (cleared on read)
pub fn ldras(&self) -> LDRAS_R[src]
Bit 5 - RA Loading Status (cleared on read)
pub fn ldrbs(&self) -> LDRBS_R[src]
Bit 6 - RB Loading Status (cleared on read)
pub fn etrgs(&self) -> ETRGS_R[src]
Bit 7 - External Trigger Status (cleared on read)
pub fn clksta(&self) -> CLKSTA_R[src]
Bit 16 - Clock Enabling Status
pub fn mtioa(&self) -> MTIOA_R[src]
Bit 17 - TIOAx Mirror
pub fn mtiob(&self) -> MTIOB_R[src]
Bit 18 - TIOBx Mirror
impl R<u32, Reg<u32, _TC_IMR>>[src]
pub fn covfs(&self) -> COVFS_R[src]
Bit 0 - Counter Overflow
pub fn lovrs(&self) -> LOVRS_R[src]
Bit 1 - Load Overrun
pub fn cpas(&self) -> CPAS_R[src]
Bit 2 - RA Compare
pub fn cpbs(&self) -> CPBS_R[src]
Bit 3 - RB Compare
pub fn cpcs(&self) -> CPCS_R[src]
Bit 4 - RC Compare
pub fn ldras(&self) -> LDRAS_R[src]
Bit 5 - RA Loading
pub fn ldrbs(&self) -> LDRBS_R[src]
Bit 6 - RB Loading
pub fn etrgs(&self) -> ETRGS_R[src]
Bit 7 - External Trigger
impl R<u8, TRIGSRCA_A>[src]
pub fn variant(&self) -> Variant<u8, TRIGSRCA_A>[src]
Get enumerated values variant
pub fn is_external_tioax(&self) -> bool[src]
Checks if the value of the field is EXTERNAL_TIOAX
pub fn is_pwmx(&self) -> bool[src]
Checks if the value of the field is PWMX
impl R<u8, TRIGSRCB_A>[src]
pub fn variant(&self) -> Variant<u8, TRIGSRCB_A>[src]
Get enumerated values variant
pub fn is_external_tiobx(&self) -> bool[src]
Checks if the value of the field is EXTERNAL_TIOBX
pub fn is_pwmx(&self) -> bool[src]
Checks if the value of the field is PWMX
impl R<u32, Reg<u32, _TC_EMR>>[src]
pub fn trigsrca(&self) -> TRIGSRCA_R[src]
Bits 0:1 - Trigger Source for Input A
pub fn trigsrcb(&self) -> TRIGSRCB_R[src]
Bits 4:5 - Trigger Source for Input B
pub fn nodivclk(&self) -> NODIVCLK_R[src]
Bit 8 - No Divided Clock
impl R<u8, TC0XC0S_A>[src]
pub fn variant(&self) -> Variant<u8, TC0XC0S_A>[src]
Get enumerated values variant
pub fn is_tclk0(&self) -> bool[src]
Checks if the value of the field is TCLK0
pub fn is_tioa1(&self) -> bool[src]
Checks if the value of the field is TIOA1
pub fn is_tioa2(&self) -> bool[src]
Checks if the value of the field is TIOA2
impl R<u8, TC1XC1S_A>[src]
pub fn variant(&self) -> Variant<u8, TC1XC1S_A>[src]
Get enumerated values variant
pub fn is_tclk1(&self) -> bool[src]
Checks if the value of the field is TCLK1
pub fn is_tioa0(&self) -> bool[src]
Checks if the value of the field is TIOA0
pub fn is_tioa2(&self) -> bool[src]
Checks if the value of the field is TIOA2
impl R<u8, TC2XC2S_A>[src]
pub fn variant(&self) -> Variant<u8, TC2XC2S_A>[src]
Get enumerated values variant
pub fn is_tclk2(&self) -> bool[src]
Checks if the value of the field is TCLK2
pub fn is_tioa0(&self) -> bool[src]
Checks if the value of the field is TIOA0
pub fn is_tioa1(&self) -> bool[src]
Checks if the value of the field is TIOA1
impl R<u32, Reg<u32, _TC_BMR>>[src]
pub fn tc0xc0s(&self) -> TC0XC0S_R[src]
Bits 0:1 - External Clock Signal 0 Selection
pub fn tc1xc1s(&self) -> TC1XC1S_R[src]
Bits 2:3 - External Clock Signal 1 Selection
pub fn tc2xc2s(&self) -> TC2XC2S_R[src]
Bits 4:5 - External Clock Signal 2 Selection
pub fn qden(&self) -> QDEN_R[src]
Bit 8 - Quadrature Decoder Enabled
pub fn posen(&self) -> POSEN_R[src]
Bit 9 - Position Enabled
pub fn speeden(&self) -> SPEEDEN_R[src]
Bit 10 - Speed Enabled
pub fn qdtrans(&self) -> QDTRANS_R[src]
Bit 11 - Quadrature Decoding Transparent
pub fn edgpha(&self) -> EDGPHA_R[src]
Bit 12 - Edge on PHA Count Mode
pub fn inva(&self) -> INVA_R[src]
Bit 13 - Inverted PHA
pub fn invb(&self) -> INVB_R[src]
Bit 14 - Inverted PHB
pub fn invidx(&self) -> INVIDX_R[src]
Bit 15 - Inverted Index
pub fn swap(&self) -> SWAP_R[src]
Bit 16 - Swap PHA and PHB
pub fn idxphb(&self) -> IDXPHB_R[src]
Bit 17 - Index Pin is PHB Pin
pub fn autoc(&self) -> AUTOC_R[src]
Bit 18 - AutoCorrection of missing pulses
pub fn maxfilt(&self) -> MAXFILT_R[src]
Bits 20:25 - Maximum Filter
pub fn maxcmp(&self) -> MAXCMP_R[src]
Bits 26:29 - Maximum Consecutive Missing Pulses
impl R<u32, Reg<u32, _TC_QIMR>>[src]
pub fn idx(&self) -> IDX_R[src]
Bit 0 - Index
pub fn dirchg(&self) -> DIRCHG_R[src]
Bit 1 - Direction Change
pub fn qerr(&self) -> QERR_R[src]
Bit 2 - Quadrature Error
pub fn mpe(&self) -> MPE_R[src]
Bit 3 - Consecutive Missing Pulse Error
impl R<u32, Reg<u32, _TC_QISR>>[src]
pub fn idx(&self) -> IDX_R[src]
Bit 0 - Index
pub fn dirchg(&self) -> DIRCHG_R[src]
Bit 1 - Direction Change
pub fn qerr(&self) -> QERR_R[src]
Bit 2 - Quadrature Error
pub fn mpe(&self) -> MPE_R[src]
Bit 3 - Consecutive Missing Pulse Error
pub fn dir(&self) -> DIR_R[src]
Bit 8 - Direction
impl R<u32, Reg<u32, _TC_FMR>>[src]
pub fn encf0(&self) -> ENCF0_R[src]
Bit 0 - Enable Compare Fault Channel 0
pub fn encf1(&self) -> ENCF1_R[src]
Bit 1 - Enable Compare Fault Channel 1
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _TC_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key
impl R<u32, Reg<u32, _TRNG_IMR>>[src]
impl R<u32, Reg<u32, _TRNG_ISR>>[src]
impl R<u32, Reg<u32, _TRNG_ODATA>>[src]
impl R<u8, IADRSZ_A>[src]
pub fn variant(&self) -> IADRSZ_A[src]
Get enumerated values variant
pub fn is_none(&self) -> bool[src]
Checks if the value of the field is NONE
pub fn is_1_byte(&self) -> bool[src]
Checks if the value of the field is _1_BYTE
pub fn is_2_byte(&self) -> bool[src]
Checks if the value of the field is _2_BYTE
pub fn is_3_byte(&self) -> bool[src]
Checks if the value of the field is _3_BYTE
impl R<u32, Reg<u32, _TWIHS_MMR>>[src]
pub fn iadrsz(&self) -> IADRSZ_R[src]
Bits 8:9 - Internal Device Address Size
pub fn mread(&self) -> MREAD_R[src]
Bit 12 - Master Read Direction
pub fn dadr(&self) -> DADR_R[src]
Bits 16:22 - Device Address
impl R<u32, Reg<u32, _TWIHS_SMR>>[src]
pub fn nacken(&self) -> NACKEN_R[src]
Bit 0 - Slave Receiver Data Phase NACK enable
pub fn smda(&self) -> SMDA_R[src]
Bit 2 - SMBus Default Address
pub fn smhh(&self) -> SMHH_R[src]
Bit 3 - SMBus Host Header
pub fn sclwsdis(&self) -> SCLWSDIS_R[src]
Bit 6 - Clock Wait State Disable
pub fn mask(&self) -> MASK_R[src]
Bits 8:14 - Slave Address Mask
pub fn sadr(&self) -> SADR_R[src]
Bits 16:22 - Slave Address
pub fn sadr1en(&self) -> SADR1EN_R[src]
Bit 28 - Slave Address 1 Enable
pub fn sadr2en(&self) -> SADR2EN_R[src]
Bit 29 - Slave Address 2 Enable
pub fn sadr3en(&self) -> SADR3EN_R[src]
Bit 30 - Slave Address 3 Enable
pub fn datamen(&self) -> DATAMEN_R[src]
Bit 31 - Data Matching Enable
impl R<u32, Reg<u32, _TWIHS_IADR>>[src]
impl R<u32, Reg<u32, _TWIHS_CWGR>>[src]
pub fn cldiv(&self) -> CLDIV_R[src]
Bits 0:7 - Clock Low Divider
pub fn chdiv(&self) -> CHDIV_R[src]
Bits 8:15 - Clock High Divider
pub fn ckdiv(&self) -> CKDIV_R[src]
Bits 16:18 - Clock Divider
pub fn hold(&self) -> HOLD_R[src]
Bits 24:29 - TWD Hold Time Versus TWCK Falling
impl R<u32, Reg<u32, _TWIHS_SR>>[src]
pub fn txcomp(&self) -> TXCOMP_R[src]
Bit 0 - Transmission Completed (cleared by writing TWIHS_THR)
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 1 - Receive Holding Register Ready (cleared by reading TWIHS_RHR)
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 2 - Transmit Holding Register Ready (cleared by writing TWIHS_THR)
pub fn svread(&self) -> SVREAD_R[src]
Bit 3 - Slave Read
pub fn svacc(&self) -> SVACC_R[src]
Bit 4 - Slave Access
pub fn gacc(&self) -> GACC_R[src]
Bit 5 - General Call Access (cleared on read)
pub fn ovre(&self) -> OVRE_R[src]
Bit 6 - Overrun Error (cleared on read)
pub fn unre(&self) -> UNRE_R[src]
Bit 7 - Underrun Error (cleared on read)
pub fn nack(&self) -> NACK_R[src]
Bit 8 - Not Acknowledged (cleared on read)
pub fn arblst(&self) -> ARBLST_R[src]
Bit 9 - Arbitration Lost (cleared on read)
pub fn sclws(&self) -> SCLWS_R[src]
Bit 10 - Clock Wait State
pub fn eosacc(&self) -> EOSACC_R[src]
Bit 11 - End Of Slave Access (cleared on read)
pub fn mcack(&self) -> MCACK_R[src]
Bit 16 - Master Code Acknowledge (cleared on read)
pub fn tout(&self) -> TOUT_R[src]
Bit 18 - Timeout Error (cleared on read)
pub fn pecerr(&self) -> PECERR_R[src]
Bit 19 - PEC Error (cleared on read)
pub fn smbdam(&self) -> SMBDAM_R[src]
Bit 20 - SMBus Default Address Match (cleared on read)
pub fn smbhhm(&self) -> SMBHHM_R[src]
Bit 21 - SMBus Host Header Address Match (cleared on read)
pub fn scl(&self) -> SCL_R[src]
Bit 24 - SCL Line Value
pub fn sda(&self) -> SDA_R[src]
Bit 25 - SDA Line Value
impl R<u32, Reg<u32, _TWIHS_IMR>>[src]
pub fn txcomp(&self) -> TXCOMP_R[src]
Bit 0 - Transmission Completed Interrupt Mask
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 1 - Receive Holding Register Ready Interrupt Mask
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 2 - Transmit Holding Register Ready Interrupt Mask
pub fn svacc(&self) -> SVACC_R[src]
Bit 4 - Slave Access Interrupt Mask
pub fn gacc(&self) -> GACC_R[src]
Bit 5 - General Call Access Interrupt Mask
pub fn ovre(&self) -> OVRE_R[src]
Bit 6 - Overrun Error Interrupt Mask
pub fn unre(&self) -> UNRE_R[src]
Bit 7 - Underrun Error Interrupt Mask
pub fn nack(&self) -> NACK_R[src]
Bit 8 - Not Acknowledge Interrupt Mask
pub fn arblst(&self) -> ARBLST_R[src]
Bit 9 - Arbitration Lost Interrupt Mask
pub fn scl_ws(&self) -> SCL_WS_R[src]
Bit 10 - Clock Wait State Interrupt Mask
pub fn eosacc(&self) -> EOSACC_R[src]
Bit 11 - End Of Slave Access Interrupt Mask
pub fn mcack(&self) -> MCACK_R[src]
Bit 16 - Master Code Acknowledge Interrupt Mask
pub fn tout(&self) -> TOUT_R[src]
Bit 18 - Timeout Error Interrupt Mask
pub fn pecerr(&self) -> PECERR_R[src]
Bit 19 - PEC Error Interrupt Mask
pub fn smbdam(&self) -> SMBDAM_R[src]
Bit 20 - SMBus Default Address Match Interrupt Mask
pub fn smbhhm(&self) -> SMBHHM_R[src]
Bit 21 - SMBus Host Header Address Match Interrupt Mask
impl R<u32, Reg<u32, _TWIHS_RHR>>[src]
impl R<u32, Reg<u32, _TWIHS_SMBTR>>[src]
pub fn presc(&self) -> PRESC_R[src]
Bits 0:3 - SMBus Clock Prescaler
pub fn tlows(&self) -> TLOWS_R[src]
Bits 8:15 - Slave Clock Stretch Maximum Cycles
pub fn tlowm(&self) -> TLOWM_R[src]
Bits 16:23 - Master Clock Stretch Maximum Cycles
pub fn thmax(&self) -> THMAX_R[src]
Bits 24:31 - Clock High Maximum Cycles
impl R<u32, Reg<u32, _TWIHS_FILTR>>[src]
pub fn filt(&self) -> FILT_R[src]
Bit 0 - RX Digital Filter
pub fn padfen(&self) -> PADFEN_R[src]
Bit 1 - PAD Filter Enable
pub fn padfcfg(&self) -> PADFCFG_R[src]
Bit 2 - PAD Filter Config
pub fn thres(&self) -> THRES_R[src]
Bits 8:10 - Digital Filter Threshold
impl R<u32, Reg<u32, _TWIHS_SWMR>>[src]
pub fn sadr1(&self) -> SADR1_R[src]
Bits 0:6 - Slave Address 1
pub fn sadr2(&self) -> SADR2_R[src]
Bits 8:14 - Slave Address 2
pub fn sadr3(&self) -> SADR3_R[src]
Bits 16:22 - Slave Address 3
pub fn datam(&self) -> DATAM_R[src]
Bits 24:31 - Data Match
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _TWIHS_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key
impl R<u32, Reg<u32, _TWIHS_WPSR>>[src]
pub fn wpvs(&self) -> WPVS_R[src]
Bit 0 - Write Protection Violation Status
pub fn wpvsrc(&self) -> WPVSRC_R[src]
Bits 8:31 - Write Protection Violation Source
impl R<bool, FILTER_A>[src]
pub fn variant(&self) -> FILTER_A[src]
Get enumerated values variant
pub fn is_disabled(&self) -> bool[src]
Checks if the value of the field is DISABLED
pub fn is_enabled(&self) -> bool[src]
Checks if the value of the field is ENABLED
impl R<u8, PAR_A>[src]
pub fn variant(&self) -> Variant<u8, PAR_A>[src]
Get enumerated values variant
pub fn is_even(&self) -> bool[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool[src]
Checks if the value of the field is ODD
pub fn is_space(&self) -> bool[src]
Checks if the value of the field is SPACE
pub fn is_mark(&self) -> bool[src]
Checks if the value of the field is MARK
pub fn is_no(&self) -> bool[src]
Checks if the value of the field is NO
impl R<bool, BRSRCCK_A>[src]
pub fn variant(&self) -> BRSRCCK_A[src]
Get enumerated values variant
pub fn is_periph_clk(&self) -> bool[src]
Checks if the value of the field is PERIPH_CLK
pub fn is_pmc_pck(&self) -> bool[src]
Checks if the value of the field is PMC_PCK
impl R<u8, CHMODE_A>[src]
pub fn variant(&self) -> CHMODE_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_automatic(&self) -> bool[src]
Checks if the value of the field is AUTOMATIC
pub fn is_local_loopback(&self) -> bool[src]
Checks if the value of the field is LOCAL_LOOPBACK
pub fn is_remote_loopback(&self) -> bool[src]
Checks if the value of the field is REMOTE_LOOPBACK
impl R<u32, Reg<u32, _UART_MR>>[src]
pub fn filter(&self) -> FILTER_R[src]
Bit 4 - Receiver Digital Filter
pub fn par(&self) -> PAR_R[src]
Bits 9:11 - Parity Type
pub fn brsrcck(&self) -> BRSRCCK_R[src]
Bit 12 - Baud Rate Source Clock
pub fn chmode(&self) -> CHMODE_R[src]
Bits 14:15 - Channel Mode
impl R<u32, Reg<u32, _UART_IMR>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - Mask RXRDY Interrupt
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - Disable TXRDY Interrupt
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Mask Overrun Error Interrupt
pub fn frame(&self) -> FRAME_R[src]
Bit 6 - Mask Framing Error Interrupt
pub fn pare(&self) -> PARE_R[src]
Bit 7 - Mask Parity Error Interrupt
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - Mask TXEMPTY Interrupt
pub fn cmp(&self) -> CMP_R[src]
Bit 15 - Mask Comparison Interrupt
impl R<u32, Reg<u32, _UART_SR>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - Receiver Ready
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - Transmitter Ready
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error
pub fn frame(&self) -> FRAME_R[src]
Bit 6 - Framing Error
pub fn pare(&self) -> PARE_R[src]
Bit 7 - Parity Error
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - Transmitter Empty
pub fn cmp(&self) -> CMP_R[src]
Bit 15 - Comparison Match
impl R<u32, Reg<u32, _UART_RHR>>[src]
impl R<u32, Reg<u32, _UART_BRGR>>[src]
impl R<bool, CMPMODE_A>[src]
pub fn variant(&self) -> CMPMODE_A[src]
Get enumerated values variant
pub fn is_flag_only(&self) -> bool[src]
Checks if the value of the field is FLAG_ONLY
pub fn is_start_condition(&self) -> bool[src]
Checks if the value of the field is START_CONDITION
impl R<u32, Reg<u32, _UART_CMPR>>[src]
pub fn val1(&self) -> VAL1_R[src]
Bits 0:7 - First Comparison Value for Received Character
pub fn cmpmode(&self) -> CMPMODE_R[src]
Bit 12 - Comparison Mode
pub fn cmppar(&self) -> CMPPAR_R[src]
Bit 14 - Compare Parity
pub fn val2(&self) -> VAL2_R[src]
Bits 16:23 - Second Comparison Value for Received Character
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _UART_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key
impl R<u8, USART_MODE_A>[src]
pub fn variant(&self) -> Variant<u8, USART_MODE_A>[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_rs485(&self) -> bool[src]
Checks if the value of the field is RS485
pub fn is_hw_handshaking(&self) -> bool[src]
Checks if the value of the field is HW_HANDSHAKING
pub fn is_modem(&self) -> bool[src]
Checks if the value of the field is MODEM
pub fn is_is07816_t_0(&self) -> bool[src]
Checks if the value of the field is IS07816_T_0
pub fn is_is07816_t_1(&self) -> bool[src]
Checks if the value of the field is IS07816_T_1
pub fn is_irda(&self) -> bool[src]
Checks if the value of the field is IRDA
pub fn is_lon(&self) -> bool[src]
Checks if the value of the field is LON
pub fn is_lin_master(&self) -> bool[src]
Checks if the value of the field is LIN_MASTER
pub fn is_lin_slave(&self) -> bool[src]
Checks if the value of the field is LIN_SLAVE
pub fn is_spi_master(&self) -> bool[src]
Checks if the value of the field is SPI_MASTER
pub fn is_spi_slave(&self) -> bool[src]
Checks if the value of the field is SPI_SLAVE
impl R<u8, USCLKS_A>[src]
pub fn variant(&self) -> USCLKS_A[src]
Get enumerated values variant
pub fn is_mck(&self) -> bool[src]
Checks if the value of the field is MCK
pub fn is_div(&self) -> bool[src]
Checks if the value of the field is DIV
pub fn is_pck(&self) -> bool[src]
Checks if the value of the field is PCK
pub fn is_sck(&self) -> bool[src]
Checks if the value of the field is SCK
impl R<u8, CHRL_A>[src]
pub fn variant(&self) -> CHRL_A[src]
Get enumerated values variant
pub fn is_5_bit(&self) -> bool[src]
Checks if the value of the field is _5_BIT
pub fn is_6_bit(&self) -> bool[src]
Checks if the value of the field is _6_BIT
pub fn is_7_bit(&self) -> bool[src]
Checks if the value of the field is _7_BIT
pub fn is_8_bit(&self) -> bool[src]
Checks if the value of the field is _8_BIT
impl R<u8, PAR_A>[src]
pub fn variant(&self) -> Variant<u8, PAR_A>[src]
Get enumerated values variant
pub fn is_even(&self) -> bool[src]
Checks if the value of the field is EVEN
pub fn is_odd(&self) -> bool[src]
Checks if the value of the field is ODD
pub fn is_space(&self) -> bool[src]
Checks if the value of the field is SPACE
pub fn is_mark(&self) -> bool[src]
Checks if the value of the field is MARK
pub fn is_no(&self) -> bool[src]
Checks if the value of the field is NO
pub fn is_multidrop(&self) -> bool[src]
Checks if the value of the field is MULTIDROP
impl R<u8, NBSTOP_A>[src]
pub fn variant(&self) -> Variant<u8, NBSTOP_A>[src]
Get enumerated values variant
pub fn is_1_bit(&self) -> bool[src]
Checks if the value of the field is _1_BIT
pub fn is_1_5_bit(&self) -> bool[src]
Checks if the value of the field is _1_5_BIT
pub fn is_2_bit(&self) -> bool[src]
Checks if the value of the field is _2_BIT
impl R<u8, CHMODE_A>[src]
pub fn variant(&self) -> CHMODE_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_automatic(&self) -> bool[src]
Checks if the value of the field is AUTOMATIC
pub fn is_local_loopback(&self) -> bool[src]
Checks if the value of the field is LOCAL_LOOPBACK
pub fn is_remote_loopback(&self) -> bool[src]
Checks if the value of the field is REMOTE_LOOPBACK
impl R<u32, Reg<u32, _US_MR_USART_MODE>>[src]
pub fn usart_mode(&self) -> USART_MODE_R[src]
Bits 0:3 - USART Mode of Operation
pub fn usclks(&self) -> USCLKS_R[src]
Bits 4:5 - Clock Selection
pub fn chrl(&self) -> CHRL_R[src]
Bits 6:7 - Character Length
pub fn sync(&self) -> SYNC_R[src]
Bit 8 - Synchronous Mode Select
pub fn par(&self) -> PAR_R[src]
Bits 9:11 - Parity Type
pub fn nbstop(&self) -> NBSTOP_R[src]
Bits 12:13 - Number of Stop Bits
pub fn chmode(&self) -> CHMODE_R[src]
Bits 14:15 - Channel Mode
pub fn msbf(&self) -> MSBF_R[src]
Bit 16 - Bit Order
pub fn mode9(&self) -> MODE9_R[src]
Bit 17 - 9-bit Character Length
pub fn clko(&self) -> CLKO_R[src]
Bit 18 - Clock Output Select
pub fn over(&self) -> OVER_R[src]
Bit 19 - Oversampling Mode
pub fn inack(&self) -> INACK_R[src]
Bit 20 - Inhibit Non Acknowledge
pub fn dsnack(&self) -> DSNACK_R[src]
Bit 21 - Disable Successive NACK
pub fn var_sync(&self) -> VAR_SYNC_R[src]
Bit 22 - Variable Synchronization of Command/Data Sync Start Frame Delimiter
pub fn invdata(&self) -> INVDATA_R[src]
Bit 23 - Inverted Data
pub fn max_iteration(&self) -> MAX_ITERATION_R[src]
Bits 24:26 - Maximum Number of Automatic Iteration
pub fn filter(&self) -> FILTER_R[src]
Bit 28 - Receive Line Filter
pub fn man(&self) -> MAN_R[src]
Bit 29 - Manchester Encoder/Decoder Enable
pub fn modsync(&self) -> MODSYNC_R[src]
Bit 30 - Manchester Synchronization Mode
pub fn onebit(&self) -> ONEBIT_R[src]
Bit 31 - Start Frame Delimiter Selector
impl R<u8, USART_MODE_A>[src]
pub fn variant(&self) -> Variant<u8, USART_MODE_A>[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_rs485(&self) -> bool[src]
Checks if the value of the field is RS485
pub fn is_hw_handshaking(&self) -> bool[src]
Checks if the value of the field is HW_HANDSHAKING
pub fn is_modem(&self) -> bool[src]
Checks if the value of the field is MODEM
pub fn is_is07816_t_0(&self) -> bool[src]
Checks if the value of the field is IS07816_T_0
pub fn is_is07816_t_1(&self) -> bool[src]
Checks if the value of the field is IS07816_T_1
pub fn is_irda(&self) -> bool[src]
Checks if the value of the field is IRDA
pub fn is_lon(&self) -> bool[src]
Checks if the value of the field is LON
pub fn is_lin_master(&self) -> bool[src]
Checks if the value of the field is LIN_MASTER
pub fn is_lin_slave(&self) -> bool[src]
Checks if the value of the field is LIN_SLAVE
pub fn is_spi_master(&self) -> bool[src]
Checks if the value of the field is SPI_MASTER
pub fn is_spi_slave(&self) -> bool[src]
Checks if the value of the field is SPI_SLAVE
impl R<u8, USCLKS_A>[src]
pub fn variant(&self) -> USCLKS_A[src]
Get enumerated values variant
pub fn is_mck(&self) -> bool[src]
Checks if the value of the field is MCK
pub fn is_div(&self) -> bool[src]
Checks if the value of the field is DIV
pub fn is_pck(&self) -> bool[src]
Checks if the value of the field is PCK
pub fn is_sck(&self) -> bool[src]
Checks if the value of the field is SCK
impl R<u8, CHRL_A>[src]
pub fn variant(&self) -> CHRL_A[src]
Get enumerated values variant
pub fn is_5_bit(&self) -> bool[src]
Checks if the value of the field is _5_BIT
pub fn is_6_bit(&self) -> bool[src]
Checks if the value of the field is _6_BIT
pub fn is_7_bit(&self) -> bool[src]
Checks if the value of the field is _7_BIT
pub fn is_8_bit(&self) -> bool[src]
Checks if the value of the field is _8_BIT
impl R<u32, Reg<u32, _US_MR_SPI_MODE>>[src]
pub fn usart_mode(&self) -> USART_MODE_R[src]
Bits 0:3 - USART Mode of Operation
pub fn usclks(&self) -> USCLKS_R[src]
Bits 4:5 - Clock Selection
pub fn chrl(&self) -> CHRL_R[src]
Bits 6:7 - Character Length
pub fn clko(&self) -> CLKO_R[src]
Bit 18 - Clock Output Select
pub fn cpha(&self) -> CPHA_R[src]
Bit 8 - SPI Clock Phase
pub fn cpol(&self) -> CPOL_R[src]
Bit 16 - SPI Clock Polarity
pub fn wrdbt(&self) -> WRDBT_R[src]
Bit 20 - Wait Read Data Before Transfer
impl R<u32, Reg<u32, _US_IMR_USART_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - RXRDY Interrupt Mask
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - TXRDY Interrupt Mask
pub fn rxbrk(&self) -> RXBRK_R[src]
Bit 2 - Receiver Break Interrupt Mask
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error Interrupt Mask
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - TXEMPTY Interrupt Mask
pub fn iter(&self) -> ITER_R[src]
Bit 10 - Max Number of Repetitions Reached Interrupt Mask
pub fn nack(&self) -> NACK_R[src]
Bit 13 - Non Acknowledge Interrupt Mask
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Mask
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Mask
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Interrupt Mask
pub fn ctsic(&self) -> CTSIC_R[src]
Bit 19 - Clear to Send Input Change Interrupt Mask
pub fn mane(&self) -> MANE_R[src]
Bit 24 - Manchester Error Interrupt Mask
impl R<u32, Reg<u32, _US_IMR_USART_LIN_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - RXRDY Interrupt Mask
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - TXRDY Interrupt Mask
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error Interrupt Mask
pub fn frame(&self) -> FRAME_R[src]
Bit 6 - Framing Error Interrupt Mask
pub fn pare(&self) -> PARE_R[src]
Bit 7 - Parity Error Interrupt Mask
pub fn timeout(&self) -> TIMEOUT_R[src]
Bit 8 - Timeout Interrupt Mask
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - TXEMPTY Interrupt Mask
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Mask
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Mask
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Interrupt Mask
impl R<u32, Reg<u32, _US_IMR_SPI_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - RXRDY Interrupt Mask
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - TXRDY Interrupt Mask
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error Interrupt Mask
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - TXEMPTY Interrupt Mask
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Mask
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Mask
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Interrupt Mask
pub fn nsse(&self) -> NSSE_R[src]
Bit 19 - NSS Line (Driving CTS Pin) Rising or Falling Edge Event
impl R<u32, Reg<u32, _US_IMR_LIN_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - RXRDY Interrupt Mask
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - TXRDY Interrupt Mask
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error Interrupt Mask
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - TXEMPTY Interrupt Mask
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Mask
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Mask
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Interrupt Mask
pub fn linbk(&self) -> LINBK_R[src]
Bit 13 - LIN Break Sent or LIN Break Received Interrupt Mask
pub fn linid(&self) -> LINID_R[src]
Bit 14 - LIN Identifier Sent or LIN Identifier Received Interrupt Mask
pub fn lintc(&self) -> LINTC_R[src]
Bit 15 - LIN Transfer Completed Interrupt Mask
pub fn linbe(&self) -> LINBE_R[src]
Bit 25 - LIN Bus Error Interrupt Mask
pub fn linisfe(&self) -> LINISFE_R[src]
Bit 26 - LIN Inconsistent Synch Field Error Interrupt Mask
pub fn linipe(&self) -> LINIPE_R[src]
Bit 27 - LIN Identifier Parity Interrupt Mask
pub fn lince(&self) -> LINCE_R[src]
Bit 28 - LIN Checksum Error Interrupt Mask
pub fn linsnre(&self) -> LINSNRE_R[src]
Bit 29 - LIN Slave Not Responding Error Interrupt Mask
pub fn linste(&self) -> LINSTE_R[src]
Bit 30 - LIN Synch Tolerance Error Interrupt Mask
pub fn linhte(&self) -> LINHTE_R[src]
Bit 31 - LIN Header Timeout Error Interrupt Mask
impl R<u32, Reg<u32, _US_IMR_LON_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - RXRDY Interrupt Mask
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - TXRDY Interrupt Mask
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error Interrupt Mask
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - TXEMPTY Interrupt Mask
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Mask
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Mask
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Interrupt Mask
pub fn lsfe(&self) -> LSFE_R[src]
Bit 6 - LON Short Frame Error Interrupt Mask
pub fn lcrce(&self) -> LCRCE_R[src]
Bit 7 - LON CRC Error Interrupt Mask
pub fn ltxd(&self) -> LTXD_R[src]
Bit 24 - LON Transmission Done Interrupt Mask
pub fn lcol(&self) -> LCOL_R[src]
Bit 25 - LON Collision Interrupt Mask
pub fn lfet(&self) -> LFET_R[src]
Bit 26 - LON Frame Early Termination Interrupt Mask
pub fn lrxd(&self) -> LRXD_R[src]
Bit 27 - LON Reception Done Interrupt Mask
pub fn lblovfe(&self) -> LBLOVFE_R[src]
Bit 28 - LON Backlog Overflow Error Interrupt Mask
impl R<u32, Reg<u32, _US_IMR_LON_SPI_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - RXRDY Interrupt Mask
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - TXRDY Interrupt Mask
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error Interrupt Mask
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - TXEMPTY Interrupt Mask
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Mask
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Mask
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Interrupt Mask
pub fn unre(&self) -> UNRE_R[src]
Bit 10 - SPI Underrun Error Interrupt Mask
impl R<u32, Reg<u32, _US_CSR_USART_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - Receiver Ready (cleared by reading US_RHR)
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - Transmitter Ready (cleared by writing US_THR)
pub fn rxbrk(&self) -> RXBRK_R[src]
Bit 2 - Break Received/End of Break (cleared by writing a one to bit US_CR.RSTSTA)
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - Transmitter Empty (cleared by writing US_THR)
pub fn iter(&self) -> ITER_R[src]
Bit 10 - Max Number of Repetitions Reached (cleared by writing a one to bit US_CR.RSTIT)
pub fn nack(&self) -> NACK_R[src]
Bit 13 - Non Acknowledge Interrupt (cleared by writing a one to bit US_CR.RSTNACK)
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Flag (cleared on read)
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Flag (cleared on read)
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Flag (cleared on read)
pub fn ctsic(&self) -> CTSIC_R[src]
Bit 19 - Clear to Send Input Change Flag (cleared on read)
pub fn ri(&self) -> RI_R[src]
Bit 20 - Image of RI Input
pub fn dsr(&self) -> DSR_R[src]
Bit 21 - Image of DSR Input
pub fn dcd(&self) -> DCD_R[src]
Bit 22 - Image of DCD Input
pub fn cts(&self) -> CTS_R[src]
Bit 23 - Image of CTS Input
pub fn manerr(&self) -> MANERR_R[src]
Bit 24 - Manchester Error (cleared by writing a one to the bit US_CR.RSTSTA)
impl R<u32, Reg<u32, _US_CSR_USART_LIN_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - Receiver Ready (cleared by reading US_RHR)
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - Transmitter Ready (cleared by writing US_THR)
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)
pub fn frame(&self) -> FRAME_R[src]
Bit 6 - Framing Error (cleared by writing a one to bit US_CR.RSTSTA)
pub fn pare(&self) -> PARE_R[src]
Bit 7 - Parity Error (cleared by writing a one to bit US_CR.RSTSTA)
pub fn timeout(&self) -> TIMEOUT_R[src]
Bit 8 - Receiver Timeout (cleared by writing a one to bit US_CR.STTTO)
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - Transmitter Empty (cleared by writing US_THR)
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Flag (cleared on read)
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Flag (cleared on read)
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Flag (cleared on read)
impl R<u32, Reg<u32, _US_CSR_SPI_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - Receiver Ready (cleared by reading US_RHR)
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - Transmitter Ready (cleared by writing US_THR)
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - Transmitter Empty (cleared by writing US_THR)
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Flag (cleared on read)
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Flag (cleared on read)
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Flag (cleared on read)
pub fn nsse(&self) -> NSSE_R[src]
Bit 19 - NSS Line (Driving CTS Pin) Rising or Falling Edge Event
pub fn nss(&self) -> NSS_R[src]
Bit 23 - Image of NSS Line
impl R<u32, Reg<u32, _US_CSR_LIN_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - Receiver Ready (cleared by reading US_RHR)
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - Transmitter Ready (cleared by writing US_THR)
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - Transmitter Empty (cleared by writing US_THR)
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Flag (cleared on read)
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Flag (cleared on read)
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Flag (cleared on read)
pub fn linbk(&self) -> LINBK_R[src]
Bit 13 - LIN Break Sent or LIN Break Received
pub fn linid(&self) -> LINID_R[src]
Bit 14 - LIN Identifier Sent or LIN Identifier Received
pub fn lintc(&self) -> LINTC_R[src]
Bit 15 - LIN Transfer Completed
pub fn linbls(&self) -> LINBLS_R[src]
Bit 23 - LIN Bus Line Status
pub fn linbe(&self) -> LINBE_R[src]
Bit 25 - LIN Bus Error
pub fn linisfe(&self) -> LINISFE_R[src]
Bit 26 - LIN Inconsistent Synch Field Error
pub fn linipe(&self) -> LINIPE_R[src]
Bit 27 - LIN Identifier Parity Error
pub fn lince(&self) -> LINCE_R[src]
Bit 28 - LIN Checksum Error
pub fn linsnre(&self) -> LINSNRE_R[src]
Bit 29 - LIN Slave Not Responding Error Interrupt Mask
pub fn linste(&self) -> LINSTE_R[src]
Bit 30 - LIN Synch Tolerance Error
pub fn linhte(&self) -> LINHTE_R[src]
Bit 31 - LIN Header Timeout Error
impl R<u32, Reg<u32, _US_CSR_LON_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - Receiver Ready (cleared by reading US_RHR)
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - Transmitter Ready (cleared by writing US_THR)
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - Transmitter Empty (cleared by writing US_THR)
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Flag (cleared on read)
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Flag (cleared on read)
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Flag (cleared on read)
pub fn lsfe(&self) -> LSFE_R[src]
Bit 6 - LON Short Frame Error
pub fn lcrce(&self) -> LCRCE_R[src]
Bit 7 - LON CRC Error
pub fn ltxd(&self) -> LTXD_R[src]
Bit 24 - LON Transmission End Flag
pub fn lcol(&self) -> LCOL_R[src]
Bit 25 - LON Collision Detected Flag
pub fn lfet(&self) -> LFET_R[src]
Bit 26 - LON Frame Early Termination
pub fn lrxd(&self) -> LRXD_R[src]
Bit 27 - LON Reception End Flag
pub fn lblovfe(&self) -> LBLOVFE_R[src]
Bit 28 - LON Backlog Overflow Error
impl R<u32, Reg<u32, _US_CSR_LON_SPI_MODE>>[src]
pub fn rxrdy(&self) -> RXRDY_R[src]
Bit 0 - Receiver Ready (cleared by reading US_RHR)
pub fn txrdy(&self) -> TXRDY_R[src]
Bit 1 - Transmitter Ready (cleared by writing US_THR)
pub fn ovre(&self) -> OVRE_R[src]
Bit 5 - Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)
pub fn txempty(&self) -> TXEMPTY_R[src]
Bit 9 - Transmitter Empty (cleared by writing US_THR)
pub fn riic(&self) -> RIIC_R[src]
Bit 16 - Ring Indicator Input Change Flag (cleared on read)
pub fn dsric(&self) -> DSRIC_R[src]
Bit 17 - Data Set Ready Input Change Flag (cleared on read)
pub fn dcdic(&self) -> DCDIC_R[src]
Bit 18 - Data Carrier Detect Input Change Flag (cleared on read)
pub fn unre(&self) -> UNRE_R[src]
Bit 10 - SPI Underrun Error
impl R<u32, Reg<u32, _US_RHR>>[src]
pub fn rxchr(&self) -> RXCHR_R[src]
Bits 0:8 - Received Character
pub fn rxsynh(&self) -> RXSYNH_R[src]
Bit 15 - Received Sync
impl R<u32, Reg<u32, _US_BRGR>>[src]
pub fn cd(&self) -> CD_R[src]
Bits 0:15 - Clock Divider
pub fn fp(&self) -> FP_R[src]
Bits 16:18 - Fractional Part
impl R<u32, Reg<u32, _US_RTOR>>[src]
impl R<u32, Reg<u32, _US_TTGR_USART_MODE>>[src]
impl R<u32, Reg<u32, _US_TTGR_LON_MODE>>[src]
impl R<u32, Reg<u32, _US_FIDI_USART_MODE>>[src]
pub fn fi_di_ratio(&self) -> FI_DI_RATIO_R[src]
Bits 0:15 - FI Over DI Ratio Value
impl R<u32, Reg<u32, _US_FIDI_LON_MODE>>[src]
impl R<u32, Reg<u32, _US_NER>>[src]
pub fn nb_errors(&self) -> NB_ERRORS_R[src]
Bits 0:7 - Number of Errors
impl R<u32, Reg<u32, _US_IF>>[src]
pub fn irda_filter(&self) -> IRDA_FILTER_R[src]
Bits 0:7 - IrDA Filter
impl R<u8, TX_PP_A>[src]
pub fn variant(&self) -> TX_PP_A[src]
Get enumerated values variant
pub fn is_all_one(&self) -> bool[src]
Checks if the value of the field is ALL_ONE
pub fn is_all_zero(&self) -> bool[src]
Checks if the value of the field is ALL_ZERO
pub fn is_zero_one(&self) -> bool[src]
Checks if the value of the field is ZERO_ONE
pub fn is_one_zero(&self) -> bool[src]
Checks if the value of the field is ONE_ZERO
impl R<u8, RX_PP_A>[src]
pub fn variant(&self) -> RX_PP_A[src]
Get enumerated values variant
pub fn is_all_one(&self) -> bool[src]
Checks if the value of the field is ALL_ONE
pub fn is_all_zero(&self) -> bool[src]
Checks if the value of the field is ALL_ZERO
pub fn is_zero_one(&self) -> bool[src]
Checks if the value of the field is ZERO_ONE
pub fn is_one_zero(&self) -> bool[src]
Checks if the value of the field is ONE_ZERO
impl R<u32, Reg<u32, _US_MAN>>[src]
pub fn tx_pl(&self) -> TX_PL_R[src]
Bits 0:3 - Transmitter Preamble Length
pub fn tx_pp(&self) -> TX_PP_R[src]
Bits 8:9 - Transmitter Preamble Pattern
pub fn tx_mpol(&self) -> TX_MPOL_R[src]
Bit 12 - Transmitter Manchester Polarity
pub fn rx_pl(&self) -> RX_PL_R[src]
Bits 16:19 - Receiver Preamble Length
pub fn rx_pp(&self) -> RX_PP_R[src]
Bits 24:25 - Receiver Preamble Pattern detected
pub fn rx_mpol(&self) -> RX_MPOL_R[src]
Bit 28 - Receiver Manchester Polarity
pub fn one(&self) -> ONE_R[src]
Bit 29 - Must Be Set to 1
pub fn drift(&self) -> DRIFT_R[src]
Bit 30 - Drift Compensation
pub fn rxidlev(&self) -> RXIDLEV_R[src]
Bit 31 - Receiver Idle Value
impl R<u8, NACT_A>[src]
pub fn variant(&self) -> Variant<u8, NACT_A>[src]
Get enumerated values variant
pub fn is_publish(&self) -> bool[src]
Checks if the value of the field is PUBLISH
pub fn is_subscribe(&self) -> bool[src]
Checks if the value of the field is SUBSCRIBE
pub fn is_ignore(&self) -> bool[src]
Checks if the value of the field is IGNORE
impl R<u32, Reg<u32, _US_LINMR>>[src]
pub fn nact(&self) -> NACT_R[src]
Bits 0:1 - LIN Node Action
pub fn pardis(&self) -> PARDIS_R[src]
Bit 2 - Parity Disable
pub fn chkdis(&self) -> CHKDIS_R[src]
Bit 3 - Checksum Disable
pub fn chktyp(&self) -> CHKTYP_R[src]
Bit 4 - Checksum Type
pub fn dlm(&self) -> DLM_R[src]
Bit 5 - Data Length Mode
pub fn fsdis(&self) -> FSDIS_R[src]
Bit 6 - Frame Slot Mode Disable
pub fn wkuptyp(&self) -> WKUPTYP_R[src]
Bit 7 - Wakeup Signal Type
pub fn dlc(&self) -> DLC_R[src]
Bits 8:15 - Data Length Control
pub fn pdcm(&self) -> PDCM_R[src]
Bit 16 - DMAC Mode
pub fn syncdis(&self) -> SYNCDIS_R[src]
Bit 17 - Synchronization Disable
impl R<u32, Reg<u32, _US_LINIR>>[src]
impl R<u32, Reg<u32, _US_LINBRR>>[src]
pub fn lincd(&self) -> LINCD_R[src]
Bits 0:15 - Clock Divider after Synchronization
pub fn linfp(&self) -> LINFP_R[src]
Bits 16:18 - Fractional Part after Synchronization
impl R<u32, Reg<u32, _US_LONMR>>[src]
pub fn commt(&self) -> COMMT_R[src]
Bit 0 - LON comm_type Parameter Value
pub fn coldet(&self) -> COLDET_R[src]
Bit 1 - LON Collision Detection Feature
pub fn tcol(&self) -> TCOL_R[src]
Bit 2 - Terminate Frame upon Collision Notification
pub fn cdtail(&self) -> CDTAIL_R[src]
Bit 3 - LON Collision Detection on Frame Tail
pub fn dmam(&self) -> DMAM_R[src]
Bit 4 - LON DMA Mode
pub fn lcds(&self) -> LCDS_R[src]
Bit 5 - LON Collision Detection Source
pub fn eofs(&self) -> EOFS_R[src]
Bits 16:23 - End of Frame Condition Size
impl R<u32, Reg<u32, _US_LONPR>>[src]
impl R<u32, Reg<u32, _US_LONDL>>[src]
impl R<u32, Reg<u32, _US_LONL2HDR>>[src]
pub fn bli(&self) -> BLI_R[src]
Bits 0:5 - LON Backlog Increment
pub fn altp(&self) -> ALTP_R[src]
Bit 6 - LON Alternate Path Bit
pub fn pb(&self) -> PB_R[src]
Bit 7 - LON Priority Bit
impl R<u32, Reg<u32, _US_LONBL>>[src]
impl R<u32, Reg<u32, _US_LONB1TX>>[src]
impl R<u32, Reg<u32, _US_LONB1RX>>[src]
impl R<u32, Reg<u32, _US_LONPRIO>>[src]
pub fn psnb(&self) -> PSNB_R[src]
Bits 0:6 - LON Priority Slot Number
pub fn nps(&self) -> NPS_R[src]
Bits 8:14 - LON Node Priority Slot
impl R<u32, Reg<u32, _US_IDTTX>>[src]
pub fn idttx(&self) -> IDTTX_R[src]
Bits 0:23 - LON Indeterminate Time after Transmission (comm_type = 1 mode only)
impl R<u32, Reg<u32, _US_IDTRX>>[src]
pub fn idtrx(&self) -> IDTRX_R[src]
Bits 0:23 - LON Indeterminate Time after Reception (comm_type = 1 mode only)
impl R<u32, Reg<u32, _US_ICDIFF>>[src]
impl R<u32, WPKEY_A>[src]
pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]
Get enumerated values variant
pub fn is_passwd(&self) -> bool[src]
Checks if the value of the field is PASSWD
impl R<u32, Reg<u32, _US_WPMR>>[src]
pub fn wpen(&self) -> WPEN_R[src]
Bit 0 - Write Protection Enable
pub fn wpkey(&self) -> WPKEY_R[src]
Bits 8:31 - Write Protection Key
impl R<u32, Reg<u32, _US_WPSR>>[src]
pub fn wpvs(&self) -> WPVS_R[src]
Bit 0 - Write Protection Violation Status
pub fn wpvsrc(&self) -> WPVSRC_R[src]
Bits 8:23 - Write Protection Violation Source
impl R<u32, Reg<u32, _USBHS_DEVDMANXTDSC>>[src]
pub fn nxt_dsc_add(&self) -> NXT_DSC_ADD_R[src]
Bits 0:31 - Next Descriptor Address
impl R<u32, Reg<u32, _USBHS_DEVDMAADDRESS>>[src]
pub fn buff_add(&self) -> BUFF_ADD_R[src]
Bits 0:31 - Buffer Address
impl R<u32, Reg<u32, _USBHS_DEVDMACONTROL>>[src]
pub fn chann_enb(&self) -> CHANN_ENB_R[src]
Bit 0 - Channel Enable Command
pub fn ldnxt_dsc(&self) -> LDNXT_DSC_R[src]
Bit 1 - Load Next Channel Transfer Descriptor Enable Command
pub fn end_tr_en(&self) -> END_TR_EN_R[src]
Bit 2 - End of Transfer Enable Control (OUT transfers only)
pub fn end_b_en(&self) -> END_B_EN_R[src]
Bit 3 - End of Buffer Enable Control
pub fn end_tr_it(&self) -> END_TR_IT_R[src]
Bit 4 - End of Transfer Interrupt Enable
pub fn end_buffit(&self) -> END_BUFFIT_R[src]
Bit 5 - End of Buffer Interrupt Enable
pub fn desc_ld_it(&self) -> DESC_LD_IT_R[src]
Bit 6 - Descriptor Loaded Interrupt Enable
pub fn burst_lck(&self) -> BURST_LCK_R[src]
Bit 7 - Burst Lock Enable
pub fn buff_length(&self) -> BUFF_LENGTH_R[src]
Bits 16:31 - Buffer Byte Length (Write-only)
impl R<u32, Reg<u32, _USBHS_DEVDMASTATUS>>[src]
pub fn chann_enb(&self) -> CHANN_ENB_R[src]
Bit 0 - Channel Enable Status
pub fn chann_act(&self) -> CHANN_ACT_R[src]
Bit 1 - Channel Active Status
pub fn end_tr_st(&self) -> END_TR_ST_R[src]
Bit 4 - End of Channel Transfer Status
pub fn end_bf_st(&self) -> END_BF_ST_R[src]
Bit 5 - End of Channel Buffer Status
pub fn desc_ldst(&self) -> DESC_LDST_R[src]
Bit 6 - Descriptor Loaded Status
pub fn buff_count(&self) -> BUFF_COUNT_R[src]
Bits 16:31 - Buffer Byte Count
impl R<u32, Reg<u32, _USBHS_HSTDMANXTDSC>>[src]
pub fn nxt_dsc_add(&self) -> NXT_DSC_ADD_R[src]
Bits 0:31 - Next Descriptor Address
impl R<u32, Reg<u32, _USBHS_HSTDMAADDRESS>>[src]
pub fn buff_add(&self) -> BUFF_ADD_R[src]
Bits 0:31 - Buffer Address
impl R<u32, Reg<u32, _USBHS_HSTDMACONTROL>>[src]
pub fn chann_enb(&self) -> CHANN_ENB_R[src]
Bit 0 - Channel Enable Command
pub fn ldnxt_dsc(&self) -> LDNXT_DSC_R[src]
Bit 1 - Load Next Channel Transfer Descriptor Enable Command
pub fn end_tr_en(&self) -> END_TR_EN_R[src]
Bit 2 - End of Transfer Enable Control (OUT transfers only)
pub fn end_b_en(&self) -> END_B_EN_R[src]
Bit 3 - End of Buffer Enable Control
pub fn end_tr_it(&self) -> END_TR_IT_R[src]
Bit 4 - End of Transfer Interrupt Enable
pub fn end_buffit(&self) -> END_BUFFIT_R[src]
Bit 5 - End of Buffer Interrupt Enable
pub fn desc_ld_it(&self) -> DESC_LD_IT_R[src]
Bit 6 - Descriptor Loaded Interrupt Enable
pub fn burst_lck(&self) -> BURST_LCK_R[src]
Bit 7 - Burst Lock Enable
pub fn buff_length(&self) -> BUFF_LENGTH_R[src]
Bits 16:31 - Buffer Byte Length (Write-only)
impl R<u32, Reg<u32, _USBHS_HSTDMASTATUS>>[src]
pub fn chann_enb(&self) -> CHANN_ENB_R[src]
Bit 0 - Channel Enable Status
pub fn chann_act(&self) -> CHANN_ACT_R[src]
Bit 1 - Channel Active Status
pub fn end_tr_st(&self) -> END_TR_ST_R[src]
Bit 4 - End of Channel Transfer Status
pub fn end_bf_st(&self) -> END_BF_ST_R[src]
Bit 5 - End of Channel Buffer Status
pub fn desc_ldst(&self) -> DESC_LDST_R[src]
Bit 6 - Descriptor Loaded Status
pub fn buff_count(&self) -> BUFF_COUNT_R[src]
Bits 16:31 - Buffer Byte Count
impl R<u8, SPDCONF_A>[src]
pub fn variant(&self) -> SPDCONF_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool[src]
Checks if the value of the field is LOW_POWER
pub fn is_high_speed(&self) -> bool[src]
Checks if the value of the field is HIGH_SPEED
pub fn is_forced_fs(&self) -> bool[src]
Checks if the value of the field is FORCED_FS
impl R<u32, Reg<u32, _USBHS_DEVCTRL>>[src]
pub fn uadd(&self) -> UADD_R[src]
Bits 0:6 - USB Address
pub fn adden(&self) -> ADDEN_R[src]
Bit 7 - Address Enable
pub fn detach(&self) -> DETACH_R[src]
Bit 8 - Detach
pub fn rmwkup(&self) -> RMWKUP_R[src]
Bit 9 - Remote Wake-Up
pub fn spdconf(&self) -> SPDCONF_R[src]
Bits 10:11 - Mode Configuration
pub fn ls(&self) -> LS_R[src]
Bit 12 - Low-Speed Mode Force
pub fn tstj(&self) -> TSTJ_R[src]
Bit 13 - Test mode J
pub fn tstk(&self) -> TSTK_R[src]
Bit 14 - Test mode K
pub fn tstpckt(&self) -> TSTPCKT_R[src]
Bit 15 - Test packet mode
pub fn opmode2(&self) -> OPMODE2_R[src]
Bit 16 - Specific Operational mode
impl R<u32, Reg<u32, _USBHS_DEVISR>>[src]
pub fn susp(&self) -> SUSP_R[src]
Bit 0 - Suspend Interrupt
pub fn msof(&self) -> MSOF_R[src]
Bit 1 - Micro Start of Frame Interrupt
pub fn sof(&self) -> SOF_R[src]
Bit 2 - Start of Frame Interrupt
pub fn eorst(&self) -> EORST_R[src]
Bit 3 - End of Reset Interrupt
pub fn wakeup(&self) -> WAKEUP_R[src]
Bit 4 - Wake-Up Interrupt
pub fn eorsm(&self) -> EORSM_R[src]
Bit 5 - End of Resume Interrupt
pub fn uprsm(&self) -> UPRSM_R[src]
Bit 6 - Upstream Resume Interrupt
pub fn pep_0(&self) -> PEP_0_R[src]
Bit 12 - Endpoint 0 Interrupt
pub fn pep_1(&self) -> PEP_1_R[src]
Bit 13 - Endpoint 1 Interrupt
pub fn pep_2(&self) -> PEP_2_R[src]
Bit 14 - Endpoint 2 Interrupt
pub fn pep_3(&self) -> PEP_3_R[src]
Bit 15 - Endpoint 3 Interrupt
pub fn pep_4(&self) -> PEP_4_R[src]
Bit 16 - Endpoint 4 Interrupt
pub fn pep_5(&self) -> PEP_5_R[src]
Bit 17 - Endpoint 5 Interrupt
pub fn pep_6(&self) -> PEP_6_R[src]
Bit 18 - Endpoint 6 Interrupt
pub fn pep_7(&self) -> PEP_7_R[src]
Bit 19 - Endpoint 7 Interrupt
pub fn pep_8(&self) -> PEP_8_R[src]
Bit 20 - Endpoint 8 Interrupt
pub fn pep_9(&self) -> PEP_9_R[src]
Bit 21 - Endpoint 9 Interrupt
pub fn dma_1(&self) -> DMA_1_R[src]
Bit 25 - DMA Channel 1 Interrupt
pub fn dma_2(&self) -> DMA_2_R[src]
Bit 26 - DMA Channel 2 Interrupt
pub fn dma_3(&self) -> DMA_3_R[src]
Bit 27 - DMA Channel 3 Interrupt
pub fn dma_4(&self) -> DMA_4_R[src]
Bit 28 - DMA Channel 4 Interrupt
pub fn dma_5(&self) -> DMA_5_R[src]
Bit 29 - DMA Channel 5 Interrupt
pub fn dma_6(&self) -> DMA_6_R[src]
Bit 30 - DMA Channel 6 Interrupt
pub fn dma_7(&self) -> DMA_7_R[src]
Bit 31 - DMA Channel 7 Interrupt
impl R<u32, Reg<u32, _USBHS_DEVIMR>>[src]
pub fn suspe(&self) -> SUSPE_R[src]
Bit 0 - Suspend Interrupt Mask
pub fn msofe(&self) -> MSOFE_R[src]
Bit 1 - Micro Start of Frame Interrupt Mask
pub fn sofe(&self) -> SOFE_R[src]
Bit 2 - Start of Frame Interrupt Mask
pub fn eorste(&self) -> EORSTE_R[src]
Bit 3 - End of Reset Interrupt Mask
pub fn wakeupe(&self) -> WAKEUPE_R[src]
Bit 4 - Wake-Up Interrupt Mask
pub fn eorsme(&self) -> EORSME_R[src]
Bit 5 - End of Resume Interrupt Mask
pub fn uprsme(&self) -> UPRSME_R[src]
Bit 6 - Upstream Resume Interrupt Mask
pub fn pep_0(&self) -> PEP_0_R[src]
Bit 12 - Endpoint 0 Interrupt Mask
pub fn pep_1(&self) -> PEP_1_R[src]
Bit 13 - Endpoint 1 Interrupt Mask
pub fn pep_2(&self) -> PEP_2_R[src]
Bit 14 - Endpoint 2 Interrupt Mask
pub fn pep_3(&self) -> PEP_3_R[src]
Bit 15 - Endpoint 3 Interrupt Mask
pub fn pep_4(&self) -> PEP_4_R[src]
Bit 16 - Endpoint 4 Interrupt Mask
pub fn pep_5(&self) -> PEP_5_R[src]
Bit 17 - Endpoint 5 Interrupt Mask
pub fn pep_6(&self) -> PEP_6_R[src]
Bit 18 - Endpoint 6 Interrupt Mask
pub fn pep_7(&self) -> PEP_7_R[src]
Bit 19 - Endpoint 7 Interrupt Mask
pub fn pep_8(&self) -> PEP_8_R[src]
Bit 20 - Endpoint 8 Interrupt Mask
pub fn pep_9(&self) -> PEP_9_R[src]
Bit 21 - Endpoint 9 Interrupt Mask
pub fn dma_1(&self) -> DMA_1_R[src]
Bit 25 - DMA Channel 1 Interrupt Mask
pub fn dma_2(&self) -> DMA_2_R[src]
Bit 26 - DMA Channel 2 Interrupt Mask
pub fn dma_3(&self) -> DMA_3_R[src]
Bit 27 - DMA Channel 3 Interrupt Mask
pub fn dma_4(&self) -> DMA_4_R[src]
Bit 28 - DMA Channel 4 Interrupt Mask
pub fn dma_5(&self) -> DMA_5_R[src]
Bit 29 - DMA Channel 5 Interrupt Mask
pub fn dma_6(&self) -> DMA_6_R[src]
Bit 30 - DMA Channel 6 Interrupt Mask
pub fn dma_7(&self) -> DMA_7_R[src]
Bit 31 - DMA Channel 7 Interrupt Mask
impl R<u32, Reg<u32, _USBHS_DEVEPT>>[src]
pub fn epen0(&self) -> EPEN0_R[src]
Bit 0 - Endpoint 0 Enable
pub fn epen1(&self) -> EPEN1_R[src]
Bit 1 - Endpoint 1 Enable
pub fn epen2(&self) -> EPEN2_R[src]
Bit 2 - Endpoint 2 Enable
pub fn epen3(&self) -> EPEN3_R[src]
Bit 3 - Endpoint 3 Enable
pub fn epen4(&self) -> EPEN4_R[src]
Bit 4 - Endpoint 4 Enable
pub fn epen5(&self) -> EPEN5_R[src]
Bit 5 - Endpoint 5 Enable
pub fn epen6(&self) -> EPEN6_R[src]
Bit 6 - Endpoint 6 Enable
pub fn epen7(&self) -> EPEN7_R[src]
Bit 7 - Endpoint 7 Enable
pub fn epen8(&self) -> EPEN8_R[src]
Bit 8 - Endpoint 8 Enable
pub fn epen9(&self) -> EPEN9_R[src]
Bit 9 - Endpoint 9 Enable
pub fn eprst0(&self) -> EPRST0_R[src]
Bit 16 - Endpoint 0 Reset
pub fn eprst1(&self) -> EPRST1_R[src]
Bit 17 - Endpoint 1 Reset
pub fn eprst2(&self) -> EPRST2_R[src]
Bit 18 - Endpoint 2 Reset
pub fn eprst3(&self) -> EPRST3_R[src]
Bit 19 - Endpoint 3 Reset
pub fn eprst4(&self) -> EPRST4_R[src]
Bit 20 - Endpoint 4 Reset
pub fn eprst5(&self) -> EPRST5_R[src]
Bit 21 - Endpoint 5 Reset
pub fn eprst6(&self) -> EPRST6_R[src]
Bit 22 - Endpoint 6 Reset
pub fn eprst7(&self) -> EPRST7_R[src]
Bit 23 - Endpoint 7 Reset
pub fn eprst8(&self) -> EPRST8_R[src]
Bit 24 - Endpoint 8 Reset
pub fn eprst9(&self) -> EPRST9_R[src]
Bit 25 - Endpoint 9 Reset
impl R<u32, Reg<u32, _USBHS_DEVFNUM>>[src]
pub fn mfnum(&self) -> MFNUM_R[src]
Bits 0:2 - Micro Frame Number
pub fn fnum(&self) -> FNUM_R[src]
Bits 3:13 - Frame Number
pub fn fncerr(&self) -> FNCERR_R[src]
Bit 15 - Frame Number CRC Error
impl R<u8, EPBK_A>[src]
pub fn variant(&self) -> Variant<u8, EPBK_A>[src]
Get enumerated values variant
pub fn is_1_bank(&self) -> bool[src]
Checks if the value of the field is _1_BANK
pub fn is_2_bank(&self) -> bool[src]
Checks if the value of the field is _2_BANK
pub fn is_3_bank(&self) -> bool[src]
Checks if the value of the field is _3_BANK
impl R<u8, EPSIZE_A>[src]
pub fn variant(&self) -> EPSIZE_A[src]
Get enumerated values variant
pub fn is_8_byte(&self) -> bool[src]
Checks if the value of the field is _8_BYTE
pub fn is_16_byte(&self) -> bool[src]
Checks if the value of the field is _16_BYTE
pub fn is_32_byte(&self) -> bool[src]
Checks if the value of the field is _32_BYTE
pub fn is_64_byte(&self) -> bool[src]
Checks if the value of the field is _64_BYTE
pub fn is_128_byte(&self) -> bool[src]
Checks if the value of the field is _128_BYTE
pub fn is_256_byte(&self) -> bool[src]
Checks if the value of the field is _256_BYTE
pub fn is_512_byte(&self) -> bool[src]
Checks if the value of the field is _512_BYTE
pub fn is_1024_byte(&self) -> bool[src]
Checks if the value of the field is _1024_BYTE
impl R<bool, EPDIR_A>[src]
pub fn variant(&self) -> EPDIR_A[src]
Get enumerated values variant
pub fn is_out(&self) -> bool[src]
Checks if the value of the field is OUT
pub fn is_in_(&self) -> bool[src]
Checks if the value of the field is IN
impl R<u8, EPTYPE_A>[src]
pub fn variant(&self) -> EPTYPE_A[src]
Get enumerated values variant
pub fn is_ctrl(&self) -> bool[src]
Checks if the value of the field is CTRL
pub fn is_iso(&self) -> bool[src]
Checks if the value of the field is ISO
pub fn is_blk(&self) -> bool[src]
Checks if the value of the field is BLK
pub fn is_intrpt(&self) -> bool[src]
Checks if the value of the field is INTRPT
impl R<u8, NBTRANS_A>[src]
pub fn variant(&self) -> NBTRANS_A[src]
Get enumerated values variant
pub fn is_0_trans(&self) -> bool[src]
Checks if the value of the field is _0_TRANS
pub fn is_1_trans(&self) -> bool[src]
Checks if the value of the field is _1_TRANS
pub fn is_2_trans(&self) -> bool[src]
Checks if the value of the field is _2_TRANS
pub fn is_3_trans(&self) -> bool[src]
Checks if the value of the field is _3_TRANS
impl R<u32, Reg<u32, _USBHS_DEVEPTCFG>>[src]
pub fn alloc(&self) -> ALLOC_R[src]
Bit 1 - Endpoint Memory Allocate
pub fn epbk(&self) -> EPBK_R[src]
Bits 2:3 - Endpoint Banks
pub fn epsize(&self) -> EPSIZE_R[src]
Bits 4:6 - Endpoint Size
pub fn epdir(&self) -> EPDIR_R[src]
Bit 8 - Endpoint Direction
pub fn autosw(&self) -> AUTOSW_R[src]
Bit 9 - Automatic Switch
pub fn eptype(&self) -> EPTYPE_R[src]
Bits 11:12 - Endpoint Type
pub fn nbtrans(&self) -> NBTRANS_R[src]
Bits 13:14 - Number of transactions per microframe for isochronous endpoint
impl R<u8, DTSEQ_A>[src]
pub fn variant(&self) -> DTSEQ_A[src]
Get enumerated values variant
pub fn is_data0(&self) -> bool[src]
Checks if the value of the field is DATA0
pub fn is_data1(&self) -> bool[src]
Checks if the value of the field is DATA1
pub fn is_data2(&self) -> bool[src]
Checks if the value of the field is DATA2
pub fn is_mdata(&self) -> bool[src]
Checks if the value of the field is MDATA
impl R<u8, NBUSYBK_A>[src]
pub fn variant(&self) -> NBUSYBK_A[src]
Get enumerated values variant
pub fn is_0_busy(&self) -> bool[src]
Checks if the value of the field is _0_BUSY
pub fn is_1_busy(&self) -> bool[src]
Checks if the value of the field is _1_BUSY
pub fn is_2_busy(&self) -> bool[src]
Checks if the value of the field is _2_BUSY
pub fn is_3_busy(&self) -> bool[src]
Checks if the value of the field is _3_BUSY
impl R<u8, CURRBK_A>[src]
pub fn variant(&self) -> Variant<u8, CURRBK_A>[src]
Get enumerated values variant
pub fn is_bank0(&self) -> bool[src]
Checks if the value of the field is BANK0
pub fn is_bank1(&self) -> bool[src]
Checks if the value of the field is BANK1
pub fn is_bank2(&self) -> bool[src]
Checks if the value of the field is BANK2
impl R<u32, Reg<u32, _USBHS_DEVEPTISR_CTRL_MODE>>[src]
pub fn txini(&self) -> TXINI_R[src]
Bit 0 - Transmitted IN Data Interrupt
pub fn rxouti(&self) -> RXOUTI_R[src]
Bit 1 - Received OUT Data Interrupt
pub fn rxstpi(&self) -> RXSTPI_R[src]
Bit 2 - Received SETUP Interrupt
pub fn nakouti(&self) -> NAKOUTI_R[src]
Bit 3 - NAKed OUT Interrupt
pub fn nakini(&self) -> NAKINI_R[src]
Bit 4 - NAKed IN Interrupt
pub fn overfi(&self) -> OVERFI_R[src]
Bit 5 - Overflow Interrupt
pub fn stalledi(&self) -> STALLEDI_R[src]
Bit 6 - STALLed Interrupt
pub fn shortpacket(&self) -> SHORTPACKET_R[src]
Bit 7 - Short Packet Interrupt
pub fn dtseq(&self) -> DTSEQ_R[src]
Bits 8:9 - Data Toggle Sequence
pub fn nbusybk(&self) -> NBUSYBK_R[src]
Bits 12:13 - Number of Busy Banks
pub fn currbk(&self) -> CURRBK_R[src]
Bits 14:15 - Current Bank
pub fn rwall(&self) -> RWALL_R[src]
Bit 16 - Read/Write Allowed
pub fn ctrldir(&self) -> CTRLDIR_R[src]
Bit 17 - Control Direction
pub fn cfgok(&self) -> CFGOK_R[src]
Bit 18 - Configuration OK Status
pub fn byct(&self) -> BYCT_R[src]
Bits 20:30 - Byte Count
impl R<u8, DTSEQ_A>[src]
pub fn variant(&self) -> DTSEQ_A[src]
Get enumerated values variant
pub fn is_data0(&self) -> bool[src]
Checks if the value of the field is DATA0
pub fn is_data1(&self) -> bool[src]
Checks if the value of the field is DATA1
pub fn is_data2(&self) -> bool[src]
Checks if the value of the field is DATA2
pub fn is_mdata(&self) -> bool[src]
Checks if the value of the field is MDATA
impl R<u8, NBUSYBK_A>[src]
pub fn variant(&self) -> NBUSYBK_A[src]
Get enumerated values variant
pub fn is_0_busy(&self) -> bool[src]
Checks if the value of the field is _0_BUSY
pub fn is_1_busy(&self) -> bool[src]
Checks if the value of the field is _1_BUSY
pub fn is_2_busy(&self) -> bool[src]
Checks if the value of the field is _2_BUSY
pub fn is_3_busy(&self) -> bool[src]
Checks if the value of the field is _3_BUSY
impl R<u8, CURRBK_A>[src]
pub fn variant(&self) -> Variant<u8, CURRBK_A>[src]
Get enumerated values variant
pub fn is_bank0(&self) -> bool[src]
Checks if the value of the field is BANK0
pub fn is_bank1(&self) -> bool[src]
Checks if the value of the field is BANK1
pub fn is_bank2(&self) -> bool[src]
Checks if the value of the field is BANK2
impl R<u32, Reg<u32, _USBHS_DEVEPTISR_ISO_MODE>>[src]
pub fn txini(&self) -> TXINI_R[src]
Bit 0 - Transmitted IN Data Interrupt
pub fn rxouti(&self) -> RXOUTI_R[src]
Bit 1 - Received OUT Data Interrupt
pub fn underfi(&self) -> UNDERFI_R[src]
Bit 2 - Underflow Interrupt
pub fn hbisoinerri(&self) -> HBISOINERRI_R[src]
Bit 3 - High Bandwidth Isochronous IN Underflow Error Interrupt
pub fn hbisoflushi(&self) -> HBISOFLUSHI_R[src]
Bit 4 - High Bandwidth Isochronous IN Flush Interrupt
pub fn overfi(&self) -> OVERFI_R[src]
Bit 5 - Overflow Interrupt
pub fn crcerri(&self) -> CRCERRI_R[src]
Bit 6 - CRC Error Interrupt
pub fn shortpacket(&self) -> SHORTPACKET_R[src]
Bit 7 - Short Packet Interrupt
pub fn dtseq(&self) -> DTSEQ_R[src]
Bits 8:9 - Data Toggle Sequence
pub fn errortrans(&self) -> ERRORTRANS_R[src]
Bit 10 - High-bandwidth Isochronous OUT Endpoint Transaction Error Interrupt
pub fn nbusybk(&self) -> NBUSYBK_R[src]
Bits 12:13 - Number of Busy Banks
pub fn currbk(&self) -> CURRBK_R[src]
Bits 14:15 - Current Bank
pub fn rwall(&self) -> RWALL_R[src]
Bit 16 - Read/Write Allowed
pub fn cfgok(&self) -> CFGOK_R[src]
Bit 18 - Configuration OK Status
pub fn byct(&self) -> BYCT_R[src]
Bits 20:30 - Byte Count
impl R<u8, DTSEQ_A>[src]
pub fn variant(&self) -> DTSEQ_A[src]
Get enumerated values variant
pub fn is_data0(&self) -> bool[src]
Checks if the value of the field is DATA0
pub fn is_data1(&self) -> bool[src]
Checks if the value of the field is DATA1
pub fn is_data2(&self) -> bool[src]
Checks if the value of the field is DATA2
pub fn is_mdata(&self) -> bool[src]
Checks if the value of the field is MDATA
impl R<u8, NBUSYBK_A>[src]
pub fn variant(&self) -> NBUSYBK_A[src]
Get enumerated values variant
pub fn is_0_busy(&self) -> bool[src]
Checks if the value of the field is _0_BUSY
pub fn is_1_busy(&self) -> bool[src]
Checks if the value of the field is _1_BUSY
pub fn is_2_busy(&self) -> bool[src]
Checks if the value of the field is _2_BUSY
pub fn is_3_busy(&self) -> bool[src]
Checks if the value of the field is _3_BUSY
impl R<u8, CURRBK_A>[src]
pub fn variant(&self) -> Variant<u8, CURRBK_A>[src]
Get enumerated values variant
pub fn is_bank0(&self) -> bool[src]
Checks if the value of the field is BANK0
pub fn is_bank1(&self) -> bool[src]
Checks if the value of the field is BANK1
pub fn is_bank2(&self) -> bool[src]
Checks if the value of the field is BANK2
impl R<u32, Reg<u32, _USBHS_DEVEPTISR_BLK_MODE>>[src]
pub fn txini(&self) -> TXINI_R[src]
Bit 0 - Transmitted IN Data Interrupt
pub fn rxouti(&self) -> RXOUTI_R[src]
Bit 1 - Received OUT Data Interrupt
pub fn rxstpi(&self) -> RXSTPI_R[src]
Bit 2 - Received SETUP Interrupt
pub fn nakouti(&self) -> NAKOUTI_R[src]
Bit 3 - NAKed OUT Interrupt
pub fn nakini(&self) -> NAKINI_R[src]
Bit 4 - NAKed IN Interrupt
pub fn overfi(&self) -> OVERFI_R[src]
Bit 5 - Overflow Interrupt
pub fn stalledi(&self) -> STALLEDI_R[src]
Bit 6 - STALLed Interrupt
pub fn shortpacket(&self) -> SHORTPACKET_R[src]
Bit 7 - Short Packet Interrupt
pub fn dtseq(&self) -> DTSEQ_R[src]
Bits 8:9 - Data Toggle Sequence
pub fn nbusybk(&self) -> NBUSYBK_R[src]
Bits 12:13 - Number of Busy Banks
pub fn currbk(&self) -> CURRBK_R[src]
Bits 14:15 - Current Bank
pub fn rwall(&self) -> RWALL_R[src]
Bit 16 - Read/Write Allowed
pub fn ctrldir(&self) -> CTRLDIR_R[src]
Bit 17 - Control Direction
pub fn cfgok(&self) -> CFGOK_R[src]
Bit 18 - Configuration OK Status
pub fn byct(&self) -> BYCT_R[src]
Bits 20:30 - Byte Count
impl R<u8, DTSEQ_A>[src]
pub fn variant(&self) -> DTSEQ_A[src]
Get enumerated values variant
pub fn is_data0(&self) -> bool[src]
Checks if the value of the field is DATA0
pub fn is_data1(&self) -> bool[src]
Checks if the value of the field is DATA1
pub fn is_data2(&self) -> bool[src]
Checks if the value of the field is DATA2
pub fn is_mdata(&self) -> bool[src]
Checks if the value of the field is MDATA
impl R<u8, NBUSYBK_A>[src]
pub fn variant(&self) -> NBUSYBK_A[src]
Get enumerated values variant
pub fn is_0_busy(&self) -> bool[src]
Checks if the value of the field is _0_BUSY
pub fn is_1_busy(&self) -> bool[src]
Checks if the value of the field is _1_BUSY
pub fn is_2_busy(&self) -> bool[src]
Checks if the value of the field is _2_BUSY
pub fn is_3_busy(&self) -> bool[src]
Checks if the value of the field is _3_BUSY
impl R<u8, CURRBK_A>[src]
pub fn variant(&self) -> Variant<u8, CURRBK_A>[src]
Get enumerated values variant
pub fn is_bank0(&self) -> bool[src]
Checks if the value of the field is BANK0
pub fn is_bank1(&self) -> bool[src]
Checks if the value of the field is BANK1
pub fn is_bank2(&self) -> bool[src]
Checks if the value of the field is BANK2
impl R<u32, Reg<u32, _USBHS_DEVEPTISR_INTRPT_MODE>>[src]
pub fn txini(&self) -> TXINI_R[src]
Bit 0 - Transmitted IN Data Interrupt
pub fn rxouti(&self) -> RXOUTI_R[src]
Bit 1 - Received OUT Data Interrupt
pub fn rxstpi(&self) -> RXSTPI_R[src]
Bit 2 - Received SETUP Interrupt
pub fn nakouti(&self) -> NAKOUTI_R[src]
Bit 3 - NAKed OUT Interrupt
pub fn nakini(&self) -> NAKINI_R[src]
Bit 4 - NAKed IN Interrupt
pub fn overfi(&self) -> OVERFI_R[src]
Bit 5 - Overflow Interrupt
pub fn stalledi(&self) -> STALLEDI_R[src]
Bit 6 - STALLed Interrupt
pub fn shortpacket(&self) -> SHORTPACKET_R[src]
Bit 7 - Short Packet Interrupt
pub fn dtseq(&self) -> DTSEQ_R[src]
Bits 8:9 - Data Toggle Sequence
pub fn nbusybk(&self) -> NBUSYBK_R[src]
Bits 12:13 - Number of Busy Banks
pub fn currbk(&self) -> CURRBK_R[src]
Bits 14:15 - Current Bank
pub fn rwall(&self) -> RWALL_R[src]
Bit 16 - Read/Write Allowed
pub fn ctrldir(&self) -> CTRLDIR_R[src]
Bit 17 - Control Direction
pub fn cfgok(&self) -> CFGOK_R[src]
Bit 18 - Configuration OK Status
pub fn byct(&self) -> BYCT_R[src]
Bits 20:30 - Byte Count
impl R<u32, Reg<u32, _USBHS_DEVEPTIMR_CTRL_MODE>>[src]
pub fn txine(&self) -> TXINE_R[src]
Bit 0 - Transmitted IN Data Interrupt
pub fn rxoute(&self) -> RXOUTE_R[src]
Bit 1 - Received OUT Data Interrupt
pub fn rxstpe(&self) -> RXSTPE_R[src]
Bit 2 - Received SETUP Interrupt
pub fn nakoute(&self) -> NAKOUTE_R[src]
Bit 3 - NAKed OUT Interrupt
pub fn nakine(&self) -> NAKINE_R[src]
Bit 4 - NAKed IN Interrupt
pub fn overfe(&self) -> OVERFE_R[src]
Bit 5 - Overflow Interrupt
pub fn stallede(&self) -> STALLEDE_R[src]
Bit 6 - STALLed Interrupt
pub fn shortpackete(&self) -> SHORTPACKETE_R[src]
Bit 7 - Short Packet Interrupt
pub fn nbusybke(&self) -> NBUSYBKE_R[src]
Bit 12 - Number of Busy Banks Interrupt
pub fn killbk(&self) -> KILLBK_R[src]
Bit 13 - Kill IN Bank
pub fn fifocon(&self) -> FIFOCON_R[src]
Bit 14 - FIFO Control
pub fn epdishdma(&self) -> EPDISHDMA_R[src]
Bit 16 - Endpoint Interrupts Disable HDMA Request
pub fn nyetdis(&self) -> NYETDIS_R[src]
Bit 17 - NYET Token Disable
pub fn rstdt(&self) -> RSTDT_R[src]
Bit 18 - Reset Data Toggle
pub fn stallrq(&self) -> STALLRQ_R[src]
Bit 19 - STALL Request
impl R<u32, Reg<u32, _USBHS_DEVEPTIMR_ISO_MODE>>[src]
pub fn txine(&self) -> TXINE_R[src]
Bit 0 - Transmitted IN Data Interrupt
pub fn rxoute(&self) -> RXOUTE_R[src]
Bit 1 - Received OUT Data Interrupt
pub fn underfe(&self) -> UNDERFE_R[src]
Bit 2 - Underflow Interrupt
pub fn hbisoinerre(&self) -> HBISOINERRE_R[src]
Bit 3 - High Bandwidth Isochronous IN Underflow Error Interrupt
pub fn hbisoflushe(&self) -> HBISOFLUSHE_R[src]
Bit 4 - High Bandwidth Isochronous IN Flush Interrupt
pub fn overfe(&self) -> OVERFE_R[src]
Bit 5 - Overflow Interrupt
pub fn crcerre(&self) -> CRCERRE_R[src]
Bit 6 - CRC Error Interrupt
pub fn shortpackete(&self) -> SHORTPACKETE_R[src]
Bit 7 - Short Packet Interrupt
pub fn mdatae(&self) -> MDATAE_R[src]
Bit 8 - MData Interrupt
pub fn dataxe(&self) -> DATAXE_R[src]
Bit 9 - DataX Interrupt
pub fn errortranse(&self) -> ERRORTRANSE_R[src]
Bit 10 - Transaction Error Interrupt
pub fn nbusybke(&self) -> NBUSYBKE_R[src]
Bit 12 - Number of Busy Banks Interrupt
pub fn killbk(&self) -> KILLBK_R[src]
Bit 13 - Kill IN Bank
pub fn fifocon(&self) -> FIFOCON_R[src]
Bit 14 - FIFO Control
pub fn epdishdma(&self) -> EPDISHDMA_R[src]
Bit 16 - Endpoint Interrupts Disable HDMA Request
pub fn rstdt(&self) -> RSTDT_R[src]
Bit 18 - Reset Data Toggle
impl R<u32, Reg<u32, _USBHS_DEVEPTIMR_BLK_MODE>>[src]
pub fn txine(&self) -> TXINE_R[src]
Bit 0 - Transmitted IN Data Interrupt
pub fn rxoute(&self) -> RXOUTE_R[src]
Bit 1 - Received OUT Data Interrupt
pub fn rxstpe(&self) -> RXSTPE_R[src]
Bit 2 - Received SETUP Interrupt
pub fn nakoute(&self) -> NAKOUTE_R[src]
Bit 3 - NAKed OUT Interrupt
pub fn nakine(&self) -> NAKINE_R[src]
Bit 4 - NAKed IN Interrupt
pub fn overfe(&self) -> OVERFE_R[src]
Bit 5 - Overflow Interrupt
pub fn stallede(&self) -> STALLEDE_R[src]
Bit 6 - STALLed Interrupt
pub fn shortpackete(&self) -> SHORTPACKETE_R[src]
Bit 7 - Short Packet Interrupt
pub fn nbusybke(&self) -> NBUSYBKE_R[src]
Bit 12 - Number of Busy Banks Interrupt
pub fn killbk(&self) -> KILLBK_R[src]
Bit 13 - Kill IN Bank
pub fn fifocon(&self) -> FIFOCON_R[src]
Bit 14 - FIFO Control
pub fn epdishdma(&self) -> EPDISHDMA_R[src]
Bit 16 - Endpoint Interrupts Disable HDMA Request
pub fn nyetdis(&self) -> NYETDIS_R[src]
Bit 17 - NYET Token Disable
pub fn rstdt(&self) -> RSTDT_R[src]
Bit 18 - Reset Data Toggle
pub fn stallrq(&self) -> STALLRQ_R[src]
Bit 19 - STALL Request
impl R<u32, Reg<u32, _USBHS_DEVEPTIMR_INTRPT_MODE>>[src]
pub fn txine(&self) -> TXINE_R[src]
Bit 0 - Transmitted IN Data Interrupt
pub fn rxoute(&self) -> RXOUTE_R[src]
Bit 1 - Received OUT Data Interrupt
pub fn rxstpe(&self) -> RXSTPE_R[src]
Bit 2 - Received SETUP Interrupt
pub fn nakoute(&self) -> NAKOUTE_R[src]
Bit 3 - NAKed OUT Interrupt
pub fn nakine(&self) -> NAKINE_R[src]
Bit 4 - NAKed IN Interrupt
pub fn overfe(&self) -> OVERFE_R[src]
Bit 5 - Overflow Interrupt
pub fn stallede(&self) -> STALLEDE_R[src]
Bit 6 - STALLed Interrupt
pub fn shortpackete(&self) -> SHORTPACKETE_R[src]
Bit 7 - Short Packet Interrupt
pub fn nbusybke(&self) -> NBUSYBKE_R[src]
Bit 12 - Number of Busy Banks Interrupt
pub fn killbk(&self) -> KILLBK_R[src]
Bit 13 - Kill IN Bank
pub fn fifocon(&self) -> FIFOCON_R[src]
Bit 14 - FIFO Control
pub fn epdishdma(&self) -> EPDISHDMA_R[src]
Bit 16 - Endpoint Interrupts Disable HDMA Request
pub fn nyetdis(&self) -> NYETDIS_R[src]
Bit 17 - NYET Token Disable
pub fn rstdt(&self) -> RSTDT_R[src]
Bit 18 - Reset Data Toggle
pub fn stallrq(&self) -> STALLRQ_R[src]
Bit 19 - STALL Request
impl R<u8, SPDCONF_A>[src]
pub fn variant(&self) -> SPDCONF_A[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool[src]
Checks if the value of the field is NORMAL
pub fn is_low_power(&self) -> bool[src]
Checks if the value of the field is LOW_POWER
pub fn is_high_speed(&self) -> bool[src]
Checks if the value of the field is HIGH_SPEED
pub fn is_forced_fs(&self) -> bool[src]
Checks if the value of the field is FORCED_FS
impl R<u32, Reg<u32, _USBHS_HSTCTRL>>[src]
pub fn sofe(&self) -> SOFE_R[src]
Bit 8 - Start of Frame Generation Enable
pub fn reset(&self) -> RESET_R[src]
Bit 9 - Send USB Reset
pub fn resume(&self) -> RESUME_R[src]
Bit 10 - Send USB Resume
pub fn spdconf(&self) -> SPDCONF_R[src]
Bits 12:13 - Mode Configuration
impl R<u32, Reg<u32, _USBHS_HSTISR>>[src]
pub fn dconni(&self) -> DCONNI_R[src]
Bit 0 - Device Connection Interrupt
pub fn ddisci(&self) -> DDISCI_R[src]
Bit 1 - Device Disconnection Interrupt
pub fn rsti(&self) -> RSTI_R[src]
Bit 2 - USB Reset Sent Interrupt
pub fn rsmedi(&self) -> RSMEDI_R[src]
Bit 3 - Downstream Resume Sent Interrupt
pub fn rxrsmi(&self) -> RXRSMI_R[src]
Bit 4 - Upstream Resume Received Interrupt
pub fn hsofi(&self) -> HSOFI_R[src]
Bit 5 - Host Start of Frame Interrupt
pub fn hwupi(&self) -> HWUPI_R[src]
Bit 6 - Host Wake-Up Interrupt
pub fn pep_0(&self) -> PEP_0_R[src]
Bit 8 - Pipe 0 Interrupt
pub fn pep_1(&self) -> PEP_1_R[src]
Bit 9 - Pipe 1 Interrupt
pub fn pep_2(&self) -> PEP_2_R[src]
Bit 10 - Pipe 2 Interrupt
pub fn pep_3(&self) -> PEP_3_R[src]
Bit 11 - Pipe 3 Interrupt
pub fn pep_4(&self) -> PEP_4_R[src]
Bit 12 - Pipe 4 Interrupt
pub fn pep_5(&self) -> PEP_5_R[src]
Bit 13 - Pipe 5 Interrupt
pub fn pep_6(&self) -> PEP_6_R[src]
Bit 14 - Pipe 6 Interrupt
pub fn pep_7(&self) -> PEP_7_R[src]
Bit 15 - Pipe 7 Interrupt
pub fn pep_8(&self) -> PEP_8_R[src]
Bit 16 - Pipe 8 Interrupt
pub fn pep_9(&self) -> PEP_9_R[src]
Bit 17 - Pipe 9 Interrupt
pub fn dma_0(&self) -> DMA_0_R[src]
Bit 25 - DMA Channel 0 Interrupt
pub fn dma_1(&self) -> DMA_1_R[src]
Bit 26 - DMA Channel 1 Interrupt
pub fn dma_2(&self) -> DMA_2_R[src]
Bit 27 - DMA Channel 2 Interrupt
pub fn dma_3(&self) -> DMA_3_R[src]
Bit 28 - DMA Channel 3 Interrupt
pub fn dma_4(&self) -> DMA_4_R[src]
Bit 29 - DMA Channel 4 Interrupt
pub fn dma_5(&self) -> DMA_5_R[src]
Bit 30 - DMA Channel 5 Interrupt
pub fn dma_6(&self) -> DMA_6_R[src]
Bit 31 - DMA Channel 6 Interrupt
impl R<u32, Reg<u32, _USBHS_HSTIMR>>[src]
pub fn dconnie(&self) -> DCONNIE_R[src]
Bit 0 - Device Connection Interrupt Enable
pub fn ddiscie(&self) -> DDISCIE_R[src]
Bit 1 - Device Disconnection Interrupt Enable
pub fn rstie(&self) -> RSTIE_R[src]
Bit 2 - USB Reset Sent Interrupt Enable
pub fn rsmedie(&self) -> RSMEDIE_R[src]
Bit 3 - Downstream Resume Sent Interrupt Enable
pub fn rxrsmie(&self) -> RXRSMIE_R[src]
Bit 4 - Upstream Resume Received Interrupt Enable
pub fn hsofie(&self) -> HSOFIE_R[src]
Bit 5 - Host Start of Frame Interrupt Enable
pub fn hwupie(&self) -> HWUPIE_R[src]
Bit 6 - Host Wake-Up Interrupt Enable
pub fn pep_0(&self) -> PEP_0_R[src]
Bit 8 - Pipe 0 Interrupt Enable
pub fn pep_1(&self) -> PEP_1_R[src]
Bit 9 - Pipe 1 Interrupt Enable
pub fn pep_2(&self) -> PEP_2_R[src]
Bit 10 - Pipe 2 Interrupt Enable
pub fn pep_3(&self) -> PEP_3_R[src]
Bit 11 - Pipe 3 Interrupt Enable
pub fn pep_4(&self) -> PEP_4_R[src]
Bit 12 - Pipe 4 Interrupt Enable
pub fn pep_5(&self) -> PEP_5_R[src]
Bit 13 - Pipe 5 Interrupt Enable
pub fn pep_6(&self) -> PEP_6_R[src]
Bit 14 - Pipe 6 Interrupt Enable
pub fn pep_7(&self) -> PEP_7_R[src]
Bit 15 - Pipe 7 Interrupt Enable
pub fn pep_8(&self) -> PEP_8_R[src]
Bit 16 - Pipe 8 Interrupt Enable
pub fn pep_9(&self) -> PEP_9_R[src]
Bit 17 - Pipe 9 Interrupt Enable
pub fn dma_0(&self) -> DMA_0_R[src]
Bit 25 - DMA Channel 0 Interrupt Enable
pub fn dma_1(&self) -> DMA_1_R[src]
Bit 26 - DMA Channel 1 Interrupt Enable
pub fn dma_2(&self) -> DMA_2_R[src]
Bit 27 - DMA Channel 2 Interrupt Enable
pub fn dma_3(&self) -> DMA_3_R[src]
Bit 28 - DMA Channel 3 Interrupt Enable
pub fn dma_4(&self) -> DMA_4_R[src]
Bit 29 - DMA Channel 4 Interrupt Enable
pub fn dma_5(&self) -> DMA_5_R[src]
Bit 30 - DMA Channel 5 Interrupt Enable
pub fn dma_6(&self) -> DMA_6_R[src]
Bit 31 - DMA Channel 6 Interrupt Enable
impl R<u32, Reg<u32, _USBHS_HSTPIP>>[src]
pub fn pen0(&self) -> PEN0_R[src]
Bit 0 - Pipe 0 Enable
pub fn pen1(&self) -> PEN1_R[src]
Bit 1 - Pipe 1 Enable
pub fn pen2(&self) -> PEN2_R[src]
Bit 2 - Pipe 2 Enable
pub fn pen3(&self) -> PEN3_R[src]
Bit 3 - Pipe 3 Enable
pub fn pen4(&self) -> PEN4_R[src]
Bit 4 - Pipe 4 Enable
pub fn pen5(&self) -> PEN5_R[src]
Bit 5 - Pipe 5 Enable
pub fn pen6(&self) -> PEN6_R[src]
Bit 6 - Pipe 6 Enable
pub fn pen7(&self) -> PEN7_R[src]
Bit 7 - Pipe 7 Enable
pub fn pen8(&self) -> PEN8_R[src]
Bit 8 - Pipe 8 Enable
pub fn prst0(&self) -> PRST0_R[src]
Bit 16 - Pipe 0 Reset
pub fn prst1(&self) -> PRST1_R[src]
Bit 17 - Pipe 1 Reset
pub fn prst2(&self) -> PRST2_R[src]
Bit 18 - Pipe 2 Reset
pub fn prst3(&self) -> PRST3_R[src]
Bit 19 - Pipe 3 Reset
pub fn prst4(&self) -> PRST4_R[src]
Bit 20 - Pipe 4 Reset
pub fn prst5(&self) -> PRST5_R[src]
Bit 21 - Pipe 5 Reset
pub fn prst6(&self) -> PRST6_R[src]
Bit 22 - Pipe 6 Reset
pub fn prst7(&self) -> PRST7_R[src]
Bit 23 - Pipe 7 Reset
pub fn prst8(&self) -> PRST8_R[src]
Bit 24 - Pipe 8 Reset
impl R<u32, Reg<u32, _USBHS_HSTFNUM>>[src]
pub fn mfnum(&self) -> MFNUM_R[src]
Bits 0:2 - Micro Frame Number
pub fn fnum(&self) -> FNUM_R[src]
Bits 3:13 - Frame Number
pub fn flenhigh(&self) -> FLENHIGH_R[src]
Bits 16:23 - Frame Length
impl R<u32, Reg<u32, _USBHS_HSTADDR1>>[src]
pub fn hstaddrp0(&self) -> HSTADDRP0_R[src]
Bits 0:6 - USB Host Address
pub fn hstaddrp1(&self) -> HSTADDRP1_R[src]
Bits 8:14 - USB Host Address
pub fn hstaddrp2(&self) -> HSTADDRP2_R[src]
Bits 16:22 - USB Host Address
pub fn hstaddrp3(&self) -> HSTADDRP3_R[src]
Bits 24:30 - USB Host Address
impl R<u32, Reg<u32, _USBHS_HSTADDR2>>[src]
pub fn hstaddrp4(&self) -> HSTADDRP4_R[src]
Bits 0:6 - USB Host Address
pub fn hstaddrp5(&self) -> HSTADDRP5_R[src]
Bits 8:14 - USB Host Address
pub fn hstaddrp6(&self) -> HSTADDRP6_R[src]
Bits 16:22 - USB Host Address
pub fn hstaddrp7(&self) -> HSTADDRP7_R[src]
Bits 24:30 - USB Host Address
impl R<u32, Reg<u32, _USBHS_HSTADDR3>>[src]
pub fn hstaddrp8(&self) -> HSTADDRP8_R[src]
Bits 0:6 - USB Host Address
pub fn hstaddrp9(&self) -> HSTADDRP9_R[src]
Bits 8:14 - USB Host Address
impl R<u8, PBK_A>[src]
pub fn variant(&self) -> Variant<u8, PBK_A>[src]
Get enumerated values variant
pub fn is_1_bank(&self) -> bool[src]
Checks if the value of the field is _1_BANK
pub fn is_2_bank(&self) -> bool[src]
Checks if the value of the field is _2_BANK
pub fn is_3_bank(&self) -> bool[src]
Checks if the value of the field is _3_BANK
impl R<u8, PSIZE_A>[src]
pub fn variant(&self) -> PSIZE_A[src]
Get enumerated values variant
pub fn is_8_byte(&self) -> bool[src]
Checks if the value of the field is _8_BYTE
pub fn is_16_byte(&self) -> bool[src]
Checks if the value of the field is _16_BYTE
pub fn is_32_byte(&self) -> bool[src]
Checks if the value of the field is _32_BYTE
pub fn is_64_byte(&self) -> bool[src]
Checks if the value of the field is _64_BYTE
pub fn is_128_byte(&self) -> bool[src]
Checks if the value of the field is _128_BYTE
pub fn is_256_byte(&self) -> bool[src]
Checks if the value of the field is _256_BYTE
pub fn is_512_byte(&self) -> bool[src]
Checks if the value of the field is _512_BYTE
pub fn is_1024_byte(&self) -> bool[src]
Checks if the value of the field is _1024_BYTE
impl R<u8, PTOKEN_A>[src]
pub fn variant(&self) -> Variant<u8, PTOKEN_A>[src]
Get enumerated values variant
pub fn is_setup(&self) -> bool[src]
Checks if the value of the field is SETUP
pub fn is_in_(&self) -> bool[src]
Checks if the value of the field is IN
pub fn is_out(&self) -> bool[src]
Checks if the value of the field is OUT
impl R<u8, PTYPE_A>[src]
pub fn variant(&self) -> PTYPE_A[src]
Get enumerated values variant
pub fn is_ctrl(&self) -> bool[src]
Checks if the value of the field is CTRL
pub fn is_iso(&self) -> bool[src]
Checks if the value of the field is ISO
pub fn is_blk(&self) -> bool[src]
Checks if the value of the field is BLK
pub fn is_intrpt(&self) -> bool[src]
Checks if the value of the field is INTRPT
impl R<u32, Reg<u32, _USBHS_HSTPIPCFG>>[src]
pub fn alloc(&self) -> ALLOC_R[src]
Bit 1 - Pipe Memory Allocate
pub fn pbk(&self) -> PBK_R[src]
Bits 2:3 - Pipe Banks
pub fn psize(&self) -> PSIZE_R[src]
Bits 4:6 - Pipe Size
pub fn ptoken(&self) -> PTOKEN_R[src]
Bits 8:9 - Pipe Token
pub fn autosw(&self) -> AUTOSW_R[src]
Bit 10 - Automatic Switch
pub fn ptype(&self) -> PTYPE_R[src]
Bits 12:13 - Pipe Type
pub fn pepnum(&self) -> PEPNUM_R[src]
Bits 16:19 - Pipe Endpoint Number
pub fn intfrq(&self) -> INTFRQ_R[src]
Bits 24:31 - Pipe Interrupt Request Frequency
impl R<u8, PBK_A>[src]
pub fn variant(&self) -> Variant<u8, PBK_A>[src]
Get enumerated values variant
pub fn is_1_bank(&self) -> bool[src]
Checks if the value of the field is _1_BANK
pub fn is_2_bank(&self) -> bool[src]
Checks if the value of the field is _2_BANK
pub fn is_3_bank(&self) -> bool[src]
Checks if the value of the field is _3_BANK
impl R<u8, PSIZE_A>[src]
pub fn variant(&self) -> PSIZE_A[src]
Get enumerated values variant
pub fn is_8_byte(&self) -> bool[src]
Checks if the value of the field is _8_BYTE
pub fn is_16_byte(&self) -> bool[src]
Checks if the value of the field is _16_BYTE
pub fn is_32_byte(&self) -> bool[src]
Checks if the value of the field is _32_BYTE
pub fn is_64_byte(&self) -> bool[src]
Checks if the value of the field is _64_BYTE
pub fn is_128_byte(&self) -> bool[src]
Checks if the value of the field is _128_BYTE
pub fn is_256_byte(&self) -> bool[src]
Checks if the value of the field is _256_BYTE
pub fn is_512_byte(&self) -> bool[src]
Checks if the value of the field is _512_BYTE
pub fn is_1024_byte(&self) -> bool[src]
Checks if the value of the field is _1024_BYTE
impl R<u8, PTOKEN_A>[src]
pub fn variant(&self) -> Variant<u8, PTOKEN_A>[src]
Get enumerated values variant
pub fn is_setup(&self) -> bool[src]
Checks if the value of the field is SETUP
pub fn is_in_(&self) -> bool[src]
Checks if the value of the field is IN
pub fn is_out(&self) -> bool[src]
Checks if the value of the field is OUT
impl R<u8, PTYPE_A>[src]
pub fn variant(&self) -> PTYPE_A[src]
Get enumerated values variant
pub fn is_ctrl(&self) -> bool[src]
Checks if the value of the field is CTRL
pub fn is_iso(&self) -> bool[src]
Checks if the value of the field is ISO
pub fn is_blk(&self) -> bool[src]
Checks if the value of the field is BLK
pub fn is_intrpt(&self) -> bool[src]
Checks if the value of the field is INTRPT
impl R<u32, Reg<u32, _USBHS_HSTPIPCFG_CTRL_BULK_MODE>>[src]
pub fn alloc(&self) -> ALLOC_R[src]
Bit 1 - Pipe Memory Allocate
pub fn pbk(&self) -> PBK_R[src]
Bits 2:3 - Pipe Banks
pub fn psize(&self) -> PSIZE_R[src]
Bits 4:6 - Pipe Size
pub fn ptoken(&self) -> PTOKEN_R[src]
Bits 8:9 - Pipe Token
pub fn autosw(&self) -> AUTOSW_R[src]
Bit 10 - Automatic Switch
pub fn ptype(&self) -> PTYPE_R[src]
Bits 12:13 - Pipe Type
pub fn pepnum(&self) -> PEPNUM_R[src]
Bits 16:19 - Pipe Endpoint Number
pub fn pingen(&self) -> PINGEN_R[src]
Bit 20 - Ping Enable
pub fn binterval(&self) -> BINTERVAL_R[src]
Bits 24:31 - bInterval Parameter for the Bulk-Out/Ping Transaction
impl R<u8, DTSEQ_A>[src]
pub fn variant(&self) -> Variant<u8, DTSEQ_A>[src]
Get enumerated values variant
pub fn is_data0(&self) -> bool[src]
Checks if the value of the field is DATA0
pub fn is_data1(&self) -> bool[src]
Checks if the value of the field is DATA1
impl R<u8, NBUSYBK_A>[src]
pub fn variant(&self) -> NBUSYBK_A[src]
Get enumerated values variant
pub fn is_0_busy(&self) -> bool[src]
Checks if the value of the field is _0_BUSY
pub fn is_1_busy(&self) -> bool[src]
Checks if the value of the field is _1_BUSY
pub fn is_2_busy(&self) -> bool[src]
Checks if the value of the field is _2_BUSY
pub fn is_3_busy(&self) -> bool[src]
Checks if the value of the field is _3_BUSY
impl R<u8, CURRBK_A>[src]
pub fn variant(&self) -> Variant<u8, CURRBK_A>[src]
Get enumerated values variant
pub fn is_bank0(&self) -> bool[src]
Checks if the value of the field is BANK0
pub fn is_bank1(&self) -> bool[src]
Checks if the value of the field is BANK1
pub fn is_bank2(&self) -> bool[src]
Checks if the value of the field is BANK2
impl R<u32, Reg<u32, _USBHS_HSTPIPISR_CTRL_MODE>>[src]
pub fn rxini(&self) -> RXINI_R[src]
Bit 0 - Received IN Data Interrupt
pub fn txouti(&self) -> TXOUTI_R[src]
Bit 1 - Transmitted OUT Data Interrupt
pub fn txstpi(&self) -> TXSTPI_R[src]
Bit 2 - Transmitted SETUP Interrupt
pub fn perri(&self) -> PERRI_R[src]
Bit 3 - Pipe Error Interrupt
pub fn nakedi(&self) -> NAKEDI_R[src]
Bit 4 - NAKed Interrupt
pub fn overfi(&self) -> OVERFI_R[src]
Bit 5 - Overflow Interrupt
pub fn rxstalldi(&self) -> RXSTALLDI_R[src]
Bit 6 - Received STALLed Interrupt
pub fn shortpacketi(&self) -> SHORTPACKETI_R[src]
Bit 7 - Short Packet Interrupt
pub fn dtseq(&self) -> DTSEQ_R[src]
Bits 8:9 - Data Toggle Sequence
pub fn nbusybk(&self) -> NBUSYBK_R[src]
Bits 12:13 - Number of Busy Banks
pub fn currbk(&self) -> CURRBK_R[src]
Bits 14:15 - Current Bank
pub fn rwall(&self) -> RWALL_R[src]
Bit 16 - Read/Write Allowed
pub fn cfgok(&self) -> CFGOK_R[src]
Bit 18 - Configuration OK Status
pub fn pbyct(&self) -> PBYCT_R[src]
Bits 20:30 - Pipe Byte Count
impl R<u8, DTSEQ_A>[src]
pub fn variant(&self) -> Variant<u8, DTSEQ_A>[src]
Get enumerated values variant
pub fn is_data0(&self) -> bool[src]
Checks if the value of the field is DATA0
pub fn is_data1(&self) -> bool[src]
Checks if the value of the field is DATA1
impl R<u8, NBUSYBK_A>[src]
pub fn variant(&self) -> NBUSYBK_A[src]
Get enumerated values variant
pub fn is_0_busy(&self) -> bool[src]
Checks if the value of the field is _0_BUSY
pub fn is_1_busy(&self) -> bool[src]
Checks if the value of the field is _1_BUSY
pub fn is_2_busy(&self) -> bool[src]
Checks if the value of the field is _2_BUSY
pub fn is_3_busy(&self) -> bool[src]
Checks if the value of the field is _3_BUSY
impl R<u8, CURRBK_A>[src]
pub fn variant(&self) -> Variant<u8, CURRBK_A>[src]
Get enumerated values variant
pub fn is_bank0(&self) -> bool[src]
Checks if the value of the field is BANK0
pub fn is_bank1(&self) -> bool[src]
Checks if the value of the field is BANK1
pub fn is_bank2(&self) -> bool[src]
Checks if the value of the field is BANK2
impl R<u32, Reg<u32, _USBHS_HSTPIPISR_ISO_MODE>>[src]
pub fn rxini(&self) -> RXINI_R[src]
Bit 0 - Received IN Data Interrupt
pub fn txouti(&self) -> TXOUTI_R[src]
Bit 1 - Transmitted OUT Data Interrupt
pub fn underfi(&self) -> UNDERFI_R[src]
Bit 2 - Underflow Interrupt
pub fn perri(&self) -> PERRI_R[src]
Bit 3 - Pipe Error Interrupt
pub fn nakedi(&self) -> NAKEDI_R[src]
Bit 4 - NAKed Interrupt
pub fn overfi(&self) -> OVERFI_R[src]
Bit 5 - Overflow Interrupt
pub fn crcerri(&self) -> CRCERRI_R[src]
Bit 6 - CRC Error Interrupt
pub fn shortpacketi(&self) -> SHORTPACKETI_R[src]
Bit 7 - Short Packet Interrupt
pub fn dtseq(&self) -> DTSEQ_R[src]
Bits 8:9 - Data Toggle Sequence
pub fn nbusybk(&self) -> NBUSYBK_R[src]
Bits 12:13 - Number of Busy Banks
pub fn currbk(&self) -> CURRBK_R[src]
Bits 14:15 - Current Bank
pub fn rwall(&self) -> RWALL_R[src]
Bit 16 - Read/Write Allowed
pub fn cfgok(&self) -> CFGOK_R[src]
Bit 18 - Configuration OK Status
pub fn pbyct(&self) -> PBYCT_R[src]
Bits 20:30 - Pipe Byte Count
impl R<u8, DTSEQ_A>[src]
pub fn variant(&self) -> Variant<u8, DTSEQ_A>[src]
Get enumerated values variant
pub fn is_data0(&self) -> bool[src]
Checks if the value of the field is DATA0
pub fn is_data1(&self) -> bool[src]
Checks if the value of the field is DATA1
impl R<u8, NBUSYBK_A>[src]
pub fn variant(&self) -> NBUSYBK_A[src]
Get enumerated values variant
pub fn is_0_busy(&self) -> bool[src]
Checks if the value of the field is _0_BUSY
pub fn is_1_busy(&self) -> bool[src]
Checks if the value of the field is _1_BUSY
pub fn is_2_busy(&self) -> bool[src]
Checks if the value of the field is _2_BUSY
pub fn is_3_busy(&self) -> bool[src]
Checks if the value of the field is _3_BUSY
impl R<u8, CURRBK_A>[src]
pub fn variant(&self) -> Variant<u8, CURRBK_A>[src]
Get enumerated values variant
pub fn is_bank0(&self) -> bool[src]
Checks if the value of the field is BANK0
pub fn is_bank1(&self) -> bool[src]
Checks if the value of the field is BANK1
pub fn is_bank2(&self) -> bool[src]
Checks if the value of the field is BANK2
impl R<u32, Reg<u32, _USBHS_HSTPIPISR_BLK_MODE>>[src]
pub fn rxini(&self) -> RXINI_R[src]
Bit 0 - Received IN Data Interrupt
pub fn txouti(&self) -> TXOUTI_R[src]
Bit 1 - Transmitted OUT Data Interrupt
pub fn txstpi(&self) -> TXSTPI_R[src]
Bit 2 - Transmitted SETUP Interrupt
pub fn perri(&self) -> PERRI_R[src]
Bit 3 - Pipe Error Interrupt
pub fn nakedi(&self) -> NAKEDI_R[src]
Bit 4 - NAKed Interrupt
pub fn overfi(&self) -> OVERFI_R[src]
Bit 5 - Overflow Interrupt
pub fn rxstalldi(&self) -> RXSTALLDI_R[src]
Bit 6 - Received STALLed Interrupt
pub fn shortpacketi(&self) -> SHORTPACKETI_R[src]
Bit 7 - Short Packet Interrupt
pub fn dtseq(&self) -> DTSEQ_R[src]
Bits 8:9 - Data Toggle Sequence
pub fn nbusybk(&self) -> NBUSYBK_R[src]
Bits 12:13 - Number of Busy Banks
pub fn currbk(&self) -> CURRBK_R[src]
Bits 14:15 - Current Bank
pub fn rwall(&self) -> RWALL_R[src]
Bit 16 - Read/Write Allowed
pub fn cfgok(&self) -> CFGOK_R[src]
Bit 18 - Configuration OK Status
pub fn pbyct(&self) -> PBYCT_R[src]
Bits 20:30 - Pipe Byte Count
impl R<u8, DTSEQ_A>[src]
pub fn variant(&self) -> Variant<u8, DTSEQ_A>[src]
Get enumerated values variant
pub fn is_data0(&self) -> bool[src]
Checks if the value of the field is DATA0
pub fn is_data1(&self) -> bool[src]
Checks if the value of the field is DATA1
impl R<u8, NBUSYBK_A>[src]
pub fn variant(&self) -> NBUSYBK_A[src]
Get enumerated values variant
pub fn is_0_busy(&self) -> bool[src]
Checks if the value of the field is _0_BUSY
pub fn is_1_busy(&self) -> bool[src]
Checks if the value of the field is _1_BUSY
pub fn is_2_busy(&self) -> bool[src]
Checks if the value of the field is _2_BUSY
pub fn is_3_busy(&self) -> bool[src]
Checks if the value of the field is _3_BUSY
impl R<u8, CURRBK_A>[src]
pub fn variant(&self) -> Variant<u8, CURRBK_A>[src]
Get enumerated values variant
pub fn is_bank0(&self) -> bool[src]
Checks if the value of the field is BANK0
pub fn is_bank1(&self) -> bool[src]
Checks if the value of the field is BANK1
pub fn is_bank2(&self) -> bool[src]
Checks if the value of the field is BANK2
impl R<u32, Reg<u32, _USBHS_HSTPIPISR_INTRPT_MODE>>[src]
pub fn rxini(&self) -> RXINI_R[src]
Bit 0 - Received IN Data Interrupt
pub fn txouti(&self) -> TXOUTI_R[src]
Bit 1 - Transmitted OUT Data Interrupt
pub fn underfi(&self) -> UNDERFI_R[src]
Bit 2 - Underflow Interrupt
pub fn perri(&self) -> PERRI_R[src]
Bit 3 - Pipe Error Interrupt
pub fn nakedi(&self) -> NAKEDI_R[src]
Bit 4 - NAKed Interrupt
pub fn overfi(&self) -> OVERFI_R[src]
Bit 5 - Overflow Interrupt
pub fn rxstalldi(&self) -> RXSTALLDI_R[src]
Bit 6 - Received STALLed Interrupt
pub fn shortpacketi(&self) -> SHORTPACKETI_R[src]
Bit 7 - Short Packet Interrupt
pub fn dtseq(&self) -> DTSEQ_R[src]
Bits 8:9 - Data Toggle Sequence
pub fn nbusybk(&self) -> NBUSYBK_R[src]
Bits 12:13 - Number of Busy Banks
pub fn currbk(&self) -> CURRBK_R[src]
Bits 14:15 - Current Bank
pub fn rwall(&self) -> RWALL_R[src]
Bit 16 - Read/Write Allowed
pub fn cfgok(&self) -> CFGOK_R[src]
Bit 18 - Configuration OK Status
pub fn pbyct(&self) -> PBYCT_R[src]
Bits 20:30 - Pipe Byte Count
impl R<u32, Reg<u32, _USBHS_HSTPIPIMR_CTRL_MODE>>[src]
pub fn rxine(&self) -> RXINE_R[src]
Bit 0 - Received IN Data Interrupt Enable
pub fn txoute(&self) -> TXOUTE_R[src]
Bit 1 - Transmitted OUT Data Interrupt Enable
pub fn txstpe(&self) -> TXSTPE_R[src]
Bit 2 - Transmitted SETUP Interrupt Enable
pub fn perre(&self) -> PERRE_R[src]
Bit 3 - Pipe Error Interrupt Enable
pub fn nakede(&self) -> NAKEDE_R[src]
Bit 4 - NAKed Interrupt Enable
pub fn overfie(&self) -> OVERFIE_R[src]
Bit 5 - Overflow Interrupt Enable
pub fn rxstallde(&self) -> RXSTALLDE_R[src]
Bit 6 - Received STALLed Interrupt Enable
pub fn shortpacketie(&self) -> SHORTPACKETIE_R[src]
Bit 7 - Short Packet Interrupt Enable
pub fn nbusybke(&self) -> NBUSYBKE_R[src]
Bit 12 - Number of Busy Banks Interrupt Enable
pub fn fifocon(&self) -> FIFOCON_R[src]
Bit 14 - FIFO Control
pub fn pdishdma(&self) -> PDISHDMA_R[src]
Bit 16 - Pipe Interrupts Disable HDMA Request Enable
pub fn pfreeze(&self) -> PFREEZE_R[src]
Bit 17 - Pipe Freeze
pub fn rstdt(&self) -> RSTDT_R[src]
Bit 18 - Reset Data Toggle
impl R<u32, Reg<u32, _USBHS_HSTPIPIMR_ISO_MODE>>[src]
pub fn rxine(&self) -> RXINE_R[src]
Bit 0 - Received IN Data Interrupt Enable
pub fn txoute(&self) -> TXOUTE_R[src]
Bit 1 - Transmitted OUT Data Interrupt Enable
pub fn underfie(&self) -> UNDERFIE_R[src]
Bit 2 - Underflow Interrupt Enable
pub fn perre(&self) -> PERRE_R[src]
Bit 3 - Pipe Error Interrupt Enable
pub fn nakede(&self) -> NAKEDE_R[src]
Bit 4 - NAKed Interrupt Enable
pub fn overfie(&self) -> OVERFIE_R[src]
Bit 5 - Overflow Interrupt Enable
pub fn crcerre(&self) -> CRCERRE_R[src]
Bit 6 - CRC Error Interrupt Enable
pub fn shortpacketie(&self) -> SHORTPACKETIE_R[src]
Bit 7 - Short Packet Interrupt Enable
pub fn nbusybke(&self) -> NBUSYBKE_R[src]
Bit 12 - Number of Busy Banks Interrupt Enable
pub fn fifocon(&self) -> FIFOCON_R[src]
Bit 14 - FIFO Control
pub fn pdishdma(&self) -> PDISHDMA_R[src]
Bit 16 - Pipe Interrupts Disable HDMA Request Enable
pub fn pfreeze(&self) -> PFREEZE_R[src]
Bit 17 - Pipe Freeze
pub fn rstdt(&self) -> RSTDT_R[src]
Bit 18 - Reset Data Toggle
impl R<u32, Reg<u32, _USBHS_HSTPIPIMR_BLK_MODE>>[src]
pub fn rxine(&self) -> RXINE_R[src]
Bit 0 - Received IN Data Interrupt Enable
pub fn txoute(&self) -> TXOUTE_R[src]
Bit 1 - Transmitted OUT Data Interrupt Enable
pub fn txstpe(&self) -> TXSTPE_R[src]
Bit 2 - Transmitted SETUP Interrupt Enable
pub fn perre(&self) -> PERRE_R[src]
Bit 3 - Pipe Error Interrupt Enable
pub fn nakede(&self) -> NAKEDE_R[src]
Bit 4 - NAKed Interrupt Enable
pub fn overfie(&self) -> OVERFIE_R[src]
Bit 5 - Overflow Interrupt Enable
pub fn rxstallde(&self) -> RXSTALLDE_R[src]
Bit 6 - Received STALLed Interrupt Enable
pub fn shortpacketie(&self) -> SHORTPACKETIE_R[src]
Bit 7 - Short Packet Interrupt Enable
pub fn nbusybke(&self) -> NBUSYBKE_R[src]
Bit 12 - Number of Busy Banks Interrupt Enable
pub fn fifocon(&self) -> FIFOCON_R[src]
Bit 14 - FIFO Control
pub fn pdishdma(&self) -> PDISHDMA_R[src]
Bit 16 - Pipe Interrupts Disable HDMA Request Enable
pub fn pfreeze(&self) -> PFREEZE_R[src]
Bit 17 - Pipe Freeze
pub fn rstdt(&self) -> RSTDT_R[src]
Bit 18 - Reset Data Toggle
impl R<u32, Reg<u32, _USBHS_HSTPIPIMR_INTRPT_MODE>>[src]
pub fn rxine(&self) -> RXINE_R[src]
Bit 0 - Received IN Data Interrupt Enable
pub fn txoute(&self) -> TXOUTE_R[src]
Bit 1 - Transmitted OUT Data Interrupt Enable
pub fn underfie(&self) -> UNDERFIE_R[src]
Bit 2 - Underflow Interrupt Enable
pub fn perre(&self) -> PERRE_R[src]
Bit 3 - Pipe Error Interrupt Enable
pub fn nakede(&self) -> NAKEDE_R[src]
Bit 4 - NAKed Interrupt Enable
pub fn overfie(&self) -> OVERFIE_R[src]
Bit 5 - Overflow Interrupt Enable
pub fn rxstallde(&self) -> RXSTALLDE_R[src]
Bit 6 - Received STALLed Interrupt Enable
pub fn shortpacketie(&self) -> SHORTPACKETIE_R[src]
Bit 7 - Short Packet Interrupt Enable
pub fn nbusybke(&self) -> NBUSYBKE_R[src]
Bit 12 - Number of Busy Banks Interrupt Enable
pub fn fifocon(&self) -> FIFOCON_R[src]
Bit 14 - FIFO Control
pub fn pdishdma(&self) -> PDISHDMA_R[src]
Bit 16 - Pipe Interrupts Disable HDMA Request Enable
pub fn pfreeze(&self) -> PFREEZE_R[src]
Bit 17 - Pipe Freeze
pub fn rstdt(&self) -> RSTDT_R[src]
Bit 18 - Reset Data Toggle
impl R<u32, Reg<u32, _USBHS_HSTPIPINRQ>>[src]
pub fn inrq(&self) -> INRQ_R[src]
Bits 0:7 - IN Request Number before Freeze
pub fn inmode(&self) -> INMODE_R[src]
Bit 8 - IN Request Mode
impl R<u32, Reg<u32, _USBHS_HSTPIPERR>>[src]
pub fn datatgl(&self) -> DATATGL_R[src]
Bit 0 - Data Toggle Error
pub fn datapid(&self) -> DATAPID_R[src]
Bit 1 - Data PID Error
pub fn pid(&self) -> PID_R[src]
Bit 2 - Data PID Error
pub fn timeout(&self) -> TIMEOUT_R[src]
Bit 3 - Time-Out Error
pub fn crc16(&self) -> CRC16_R[src]
Bit 4 - CRC16 Error
pub fn counter(&self) -> COUNTER_R[src]
Bits 5:6 - Error Counter
impl R<bool, UIMOD_A>[src]
pub fn variant(&self) -> UIMOD_A[src]
Get enumerated values variant
pub fn is_host(&self) -> bool[src]
Checks if the value of the field is HOST
pub fn is_device(&self) -> bool[src]
Checks if the value of the field is DEVICE
impl R<u32, Reg<u32, _USBHS_CTRL>>[src]
pub fn rderre(&self) -> RDERRE_R[src]
Bit 4 - Remote Device Connection Error Interrupt Enable
pub fn vbushwc(&self) -> VBUSHWC_R[src]
Bit 8 - VBUS Hardware Control
pub fn frzclk(&self) -> FRZCLK_R[src]
Bit 14 - Freeze USB Clock
pub fn usbe(&self) -> USBE_R[src]
Bit 15 - USBHS Enable
pub fn uid(&self) -> UID_R[src]
Bit 24 - UID Pin Enable
pub fn uimod(&self) -> UIMOD_R[src]
Bit 25 - USBHS Mode
impl R<u8, SPEED_A>[src]
pub fn variant(&self) -> Variant<u8, SPEED_A>[src]
Get enumerated values variant
pub fn is_full_speed(&self) -> bool[src]
Checks if the value of the field is FULL_SPEED
pub fn is_high_speed(&self) -> bool[src]
Checks if the value of the field is HIGH_SPEED
pub fn is_low_speed(&self) -> bool[src]
Checks if the value of the field is LOW_SPEED
impl R<u32, Reg<u32, _USBHS_SR>>[src]
pub fn rderri(&self) -> RDERRI_R[src]
Bit 4 - Remote Device Connection Error Interrupt (Host mode only)
pub fn speed(&self) -> SPEED_R[src]
Bits 12:13 - Speed Status (Device mode only)
pub fn clkusable(&self) -> CLKUSABLE_R[src]
Bit 14 - UTMI Clock Usable
impl R<u32, Reg<u32, _UTMI_OHCIICR>>[src]
pub fn res0(&self) -> RES0_R[src]
Bit 0 - USB PORTx Reset
pub fn arie(&self) -> ARIE_R[src]
Bit 4 - OHCI Asynchronous Resume Interrupt Enable
pub fn appstart(&self) -> APPSTART_R[src]
Bit 5
pub fn udppudis(&self) -> UDPPUDIS_R[src]
Bit 23 - USB Device Pull-up Disable
impl R<u8, FREQ_A>[src]
pub fn variant(&self) -> Variant<u8, FREQ_A>[src]
Get enumerated values variant
pub fn is_xtal12(&self) -> bool[src]
Checks if the value of the field is XTAL12
pub fn is_xtal16(&self) -> bool[src]
Checks if the value of the field is XTAL16
impl R<u32, Reg<u32, _UTMI_CKTRIM>>[src]
impl R<u32, Reg<u32, _WDT_MR>>[src]
pub fn wdv(&self) -> WDV_R[src]
Bits 0:11 - Watchdog Counter Value
pub fn wdfien(&self) -> WDFIEN_R[src]
Bit 12 - Watchdog Fault Interrupt Enable
pub fn wdrsten(&self) -> WDRSTEN_R[src]
Bit 13 - Watchdog Reset Enable
pub fn wddis(&self) -> WDDIS_R[src]
Bit 15 - Watchdog Disable
pub fn wdd(&self) -> WDD_R[src]
Bits 16:27 - Watchdog Delta Value
pub fn wddbghlt(&self) -> WDDBGHLT_R[src]
Bit 28 - Watchdog Debug Halt
pub fn wdidlehlt(&self) -> WDIDLEHLT_R[src]
Bit 29 - Watchdog Idle Halt
impl R<u32, Reg<u32, _WDT_SR>>[src]
pub fn wdunf(&self) -> WDUNF_R[src]
Bit 0 - Watchdog Underflow (cleared on read)
pub fn wderr(&self) -> WDERR_R[src]
Bit 1 - Watchdog Error (cleared on read)
impl R<u32, Reg<u32, _XDMAC_CIM>>[src]
pub fn bim(&self) -> BIM_R[src]
Bit 0 - End of Block Interrupt Mask Bit
pub fn lim(&self) -> LIM_R[src]
Bit 1 - End of Linked List Interrupt Mask Bit
pub fn dim(&self) -> DIM_R[src]
Bit 2 - End of Disable Interrupt Mask Bit
pub fn fim(&self) -> FIM_R[src]
Bit 3 - End of Flush Interrupt Mask Bit
pub fn rbeim(&self) -> RBEIM_R[src]
Bit 4 - Read Bus Error Interrupt Mask Bit
pub fn wbeim(&self) -> WBEIM_R[src]
Bit 5 - Write Bus Error Interrupt Mask Bit
pub fn roim(&self) -> ROIM_R[src]
Bit 6 - Request Overflow Error Interrupt Mask Bit
impl R<u32, Reg<u32, _XDMAC_CIS>>[src]
pub fn bis(&self) -> BIS_R[src]
Bit 0 - End of Block Interrupt Status Bit
pub fn lis(&self) -> LIS_R[src]
Bit 1 - End of Linked List Interrupt Status Bit
pub fn dis(&self) -> DIS_R[src]
Bit 2 - End of Disable Interrupt Status Bit
pub fn fis(&self) -> FIS_R[src]
Bit 3 - End of Flush Interrupt Status Bit
pub fn rbeis(&self) -> RBEIS_R[src]
Bit 4 - Read Bus Error Interrupt Status Bit
pub fn wbeis(&self) -> WBEIS_R[src]
Bit 5 - Write Bus Error Interrupt Status Bit
pub fn rois(&self) -> ROIS_R[src]
Bit 6 - Request Overflow Error Interrupt Status Bit
impl R<u32, Reg<u32, _XDMAC_CSA>>[src]
impl R<u32, Reg<u32, _XDMAC_CDA>>[src]
impl R<u32, Reg<u32, _XDMAC_CNDA>>[src]
pub fn ndaif(&self) -> NDAIF_R[src]
Bit 0 - Channel x Next Descriptor Interface
pub fn nda(&self) -> NDA_R[src]
Bits 2:31 - Channel x Next Descriptor Address
impl R<bool, NDE_A>[src]
pub fn variant(&self) -> NDE_A[src]
Get enumerated values variant
pub fn is_dscr_fetch_dis(&self) -> bool[src]
Checks if the value of the field is DSCR_FETCH_DIS
pub fn is_dscr_fetch_en(&self) -> bool[src]
Checks if the value of the field is DSCR_FETCH_EN
impl R<bool, NDSUP_A>[src]
pub fn variant(&self) -> NDSUP_A[src]
Get enumerated values variant
pub fn is_src_params_unchanged(&self) -> bool[src]
Checks if the value of the field is SRC_PARAMS_UNCHANGED
pub fn is_src_params_updated(&self) -> bool[src]
Checks if the value of the field is SRC_PARAMS_UPDATED
impl R<bool, NDDUP_A>[src]
pub fn variant(&self) -> NDDUP_A[src]
Get enumerated values variant
pub fn is_dst_params_unchanged(&self) -> bool[src]
Checks if the value of the field is DST_PARAMS_UNCHANGED
pub fn is_dst_params_updated(&self) -> bool[src]
Checks if the value of the field is DST_PARAMS_UPDATED
impl R<u8, NDVIEW_A>[src]
pub fn variant(&self) -> NDVIEW_A[src]
Get enumerated values variant
pub fn is_ndv0(&self) -> bool[src]
Checks if the value of the field is NDV0
pub fn is_ndv1(&self) -> bool[src]
Checks if the value of the field is NDV1
pub fn is_ndv2(&self) -> bool[src]
Checks if the value of the field is NDV2
pub fn is_ndv3(&self) -> bool[src]
Checks if the value of the field is NDV3
impl R<u32, Reg<u32, _XDMAC_CNDC>>[src]
pub fn nde(&self) -> NDE_R[src]
Bit 0 - Channel x Next Descriptor Enable
pub fn ndsup(&self) -> NDSUP_R[src]
Bit 1 - Channel x Next Descriptor Source Update
pub fn nddup(&self) -> NDDUP_R[src]
Bit 2 - Channel x Next Descriptor Destination Update
pub fn ndview(&self) -> NDVIEW_R[src]
Bits 3:4 - Channel x Next Descriptor View
impl R<u32, Reg<u32, _XDMAC_CUBC>>[src]
impl R<u32, Reg<u32, _XDMAC_CBC>>[src]
impl R<bool, TYPE_A>[src]
pub fn variant(&self) -> TYPE_A[src]
Get enumerated values variant
pub fn is_mem_tran(&self) -> bool[src]
Checks if the value of the field is MEM_TRAN
pub fn is_per_tran(&self) -> bool[src]
Checks if the value of the field is PER_TRAN
impl R<u8, MBSIZE_A>[src]
pub fn variant(&self) -> MBSIZE_A[src]
Get enumerated values variant
pub fn is_single(&self) -> bool[src]
Checks if the value of the field is SINGLE
pub fn is_four(&self) -> bool[src]
Checks if the value of the field is FOUR
pub fn is_eight(&self) -> bool[src]
Checks if the value of the field is EIGHT
pub fn is_sixteen(&self) -> bool[src]
Checks if the value of the field is SIXTEEN
impl R<bool, DSYNC_A>[src]
pub fn variant(&self) -> DSYNC_A[src]
Get enumerated values variant
pub fn is_per2mem(&self) -> bool[src]
Checks if the value of the field is PER2MEM
pub fn is_mem2per(&self) -> bool[src]
Checks if the value of the field is MEM2PER
impl R<bool, SWREQ_A>[src]
pub fn variant(&self) -> SWREQ_A[src]
Get enumerated values variant
pub fn is_hwr_connected(&self) -> bool[src]
Checks if the value of the field is HWR_CONNECTED
pub fn is_swr_connected(&self) -> bool[src]
Checks if the value of the field is SWR_CONNECTED
impl R<bool, MEMSET_A>[src]
pub fn variant(&self) -> MEMSET_A[src]
Get enumerated values variant
pub fn is_normal_mode(&self) -> bool[src]
Checks if the value of the field is NORMAL_MODE
pub fn is_hw_mode(&self) -> bool[src]
Checks if the value of the field is HW_MODE
impl R<u8, CSIZE_A>[src]
pub fn variant(&self) -> Variant<u8, CSIZE_A>[src]
Get enumerated values variant
pub fn is_chk_1(&self) -> bool[src]
Checks if the value of the field is CHK_1
pub fn is_chk_2(&self) -> bool[src]
Checks if the value of the field is CHK_2
pub fn is_chk_4(&self) -> bool[src]
Checks if the value of the field is CHK_4
pub fn is_chk_8(&self) -> bool[src]
Checks if the value of the field is CHK_8
pub fn is_chk_16(&self) -> bool[src]
Checks if the value of the field is CHK_16
impl R<u8, DWIDTH_A>[src]
pub fn variant(&self) -> Variant<u8, DWIDTH_A>[src]
Get enumerated values variant
pub fn is_byte(&self) -> bool[src]
Checks if the value of the field is BYTE
pub fn is_halfword(&self) -> bool[src]
Checks if the value of the field is HALFWORD
pub fn is_word(&self) -> bool[src]
Checks if the value of the field is WORD
impl R<bool, SIF_A>[src]
pub fn variant(&self) -> SIF_A[src]
Get enumerated values variant
pub fn is_ahb_if0(&self) -> bool[src]
Checks if the value of the field is AHB_IF0
pub fn is_ahb_if1(&self) -> bool[src]
Checks if the value of the field is AHB_IF1
impl R<bool, DIF_A>[src]
pub fn variant(&self) -> DIF_A[src]
Get enumerated values variant
pub fn is_ahb_if0(&self) -> bool[src]
Checks if the value of the field is AHB_IF0
pub fn is_ahb_if1(&self) -> bool[src]
Checks if the value of the field is AHB_IF1
impl R<u8, SAM_A>[src]
pub fn variant(&self) -> SAM_A[src]
Get enumerated values variant
pub fn is_fixed_am(&self) -> bool[src]
Checks if the value of the field is FIXED_AM
pub fn is_incremented_am(&self) -> bool[src]
Checks if the value of the field is INCREMENTED_AM
pub fn is_ubs_am(&self) -> bool[src]
Checks if the value of the field is UBS_AM
pub fn is_ubs_ds_am(&self) -> bool[src]
Checks if the value of the field is UBS_DS_AM
impl R<u8, DAM_A>[src]
pub fn variant(&self) -> DAM_A[src]
Get enumerated values variant
pub fn is_fixed_am(&self) -> bool[src]
Checks if the value of the field is FIXED_AM
pub fn is_incremented_am(&self) -> bool[src]
Checks if the value of the field is INCREMENTED_AM
pub fn is_ubs_am(&self) -> bool[src]
Checks if the value of the field is UBS_AM
pub fn is_ubs_ds_am(&self) -> bool[src]
Checks if the value of the field is UBS_DS_AM
impl R<bool, INITD_A>[src]
pub fn variant(&self) -> INITD_A[src]
Get enumerated values variant
pub fn is_in_progress(&self) -> bool[src]
Checks if the value of the field is IN_PROGRESS
pub fn is_terminated(&self) -> bool[src]
Checks if the value of the field is TERMINATED
impl R<bool, RDIP_A>[src]
pub fn variant(&self) -> RDIP_A[src]
Get enumerated values variant
pub fn is_done(&self) -> bool[src]
Checks if the value of the field is DONE
pub fn is_in_progress(&self) -> bool[src]
Checks if the value of the field is IN_PROGRESS
impl R<bool, WRIP_A>[src]
pub fn variant(&self) -> WRIP_A[src]
Get enumerated values variant
pub fn is_done(&self) -> bool[src]
Checks if the value of the field is DONE
pub fn is_in_progress(&self) -> bool[src]
Checks if the value of the field is IN_PROGRESS
impl R<u8, PERID_A>[src]
pub fn variant(&self) -> Variant<u8, PERID_A>[src]
Get enumerated values variant
pub fn is_qspi_tx(&self) -> bool[src]
Checks if the value of the field is QSPI_TX
pub fn is_qspi_rx(&self) -> bool[src]
Checks if the value of the field is QSPI_RX
pub fn is_usart0_tx(&self) -> bool[src]
Checks if the value of the field is USART0_TX
pub fn is_usart0_rx(&self) -> bool[src]
Checks if the value of the field is USART0_RX
pub fn is_usart1_tx(&self) -> bool[src]
Checks if the value of the field is USART1_TX
pub fn is_usart1_rx(&self) -> bool[src]
Checks if the value of the field is USART1_RX
pub fn is_pwm0(&self) -> bool[src]
Checks if the value of the field is PWM0
pub fn is_twihs0_tx(&self) -> bool[src]
Checks if the value of the field is TWIHS0_TX
pub fn is_twihs0_rx(&self) -> bool[src]
Checks if the value of the field is TWIHS0_RX
pub fn is_twihs1_tx(&self) -> bool[src]
Checks if the value of the field is TWIHS1_TX
pub fn is_twihs1_rx(&self) -> bool[src]
Checks if the value of the field is TWIHS1_RX
pub fn is_uart0_tx(&self) -> bool[src]
Checks if the value of the field is UART0_TX
pub fn is_uart0_rx(&self) -> bool[src]
Checks if the value of the field is UART0_RX
pub fn is_uart1_tx(&self) -> bool[src]
Checks if the value of the field is UART1_TX
pub fn is_uart1_rx(&self) -> bool[src]
Checks if the value of the field is UART1_RX
pub fn is_uart2_tx(&self) -> bool[src]
Checks if the value of the field is UART2_TX
pub fn is_uart2_rx(&self) -> bool[src]
Checks if the value of the field is UART2_RX
pub fn is_dacc0(&self) -> bool[src]
Checks if the value of the field is DACC0
pub fn is_ssc_tx(&self) -> bool[src]
Checks if the value of the field is SSC_TX
pub fn is_ssc_rx(&self) -> bool[src]
Checks if the value of the field is SSC_RX
pub fn is_pioa(&self) -> bool[src]
Checks if the value of the field is PIOA
pub fn is_afec0(&self) -> bool[src]
Checks if the value of the field is AFEC0
pub fn is_afec1(&self) -> bool[src]
Checks if the value of the field is AFEC1
pub fn is_aes_tx(&self) -> bool[src]
Checks if the value of the field is AES_TX
pub fn is_aes_rx(&self) -> bool[src]
Checks if the value of the field is AES_RX
pub fn is_pwm1(&self) -> bool[src]
Checks if the value of the field is PWM1
pub fn is_tc0(&self) -> bool[src]
Checks if the value of the field is TC0
pub fn is_tc3(&self) -> bool[src]
Checks if the value of the field is TC3
pub fn is_tc6(&self) -> bool[src]
Checks if the value of the field is TC6
pub fn is_tc9(&self) -> bool[src]
Checks if the value of the field is TC9
impl R<u32, Reg<u32, _XDMAC_CC>>[src]
pub fn type_(&self) -> TYPE_R[src]
Bit 0 - Channel x Transfer Type
pub fn mbsize(&self) -> MBSIZE_R[src]
Bits 1:2 - Channel x Memory Burst Size
pub fn dsync(&self) -> DSYNC_R[src]
Bit 4 - Channel x Synchronization
pub fn swreq(&self) -> SWREQ_R[src]
Bit 6 - Channel x Software Request Trigger
pub fn memset(&self) -> MEMSET_R[src]
Bit 7 - Channel x Fill Block of memory
pub fn csize(&self) -> CSIZE_R[src]
Bits 8:10 - Channel x Chunk Size
pub fn dwidth(&self) -> DWIDTH_R[src]
Bits 11:12 - Channel x Data Width
pub fn sif(&self) -> SIF_R[src]
Bit 13 - Channel x Source Interface Identifier
pub fn dif(&self) -> DIF_R[src]
Bit 14 - Channel x Destination Interface Identifier
pub fn sam(&self) -> SAM_R[src]
Bits 16:17 - Channel x Source Addressing Mode
pub fn dam(&self) -> DAM_R[src]
Bits 18:19 - Channel x Destination Addressing Mode
pub fn initd(&self) -> INITD_R[src]
Bit 21 - Channel Initialization Terminated (this bit is read-only)
pub fn rdip(&self) -> RDIP_R[src]
Bit 22 - Read in Progress (this bit is read-only)
pub fn wrip(&self) -> WRIP_R[src]
Bit 23 - Write in Progress (this bit is read-only)
pub fn perid(&self) -> PERID_R[src]
Bits 24:30 - Channel x Peripheral Hardware Request Line Identifier
impl R<u32, Reg<u32, _XDMAC_CDS_MSP>>[src]
pub fn sds_msp(&self) -> SDS_MSP_R[src]
Bits 0:15 - Channel x Source Data stride or Memory Set Pattern
pub fn dds_msp(&self) -> DDS_MSP_R[src]
Bits 16:31 - Channel x Destination Data Stride or Memory Set Pattern
impl R<u32, Reg<u32, _XDMAC_CSUS>>[src]
impl R<u32, Reg<u32, _XDMAC_CDUS>>[src]
impl R<u32, Reg<u32, _XDMAC_GTYPE>>[src]
pub fn nb_ch(&self) -> NB_CH_R[src]
Bits 0:4 - Number of Channels Minus One
pub fn fifo_sz(&self) -> FIFO_SZ_R[src]
Bits 5:15 - Number of Bytes
pub fn nb_req(&self) -> NB_REQ_R[src]
Bits 16:22 - Number of Peripheral Requests Minus One
impl R<u32, Reg<u32, _XDMAC_GCFG>>[src]
pub fn cgdisreg(&self) -> CGDISREG_R[src]
Bit 0 - Configuration Registers Clock Gating Disable
pub fn cgdispipe(&self) -> CGDISPIPE_R[src]
Bit 1 - Pipeline Clock Gating Disable
pub fn cgdisfifo(&self) -> CGDISFIFO_R[src]
Bit 2 - FIFO Clock Gating Disable
pub fn cgdisif(&self) -> CGDISIF_R[src]
Bit 3 - Bus Interface Clock Gating Disable
pub fn bxkben(&self) -> BXKBEN_R[src]
Bit 8 - Boundary X Kilobyte Enable
impl R<u32, Reg<u32, _XDMAC_GWAC>>[src]
pub fn pw0(&self) -> PW0_R[src]
Bits 0:3 - Pool Weight 0
pub fn pw1(&self) -> PW1_R[src]
Bits 4:7 - Pool Weight 1
pub fn pw2(&self) -> PW2_R[src]
Bits 8:11 - Pool Weight 2
pub fn pw3(&self) -> PW3_R[src]
Bits 12:15 - Pool Weight 3
impl R<u32, Reg<u32, _XDMAC_GIM>>[src]
pub fn im0(&self) -> IM0_R[src]
Bit 0 - XDMAC Channel 0 Interrupt Mask Bit
pub fn im1(&self) -> IM1_R[src]
Bit 1 - XDMAC Channel 1 Interrupt Mask Bit
pub fn im2(&self) -> IM2_R[src]
Bit 2 - XDMAC Channel 2 Interrupt Mask Bit
pub fn im3(&self) -> IM3_R[src]
Bit 3 - XDMAC Channel 3 Interrupt Mask Bit
pub fn im4(&self) -> IM4_R[src]
Bit 4 - XDMAC Channel 4 Interrupt Mask Bit
pub fn im5(&self) -> IM5_R[src]
Bit 5 - XDMAC Channel 5 Interrupt Mask Bit
pub fn im6(&self) -> IM6_R[src]
Bit 6 - XDMAC Channel 6 Interrupt Mask Bit
pub fn im7(&self) -> IM7_R[src]
Bit 7 - XDMAC Channel 7 Interrupt Mask Bit
pub fn im8(&self) -> IM8_R[src]
Bit 8 - XDMAC Channel 8 Interrupt Mask Bit
pub fn im9(&self) -> IM9_R[src]
Bit 9 - XDMAC Channel 9 Interrupt Mask Bit
pub fn im10(&self) -> IM10_R[src]
Bit 10 - XDMAC Channel 10 Interrupt Mask Bit
pub fn im11(&self) -> IM11_R[src]
Bit 11 - XDMAC Channel 11 Interrupt Mask Bit
pub fn im12(&self) -> IM12_R[src]
Bit 12 - XDMAC Channel 12 Interrupt Mask Bit
pub fn im13(&self) -> IM13_R[src]
Bit 13 - XDMAC Channel 13 Interrupt Mask Bit
pub fn im14(&self) -> IM14_R[src]
Bit 14 - XDMAC Channel 14 Interrupt Mask Bit
pub fn im15(&self) -> IM15_R[src]
Bit 15 - XDMAC Channel 15 Interrupt Mask Bit
pub fn im16(&self) -> IM16_R[src]
Bit 16 - XDMAC Channel 16 Interrupt Mask Bit
pub fn im17(&self) -> IM17_R[src]
Bit 17 - XDMAC Channel 17 Interrupt Mask Bit
pub fn im18(&self) -> IM18_R[src]
Bit 18 - XDMAC Channel 18 Interrupt Mask Bit
pub fn im19(&self) -> IM19_R[src]
Bit 19 - XDMAC Channel 19 Interrupt Mask Bit
pub fn im20(&self) -> IM20_R[src]
Bit 20 - XDMAC Channel 20 Interrupt Mask Bit
pub fn im21(&self) -> IM21_R[src]
Bit 21 - XDMAC Channel 21 Interrupt Mask Bit
pub fn im22(&self) -> IM22_R[src]
Bit 22 - XDMAC Channel 22 Interrupt Mask Bit
pub fn im23(&self) -> IM23_R[src]
Bit 23 - XDMAC Channel 23 Interrupt Mask Bit
impl R<u32, Reg<u32, _XDMAC_GIS>>[src]
pub fn is0(&self) -> IS0_R[src]
Bit 0 - XDMAC Channel 0 Interrupt Status Bit
pub fn is1(&self) -> IS1_R[src]
Bit 1 - XDMAC Channel 1 Interrupt Status Bit
pub fn is2(&self) -> IS2_R[src]
Bit 2 - XDMAC Channel 2 Interrupt Status Bit
pub fn is3(&self) -> IS3_R[src]
Bit 3 - XDMAC Channel 3 Interrupt Status Bit
pub fn is4(&self) -> IS4_R[src]
Bit 4 - XDMAC Channel 4 Interrupt Status Bit
pub fn is5(&self) -> IS5_R[src]
Bit 5 - XDMAC Channel 5 Interrupt Status Bit
pub fn is6(&self) -> IS6_R[src]
Bit 6 - XDMAC Channel 6 Interrupt Status Bit
pub fn is7(&self) -> IS7_R[src]
Bit 7 - XDMAC Channel 7 Interrupt Status Bit
pub fn is8(&self) -> IS8_R[src]
Bit 8 - XDMAC Channel 8 Interrupt Status Bit
pub fn is9(&self) -> IS9_R[src]
Bit 9 - XDMAC Channel 9 Interrupt Status Bit
pub fn is10(&self) -> IS10_R[src]
Bit 10 - XDMAC Channel 10 Interrupt Status Bit
pub fn is11(&self) -> IS11_R[src]
Bit 11 - XDMAC Channel 11 Interrupt Status Bit
pub fn is12(&self) -> IS12_R[src]
Bit 12 - XDMAC Channel 12 Interrupt Status Bit
pub fn is13(&self) -> IS13_R[src]
Bit 13 - XDMAC Channel 13 Interrupt Status Bit
pub fn is14(&self) -> IS14_R[src]
Bit 14 - XDMAC Channel 14 Interrupt Status Bit
pub fn is15(&self) -> IS15_R[src]
Bit 15 - XDMAC Channel 15 Interrupt Status Bit
pub fn is16(&self) -> IS16_R[src]
Bit 16 - XDMAC Channel 16 Interrupt Status Bit
pub fn is17(&self) -> IS17_R[src]
Bit 17 - XDMAC Channel 17 Interrupt Status Bit
pub fn is18(&self) -> IS18_R[src]
Bit 18 - XDMAC Channel 18 Interrupt Status Bit
pub fn is19(&self) -> IS19_R[src]
Bit 19 - XDMAC Channel 19 Interrupt Status Bit
pub fn is20(&self) -> IS20_R[src]
Bit 20 - XDMAC Channel 20 Interrupt Status Bit
pub fn is21(&self) -> IS21_R[src]
Bit 21 - XDMAC Channel 21 Interrupt Status Bit
pub fn is22(&self) -> IS22_R[src]
Bit 22 - XDMAC Channel 22 Interrupt Status Bit
pub fn is23(&self) -> IS23_R[src]
Bit 23 - XDMAC Channel 23 Interrupt Status Bit
impl R<u32, Reg<u32, _XDMAC_GS>>[src]
pub fn st0(&self) -> ST0_R[src]
Bit 0 - XDMAC Channel 0 Status Bit
pub fn st1(&self) -> ST1_R[src]
Bit 1 - XDMAC Channel 1 Status Bit
pub fn st2(&self) -> ST2_R[src]
Bit 2 - XDMAC Channel 2 Status Bit
pub fn st3(&self) -> ST3_R[src]
Bit 3 - XDMAC Channel 3 Status Bit
pub fn st4(&self) -> ST4_R[src]
Bit 4 - XDMAC Channel 4 Status Bit
pub fn st5(&self) -> ST5_R[src]
Bit 5 - XDMAC Channel 5 Status Bit
pub fn st6(&self) -> ST6_R[src]
Bit 6 - XDMAC Channel 6 Status Bit
pub fn st7(&self) -> ST7_R[src]
Bit 7 - XDMAC Channel 7 Status Bit
pub fn st8(&self) -> ST8_R[src]
Bit 8 - XDMAC Channel 8 Status Bit
pub fn st9(&self) -> ST9_R[src]
Bit 9 - XDMAC Channel 9 Status Bit
pub fn st10(&self) -> ST10_R[src]
Bit 10 - XDMAC Channel 10 Status Bit
pub fn st11(&self) -> ST11_R[src]
Bit 11 - XDMAC Channel 11 Status Bit
pub fn st12(&self) -> ST12_R[src]
Bit 12 - XDMAC Channel 12 Status Bit
pub fn st13(&self) -> ST13_R[src]
Bit 13 - XDMAC Channel 13 Status Bit
pub fn st14(&self) -> ST14_R[src]
Bit 14 - XDMAC Channel 14 Status Bit
pub fn st15(&self) -> ST15_R[src]
Bit 15 - XDMAC Channel 15 Status Bit
pub fn st16(&self) -> ST16_R[src]
Bit 16 - XDMAC Channel 16 Status Bit
pub fn st17(&self) -> ST17_R[src]
Bit 17 - XDMAC Channel 17 Status Bit
pub fn st18(&self) -> ST18_R[src]
Bit 18 - XDMAC Channel 18 Status Bit
pub fn st19(&self) -> ST19_R[src]
Bit 19 - XDMAC Channel 19 Status Bit
pub fn st20(&self) -> ST20_R[src]
Bit 20 - XDMAC Channel 20 Status Bit
pub fn st21(&self) -> ST21_R[src]
Bit 21 - XDMAC Channel 21 Status Bit
pub fn st22(&self) -> ST22_R[src]
Bit 22 - XDMAC Channel 22 Status Bit
pub fn st23(&self) -> ST23_R[src]
Bit 23 - XDMAC Channel 23 Status Bit
impl R<u32, Reg<u32, _XDMAC_GRS>>[src]
pub fn rs0(&self) -> RS0_R[src]
Bit 0 - XDMAC Channel 0 Read Suspend Bit
pub fn rs1(&self) -> RS1_R[src]
Bit 1 - XDMAC Channel 1 Read Suspend Bit
pub fn rs2(&self) -> RS2_R[src]
Bit 2 - XDMAC Channel 2 Read Suspend Bit
pub fn rs3(&self) -> RS3_R[src]
Bit 3 - XDMAC Channel 3 Read Suspend Bit
pub fn rs4(&self) -> RS4_R[src]
Bit 4 - XDMAC Channel 4 Read Suspend Bit
pub fn rs5(&self) -> RS5_R[src]
Bit 5 - XDMAC Channel 5 Read Suspend Bit
pub fn rs6(&self) -> RS6_R[src]
Bit 6 - XDMAC Channel 6 Read Suspend Bit
pub fn rs7(&self) -> RS7_R[src]
Bit 7 - XDMAC Channel 7 Read Suspend Bit
pub fn rs8(&self) -> RS8_R[src]
Bit 8 - XDMAC Channel 8 Read Suspend Bit
pub fn rs9(&self) -> RS9_R[src]
Bit 9 - XDMAC Channel 9 Read Suspend Bit
pub fn rs10(&self) -> RS10_R[src]
Bit 10 - XDMAC Channel 10 Read Suspend Bit
pub fn rs11(&self) -> RS11_R[src]
Bit 11 - XDMAC Channel 11 Read Suspend Bit
pub fn rs12(&self) -> RS12_R[src]
Bit 12 - XDMAC Channel 12 Read Suspend Bit
pub fn rs13(&self) -> RS13_R[src]
Bit 13 - XDMAC Channel 13 Read Suspend Bit
pub fn rs14(&self) -> RS14_R[src]
Bit 14 - XDMAC Channel 14 Read Suspend Bit
pub fn rs15(&self) -> RS15_R[src]
Bit 15 - XDMAC Channel 15 Read Suspend Bit
pub fn rs16(&self) -> RS16_R[src]
Bit 16 - XDMAC Channel 16 Read Suspend Bit
pub fn rs17(&self) -> RS17_R[src]
Bit 17 - XDMAC Channel 17 Read Suspend Bit
pub fn rs18(&self) -> RS18_R[src]
Bit 18 - XDMAC Channel 18 Read Suspend Bit
pub fn rs19(&self) -> RS19_R[src]
Bit 19 - XDMAC Channel 19 Read Suspend Bit
pub fn rs20(&self) -> RS20_R[src]
Bit 20 - XDMAC Channel 20 Read Suspend Bit
pub fn rs21(&self) -> RS21_R[src]
Bit 21 - XDMAC Channel 21 Read Suspend Bit
pub fn rs22(&self) -> RS22_R[src]
Bit 22 - XDMAC Channel 22 Read Suspend Bit
pub fn rs23(&self) -> RS23_R[src]
Bit 23 - XDMAC Channel 23 Read Suspend Bit
impl R<u32, Reg<u32, _XDMAC_GWS>>[src]
pub fn ws0(&self) -> WS0_R[src]
Bit 0 - XDMAC Channel 0 Write Suspend Bit
pub fn ws1(&self) -> WS1_R[src]
Bit 1 - XDMAC Channel 1 Write Suspend Bit
pub fn ws2(&self) -> WS2_R[src]
Bit 2 - XDMAC Channel 2 Write Suspend Bit
pub fn ws3(&self) -> WS3_R[src]
Bit 3 - XDMAC Channel 3 Write Suspend Bit
pub fn ws4(&self) -> WS4_R[src]
Bit 4 - XDMAC Channel 4 Write Suspend Bit
pub fn ws5(&self) -> WS5_R[src]
Bit 5 - XDMAC Channel 5 Write Suspend Bit
pub fn ws6(&self) -> WS6_R[src]
Bit 6 - XDMAC Channel 6 Write Suspend Bit
pub fn ws7(&self) -> WS7_R[src]
Bit 7 - XDMAC Channel 7 Write Suspend Bit
pub fn ws8(&self) -> WS8_R[src]
Bit 8 - XDMAC Channel 8 Write Suspend Bit
pub fn ws9(&self) -> WS9_R[src]
Bit 9 - XDMAC Channel 9 Write Suspend Bit
pub fn ws10(&self) -> WS10_R[src]
Bit 10 - XDMAC Channel 10 Write Suspend Bit
pub fn ws11(&self) -> WS11_R[src]
Bit 11 - XDMAC Channel 11 Write Suspend Bit
pub fn ws12(&self) -> WS12_R[src]
Bit 12 - XDMAC Channel 12 Write Suspend Bit
pub fn ws13(&self) -> WS13_R[src]
Bit 13 - XDMAC Channel 13 Write Suspend Bit
pub fn ws14(&self) -> WS14_R[src]
Bit 14 - XDMAC Channel 14 Write Suspend Bit
pub fn ws15(&self) -> WS15_R[src]
Bit 15 - XDMAC Channel 15 Write Suspend Bit
pub fn ws16(&self) -> WS16_R[src]
Bit 16 - XDMAC Channel 16 Write Suspend Bit
pub fn ws17(&self) -> WS17_R[src]
Bit 17 - XDMAC Channel 17 Write Suspend Bit
pub fn ws18(&self) -> WS18_R[src]
Bit 18 - XDMAC Channel 18 Write Suspend Bit
pub fn ws19(&self) -> WS19_R[src]
Bit 19 - XDMAC Channel 19 Write Suspend Bit
pub fn ws20(&self) -> WS20_R[src]
Bit 20 - XDMAC Channel 20 Write Suspend Bit
pub fn ws21(&self) -> WS21_R[src]
Bit 21 - XDMAC Channel 21 Write Suspend Bit
pub fn ws22(&self) -> WS22_R[src]
Bit 22 - XDMAC Channel 22 Write Suspend Bit
pub fn ws23(&self) -> WS23_R[src]
Bit 23 - XDMAC Channel 23 Write Suspend Bit
impl R<u32, Reg<u32, _XDMAC_GSWS>>[src]
pub fn swrs0(&self) -> SWRS0_R[src]
Bit 0 - XDMAC Channel 0 Software Request Status Bit
pub fn swrs1(&self) -> SWRS1_R[src]
Bit 1 - XDMAC Channel 1 Software Request Status Bit
pub fn swrs2(&self) -> SWRS2_R[src]
Bit 2 - XDMAC Channel 2 Software Request Status Bit
pub fn swrs3(&self) -> SWRS3_R[src]
Bit 3 - XDMAC Channel 3 Software Request Status Bit
pub fn swrs4(&self) -> SWRS4_R[src]
Bit 4 - XDMAC Channel 4 Software Request Status Bit
pub fn swrs5(&self) -> SWRS5_R[src]
Bit 5 - XDMAC Channel 5 Software Request Status Bit
pub fn swrs6(&self) -> SWRS6_R[src]
Bit 6 - XDMAC Channel 6 Software Request Status Bit
pub fn swrs7(&self) -> SWRS7_R[src]
Bit 7 - XDMAC Channel 7 Software Request Status Bit
pub fn swrs8(&self) -> SWRS8_R[src]
Bit 8 - XDMAC Channel 8 Software Request Status Bit
pub fn swrs9(&self) -> SWRS9_R[src]
Bit 9 - XDMAC Channel 9 Software Request Status Bit
pub fn swrs10(&self) -> SWRS10_R[src]
Bit 10 - XDMAC Channel 10 Software Request Status Bit
pub fn swrs11(&self) -> SWRS11_R[src]
Bit 11 - XDMAC Channel 11 Software Request Status Bit
pub fn swrs12(&self) -> SWRS12_R[src]
Bit 12 - XDMAC Channel 12 Software Request Status Bit
pub fn swrs13(&self) -> SWRS13_R[src]
Bit 13 - XDMAC Channel 13 Software Request Status Bit
pub fn swrs14(&self) -> SWRS14_R[src]
Bit 14 - XDMAC Channel 14 Software Request Status Bit
pub fn swrs15(&self) -> SWRS15_R[src]
Bit 15 - XDMAC Channel 15 Software Request Status Bit
pub fn swrs16(&self) -> SWRS16_R[src]
Bit 16 - XDMAC Channel 16 Software Request Status Bit
pub fn swrs17(&self) -> SWRS17_R[src]
Bit 17 - XDMAC Channel 17 Software Request Status Bit
pub fn swrs18(&self) -> SWRS18_R[src]
Bit 18 - XDMAC Channel 18 Software Request Status Bit
pub fn swrs19(&self) -> SWRS19_R[src]
Bit 19 - XDMAC Channel 19 Software Request Status Bit
pub fn swrs20(&self) -> SWRS20_R[src]
Bit 20 - XDMAC Channel 20 Software Request Status Bit
pub fn swrs21(&self) -> SWRS21_R[src]
Bit 21 - XDMAC Channel 21 Software Request Status Bit
pub fn swrs22(&self) -> SWRS22_R[src]
Bit 22 - XDMAC Channel 22 Software Request Status Bit
pub fn swrs23(&self) -> SWRS23_R[src]
Bit 23 - XDMAC Channel 23 Software Request Status Bit
impl R<u32, Reg<u32, _LOCKBIT_WORD0>>[src]
pub fn lock_region_0(&self) -> LOCK_REGION_0_R[src]
Bit 0 - Lock Region 0
pub fn lock_region_1(&self) -> LOCK_REGION_1_R[src]
Bit 1 - Lock Region 1
pub fn lock_region_2(&self) -> LOCK_REGION_2_R[src]
Bit 2 - Lock Region 2
pub fn lock_region_3(&self) -> LOCK_REGION_3_R[src]
Bit 3 - Lock Region 3
pub fn lock_region_4(&self) -> LOCK_REGION_4_R[src]
Bit 4 - Lock Region 4
pub fn lock_region_5(&self) -> LOCK_REGION_5_R[src]
Bit 5 - Lock Region 5
pub fn lock_region_6(&self) -> LOCK_REGION_6_R[src]
Bit 6 - Lock Region 6
pub fn lock_region_7(&self) -> LOCK_REGION_7_R[src]
Bit 7 - Lock Region 7
pub fn lock_region_8(&self) -> LOCK_REGION_8_R[src]
Bit 8 - Lock Region 8
pub fn lock_region_9(&self) -> LOCK_REGION_9_R[src]
Bit 9 - Lock Region 9
pub fn lock_region_10(&self) -> LOCK_REGION_10_R[src]
Bit 10 - Lock Region 10
pub fn lock_region_11(&self) -> LOCK_REGION_11_R[src]
Bit 11 - Lock Region 11
pub fn lock_region_12(&self) -> LOCK_REGION_12_R[src]
Bit 12 - Lock Region 12
pub fn lock_region_13(&self) -> LOCK_REGION_13_R[src]
Bit 13 - Lock Region 13
pub fn lock_region_14(&self) -> LOCK_REGION_14_R[src]
Bit 14 - Lock Region 14
pub fn lock_region_15(&self) -> LOCK_REGION_15_R[src]
Bit 15 - Lock Region 15
pub fn lock_region_16(&self) -> LOCK_REGION_16_R[src]
Bit 16 - Lock Region 16
pub fn lock_region_17(&self) -> LOCK_REGION_17_R[src]
Bit 17 - Lock Region 17
pub fn lock_region_18(&self) -> LOCK_REGION_18_R[src]
Bit 18 - Lock Region 18
pub fn lock_region_19(&self) -> LOCK_REGION_19_R[src]
Bit 19 - Lock Region 19
pub fn lock_region_20(&self) -> LOCK_REGION_20_R[src]
Bit 20 - Lock Region 20
pub fn lock_region_21(&self) -> LOCK_REGION_21_R[src]
Bit 21 - Lock Region 21
pub fn lock_region_22(&self) -> LOCK_REGION_22_R[src]
Bit 22 - Lock Region 22
pub fn lock_region_23(&self) -> LOCK_REGION_23_R[src]
Bit 23 - Lock Region 23
pub fn lock_region_24(&self) -> LOCK_REGION_24_R[src]
Bit 24 - Lock Region 24
pub fn lock_region_25(&self) -> LOCK_REGION_25_R[src]
Bit 25 - Lock Region 25
pub fn lock_region_26(&self) -> LOCK_REGION_26_R[src]
Bit 26 - Lock Region 26
pub fn lock_region_27(&self) -> LOCK_REGION_27_R[src]
Bit 27 - Lock Region 27
pub fn lock_region_28(&self) -> LOCK_REGION_28_R[src]
Bit 28 - Lock Region 28
pub fn lock_region_29(&self) -> LOCK_REGION_29_R[src]
Bit 29 - Lock Region 29
pub fn lock_region_30(&self) -> LOCK_REGION_30_R[src]
Bit 30 - Lock Region 30
pub fn lock_region_31(&self) -> LOCK_REGION_31_R[src]
Bit 31 - Lock Region 31
impl R<u32, Reg<u32, _ICTR>>[src]
pub fn intlinesnum(&self) -> INTLINESNUM_R[src]
Bits 0:3 - Total number of interrupt lines supported by an implementation, defined in groups of 32
impl R<u32, Reg<u32, _ACTLR>>[src]
pub fn disfold(&self) -> DISFOLD_R[src]
Bit 2 - Disables folding of IT instructions
pub fn fpexcodis(&self) -> FPEXCODIS_R[src]
Bit 10 - Disables FPU exception outputs
pub fn disramode(&self) -> DISRAMODE_R[src]
Bit 11 - Disables dynamic read allocate mode for Write-Back Write-Allocate memory regions
pub fn disitmatbflush(&self) -> DISITMATBFLUSH_R[src]
Bit 12 - Disables ITM and DWT ATB flush
pub fn disbtacread(&self) -> DISBTACREAD_R[src]
Bit 13
pub fn disbtacalloc(&self) -> DISBTACALLOC_R[src]
Bit 14
pub fn discritaxirur(&self) -> DISCRITAXIRUR_R[src]
Bit 15
pub fn disdi(&self) -> DISDI_R[src]
Bits 16:20
pub fn disissch1(&self) -> DISISSCH1_R[src]
Bits 21:25
pub fn disdynadd(&self) -> DISDYNADD_R[src]
Bit 26 - Disables dynamic allocation of ADD and SUB instructions
pub fn discritaxiruw(&self) -> DISCRITAXIRUW_R[src]
Bit 27 - Disable critical AXI read-under-write
pub fn disfpuissopt(&self) -> DISFPUISSOPT_R[src]
Bit 28 - Disables dynamic allocation of ADD and SUB instructions
impl R<bool, ENABLE_A>[src]
pub fn variant(&self) -> ENABLE_A[src]
Get enumerated values variant
pub fn is_value_0(&self) -> bool[src]
Checks if the value of the field is VALUE_0
pub fn is_value_1(&self) -> bool[src]
Checks if the value of the field is VALUE_1
impl R<bool, TICKINT_A>[src]
pub fn variant(&self) -> TICKINT_A[src]
Get enumerated values variant
pub fn is_value_0(&self) -> bool[src]
Checks if the value of the field is VALUE_0
pub fn is_value_1(&self) -> bool[src]
Checks if the value of the field is VALUE_1
impl R<bool, CLKSOURCE_A>[src]
pub fn variant(&self) -> CLKSOURCE_A[src]
Get enumerated values variant
pub fn is_value_0(&self) -> bool[src]
Checks if the value of the field is VALUE_0
pub fn is_value_1(&self) -> bool[src]
Checks if the value of the field is VALUE_1
impl R<u32, Reg<u32, _CSR>>[src]
pub fn enable(&self) -> ENABLE_R[src]
Bit 0 - Enables the counter
pub fn tickint(&self) -> TICKINT_R[src]
Bit 1 - Enables SysTick exception request
pub fn clksource(&self) -> CLKSOURCE_R[src]
Bit 2 - Indicates the clock source
pub fn countflag(&self) -> COUNTFLAG_R[src]
Bit 16 - Returns 1 if timer counted to 0 since last time this was read
impl R<u32, Reg<u32, _RVR>>[src]
pub fn reload(&self) -> RELOAD_R[src]
Bits 0:23 - Value to load into the SysTick Current Value Register when the counter reaches 0
impl R<u32, Reg<u32, _CVR>>[src]
pub fn current(&self) -> CURRENT_R[src]
Bits 0:23 - Current value at the time the register is accessed
impl R<bool, SKEW_A>[src]
pub fn variant(&self) -> SKEW_A[src]
Get enumerated values variant
pub fn is_value_0(&self) -> bool[src]
Checks if the value of the field is VALUE_0
pub fn is_value_1(&self) -> bool[src]
Checks if the value of the field is VALUE_1
impl R<bool, NOREF_A>[src]
pub fn variant(&self) -> NOREF_A[src]
Get enumerated values variant
pub fn is_value_0(&self) -> bool[src]
Checks if the value of the field is VALUE_0
pub fn is_value_1(&self) -> bool[src]
Checks if the value of the field is VALUE_1
impl R<u32, Reg<u32, _CALIB>>[src]
pub fn tenms(&self) -> TENMS_R[src]
Bits 0:23 - Reload value to use for 10ms timing
pub fn skew(&self) -> SKEW_R[src]
Bit 30 - Indicates whether the TENMS value is exact
pub fn noref(&self) -> NOREF_R[src]
Bit 31 - Indicates whether the device provides a reference clock to the processor
Trait Implementations
Auto Trait Implementations
impl<U, T> Send for R<U, T> where
T: Send,
U: Send,
T: Send,
U: Send,
impl<U, T> Sync for R<U, T> where
T: Sync,
U: Sync,
T: Sync,
U: Sync,
impl<U, T> Unpin for R<U, T> where
T: Unpin,
U: Unpin,
T: Unpin,
U: Unpin,
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized, [src]
T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized, [src]
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized, [src]
T: ?Sized,
fn borrow_mut(&mut self) -> &mut T[src]
impl<T> From<T> for T[src]
impl<T, U> Into<U> for T where
U: From<T>, [src]
U: From<T>,
impl<T> Same<T> for T
type Output = T
Should always be Self
impl<T, U> TryFrom<U> for T where
U: Into<T>, [src]
U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>[src]
impl<T, U> TryInto<U> for T where
U: TryFrom<T>, [src]
U: TryFrom<T>,