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#[doc = "Reader of register QSPI_MR"] pub type R = crate::R<u32, super::QSPI_MR>; #[doc = "Writer for register QSPI_MR"] pub type W = crate::W<u32, super::QSPI_MR>; #[doc = "Register QSPI_MR `reset()`'s with value 0"] impl crate::ResetValue for super::QSPI_MR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Serial Memory Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum SMM_A { #[doc = "0: The QSPI is in SPI mode."] SPI = 0, #[doc = "1: The QSPI is in Serial Memory mode."] MEMORY = 1, } impl From<SMM_A> for bool { #[inline(always)] fn from(variant: SMM_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `SMM`"] pub type SMM_R = crate::R<bool, SMM_A>; impl SMM_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> SMM_A { match self.bits { false => SMM_A::SPI, true => SMM_A::MEMORY, } } #[doc = "Checks if the value of the field is `SPI`"] #[inline(always)] pub fn is_spi(&self) -> bool { *self == SMM_A::SPI } #[doc = "Checks if the value of the field is `MEMORY`"] #[inline(always)] pub fn is_memory(&self) -> bool { *self == SMM_A::MEMORY } } #[doc = "Write proxy for field `SMM`"] pub struct SMM_W<'a> { w: &'a mut W, } impl<'a> SMM_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SMM_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The QSPI is in SPI mode."] #[inline(always)] pub fn spi(self) -> &'a mut W { self.variant(SMM_A::SPI) } #[doc = "The QSPI is in Serial Memory mode."] #[inline(always)] pub fn memory(self) -> &'a mut W { self.variant(SMM_A::MEMORY) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Local Loopback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum LLB_A { #[doc = "0: Local loopback path disabled."] DISABLED = 0, #[doc = "1: Local loopback path enabled."] ENABLED = 1, } impl From<LLB_A> for bool { #[inline(always)] fn from(variant: LLB_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `LLB`"] pub type LLB_R = crate::R<bool, LLB_A>; impl LLB_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> LLB_A { match self.bits { false => LLB_A::DISABLED, true => LLB_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == LLB_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == LLB_A::ENABLED } } #[doc = "Write proxy for field `LLB`"] pub struct LLB_W<'a> { w: &'a mut W, } impl<'a> LLB_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: LLB_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Local loopback path disabled."] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(LLB_A::DISABLED) } #[doc = "Local loopback path enabled."] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(LLB_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Wait Data Read Before Transfer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum WDRBT_A { #[doc = "0: No effect. In SPI mode, a transfer can be initiated whatever the state of the QSPI_RDR is."] DISABLED = 0, #[doc = "1: In SPI mode, a transfer can start only if the QSPI_RDR is empty, i.e., does not contain any unread data. This mode prevents overrun error in reception."] ENABLED = 1, } impl From<WDRBT_A> for bool { #[inline(always)] fn from(variant: WDRBT_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `WDRBT`"] pub type WDRBT_R = crate::R<bool, WDRBT_A>; impl WDRBT_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> WDRBT_A { match self.bits { false => WDRBT_A::DISABLED, true => WDRBT_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == WDRBT_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == WDRBT_A::ENABLED } } #[doc = "Write proxy for field `WDRBT`"] pub struct WDRBT_W<'a> { w: &'a mut W, } impl<'a> WDRBT_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: WDRBT_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "No effect. In SPI mode, a transfer can be initiated whatever the state of the QSPI_RDR is."] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(WDRBT_A::DISABLED) } #[doc = "In SPI mode, a transfer can start only if the QSPI_RDR is empty, i.e., does not contain any unread data. This mode prevents overrun error in reception."] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(WDRBT_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Chip Select Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum CSMODE_A { #[doc = "0: The chip select is deasserted if QSPI_TDR.TD has not been reloaded before the end of the current transfer."] NOT_RELOADED = 0, #[doc = "1: The chip select is deasserted when the bit LASTXFER is written at 1 and the character written in QSPI_TDR.TD has been transferred."] LASTXFER = 1, #[doc = "2: The chip select is deasserted systematically after each transfer."] SYSTEMATICALLY = 2, } impl From<CSMODE_A> for u8 { #[inline(always)] fn from(variant: CSMODE_A) -> Self { variant as _ } } #[doc = "Reader of field `CSMODE`"] pub type CSMODE_R = crate::R<u8, CSMODE_A>; impl CSMODE_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> crate::Variant<u8, CSMODE_A> { use crate::Variant::*; match self.bits { 0 => Val(CSMODE_A::NOT_RELOADED), 1 => Val(CSMODE_A::LASTXFER), 2 => Val(CSMODE_A::SYSTEMATICALLY), i => Res(i), } } #[doc = "Checks if the value of the field is `NOT_RELOADED`"] #[inline(always)] pub fn is_not_reloaded(&self) -> bool { *self == CSMODE_A::NOT_RELOADED } #[doc = "Checks if the value of the field is `LASTXFER`"] #[inline(always)] pub fn is_lastxfer(&self) -> bool { *self == CSMODE_A::LASTXFER } #[doc = "Checks if the value of the field is `SYSTEMATICALLY`"] #[inline(always)] pub fn is_systematically(&self) -> bool { *self == CSMODE_A::SYSTEMATICALLY } } #[doc = "Write proxy for field `CSMODE`"] pub struct CSMODE_W<'a> { w: &'a mut W, } impl<'a> CSMODE_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: CSMODE_A) -> &'a mut W { unsafe { self.bits(variant.into()) } } #[doc = "The chip select is deasserted if QSPI_TDR.TD has not been reloaded before the end of the current transfer."] #[inline(always)] pub fn not_reloaded(self) -> &'a mut W { self.variant(CSMODE_A::NOT_RELOADED) } #[doc = "The chip select is deasserted when the bit LASTXFER is written at 1 and the character written in QSPI_TDR.TD has been transferred."] #[inline(always)] pub fn lastxfer(self) -> &'a mut W { self.variant(CSMODE_A::LASTXFER) } #[doc = "The chip select is deasserted systematically after each transfer."] #[inline(always)] pub fn systematically(self) -> &'a mut W { self.variant(CSMODE_A::SYSTEMATICALLY) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4); self.w } } #[doc = "Number Of Bits Per Transfer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum NBBITS_A { #[doc = "0: 8 bits for transfer"] _8_BIT = 0, #[doc = "8: 16 bits for transfer"] _16_BIT = 8, } impl From<NBBITS_A> for u8 { #[inline(always)] fn from(variant: NBBITS_A) -> Self { variant as _ } } #[doc = "Reader of field `NBBITS`"] pub type NBBITS_R = crate::R<u8, NBBITS_A>; impl NBBITS_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> crate::Variant<u8, NBBITS_A> { use crate::Variant::*; match self.bits { 0 => Val(NBBITS_A::_8_BIT), 8 => Val(NBBITS_A::_16_BIT), i => Res(i), } } #[doc = "Checks if the value of the field is `_8_BIT`"] #[inline(always)] pub fn is_8_bit(&self) -> bool { *self == NBBITS_A::_8_BIT } #[doc = "Checks if the value of the field is `_16_BIT`"] #[inline(always)] pub fn is_16_bit(&self) -> bool { *self == NBBITS_A::_16_BIT } } #[doc = "Write proxy for field `NBBITS`"] pub struct NBBITS_W<'a> { w: &'a mut W, } impl<'a> NBBITS_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: NBBITS_A) -> &'a mut W { unsafe { self.bits(variant.into()) } } #[doc = "8 bits for transfer"] #[inline(always)] pub fn _8_bit(self) -> &'a mut W { self.variant(NBBITS_A::_8_BIT) } #[doc = "16 bits for transfer"] #[inline(always)] pub fn _16_bit(self) -> &'a mut W { self.variant(NBBITS_A::_16_BIT) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8); self.w } } #[doc = "Reader of field `DLYBCT`"] pub type DLYBCT_R = crate::R<u8, u8>; #[doc = "Write proxy for field `DLYBCT`"] pub struct DLYBCT_W<'a> { w: &'a mut W, } impl<'a> DLYBCT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0xff << 16)) | (((value as u32) & 0xff) << 16); self.w } } #[doc = "Reader of field `DLYCS`"] pub type DLYCS_R = crate::R<u8, u8>; #[doc = "Write proxy for field `DLYCS`"] pub struct DLYCS_W<'a> { w: &'a mut W, } impl<'a> DLYCS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0xff << 24)) | (((value as u32) & 0xff) << 24); self.w } } impl R { #[doc = "Bit 0 - Serial Memory Mode"] #[inline(always)] pub fn smm(&self) -> SMM_R { SMM_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Local Loopback Enable"] #[inline(always)] pub fn llb(&self) -> LLB_R { LLB_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Wait Data Read Before Transfer"] #[inline(always)] pub fn wdrbt(&self) -> WDRBT_R { WDRBT_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bits 4:5 - Chip Select Mode"] #[inline(always)] pub fn csmode(&self) -> CSMODE_R { CSMODE_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 8:11 - Number Of Bits Per Transfer"] #[inline(always)] pub fn nbbits(&self) -> NBBITS_R { NBBITS_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:23 - Delay Between Consecutive Transfers"] #[inline(always)] pub fn dlybct(&self) -> DLYBCT_R { DLYBCT_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Minimum Inactive QCS Delay"] #[inline(always)] pub fn dlycs(&self) -> DLYCS_R { DLYCS_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Serial Memory Mode"] #[inline(always)] pub fn smm(&mut self) -> SMM_W { SMM_W { w: self } } #[doc = "Bit 1 - Local Loopback Enable"] #[inline(always)] pub fn llb(&mut self) -> LLB_W { LLB_W { w: self } } #[doc = "Bit 2 - Wait Data Read Before Transfer"] #[inline(always)] pub fn wdrbt(&mut self) -> WDRBT_W { WDRBT_W { w: self } } #[doc = "Bits 4:5 - Chip Select Mode"] #[inline(always)] pub fn csmode(&mut self) -> CSMODE_W { CSMODE_W { w: self } } #[doc = "Bits 8:11 - Number Of Bits Per Transfer"] #[inline(always)] pub fn nbbits(&mut self) -> NBBITS_W { NBBITS_W { w: self } } #[doc = "Bits 16:23 - Delay Between Consecutive Transfers"] #[inline(always)] pub fn dlybct(&mut self) -> DLYBCT_W { DLYBCT_W { w: self } } #[doc = "Bits 24:31 - Minimum Inactive QCS Delay"] #[inline(always)] pub fn dlycs(&mut self) -> DLYCS_W { DLYCS_W { w: self } } }