Type Definition atsame54p19a_pac::oscctrl::status::R[][src]

type R = R<u32, STATUS>;

Reader of register STATUS

Implementations

impl R[src]

pub fn xoscrdy0(&self) -> XOSCRDY0_R[src]

Bit 0 - XOSC 0 Ready

pub fn xoscrdy1(&self) -> XOSCRDY1_R[src]

Bit 1 - XOSC 1 Ready

pub fn xoscfail0(&self) -> XOSCFAIL0_R[src]

Bit 2 - XOSC 0 Clock Failure Detector

pub fn xoscfail1(&self) -> XOSCFAIL1_R[src]

Bit 3 - XOSC 1 Clock Failure Detector

pub fn xosccksw0(&self) -> XOSCCKSW0_R[src]

Bit 4 - XOSC 0 Clock Switch

pub fn xosccksw1(&self) -> XOSCCKSW1_R[src]

Bit 5 - XOSC 1 Clock Switch

pub fn dfllrdy(&self) -> DFLLRDY_R[src]

Bit 8 - DFLL Ready

pub fn dflloob(&self) -> DFLLOOB_R[src]

Bit 9 - DFLL Out Of Bounds

pub fn dflllckf(&self) -> DFLLLCKF_R[src]

Bit 10 - DFLL Lock Fine

pub fn dflllckc(&self) -> DFLLLCKC_R[src]

Bit 11 - DFLL Lock Coarse

pub fn dfllrcs(&self) -> DFLLRCS_R[src]

Bit 12 - DFLL Reference Clock Stopped

pub fn dpll0lckr(&self) -> DPLL0LCKR_R[src]

Bit 16 - DPLL0 Lock Rise

pub fn dpll0lckf(&self) -> DPLL0LCKF_R[src]

Bit 17 - DPLL0 Lock Fall

pub fn dpll0to(&self) -> DPLL0TO_R[src]

Bit 18 - DPLL0 Timeout

pub fn dpll0ldrto(&self) -> DPLL0LDRTO_R[src]

Bit 19 - DPLL0 Loop Divider Ratio Update Complete

pub fn dpll1lckr(&self) -> DPLL1LCKR_R[src]

Bit 24 - DPLL1 Lock Rise

pub fn dpll1lckf(&self) -> DPLL1LCKF_R[src]

Bit 25 - DPLL1 Lock Fall

pub fn dpll1to(&self) -> DPLL1TO_R[src]

Bit 26 - DPLL1 Timeout

pub fn dpll1ldrto(&self) -> DPLL1LDRTO_R[src]

Bit 27 - DPLL1 Loop Divider Ratio Update Complete