Struct atsame54p19a_pac::generic::R[][src]

pub struct R<U, T> { /* fields omitted */ }

Register/field reader.

Result of the read methods of registers. Also used as a closure argument in the modify method.

Implementations

impl<U, T> R<U, T> where
    U: Copy
[src]

pub fn bits(&self) -> U[src]

Reads raw bits from register/field.

impl<FI> R<bool, FI>[src]

pub fn bit(&self) -> bool[src]

Value of the field as raw bits.

pub fn bit_is_clear(&self) -> bool[src]

Returns true if the bit is clear (0).

pub fn bit_is_set(&self) -> bool[src]

Returns true if the bit is set (1).

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

impl R<u16, Reg<u16, _EVCTRL>>[src]

pub fn compeo0(&self) -> COMPEO0_R[src]

Bit 0 - Comparator 0 Event Output Enable

pub fn compeo1(&self) -> COMPEO1_R[src]

Bit 1 - Comparator 1 Event Output Enable

pub fn wineo0(&self) -> WINEO0_R[src]

Bit 4 - Window 0 Event Output Enable

pub fn compei0(&self) -> COMPEI0_R[src]

Bit 8 - Comparator 0 Event Input Enable

pub fn compei1(&self) -> COMPEI1_R[src]

Bit 9 - Comparator 1 Event Input Enable

pub fn invei0(&self) -> INVEI0_R[src]

Bit 12 - Comparator 0 Input Event Invert Enable

pub fn invei1(&self) -> INVEI1_R[src]

Bit 13 - Comparator 1 Input Event Invert Enable

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn comp0(&self) -> COMP0_R[src]

Bit 0 - Comparator 0 Interrupt Enable

pub fn comp1(&self) -> COMP1_R[src]

Bit 1 - Comparator 1 Interrupt Enable

pub fn win0(&self) -> WIN0_R[src]

Bit 4 - Window 0 Interrupt Enable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn comp0(&self) -> COMP0_R[src]

Bit 0 - Comparator 0 Interrupt Enable

pub fn comp1(&self) -> COMP1_R[src]

Bit 1 - Comparator 1 Interrupt Enable

pub fn win0(&self) -> WIN0_R[src]

Bit 4 - Window 0 Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn comp0(&self) -> COMP0_R[src]

Bit 0 - Comparator 0

pub fn comp1(&self) -> COMP1_R[src]

Bit 1 - Comparator 1

pub fn win0(&self) -> WIN0_R[src]

Bit 4 - Window 0

impl R<u8, WSTATE0_A>[src]

pub fn variant(&self) -> Variant<u8, WSTATE0_A>[src]

Get enumerated values variant

pub fn is_above(&self) -> bool[src]

Checks if the value of the field is ABOVE

pub fn is_inside(&self) -> bool[src]

Checks if the value of the field is INSIDE

pub fn is_below(&self) -> bool[src]

Checks if the value of the field is BELOW

impl R<u8, Reg<u8, _STATUSA>>[src]

pub fn state0(&self) -> STATE0_R[src]

Bit 0 - Comparator 0 Current State

pub fn state1(&self) -> STATE1_R[src]

Bit 1 - Comparator 1 Current State

pub fn wstate0(&self) -> WSTATE0_R[src]

Bits 4:5 - Window 0 Current State

impl R<u8, Reg<u8, _STATUSB>>[src]

pub fn ready0(&self) -> READY0_R[src]

Bit 0 - Comparator 0 Ready

pub fn ready1(&self) -> READY1_R[src]

Bit 1 - Comparator 1 Ready

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Debug Run

impl R<u8, WINTSEL0_A>[src]

pub fn variant(&self) -> WINTSEL0_A[src]

Get enumerated values variant

pub fn is_above(&self) -> bool[src]

Checks if the value of the field is ABOVE

pub fn is_inside(&self) -> bool[src]

Checks if the value of the field is INSIDE

pub fn is_below(&self) -> bool[src]

Checks if the value of the field is BELOW

pub fn is_outside(&self) -> bool[src]

Checks if the value of the field is OUTSIDE

impl R<u8, Reg<u8, _WINCTRL>>[src]

pub fn wen0(&self) -> WEN0_R[src]

Bit 0 - Window 0 Mode Enable

pub fn wintsel0(&self) -> WINTSEL0_R[src]

Bits 1:2 - Window 0 Interrupt Selection

impl R<u8, Reg<u8, _SCALER>>[src]

pub fn value(&self) -> VALUE_R[src]

Bits 0:5 - Scaler Value

impl R<u8, INTSEL_A>[src]

pub fn variant(&self) -> INTSEL_A[src]

Get enumerated values variant

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_eoc(&self) -> bool[src]

Checks if the value of the field is EOC

impl R<u8, MUXNEG_A>[src]

pub fn variant(&self) -> MUXNEG_A[src]

Get enumerated values variant

pub fn is_pin0(&self) -> bool[src]

Checks if the value of the field is PIN0

pub fn is_pin1(&self) -> bool[src]

Checks if the value of the field is PIN1

pub fn is_pin2(&self) -> bool[src]

Checks if the value of the field is PIN2

pub fn is_pin3(&self) -> bool[src]

Checks if the value of the field is PIN3

pub fn is_gnd(&self) -> bool[src]

Checks if the value of the field is GND

pub fn is_vscale(&self) -> bool[src]

Checks if the value of the field is VSCALE

pub fn is_bandgap(&self) -> bool[src]

Checks if the value of the field is BANDGAP

pub fn is_dac(&self) -> bool[src]

Checks if the value of the field is DAC

impl R<u8, MUXPOS_A>[src]

pub fn variant(&self) -> Variant<u8, MUXPOS_A>[src]

Get enumerated values variant

pub fn is_pin0(&self) -> bool[src]

Checks if the value of the field is PIN0

pub fn is_pin1(&self) -> bool[src]

Checks if the value of the field is PIN1

pub fn is_pin2(&self) -> bool[src]

Checks if the value of the field is PIN2

pub fn is_pin3(&self) -> bool[src]

Checks if the value of the field is PIN3

pub fn is_vscale(&self) -> bool[src]

Checks if the value of the field is VSCALE

impl R<u8, SPEED_A>[src]

pub fn variant(&self) -> Variant<u8, SPEED_A>[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<u8, HYST_A>[src]

pub fn variant(&self) -> Variant<u8, HYST_A>[src]

Get enumerated values variant

pub fn is_hyst50(&self) -> bool[src]

Checks if the value of the field is HYST50

pub fn is_hyst100(&self) -> bool[src]

Checks if the value of the field is HYST100

pub fn is_hyst150(&self) -> bool[src]

Checks if the value of the field is HYST150

impl R<u8, FLEN_A>[src]

pub fn variant(&self) -> Variant<u8, FLEN_A>[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_maj3(&self) -> bool[src]

Checks if the value of the field is MAJ3

pub fn is_maj5(&self) -> bool[src]

Checks if the value of the field is MAJ5

impl R<u8, OUT_A>[src]

pub fn variant(&self) -> Variant<u8, OUT_A>[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_async_(&self) -> bool[src]

Checks if the value of the field is ASYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u32, Reg<u32, _COMPCTRL>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn single(&self) -> SINGLE_R[src]

Bit 2 - Single-Shot Mode

pub fn intsel(&self) -> INTSEL_R[src]

Bits 3:4 - Interrupt Selection

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run in Standby

pub fn muxneg(&self) -> MUXNEG_R[src]

Bits 8:10 - Negative Input Mux Selection

pub fn muxpos(&self) -> MUXPOS_R[src]

Bits 12:14 - Positive Input Mux Selection

pub fn swap(&self) -> SWAP_R[src]

Bit 15 - Swap Inputs and Invert

pub fn speed(&self) -> SPEED_R[src]

Bits 16:17 - Speed Selection

pub fn hysten(&self) -> HYSTEN_R[src]

Bit 19 - Hysteresis Enable

pub fn hyst(&self) -> HYST_R[src]

Bits 20:21 - Hysteresis Level

pub fn flen(&self) -> FLEN_R[src]

Bits 24:26 - Filter Length

pub fn out(&self) -> OUT_R[src]

Bits 28:29 - Output

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable Synchronization Busy

pub fn winctrl(&self) -> WINCTRL_R[src]

Bit 2 - WINCTRL Synchronization Busy

pub fn compctrl0(&self) -> COMPCTRL0_R[src]

Bit 3 - COMPCTRL 0 Synchronization Busy

pub fn compctrl1(&self) -> COMPCTRL1_R[src]

Bit 4 - COMPCTRL 1 Synchronization Busy

impl R<u16, Reg<u16, _CALIB>>[src]

pub fn bias0(&self) -> BIAS0_R[src]

Bits 0:1 - COMP0/1 Bias Scaling

impl R<u8, DUALSEL_A>[src]

pub fn variant(&self) -> Variant<u8, DUALSEL_A>[src]

Get enumerated values variant

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

pub fn is_interleave(&self) -> bool[src]

Checks if the value of the field is INTERLEAVE

impl R<u8, PRESCALER_A>[src]

pub fn variant(&self) -> PRESCALER_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<u16, Reg<u16, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn dualsel(&self) -> DUALSEL_R[src]

Bits 3:4 - Dual Mode Trigger Selection

pub fn slaveen(&self) -> SLAVEEN_R[src]

Bit 5 - Slave Enable

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run in Standby

pub fn ondemand(&self) -> ONDEMAND_R[src]

Bit 7 - On Demand Control

pub fn prescaler(&self) -> PRESCALER_R[src]

Bits 8:10 - Prescaler Configuration

pub fn r2r(&self) -> R2R_R[src]

Bit 15 - Rail to Rail Operation Enable

impl R<u8, Reg<u8, _EVCTRL>>[src]

pub fn flushei(&self) -> FLUSHEI_R[src]

Bit 0 - Flush Event Input Enable

pub fn startei(&self) -> STARTEI_R[src]

Bit 1 - Start Conversion Event Input Enable

pub fn flushinv(&self) -> FLUSHINV_R[src]

Bit 2 - Flush Event Invert Enable

pub fn startinv(&self) -> STARTINV_R[src]

Bit 3 - Start Conversion Event Invert Enable

pub fn resrdyeo(&self) -> RESRDYEO_R[src]

Bit 4 - Result Ready Event Out

pub fn winmoneo(&self) -> WINMONEO_R[src]

Bit 5 - Window Monitor Event Out

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Debug Run

impl R<u8, MUXPOS_A>[src]

pub fn variant(&self) -> MUXPOS_A[src]

Get enumerated values variant

pub fn is_ain0(&self) -> bool[src]

Checks if the value of the field is AIN0

pub fn is_ain1(&self) -> bool[src]

Checks if the value of the field is AIN1

pub fn is_ain2(&self) -> bool[src]

Checks if the value of the field is AIN2

pub fn is_ain3(&self) -> bool[src]

Checks if the value of the field is AIN3

pub fn is_ain4(&self) -> bool[src]

Checks if the value of the field is AIN4

pub fn is_ain5(&self) -> bool[src]

Checks if the value of the field is AIN5

pub fn is_ain6(&self) -> bool[src]

Checks if the value of the field is AIN6

pub fn is_ain7(&self) -> bool[src]

Checks if the value of the field is AIN7

pub fn is_ain8(&self) -> bool[src]

Checks if the value of the field is AIN8

pub fn is_ain9(&self) -> bool[src]

Checks if the value of the field is AIN9

pub fn is_ain10(&self) -> bool[src]

Checks if the value of the field is AIN10

pub fn is_ain11(&self) -> bool[src]

Checks if the value of the field is AIN11

pub fn is_ain12(&self) -> bool[src]

Checks if the value of the field is AIN12

pub fn is_ain13(&self) -> bool[src]

Checks if the value of the field is AIN13

pub fn is_ain14(&self) -> bool[src]

Checks if the value of the field is AIN14

pub fn is_ain15(&self) -> bool[src]

Checks if the value of the field is AIN15

pub fn is_ain16(&self) -> bool[src]

Checks if the value of the field is AIN16

pub fn is_ain17(&self) -> bool[src]

Checks if the value of the field is AIN17

pub fn is_ain18(&self) -> bool[src]

Checks if the value of the field is AIN18

pub fn is_ain19(&self) -> bool[src]

Checks if the value of the field is AIN19

pub fn is_ain20(&self) -> bool[src]

Checks if the value of the field is AIN20

pub fn is_ain21(&self) -> bool[src]

Checks if the value of the field is AIN21

pub fn is_ain22(&self) -> bool[src]

Checks if the value of the field is AIN22

pub fn is_ain23(&self) -> bool[src]

Checks if the value of the field is AIN23

pub fn is_scaledcorevcc(&self) -> bool[src]

Checks if the value of the field is SCALEDCOREVCC

pub fn is_scaledvbat(&self) -> bool[src]

Checks if the value of the field is SCALEDVBAT

pub fn is_scalediovcc(&self) -> bool[src]

Checks if the value of the field is SCALEDIOVCC

pub fn is_bandgap(&self) -> bool[src]

Checks if the value of the field is BANDGAP

pub fn is_ptat(&self) -> bool[src]

Checks if the value of the field is PTAT

pub fn is_ctat(&self) -> bool[src]

Checks if the value of the field is CTAT

pub fn is_dac(&self) -> bool[src]

Checks if the value of the field is DAC

pub fn is_ptc(&self) -> bool[src]

Checks if the value of the field is PTC

impl R<u8, MUXNEG_A>[src]

pub fn variant(&self) -> Variant<u8, MUXNEG_A>[src]

Get enumerated values variant

pub fn is_ain0(&self) -> bool[src]

Checks if the value of the field is AIN0

pub fn is_ain1(&self) -> bool[src]

Checks if the value of the field is AIN1

pub fn is_ain2(&self) -> bool[src]

Checks if the value of the field is AIN2

pub fn is_ain3(&self) -> bool[src]

Checks if the value of the field is AIN3

pub fn is_ain4(&self) -> bool[src]

Checks if the value of the field is AIN4

pub fn is_ain5(&self) -> bool[src]

Checks if the value of the field is AIN5

pub fn is_ain6(&self) -> bool[src]

Checks if the value of the field is AIN6

pub fn is_ain7(&self) -> bool[src]

Checks if the value of the field is AIN7

pub fn is_gnd(&self) -> bool[src]

Checks if the value of the field is GND

impl R<u16, Reg<u16, _INPUTCTRL>>[src]

pub fn muxpos(&self) -> MUXPOS_R[src]

Bits 0:4 - Positive Mux Input Selection

pub fn diffmode(&self) -> DIFFMODE_R[src]

Bit 7 - Differential Mode

pub fn muxneg(&self) -> MUXNEG_R[src]

Bits 8:12 - Negative Mux Input Selection

pub fn dseqstop(&self) -> DSEQSTOP_R[src]

Bit 15 - Stop DMA Sequencing

impl R<u8, RESSEL_A>[src]

pub fn variant(&self) -> RESSEL_A[src]

Get enumerated values variant

pub fn is_12bit(&self) -> bool[src]

Checks if the value of the field is _12BIT

pub fn is_16bit(&self) -> bool[src]

Checks if the value of the field is _16BIT

pub fn is_10bit(&self) -> bool[src]

Checks if the value of the field is _10BIT

pub fn is_8bit(&self) -> bool[src]

Checks if the value of the field is _8BIT

impl R<u8, WINMODE_A>[src]

pub fn variant(&self) -> Variant<u8, WINMODE_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_mode1(&self) -> bool[src]

Checks if the value of the field is MODE1

pub fn is_mode2(&self) -> bool[src]

Checks if the value of the field is MODE2

pub fn is_mode3(&self) -> bool[src]

Checks if the value of the field is MODE3

pub fn is_mode4(&self) -> bool[src]

Checks if the value of the field is MODE4

impl R<u16, Reg<u16, _CTRLB>>[src]

pub fn leftadj(&self) -> LEFTADJ_R[src]

Bit 0 - Left-Adjusted Result

pub fn freerun(&self) -> FREERUN_R[src]

Bit 1 - Free Running Mode

pub fn corren(&self) -> CORREN_R[src]

Bit 2 - Digital Correction Logic Enable

pub fn ressel(&self) -> RESSEL_R[src]

Bits 3:4 - Conversion Result Resolution

pub fn winmode(&self) -> WINMODE_R[src]

Bits 8:10 - Window Monitor Mode

pub fn winss(&self) -> WINSS_R[src]

Bit 11 - Window Single Sample

impl R<u8, REFSEL_A>[src]

pub fn variant(&self) -> Variant<u8, REFSEL_A>[src]

Get enumerated values variant

pub fn is_intref(&self) -> bool[src]

Checks if the value of the field is INTREF

pub fn is_intvcc0(&self) -> bool[src]

Checks if the value of the field is INTVCC0

pub fn is_intvcc1(&self) -> bool[src]

Checks if the value of the field is INTVCC1

pub fn is_arefa(&self) -> bool[src]

Checks if the value of the field is AREFA

pub fn is_arefb(&self) -> bool[src]

Checks if the value of the field is AREFB

pub fn is_arefc(&self) -> bool[src]

Checks if the value of the field is AREFC

impl R<u8, Reg<u8, _REFCTRL>>[src]

pub fn refsel(&self) -> REFSEL_R[src]

Bits 0:3 - Reference Selection

pub fn refcomp(&self) -> REFCOMP_R[src]

Bit 7 - Reference Buffer Offset Compensation Enable

impl R<u8, SAMPLENUM_A>[src]

pub fn variant(&self) -> Variant<u8, SAMPLENUM_A>[src]

Get enumerated values variant

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

pub fn is_2(&self) -> bool[src]

Checks if the value of the field is _2

pub fn is_4(&self) -> bool[src]

Checks if the value of the field is _4

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<u8, Reg<u8, _AVGCTRL>>[src]

pub fn samplenum(&self) -> SAMPLENUM_R[src]

Bits 0:3 - Number of Samples to be Collected

pub fn adjres(&self) -> ADJRES_R[src]

Bits 4:6 - Adjusting Result / Division Coefficient

impl R<u8, Reg<u8, _SAMPCTRL>>[src]

pub fn samplen(&self) -> SAMPLEN_R[src]

Bits 0:5 - Sampling Time Length

pub fn offcomp(&self) -> OFFCOMP_R[src]

Bit 7 - Comparator Offset Compensation Enable

impl R<u16, Reg<u16, _WINLT>>[src]

pub fn winlt(&self) -> WINLT_R[src]

Bits 0:15 - Window Lower Threshold

impl R<u16, Reg<u16, _WINUT>>[src]

pub fn winut(&self) -> WINUT_R[src]

Bits 0:15 - Window Upper Threshold

impl R<u16, Reg<u16, _GAINCORR>>[src]

pub fn gaincorr(&self) -> GAINCORR_R[src]

Bits 0:11 - Gain Correction Value

impl R<u16, Reg<u16, _OFFSETCORR>>[src]

pub fn offsetcorr(&self) -> OFFSETCORR_R[src]

Bits 0:11 - Offset Correction Value

impl R<u8, Reg<u8, _SWTRIG>>[src]

pub fn flush(&self) -> FLUSH_R[src]

Bit 0 - ADC Conversion Flush

pub fn start(&self) -> START_R[src]

Bit 1 - Start ADC Conversion

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn resrdy(&self) -> RESRDY_R[src]

Bit 0 - Result Ready Interrupt Disable

pub fn overrun(&self) -> OVERRUN_R[src]

Bit 1 - Overrun Interrupt Disable

pub fn winmon(&self) -> WINMON_R[src]

Bit 2 - Window Monitor Interrupt Disable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn resrdy(&self) -> RESRDY_R[src]

Bit 0 - Result Ready Interrupt Enable

pub fn overrun(&self) -> OVERRUN_R[src]

Bit 1 - Overrun Interrupt Enable

pub fn winmon(&self) -> WINMON_R[src]

Bit 2 - Window Monitor Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn resrdy(&self) -> RESRDY_R[src]

Bit 0 - Result Ready Interrupt Flag

pub fn overrun(&self) -> OVERRUN_R[src]

Bit 1 - Overrun Interrupt Flag

pub fn winmon(&self) -> WINMON_R[src]

Bit 2 - Window Monitor Interrupt Flag

impl R<u8, Reg<u8, _STATUS>>[src]

pub fn adcbusy(&self) -> ADCBUSY_R[src]

Bit 0 - ADC Busy Status

pub fn wcc(&self) -> WCC_R[src]

Bits 2:7 - Window Comparator Counter

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - SWRST Synchronization Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - ENABLE Synchronization Busy

pub fn inputctrl(&self) -> INPUTCTRL_R[src]

Bit 2 - Input Control Synchronization Busy

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 3 - Control B Synchronization Busy

pub fn refctrl(&self) -> REFCTRL_R[src]

Bit 4 - Reference Control Synchronization Busy

pub fn avgctrl(&self) -> AVGCTRL_R[src]

Bit 5 - Average Control Synchronization Busy

pub fn sampctrl(&self) -> SAMPCTRL_R[src]

Bit 6 - Sampling Time Control Synchronization Busy

pub fn winlt(&self) -> WINLT_R[src]

Bit 7 - Window Monitor Lower Threshold Synchronization Busy

pub fn winut(&self) -> WINUT_R[src]

Bit 8 - Window Monitor Upper Threshold Synchronization Busy

pub fn gaincorr(&self) -> GAINCORR_R[src]

Bit 9 - Gain Correction Synchronization Busy

pub fn offsetcorr(&self) -> OFFSETCORR_R[src]

Bit 10 - Offset Correction Synchronization Busy

pub fn swtrig(&self) -> SWTRIG_R[src]

Bit 11 - Software Trigger Synchronization Busy

impl R<u32, Reg<u32, _DSEQCTRL>>[src]

pub fn inputctrl(&self) -> INPUTCTRL_R[src]

Bit 0 - Input Control

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 1 - Control B

pub fn refctrl(&self) -> REFCTRL_R[src]

Bit 2 - Reference Control

pub fn avgctrl(&self) -> AVGCTRL_R[src]

Bit 3 - Average Control

pub fn sampctrl(&self) -> SAMPCTRL_R[src]

Bit 4 - Sampling Time Control

pub fn winlt(&self) -> WINLT_R[src]

Bit 5 - Window Monitor Lower Threshold

pub fn winut(&self) -> WINUT_R[src]

Bit 6 - Window Monitor Upper Threshold

pub fn gaincorr(&self) -> GAINCORR_R[src]

Bit 7 - Gain Correction

pub fn offsetcorr(&self) -> OFFSETCORR_R[src]

Bit 8 - Offset Correction

pub fn autostart(&self) -> AUTOSTART_R[src]

Bit 31 - ADC Auto-Start Conversion

impl R<u32, Reg<u32, _DSEQSTAT>>[src]

pub fn inputctrl(&self) -> INPUTCTRL_R[src]

Bit 0 - Input Control

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 1 - Control B

pub fn refctrl(&self) -> REFCTRL_R[src]

Bit 2 - Reference Control

pub fn avgctrl(&self) -> AVGCTRL_R[src]

Bit 3 - Average Control

pub fn sampctrl(&self) -> SAMPCTRL_R[src]

Bit 4 - Sampling Time Control

pub fn winlt(&self) -> WINLT_R[src]

Bit 5 - Window Monitor Lower Threshold

pub fn winut(&self) -> WINUT_R[src]

Bit 6 - Window Monitor Upper Threshold

pub fn gaincorr(&self) -> GAINCORR_R[src]

Bit 7 - Gain Correction

pub fn offsetcorr(&self) -> OFFSETCORR_R[src]

Bit 8 - Offset Correction

pub fn busy(&self) -> BUSY_R[src]

Bit 31 - DMA Sequencing Busy

impl R<u16, Reg<u16, _RESULT>>[src]

pub fn result(&self) -> RESULT_R[src]

Bits 0:15 - Result Conversion Value

impl R<u16, Reg<u16, _RESS>>[src]

pub fn ress(&self) -> RESS_R[src]

Bits 0:15 - Last ADC conversion result

impl R<u16, Reg<u16, _CALIB>>[src]

pub fn biascomp(&self) -> BIASCOMP_R[src]

Bits 0:2 - Bias Comparator Scaling

pub fn biasr2r(&self) -> BIASR2R_R[src]

Bits 4:6 - Bias R2R Ampli scaling

pub fn biasrefbuf(&self) -> BIASREFBUF_R[src]

Bits 8:10 - Bias Reference Buffer Scaling

impl R<u8, AESMODE_A>[src]

pub fn variant(&self) -> Variant<u8, AESMODE_A>[src]

Get enumerated values variant

pub fn is_ecb(&self) -> bool[src]

Checks if the value of the field is ECB

pub fn is_cbc(&self) -> bool[src]

Checks if the value of the field is CBC

pub fn is_ofb(&self) -> bool[src]

Checks if the value of the field is OFB

pub fn is_cfb(&self) -> bool[src]

Checks if the value of the field is CFB

pub fn is_counter(&self) -> bool[src]

Checks if the value of the field is COUNTER

pub fn is_ccm(&self) -> bool[src]

Checks if the value of the field is CCM

pub fn is_gcm(&self) -> bool[src]

Checks if the value of the field is GCM

impl R<u8, CFBS_A>[src]

pub fn variant(&self) -> Variant<u8, CFBS_A>[src]

Get enumerated values variant

pub fn is_128bit(&self) -> bool[src]

Checks if the value of the field is _128BIT

pub fn is_64bit(&self) -> bool[src]

Checks if the value of the field is _64BIT

pub fn is_32bit(&self) -> bool[src]

Checks if the value of the field is _32BIT

pub fn is_16bit(&self) -> bool[src]

Checks if the value of the field is _16BIT

pub fn is_8bit(&self) -> bool[src]

Checks if the value of the field is _8BIT

impl R<u8, KEYSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, KEYSIZE_A>[src]

Get enumerated values variant

pub fn is_128bit(&self) -> bool[src]

Checks if the value of the field is _128BIT

pub fn is_192bit(&self) -> bool[src]

Checks if the value of the field is _192BIT

pub fn is_256bit(&self) -> bool[src]

Checks if the value of the field is _256BIT

impl R<bool, CIPHER_A>[src]

pub fn variant(&self) -> CIPHER_A[src]

Get enumerated values variant

pub fn is_dec(&self) -> bool[src]

Checks if the value of the field is DEC

pub fn is_enc(&self) -> bool[src]

Checks if the value of the field is ENC

impl R<bool, STARTMODE_A>[src]

pub fn variant(&self) -> STARTMODE_A[src]

Get enumerated values variant

pub fn is_manual(&self) -> bool[src]

Checks if the value of the field is MANUAL

pub fn is_auto(&self) -> bool[src]

Checks if the value of the field is AUTO

impl R<bool, LOD_A>[src]

pub fn variant(&self) -> LOD_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_last(&self) -> bool[src]

Checks if the value of the field is LAST

impl R<bool, KEYGEN_A>[src]

pub fn variant(&self) -> KEYGEN_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_last(&self) -> bool[src]

Checks if the value of the field is LAST

impl R<bool, XORKEY_A>[src]

pub fn variant(&self) -> XORKEY_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn aesmode(&self) -> AESMODE_R[src]

Bits 2:4 - AES Modes of operation

pub fn cfbs(&self) -> CFBS_R[src]

Bits 5:7 - Cipher Feedback Block Size

pub fn keysize(&self) -> KEYSIZE_R[src]

Bits 8:9 - Encryption Key Size

pub fn cipher(&self) -> CIPHER_R[src]

Bit 10 - Cipher Mode

pub fn startmode(&self) -> STARTMODE_R[src]

Bit 11 - Start Mode Select

pub fn lod(&self) -> LOD_R[src]

Bit 12 - Last Output Data Mode

pub fn keygen(&self) -> KEYGEN_R[src]

Bit 13 - Last Key Generation

pub fn xorkey(&self) -> XORKEY_R[src]

Bit 14 - XOR Key Operation

pub fn ctype(&self) -> CTYPE_R[src]

Bits 16:19 - Counter Measure Type

impl R<u8, Reg<u8, _CTRLB>>[src]

pub fn start(&self) -> START_R[src]

Bit 0 - Start Encryption/Decryption

pub fn newmsg(&self) -> NEWMSG_R[src]

Bit 1 - New message

pub fn eom(&self) -> EOM_R[src]

Bit 2 - End of message

pub fn gfmul(&self) -> GFMUL_R[src]

Bit 3 - GF Multiplication

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn enccmp(&self) -> ENCCMP_R[src]

Bit 0 - Encryption Complete Interrupt Enable

pub fn gfmcmp(&self) -> GFMCMP_R[src]

Bit 1 - GF Multiplication Complete Interrupt Enable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn enccmp(&self) -> ENCCMP_R[src]

Bit 0 - Encryption Complete Interrupt Enable

pub fn gfmcmp(&self) -> GFMCMP_R[src]

Bit 1 - GF Multiplication Complete Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn enccmp(&self) -> ENCCMP_R[src]

Bit 0 - Encryption Complete

pub fn gfmcmp(&self) -> GFMCMP_R[src]

Bit 1 - GF Multiplication Complete

impl R<u8, Reg<u8, _DATABUFPTR>>[src]

pub fn indataptr(&self) -> INDATAPTR_R[src]

Bits 0:1 - Input Data Pointer

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Debug Run

impl R<u32, Reg<u32, _CREL>>[src]

pub fn substep(&self) -> SUBSTEP_R[src]

Bits 20:23 - Sub-step of Core Release

pub fn step(&self) -> STEP_R[src]

Bits 24:27 - Step of Core Release

pub fn rel(&self) -> REL_R[src]

Bits 28:31 - Core Release

impl R<u32, Reg<u32, _ENDN>>[src]

pub fn etv(&self) -> ETV_R[src]

Bits 0:31 - Endianness Test Value

impl R<u8, QOS_A>[src]

pub fn variant(&self) -> QOS_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_medium(&self) -> bool[src]

Checks if the value of the field is MEDIUM

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<u32, Reg<u32, _MRCFG>>[src]

pub fn qos(&self) -> QOS_R[src]

Bits 0:1 - Quality of Service

impl R<u32, Reg<u32, _DBTP>>[src]

pub fn dsjw(&self) -> DSJW_R[src]

Bits 0:3 - Data (Re)Synchronization Jump Width

pub fn dtseg2(&self) -> DTSEG2_R[src]

Bits 4:7 - Data time segment after sample point

pub fn dtseg1(&self) -> DTSEG1_R[src]

Bits 8:12 - Data time segment before sample point

pub fn dbrp(&self) -> DBRP_R[src]

Bits 16:20 - Data Baud Rate Prescaler

pub fn tdc(&self) -> TDC_R[src]

Bit 23 - Tranceiver Delay Compensation

impl R<u8, TX_A>[src]

pub fn variant(&self) -> TX_A[src]

Get enumerated values variant

pub fn is_core(&self) -> bool[src]

Checks if the value of the field is CORE

pub fn is_sample(&self) -> bool[src]

Checks if the value of the field is SAMPLE

pub fn is_dominant(&self) -> bool[src]

Checks if the value of the field is DOMINANT

pub fn is_recessive(&self) -> bool[src]

Checks if the value of the field is RECESSIVE

impl R<u32, Reg<u32, _TEST>>[src]

pub fn lbck(&self) -> LBCK_R[src]

Bit 4 - Loop Back Mode

pub fn tx(&self) -> TX_R[src]

Bits 5:6 - Control of Transmit Pin

pub fn rx(&self) -> RX_R[src]

Bit 7 - Receive Pin

impl R<u32, Reg<u32, _RWD>>[src]

pub fn wdc(&self) -> WDC_R[src]

Bits 0:7 - Watchdog Configuration

pub fn wdv(&self) -> WDV_R[src]

Bits 8:15 - Watchdog Value

impl R<u32, Reg<u32, _CCCR>>[src]

pub fn init(&self) -> INIT_R[src]

Bit 0 - Initialization

pub fn cce(&self) -> CCE_R[src]

Bit 1 - Configuration Change Enable

pub fn asm(&self) -> ASM_R[src]

Bit 2 - ASM Restricted Operation Mode

pub fn csa(&self) -> CSA_R[src]

Bit 3 - Clock Stop Acknowledge

pub fn csr(&self) -> CSR_R[src]

Bit 4 - Clock Stop Request

pub fn mon(&self) -> MON_R[src]

Bit 5 - Bus Monitoring Mode

pub fn dar(&self) -> DAR_R[src]

Bit 6 - Disable Automatic Retransmission

pub fn test(&self) -> TEST_R[src]

Bit 7 - Test Mode Enable

pub fn fdoe(&self) -> FDOE_R[src]

Bit 8 - FD Operation Enable

pub fn brse(&self) -> BRSE_R[src]

Bit 9 - Bit Rate Switch Enable

pub fn pxhd(&self) -> PXHD_R[src]

Bit 12 - Protocol Exception Handling Disable

pub fn efbi(&self) -> EFBI_R[src]

Bit 13 - Edge Filtering during Bus Integration

pub fn txp(&self) -> TXP_R[src]

Bit 14 - Transmit Pause

impl R<u32, Reg<u32, _NBTP>>[src]

pub fn ntseg2(&self) -> NTSEG2_R[src]

Bits 0:6 - Nominal Time segment after sample point

pub fn ntseg1(&self) -> NTSEG1_R[src]

Bits 8:15 - Nominal Time segment before sample point

pub fn nbrp(&self) -> NBRP_R[src]

Bits 16:24 - Nominal Baud Rate Prescaler

pub fn nsjw(&self) -> NSJW_R[src]

Bits 25:31 - Nominal (Re)Synchronization Jump Width

impl R<u8, TSS_A>[src]

pub fn variant(&self) -> Variant<u8, TSS_A>[src]

Get enumerated values variant

pub fn is_zero(&self) -> bool[src]

Checks if the value of the field is ZERO

pub fn is_inc(&self) -> bool[src]

Checks if the value of the field is INC

impl R<u32, Reg<u32, _TSCC>>[src]

pub fn tss(&self) -> TSS_R[src]

Bits 0:1 - Timestamp Select

pub fn tcp(&self) -> TCP_R[src]

Bits 16:19 - Timestamp Counter Prescaler

impl R<u32, Reg<u32, _TSCV>>[src]

pub fn tsc(&self) -> TSC_R[src]

Bits 0:15 - Timestamp Counter

impl R<u8, TOS_A>[src]

pub fn variant(&self) -> TOS_A[src]

Get enumerated values variant

pub fn is_cont(&self) -> bool[src]

Checks if the value of the field is CONT

pub fn is_txef(&self) -> bool[src]

Checks if the value of the field is TXEF

pub fn is_rxf0(&self) -> bool[src]

Checks if the value of the field is RXF0

pub fn is_rxf1(&self) -> bool[src]

Checks if the value of the field is RXF1

impl R<u32, Reg<u32, _TOCC>>[src]

pub fn etoc(&self) -> ETOC_R[src]

Bit 0 - Enable Timeout Counter

pub fn tos(&self) -> TOS_R[src]

Bits 1:2 - Timeout Select

pub fn top(&self) -> TOP_R[src]

Bits 16:31 - Timeout Period

impl R<u32, Reg<u32, _TOCV>>[src]

pub fn toc(&self) -> TOC_R[src]

Bits 0:15 - Timeout Counter

impl R<u32, Reg<u32, _ECR>>[src]

pub fn tec(&self) -> TEC_R[src]

Bits 0:7 - Transmit Error Counter

pub fn rec(&self) -> REC_R[src]

Bits 8:14 - Receive Error Counter

pub fn rp(&self) -> RP_R[src]

Bit 15 - Receive Error Passive

pub fn cel(&self) -> CEL_R[src]

Bits 16:23 - CAN Error Logging

impl R<u8, LEC_A>[src]

pub fn variant(&self) -> LEC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_stuff(&self) -> bool[src]

Checks if the value of the field is STUFF

pub fn is_form(&self) -> bool[src]

Checks if the value of the field is FORM

pub fn is_ack(&self) -> bool[src]

Checks if the value of the field is ACK

pub fn is_bit1(&self) -> bool[src]

Checks if the value of the field is BIT1

pub fn is_bit0(&self) -> bool[src]

Checks if the value of the field is BIT0

pub fn is_crc(&self) -> bool[src]

Checks if the value of the field is CRC

pub fn is_nc(&self) -> bool[src]

Checks if the value of the field is NC

impl R<u8, ACT_A>[src]

pub fn variant(&self) -> ACT_A[src]

Get enumerated values variant

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

pub fn is_idle(&self) -> bool[src]

Checks if the value of the field is IDLE

pub fn is_rx(&self) -> bool[src]

Checks if the value of the field is RX

pub fn is_tx(&self) -> bool[src]

Checks if the value of the field is TX

impl R<u8, DLEC_A>[src]

pub fn variant(&self) -> DLEC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_stuff(&self) -> bool[src]

Checks if the value of the field is STUFF

pub fn is_form(&self) -> bool[src]

Checks if the value of the field is FORM

pub fn is_ack(&self) -> bool[src]

Checks if the value of the field is ACK

pub fn is_bit1(&self) -> bool[src]

Checks if the value of the field is BIT1

pub fn is_bit0(&self) -> bool[src]

Checks if the value of the field is BIT0

pub fn is_crc(&self) -> bool[src]

Checks if the value of the field is CRC

pub fn is_nc(&self) -> bool[src]

Checks if the value of the field is NC

impl R<u32, Reg<u32, _PSR>>[src]

pub fn lec(&self) -> LEC_R[src]

Bits 0:2 - Last Error Code

pub fn act(&self) -> ACT_R[src]

Bits 3:4 - Activity

pub fn ep(&self) -> EP_R[src]

Bit 5 - Error Passive

pub fn ew(&self) -> EW_R[src]

Bit 6 - Warning Status

pub fn bo(&self) -> BO_R[src]

Bit 7 - Bus_Off Status

pub fn dlec(&self) -> DLEC_R[src]

Bits 8:10 - Data Phase Last Error Code

pub fn resi(&self) -> RESI_R[src]

Bit 11 - ESI flag of last received CAN FD Message

pub fn rbrs(&self) -> RBRS_R[src]

Bit 12 - BRS flag of last received CAN FD Message

pub fn rfdf(&self) -> RFDF_R[src]

Bit 13 - Received a CAN FD Message

pub fn pxe(&self) -> PXE_R[src]

Bit 14 - Protocol Exception Event

pub fn tdcv(&self) -> TDCV_R[src]

Bits 16:22 - Transmitter Delay Compensation Value

impl R<u32, Reg<u32, _TDCR>>[src]

pub fn tdcf(&self) -> TDCF_R[src]

Bits 0:6 - Transmitter Delay Compensation Filter Length

pub fn tdco(&self) -> TDCO_R[src]

Bits 8:14 - Transmitter Delay Compensation Offset

impl R<u32, Reg<u32, _IR>>[src]

pub fn rf0n(&self) -> RF0N_R[src]

Bit 0 - Rx FIFO 0 New Message

pub fn rf0w(&self) -> RF0W_R[src]

Bit 1 - Rx FIFO 0 Watermark Reached

pub fn rf0f(&self) -> RF0F_R[src]

Bit 2 - Rx FIFO 0 Full

pub fn rf0l(&self) -> RF0L_R[src]

Bit 3 - Rx FIFO 0 Message Lost

pub fn rf1n(&self) -> RF1N_R[src]

Bit 4 - Rx FIFO 1 New Message

pub fn rf1w(&self) -> RF1W_R[src]

Bit 5 - Rx FIFO 1 Watermark Reached

pub fn rf1f(&self) -> RF1F_R[src]

Bit 6 - Rx FIFO 1 FIFO Full

pub fn rf1l(&self) -> RF1L_R[src]

Bit 7 - Rx FIFO 1 Message Lost

pub fn hpm(&self) -> HPM_R[src]

Bit 8 - High Priority Message

pub fn tc(&self) -> TC_R[src]

Bit 9 - Timestamp Completed

pub fn tcf(&self) -> TCF_R[src]

Bit 10 - Transmission Cancellation Finished

pub fn tfe(&self) -> TFE_R[src]

Bit 11 - Tx FIFO Empty

pub fn tefn(&self) -> TEFN_R[src]

Bit 12 - Tx Event FIFO New Entry

pub fn tefw(&self) -> TEFW_R[src]

Bit 13 - Tx Event FIFO Watermark Reached

pub fn teff(&self) -> TEFF_R[src]

Bit 14 - Tx Event FIFO Full

pub fn tefl(&self) -> TEFL_R[src]

Bit 15 - Tx Event FIFO Element Lost

pub fn tsw(&self) -> TSW_R[src]

Bit 16 - Timestamp Wraparound

pub fn mraf(&self) -> MRAF_R[src]

Bit 17 - Message RAM Access Failure

pub fn too(&self) -> TOO_R[src]

Bit 18 - Timeout Occurred

pub fn drx(&self) -> DRX_R[src]

Bit 19 - Message stored to Dedicated Rx Buffer

pub fn bec(&self) -> BEC_R[src]

Bit 20 - Bit Error Corrected

pub fn beu(&self) -> BEU_R[src]

Bit 21 - Bit Error Uncorrected

pub fn elo(&self) -> ELO_R[src]

Bit 22 - Error Logging Overflow

pub fn ep(&self) -> EP_R[src]

Bit 23 - Error Passive

pub fn ew(&self) -> EW_R[src]

Bit 24 - Warning Status

pub fn bo(&self) -> BO_R[src]

Bit 25 - Bus_Off Status

pub fn wdi(&self) -> WDI_R[src]

Bit 26 - Watchdog Interrupt

pub fn pea(&self) -> PEA_R[src]

Bit 27 - Protocol Error in Arbitration Phase

pub fn ped(&self) -> PED_R[src]

Bit 28 - Protocol Error in Data Phase

pub fn ara(&self) -> ARA_R[src]

Bit 29 - Access to Reserved Address

impl R<u32, Reg<u32, _IE>>[src]

pub fn rf0ne(&self) -> RF0NE_R[src]

Bit 0 - Rx FIFO 0 New Message Interrupt Enable

pub fn rf0we(&self) -> RF0WE_R[src]

Bit 1 - Rx FIFO 0 Watermark Reached Interrupt Enable

pub fn rf0fe(&self) -> RF0FE_R[src]

Bit 2 - Rx FIFO 0 Full Interrupt Enable

pub fn rf0le(&self) -> RF0LE_R[src]

Bit 3 - Rx FIFO 0 Message Lost Interrupt Enable

pub fn rf1ne(&self) -> RF1NE_R[src]

Bit 4 - Rx FIFO 1 New Message Interrupt Enable

pub fn rf1we(&self) -> RF1WE_R[src]

Bit 5 - Rx FIFO 1 Watermark Reached Interrupt Enable

pub fn rf1fe(&self) -> RF1FE_R[src]

Bit 6 - Rx FIFO 1 FIFO Full Interrupt Enable

pub fn rf1le(&self) -> RF1LE_R[src]

Bit 7 - Rx FIFO 1 Message Lost Interrupt Enable

pub fn hpme(&self) -> HPME_R[src]

Bit 8 - High Priority Message Interrupt Enable

pub fn tce(&self) -> TCE_R[src]

Bit 9 - Timestamp Completed Interrupt Enable

pub fn tcfe(&self) -> TCFE_R[src]

Bit 10 - Transmission Cancellation Finished Interrupt Enable

pub fn tfee(&self) -> TFEE_R[src]

Bit 11 - Tx FIFO Empty Interrupt Enable

pub fn tefne(&self) -> TEFNE_R[src]

Bit 12 - Tx Event FIFO New Entry Interrupt Enable

pub fn tefwe(&self) -> TEFWE_R[src]

Bit 13 - Tx Event FIFO Watermark Reached Interrupt Enable

pub fn teffe(&self) -> TEFFE_R[src]

Bit 14 - Tx Event FIFO Full Interrupt Enable

pub fn tefle(&self) -> TEFLE_R[src]

Bit 15 - Tx Event FIFO Element Lost Interrupt Enable

pub fn tswe(&self) -> TSWE_R[src]

Bit 16 - Timestamp Wraparound Interrupt Enable

pub fn mrafe(&self) -> MRAFE_R[src]

Bit 17 - Message RAM Access Failure Interrupt Enable

pub fn tooe(&self) -> TOOE_R[src]

Bit 18 - Timeout Occurred Interrupt Enable

pub fn drxe(&self) -> DRXE_R[src]

Bit 19 - Message stored to Dedicated Rx Buffer Interrupt Enable

pub fn bece(&self) -> BECE_R[src]

Bit 20 - Bit Error Corrected Interrupt Enable

pub fn beue(&self) -> BEUE_R[src]

Bit 21 - Bit Error Uncorrected Interrupt Enable

pub fn eloe(&self) -> ELOE_R[src]

Bit 22 - Error Logging Overflow Interrupt Enable

pub fn epe(&self) -> EPE_R[src]

Bit 23 - Error Passive Interrupt Enable

pub fn ewe(&self) -> EWE_R[src]

Bit 24 - Warning Status Interrupt Enable

pub fn boe(&self) -> BOE_R[src]

Bit 25 - Bus_Off Status Interrupt Enable

pub fn wdie(&self) -> WDIE_R[src]

Bit 26 - Watchdog Interrupt Interrupt Enable

pub fn peae(&self) -> PEAE_R[src]

Bit 27 - Protocol Error in Arbitration Phase Enable

pub fn pede(&self) -> PEDE_R[src]

Bit 28 - Protocol Error in Data Phase Enable

pub fn arae(&self) -> ARAE_R[src]

Bit 29 - Access to Reserved Address Enable

impl R<u32, Reg<u32, _ILS>>[src]

pub fn rf0nl(&self) -> RF0NL_R[src]

Bit 0 - Rx FIFO 0 New Message Interrupt Line

pub fn rf0wl(&self) -> RF0WL_R[src]

Bit 1 - Rx FIFO 0 Watermark Reached Interrupt Line

pub fn rf0fl(&self) -> RF0FL_R[src]

Bit 2 - Rx FIFO 0 Full Interrupt Line

pub fn rf0ll(&self) -> RF0LL_R[src]

Bit 3 - Rx FIFO 0 Message Lost Interrupt Line

pub fn rf1nl(&self) -> RF1NL_R[src]

Bit 4 - Rx FIFO 1 New Message Interrupt Line

pub fn rf1wl(&self) -> RF1WL_R[src]

Bit 5 - Rx FIFO 1 Watermark Reached Interrupt Line

pub fn rf1fl(&self) -> RF1FL_R[src]

Bit 6 - Rx FIFO 1 FIFO Full Interrupt Line

pub fn rf1ll(&self) -> RF1LL_R[src]

Bit 7 - Rx FIFO 1 Message Lost Interrupt Line

pub fn hpml(&self) -> HPML_R[src]

Bit 8 - High Priority Message Interrupt Line

pub fn tcl(&self) -> TCL_R[src]

Bit 9 - Timestamp Completed Interrupt Line

pub fn tcfl(&self) -> TCFL_R[src]

Bit 10 - Transmission Cancellation Finished Interrupt Line

pub fn tfel(&self) -> TFEL_R[src]

Bit 11 - Tx FIFO Empty Interrupt Line

pub fn tefnl(&self) -> TEFNL_R[src]

Bit 12 - Tx Event FIFO New Entry Interrupt Line

pub fn tefwl(&self) -> TEFWL_R[src]

Bit 13 - Tx Event FIFO Watermark Reached Interrupt Line

pub fn teffl(&self) -> TEFFL_R[src]

Bit 14 - Tx Event FIFO Full Interrupt Line

pub fn tefll(&self) -> TEFLL_R[src]

Bit 15 - Tx Event FIFO Element Lost Interrupt Line

pub fn tswl(&self) -> TSWL_R[src]

Bit 16 - Timestamp Wraparound Interrupt Line

pub fn mrafl(&self) -> MRAFL_R[src]

Bit 17 - Message RAM Access Failure Interrupt Line

pub fn tool(&self) -> TOOL_R[src]

Bit 18 - Timeout Occurred Interrupt Line

pub fn drxl(&self) -> DRXL_R[src]

Bit 19 - Message stored to Dedicated Rx Buffer Interrupt Line

pub fn becl(&self) -> BECL_R[src]

Bit 20 - Bit Error Corrected Interrupt Line

pub fn beul(&self) -> BEUL_R[src]

Bit 21 - Bit Error Uncorrected Interrupt Line

pub fn elol(&self) -> ELOL_R[src]

Bit 22 - Error Logging Overflow Interrupt Line

pub fn epl(&self) -> EPL_R[src]

Bit 23 - Error Passive Interrupt Line

pub fn ewl(&self) -> EWL_R[src]

Bit 24 - Warning Status Interrupt Line

pub fn bol(&self) -> BOL_R[src]

Bit 25 - Bus_Off Status Interrupt Line

pub fn wdil(&self) -> WDIL_R[src]

Bit 26 - Watchdog Interrupt Interrupt Line

pub fn peal(&self) -> PEAL_R[src]

Bit 27 - Protocol Error in Arbitration Phase Line

pub fn pedl(&self) -> PEDL_R[src]

Bit 28 - Protocol Error in Data Phase Line

pub fn aral(&self) -> ARAL_R[src]

Bit 29 - Access to Reserved Address Line

impl R<u32, Reg<u32, _ILE>>[src]

pub fn eint0(&self) -> EINT0_R[src]

Bit 0 - Enable Interrupt Line 0

pub fn eint1(&self) -> EINT1_R[src]

Bit 1 - Enable Interrupt Line 1

impl R<u8, ANFE_A>[src]

pub fn variant(&self) -> Variant<u8, ANFE_A>[src]

Get enumerated values variant

pub fn is_rxf0(&self) -> bool[src]

Checks if the value of the field is RXF0

pub fn is_rxf1(&self) -> bool[src]

Checks if the value of the field is RXF1

pub fn is_reject(&self) -> bool[src]

Checks if the value of the field is REJECT

impl R<u8, ANFS_A>[src]

pub fn variant(&self) -> Variant<u8, ANFS_A>[src]

Get enumerated values variant

pub fn is_rxf0(&self) -> bool[src]

Checks if the value of the field is RXF0

pub fn is_rxf1(&self) -> bool[src]

Checks if the value of the field is RXF1

pub fn is_reject(&self) -> bool[src]

Checks if the value of the field is REJECT

impl R<u32, Reg<u32, _GFC>>[src]

pub fn rrfe(&self) -> RRFE_R[src]

Bit 0 - Reject Remote Frames Extended

pub fn rrfs(&self) -> RRFS_R[src]

Bit 1 - Reject Remote Frames Standard

pub fn anfe(&self) -> ANFE_R[src]

Bits 2:3 - Accept Non-matching Frames Extended

pub fn anfs(&self) -> ANFS_R[src]

Bits 4:5 - Accept Non-matching Frames Standard

impl R<u32, Reg<u32, _SIDFC>>[src]

pub fn flssa(&self) -> FLSSA_R[src]

Bits 0:15 - Filter List Standard Start Address

pub fn lss(&self) -> LSS_R[src]

Bits 16:23 - List Size Standard

impl R<u32, Reg<u32, _XIDFC>>[src]

pub fn flesa(&self) -> FLESA_R[src]

Bits 0:15 - Filter List Extended Start Address

pub fn lse(&self) -> LSE_R[src]

Bits 16:22 - List Size Extended

impl R<u32, Reg<u32, _XIDAM>>[src]

pub fn eidm(&self) -> EIDM_R[src]

Bits 0:28 - Extended ID Mask

impl R<u8, MSI_A>[src]

pub fn variant(&self) -> MSI_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_lost(&self) -> bool[src]

Checks if the value of the field is LOST

pub fn is_fifo0(&self) -> bool[src]

Checks if the value of the field is FIFO0

pub fn is_fifo1(&self) -> bool[src]

Checks if the value of the field is FIFO1

impl R<u32, Reg<u32, _HPMS>>[src]

pub fn bidx(&self) -> BIDX_R[src]

Bits 0:5 - Buffer Index

pub fn msi(&self) -> MSI_R[src]

Bits 6:7 - Message Storage Indicator

pub fn fidx(&self) -> FIDX_R[src]

Bits 8:14 - Filter Index

pub fn flst(&self) -> FLST_R[src]

Bit 15 - Filter List

impl R<u32, Reg<u32, _NDAT1>>[src]

pub fn nd0(&self) -> ND0_R[src]

Bit 0 - New Data 0

pub fn nd1(&self) -> ND1_R[src]

Bit 1 - New Data 1

pub fn nd2(&self) -> ND2_R[src]

Bit 2 - New Data 2

pub fn nd3(&self) -> ND3_R[src]

Bit 3 - New Data 3

pub fn nd4(&self) -> ND4_R[src]

Bit 4 - New Data 4

pub fn nd5(&self) -> ND5_R[src]

Bit 5 - New Data 5

pub fn nd6(&self) -> ND6_R[src]

Bit 6 - New Data 6

pub fn nd7(&self) -> ND7_R[src]

Bit 7 - New Data 7

pub fn nd8(&self) -> ND8_R[src]

Bit 8 - New Data 8

pub fn nd9(&self) -> ND9_R[src]

Bit 9 - New Data 9

pub fn nd10(&self) -> ND10_R[src]

Bit 10 - New Data 10

pub fn nd11(&self) -> ND11_R[src]

Bit 11 - New Data 11

pub fn nd12(&self) -> ND12_R[src]

Bit 12 - New Data 12

pub fn nd13(&self) -> ND13_R[src]

Bit 13 - New Data 13

pub fn nd14(&self) -> ND14_R[src]

Bit 14 - New Data 14

pub fn nd15(&self) -> ND15_R[src]

Bit 15 - New Data 15

pub fn nd16(&self) -> ND16_R[src]

Bit 16 - New Data 16

pub fn nd17(&self) -> ND17_R[src]

Bit 17 - New Data 17

pub fn nd18(&self) -> ND18_R[src]

Bit 18 - New Data 18

pub fn nd19(&self) -> ND19_R[src]

Bit 19 - New Data 19

pub fn nd20(&self) -> ND20_R[src]

Bit 20 - New Data 20

pub fn nd21(&self) -> ND21_R[src]

Bit 21 - New Data 21

pub fn nd22(&self) -> ND22_R[src]

Bit 22 - New Data 22

pub fn nd23(&self) -> ND23_R[src]

Bit 23 - New Data 23

pub fn nd24(&self) -> ND24_R[src]

Bit 24 - New Data 24

pub fn nd25(&self) -> ND25_R[src]

Bit 25 - New Data 25

pub fn nd26(&self) -> ND26_R[src]

Bit 26 - New Data 26

pub fn nd27(&self) -> ND27_R[src]

Bit 27 - New Data 27

pub fn nd28(&self) -> ND28_R[src]

Bit 28 - New Data 28

pub fn nd29(&self) -> ND29_R[src]

Bit 29 - New Data 29

pub fn nd30(&self) -> ND30_R[src]

Bit 30 - New Data 30

pub fn nd31(&self) -> ND31_R[src]

Bit 31 - New Data 31

impl R<u32, Reg<u32, _NDAT2>>[src]

pub fn nd32(&self) -> ND32_R[src]

Bit 0 - New Data 32

pub fn nd33(&self) -> ND33_R[src]

Bit 1 - New Data 33

pub fn nd34(&self) -> ND34_R[src]

Bit 2 - New Data 34

pub fn nd35(&self) -> ND35_R[src]

Bit 3 - New Data 35

pub fn nd36(&self) -> ND36_R[src]

Bit 4 - New Data 36

pub fn nd37(&self) -> ND37_R[src]

Bit 5 - New Data 37

pub fn nd38(&self) -> ND38_R[src]

Bit 6 - New Data 38

pub fn nd39(&self) -> ND39_R[src]

Bit 7 - New Data 39

pub fn nd40(&self) -> ND40_R[src]

Bit 8 - New Data 40

pub fn nd41(&self) -> ND41_R[src]

Bit 9 - New Data 41

pub fn nd42(&self) -> ND42_R[src]

Bit 10 - New Data 42

pub fn nd43(&self) -> ND43_R[src]

Bit 11 - New Data 43

pub fn nd44(&self) -> ND44_R[src]

Bit 12 - New Data 44

pub fn nd45(&self) -> ND45_R[src]

Bit 13 - New Data 45

pub fn nd46(&self) -> ND46_R[src]

Bit 14 - New Data 46

pub fn nd47(&self) -> ND47_R[src]

Bit 15 - New Data 47

pub fn nd48(&self) -> ND48_R[src]

Bit 16 - New Data 48

pub fn nd49(&self) -> ND49_R[src]

Bit 17 - New Data 49

pub fn nd50(&self) -> ND50_R[src]

Bit 18 - New Data 50

pub fn nd51(&self) -> ND51_R[src]

Bit 19 - New Data 51

pub fn nd52(&self) -> ND52_R[src]

Bit 20 - New Data 52

pub fn nd53(&self) -> ND53_R[src]

Bit 21 - New Data 53

pub fn nd54(&self) -> ND54_R[src]

Bit 22 - New Data 54

pub fn nd55(&self) -> ND55_R[src]

Bit 23 - New Data 55

pub fn nd56(&self) -> ND56_R[src]

Bit 24 - New Data 56

pub fn nd57(&self) -> ND57_R[src]

Bit 25 - New Data 57

pub fn nd58(&self) -> ND58_R[src]

Bit 26 - New Data 58

pub fn nd59(&self) -> ND59_R[src]

Bit 27 - New Data 59

pub fn nd60(&self) -> ND60_R[src]

Bit 28 - New Data 60

pub fn nd61(&self) -> ND61_R[src]

Bit 29 - New Data 61

pub fn nd62(&self) -> ND62_R[src]

Bit 30 - New Data 62

pub fn nd63(&self) -> ND63_R[src]

Bit 31 - New Data 63

impl R<u32, Reg<u32, _RXF0C>>[src]

pub fn f0sa(&self) -> F0SA_R[src]

Bits 0:15 - Rx FIFO 0 Start Address

pub fn f0s(&self) -> F0S_R[src]

Bits 16:22 - Rx FIFO 0 Size

pub fn f0wm(&self) -> F0WM_R[src]

Bits 24:30 - Rx FIFO 0 Watermark

pub fn f0om(&self) -> F0OM_R[src]

Bit 31 - FIFO 0 Operation Mode

impl R<u32, Reg<u32, _RXF0S>>[src]

pub fn f0fl(&self) -> F0FL_R[src]

Bits 0:6 - Rx FIFO 0 Fill Level

pub fn f0gi(&self) -> F0GI_R[src]

Bits 8:13 - Rx FIFO 0 Get Index

pub fn f0pi(&self) -> F0PI_R[src]

Bits 16:21 - Rx FIFO 0 Put Index

pub fn f0f(&self) -> F0F_R[src]

Bit 24 - Rx FIFO 0 Full

pub fn rf0l(&self) -> RF0L_R[src]

Bit 25 - Rx FIFO 0 Message Lost

impl R<u32, Reg<u32, _RXF0A>>[src]

pub fn f0ai(&self) -> F0AI_R[src]

Bits 0:5 - Rx FIFO 0 Acknowledge Index

impl R<u32, Reg<u32, _RXBC>>[src]

pub fn rbsa(&self) -> RBSA_R[src]

Bits 0:15 - Rx Buffer Start Address

impl R<u32, Reg<u32, _RXF1C>>[src]

pub fn f1sa(&self) -> F1SA_R[src]

Bits 0:15 - Rx FIFO 1 Start Address

pub fn f1s(&self) -> F1S_R[src]

Bits 16:22 - Rx FIFO 1 Size

pub fn f1wm(&self) -> F1WM_R[src]

Bits 24:30 - Rx FIFO 1 Watermark

pub fn f1om(&self) -> F1OM_R[src]

Bit 31 - FIFO 1 Operation Mode

impl R<u8, DMS_A>[src]

pub fn variant(&self) -> DMS_A[src]

Get enumerated values variant

pub fn is_idle(&self) -> bool[src]

Checks if the value of the field is IDLE

pub fn is_dbga(&self) -> bool[src]

Checks if the value of the field is DBGA

pub fn is_dbgb(&self) -> bool[src]

Checks if the value of the field is DBGB

pub fn is_dbgc(&self) -> bool[src]

Checks if the value of the field is DBGC

impl R<u32, Reg<u32, _RXF1S>>[src]

pub fn f1fl(&self) -> F1FL_R[src]

Bits 0:6 - Rx FIFO 1 Fill Level

pub fn f1gi(&self) -> F1GI_R[src]

Bits 8:13 - Rx FIFO 1 Get Index

pub fn f1pi(&self) -> F1PI_R[src]

Bits 16:21 - Rx FIFO 1 Put Index

pub fn f1f(&self) -> F1F_R[src]

Bit 24 - Rx FIFO 1 Full

pub fn rf1l(&self) -> RF1L_R[src]

Bit 25 - Rx FIFO 1 Message Lost

pub fn dms(&self) -> DMS_R[src]

Bits 30:31 - Debug Message Status

impl R<u32, Reg<u32, _RXF1A>>[src]

pub fn f1ai(&self) -> F1AI_R[src]

Bits 0:5 - Rx FIFO 1 Acknowledge Index

impl R<u8, F0DS_A>[src]

pub fn variant(&self) -> F0DS_A[src]

Get enumerated values variant

pub fn is_data8(&self) -> bool[src]

Checks if the value of the field is DATA8

pub fn is_data12(&self) -> bool[src]

Checks if the value of the field is DATA12

pub fn is_data16(&self) -> bool[src]

Checks if the value of the field is DATA16

pub fn is_data20(&self) -> bool[src]

Checks if the value of the field is DATA20

pub fn is_data24(&self) -> bool[src]

Checks if the value of the field is DATA24

pub fn is_data32(&self) -> bool[src]

Checks if the value of the field is DATA32

pub fn is_data48(&self) -> bool[src]

Checks if the value of the field is DATA48

pub fn is_data64(&self) -> bool[src]

Checks if the value of the field is DATA64

impl R<u8, F1DS_A>[src]

pub fn variant(&self) -> F1DS_A[src]

Get enumerated values variant

pub fn is_data8(&self) -> bool[src]

Checks if the value of the field is DATA8

pub fn is_data12(&self) -> bool[src]

Checks if the value of the field is DATA12

pub fn is_data16(&self) -> bool[src]

Checks if the value of the field is DATA16

pub fn is_data20(&self) -> bool[src]

Checks if the value of the field is DATA20

pub fn is_data24(&self) -> bool[src]

Checks if the value of the field is DATA24

pub fn is_data32(&self) -> bool[src]

Checks if the value of the field is DATA32

pub fn is_data48(&self) -> bool[src]

Checks if the value of the field is DATA48

pub fn is_data64(&self) -> bool[src]

Checks if the value of the field is DATA64

impl R<u8, RBDS_A>[src]

pub fn variant(&self) -> RBDS_A[src]

Get enumerated values variant

pub fn is_data8(&self) -> bool[src]

Checks if the value of the field is DATA8

pub fn is_data12(&self) -> bool[src]

Checks if the value of the field is DATA12

pub fn is_data16(&self) -> bool[src]

Checks if the value of the field is DATA16

pub fn is_data20(&self) -> bool[src]

Checks if the value of the field is DATA20

pub fn is_data24(&self) -> bool[src]

Checks if the value of the field is DATA24

pub fn is_data32(&self) -> bool[src]

Checks if the value of the field is DATA32

pub fn is_data48(&self) -> bool[src]

Checks if the value of the field is DATA48

pub fn is_data64(&self) -> bool[src]

Checks if the value of the field is DATA64

impl R<u32, Reg<u32, _RXESC>>[src]

pub fn f0ds(&self) -> F0DS_R[src]

Bits 0:2 - Rx FIFO 0 Data Field Size

pub fn f1ds(&self) -> F1DS_R[src]

Bits 4:6 - Rx FIFO 1 Data Field Size

pub fn rbds(&self) -> RBDS_R[src]

Bits 8:10 - Rx Buffer Data Field Size

impl R<u32, Reg<u32, _TXBC>>[src]

pub fn tbsa(&self) -> TBSA_R[src]

Bits 0:15 - Tx Buffers Start Address

pub fn ndtb(&self) -> NDTB_R[src]

Bits 16:21 - Number of Dedicated Transmit Buffers

pub fn tfqs(&self) -> TFQS_R[src]

Bits 24:29 - Transmit FIFO/Queue Size

pub fn tfqm(&self) -> TFQM_R[src]

Bit 30 - Tx FIFO/Queue Mode

impl R<u32, Reg<u32, _TXFQS>>[src]

pub fn tffl(&self) -> TFFL_R[src]

Bits 0:5 - Tx FIFO Free Level

pub fn tfgi(&self) -> TFGI_R[src]

Bits 8:12 - Tx FIFO Get Index

pub fn tfqpi(&self) -> TFQPI_R[src]

Bits 16:20 - Tx FIFO/Queue Put Index

pub fn tfqf(&self) -> TFQF_R[src]

Bit 21 - Tx FIFO/Queue Full

impl R<u8, TBDS_A>[src]

pub fn variant(&self) -> TBDS_A[src]

Get enumerated values variant

pub fn is_data8(&self) -> bool[src]

Checks if the value of the field is DATA8

pub fn is_data12(&self) -> bool[src]

Checks if the value of the field is DATA12

pub fn is_data16(&self) -> bool[src]

Checks if the value of the field is DATA16

pub fn is_data20(&self) -> bool[src]

Checks if the value of the field is DATA20

pub fn is_data24(&self) -> bool[src]

Checks if the value of the field is DATA24

pub fn is_data32(&self) -> bool[src]

Checks if the value of the field is DATA32

pub fn is_data48(&self) -> bool[src]

Checks if the value of the field is DATA48

pub fn is_data64(&self) -> bool[src]

Checks if the value of the field is DATA64

impl R<u32, Reg<u32, _TXESC>>[src]

pub fn tbds(&self) -> TBDS_R[src]

Bits 0:2 - Tx Buffer Data Field Size

impl R<u32, Reg<u32, _TXBRP>>[src]

pub fn trp0(&self) -> TRP0_R[src]

Bit 0 - Transmission Request Pending 0

pub fn trp1(&self) -> TRP1_R[src]

Bit 1 - Transmission Request Pending 1

pub fn trp2(&self) -> TRP2_R[src]

Bit 2 - Transmission Request Pending 2

pub fn trp3(&self) -> TRP3_R[src]

Bit 3 - Transmission Request Pending 3

pub fn trp4(&self) -> TRP4_R[src]

Bit 4 - Transmission Request Pending 4

pub fn trp5(&self) -> TRP5_R[src]

Bit 5 - Transmission Request Pending 5

pub fn trp6(&self) -> TRP6_R[src]

Bit 6 - Transmission Request Pending 6

pub fn trp7(&self) -> TRP7_R[src]

Bit 7 - Transmission Request Pending 7

pub fn trp8(&self) -> TRP8_R[src]

Bit 8 - Transmission Request Pending 8

pub fn trp9(&self) -> TRP9_R[src]

Bit 9 - Transmission Request Pending 9

pub fn trp10(&self) -> TRP10_R[src]

Bit 10 - Transmission Request Pending 10

pub fn trp11(&self) -> TRP11_R[src]

Bit 11 - Transmission Request Pending 11

pub fn trp12(&self) -> TRP12_R[src]

Bit 12 - Transmission Request Pending 12

pub fn trp13(&self) -> TRP13_R[src]

Bit 13 - Transmission Request Pending 13

pub fn trp14(&self) -> TRP14_R[src]

Bit 14 - Transmission Request Pending 14

pub fn trp15(&self) -> TRP15_R[src]

Bit 15 - Transmission Request Pending 15

pub fn trp16(&self) -> TRP16_R[src]

Bit 16 - Transmission Request Pending 16

pub fn trp17(&self) -> TRP17_R[src]

Bit 17 - Transmission Request Pending 17

pub fn trp18(&self) -> TRP18_R[src]

Bit 18 - Transmission Request Pending 18

pub fn trp19(&self) -> TRP19_R[src]

Bit 19 - Transmission Request Pending 19

pub fn trp20(&self) -> TRP20_R[src]

Bit 20 - Transmission Request Pending 20

pub fn trp21(&self) -> TRP21_R[src]

Bit 21 - Transmission Request Pending 21

pub fn trp22(&self) -> TRP22_R[src]

Bit 22 - Transmission Request Pending 22

pub fn trp23(&self) -> TRP23_R[src]

Bit 23 - Transmission Request Pending 23

pub fn trp24(&self) -> TRP24_R[src]

Bit 24 - Transmission Request Pending 24

pub fn trp25(&self) -> TRP25_R[src]

Bit 25 - Transmission Request Pending 25

pub fn trp26(&self) -> TRP26_R[src]

Bit 26 - Transmission Request Pending 26

pub fn trp27(&self) -> TRP27_R[src]

Bit 27 - Transmission Request Pending 27

pub fn trp28(&self) -> TRP28_R[src]

Bit 28 - Transmission Request Pending 28

pub fn trp29(&self) -> TRP29_R[src]

Bit 29 - Transmission Request Pending 29

pub fn trp30(&self) -> TRP30_R[src]

Bit 30 - Transmission Request Pending 30

pub fn trp31(&self) -> TRP31_R[src]

Bit 31 - Transmission Request Pending 31

impl R<u32, Reg<u32, _TXBAR>>[src]

pub fn ar0(&self) -> AR0_R[src]

Bit 0 - Add Request 0

pub fn ar1(&self) -> AR1_R[src]

Bit 1 - Add Request 1

pub fn ar2(&self) -> AR2_R[src]

Bit 2 - Add Request 2

pub fn ar3(&self) -> AR3_R[src]

Bit 3 - Add Request 3

pub fn ar4(&self) -> AR4_R[src]

Bit 4 - Add Request 4

pub fn ar5(&self) -> AR5_R[src]

Bit 5 - Add Request 5

pub fn ar6(&self) -> AR6_R[src]

Bit 6 - Add Request 6

pub fn ar7(&self) -> AR7_R[src]

Bit 7 - Add Request 7

pub fn ar8(&self) -> AR8_R[src]

Bit 8 - Add Request 8

pub fn ar9(&self) -> AR9_R[src]

Bit 9 - Add Request 9

pub fn ar10(&self) -> AR10_R[src]

Bit 10 - Add Request 10

pub fn ar11(&self) -> AR11_R[src]

Bit 11 - Add Request 11

pub fn ar12(&self) -> AR12_R[src]

Bit 12 - Add Request 12

pub fn ar13(&self) -> AR13_R[src]

Bit 13 - Add Request 13

pub fn ar14(&self) -> AR14_R[src]

Bit 14 - Add Request 14

pub fn ar15(&self) -> AR15_R[src]

Bit 15 - Add Request 15

pub fn ar16(&self) -> AR16_R[src]

Bit 16 - Add Request 16

pub fn ar17(&self) -> AR17_R[src]

Bit 17 - Add Request 17

pub fn ar18(&self) -> AR18_R[src]

Bit 18 - Add Request 18

pub fn ar19(&self) -> AR19_R[src]

Bit 19 - Add Request 19

pub fn ar20(&self) -> AR20_R[src]

Bit 20 - Add Request 20

pub fn ar21(&self) -> AR21_R[src]

Bit 21 - Add Request 21

pub fn ar22(&self) -> AR22_R[src]

Bit 22 - Add Request 22

pub fn ar23(&self) -> AR23_R[src]

Bit 23 - Add Request 23

pub fn ar24(&self) -> AR24_R[src]

Bit 24 - Add Request 24

pub fn ar25(&self) -> AR25_R[src]

Bit 25 - Add Request 25

pub fn ar26(&self) -> AR26_R[src]

Bit 26 - Add Request 26

pub fn ar27(&self) -> AR27_R[src]

Bit 27 - Add Request 27

pub fn ar28(&self) -> AR28_R[src]

Bit 28 - Add Request 28

pub fn ar29(&self) -> AR29_R[src]

Bit 29 - Add Request 29

pub fn ar30(&self) -> AR30_R[src]

Bit 30 - Add Request 30

pub fn ar31(&self) -> AR31_R[src]

Bit 31 - Add Request 31

impl R<u32, Reg<u32, _TXBCR>>[src]

pub fn cr0(&self) -> CR0_R[src]

Bit 0 - Cancellation Request 0

pub fn cr1(&self) -> CR1_R[src]

Bit 1 - Cancellation Request 1

pub fn cr2(&self) -> CR2_R[src]

Bit 2 - Cancellation Request 2

pub fn cr3(&self) -> CR3_R[src]

Bit 3 - Cancellation Request 3

pub fn cr4(&self) -> CR4_R[src]

Bit 4 - Cancellation Request 4

pub fn cr5(&self) -> CR5_R[src]

Bit 5 - Cancellation Request 5

pub fn cr6(&self) -> CR6_R[src]

Bit 6 - Cancellation Request 6

pub fn cr7(&self) -> CR7_R[src]

Bit 7 - Cancellation Request 7

pub fn cr8(&self) -> CR8_R[src]

Bit 8 - Cancellation Request 8

pub fn cr9(&self) -> CR9_R[src]

Bit 9 - Cancellation Request 9

pub fn cr10(&self) -> CR10_R[src]

Bit 10 - Cancellation Request 10

pub fn cr11(&self) -> CR11_R[src]

Bit 11 - Cancellation Request 11

pub fn cr12(&self) -> CR12_R[src]

Bit 12 - Cancellation Request 12

pub fn cr13(&self) -> CR13_R[src]

Bit 13 - Cancellation Request 13

pub fn cr14(&self) -> CR14_R[src]

Bit 14 - Cancellation Request 14

pub fn cr15(&self) -> CR15_R[src]

Bit 15 - Cancellation Request 15

pub fn cr16(&self) -> CR16_R[src]

Bit 16 - Cancellation Request 16

pub fn cr17(&self) -> CR17_R[src]

Bit 17 - Cancellation Request 17

pub fn cr18(&self) -> CR18_R[src]

Bit 18 - Cancellation Request 18

pub fn cr19(&self) -> CR19_R[src]

Bit 19 - Cancellation Request 19

pub fn cr20(&self) -> CR20_R[src]

Bit 20 - Cancellation Request 20

pub fn cr21(&self) -> CR21_R[src]

Bit 21 - Cancellation Request 21

pub fn cr22(&self) -> CR22_R[src]

Bit 22 - Cancellation Request 22

pub fn cr23(&self) -> CR23_R[src]

Bit 23 - Cancellation Request 23

pub fn cr24(&self) -> CR24_R[src]

Bit 24 - Cancellation Request 24

pub fn cr25(&self) -> CR25_R[src]

Bit 25 - Cancellation Request 25

pub fn cr26(&self) -> CR26_R[src]

Bit 26 - Cancellation Request 26

pub fn cr27(&self) -> CR27_R[src]

Bit 27 - Cancellation Request 27

pub fn cr28(&self) -> CR28_R[src]

Bit 28 - Cancellation Request 28

pub fn cr29(&self) -> CR29_R[src]

Bit 29 - Cancellation Request 29

pub fn cr30(&self) -> CR30_R[src]

Bit 30 - Cancellation Request 30

pub fn cr31(&self) -> CR31_R[src]

Bit 31 - Cancellation Request 31

impl R<u32, Reg<u32, _TXBTO>>[src]

pub fn to0(&self) -> TO0_R[src]

Bit 0 - Transmission Occurred 0

pub fn to1(&self) -> TO1_R[src]

Bit 1 - Transmission Occurred 1

pub fn to2(&self) -> TO2_R[src]

Bit 2 - Transmission Occurred 2

pub fn to3(&self) -> TO3_R[src]

Bit 3 - Transmission Occurred 3

pub fn to4(&self) -> TO4_R[src]

Bit 4 - Transmission Occurred 4

pub fn to5(&self) -> TO5_R[src]

Bit 5 - Transmission Occurred 5

pub fn to6(&self) -> TO6_R[src]

Bit 6 - Transmission Occurred 6

pub fn to7(&self) -> TO7_R[src]

Bit 7 - Transmission Occurred 7

pub fn to8(&self) -> TO8_R[src]

Bit 8 - Transmission Occurred 8

pub fn to9(&self) -> TO9_R[src]

Bit 9 - Transmission Occurred 9

pub fn to10(&self) -> TO10_R[src]

Bit 10 - Transmission Occurred 10

pub fn to11(&self) -> TO11_R[src]

Bit 11 - Transmission Occurred 11

pub fn to12(&self) -> TO12_R[src]

Bit 12 - Transmission Occurred 12

pub fn to13(&self) -> TO13_R[src]

Bit 13 - Transmission Occurred 13

pub fn to14(&self) -> TO14_R[src]

Bit 14 - Transmission Occurred 14

pub fn to15(&self) -> TO15_R[src]

Bit 15 - Transmission Occurred 15

pub fn to16(&self) -> TO16_R[src]

Bit 16 - Transmission Occurred 16

pub fn to17(&self) -> TO17_R[src]

Bit 17 - Transmission Occurred 17

pub fn to18(&self) -> TO18_R[src]

Bit 18 - Transmission Occurred 18

pub fn to19(&self) -> TO19_R[src]

Bit 19 - Transmission Occurred 19

pub fn to20(&self) -> TO20_R[src]

Bit 20 - Transmission Occurred 20

pub fn to21(&self) -> TO21_R[src]

Bit 21 - Transmission Occurred 21

pub fn to22(&self) -> TO22_R[src]

Bit 22 - Transmission Occurred 22

pub fn to23(&self) -> TO23_R[src]

Bit 23 - Transmission Occurred 23

pub fn to24(&self) -> TO24_R[src]

Bit 24 - Transmission Occurred 24

pub fn to25(&self) -> TO25_R[src]

Bit 25 - Transmission Occurred 25

pub fn to26(&self) -> TO26_R[src]

Bit 26 - Transmission Occurred 26

pub fn to27(&self) -> TO27_R[src]

Bit 27 - Transmission Occurred 27

pub fn to28(&self) -> TO28_R[src]

Bit 28 - Transmission Occurred 28

pub fn to29(&self) -> TO29_R[src]

Bit 29 - Transmission Occurred 29

pub fn to30(&self) -> TO30_R[src]

Bit 30 - Transmission Occurred 30

pub fn to31(&self) -> TO31_R[src]

Bit 31 - Transmission Occurred 31

impl R<u32, Reg<u32, _TXBCF>>[src]

pub fn cf0(&self) -> CF0_R[src]

Bit 0 - Tx Buffer Cancellation Finished 0

pub fn cf1(&self) -> CF1_R[src]

Bit 1 - Tx Buffer Cancellation Finished 1

pub fn cf2(&self) -> CF2_R[src]

Bit 2 - Tx Buffer Cancellation Finished 2

pub fn cf3(&self) -> CF3_R[src]

Bit 3 - Tx Buffer Cancellation Finished 3

pub fn cf4(&self) -> CF4_R[src]

Bit 4 - Tx Buffer Cancellation Finished 4

pub fn cf5(&self) -> CF5_R[src]

Bit 5 - Tx Buffer Cancellation Finished 5

pub fn cf6(&self) -> CF6_R[src]

Bit 6 - Tx Buffer Cancellation Finished 6

pub fn cf7(&self) -> CF7_R[src]

Bit 7 - Tx Buffer Cancellation Finished 7

pub fn cf8(&self) -> CF8_R[src]

Bit 8 - Tx Buffer Cancellation Finished 8

pub fn cf9(&self) -> CF9_R[src]

Bit 9 - Tx Buffer Cancellation Finished 9

pub fn cf10(&self) -> CF10_R[src]

Bit 10 - Tx Buffer Cancellation Finished 10

pub fn cf11(&self) -> CF11_R[src]

Bit 11 - Tx Buffer Cancellation Finished 11

pub fn cf12(&self) -> CF12_R[src]

Bit 12 - Tx Buffer Cancellation Finished 12

pub fn cf13(&self) -> CF13_R[src]

Bit 13 - Tx Buffer Cancellation Finished 13

pub fn cf14(&self) -> CF14_R[src]

Bit 14 - Tx Buffer Cancellation Finished 14

pub fn cf15(&self) -> CF15_R[src]

Bit 15 - Tx Buffer Cancellation Finished 15

pub fn cf16(&self) -> CF16_R[src]

Bit 16 - Tx Buffer Cancellation Finished 16

pub fn cf17(&self) -> CF17_R[src]

Bit 17 - Tx Buffer Cancellation Finished 17

pub fn cf18(&self) -> CF18_R[src]

Bit 18 - Tx Buffer Cancellation Finished 18

pub fn cf19(&self) -> CF19_R[src]

Bit 19 - Tx Buffer Cancellation Finished 19

pub fn cf20(&self) -> CF20_R[src]

Bit 20 - Tx Buffer Cancellation Finished 20

pub fn cf21(&self) -> CF21_R[src]

Bit 21 - Tx Buffer Cancellation Finished 21

pub fn cf22(&self) -> CF22_R[src]

Bit 22 - Tx Buffer Cancellation Finished 22

pub fn cf23(&self) -> CF23_R[src]

Bit 23 - Tx Buffer Cancellation Finished 23

pub fn cf24(&self) -> CF24_R[src]

Bit 24 - Tx Buffer Cancellation Finished 24

pub fn cf25(&self) -> CF25_R[src]

Bit 25 - Tx Buffer Cancellation Finished 25

pub fn cf26(&self) -> CF26_R[src]

Bit 26 - Tx Buffer Cancellation Finished 26

pub fn cf27(&self) -> CF27_R[src]

Bit 27 - Tx Buffer Cancellation Finished 27

pub fn cf28(&self) -> CF28_R[src]

Bit 28 - Tx Buffer Cancellation Finished 28

pub fn cf29(&self) -> CF29_R[src]

Bit 29 - Tx Buffer Cancellation Finished 29

pub fn cf30(&self) -> CF30_R[src]

Bit 30 - Tx Buffer Cancellation Finished 30

pub fn cf31(&self) -> CF31_R[src]

Bit 31 - Tx Buffer Cancellation Finished 31

impl R<u32, Reg<u32, _TXBTIE>>[src]

pub fn tie0(&self) -> TIE0_R[src]

Bit 0 - Transmission Interrupt Enable 0

pub fn tie1(&self) -> TIE1_R[src]

Bit 1 - Transmission Interrupt Enable 1

pub fn tie2(&self) -> TIE2_R[src]

Bit 2 - Transmission Interrupt Enable 2

pub fn tie3(&self) -> TIE3_R[src]

Bit 3 - Transmission Interrupt Enable 3

pub fn tie4(&self) -> TIE4_R[src]

Bit 4 - Transmission Interrupt Enable 4

pub fn tie5(&self) -> TIE5_R[src]

Bit 5 - Transmission Interrupt Enable 5

pub fn tie6(&self) -> TIE6_R[src]

Bit 6 - Transmission Interrupt Enable 6

pub fn tie7(&self) -> TIE7_R[src]

Bit 7 - Transmission Interrupt Enable 7

pub fn tie8(&self) -> TIE8_R[src]

Bit 8 - Transmission Interrupt Enable 8

pub fn tie9(&self) -> TIE9_R[src]

Bit 9 - Transmission Interrupt Enable 9

pub fn tie10(&self) -> TIE10_R[src]

Bit 10 - Transmission Interrupt Enable 10

pub fn tie11(&self) -> TIE11_R[src]

Bit 11 - Transmission Interrupt Enable 11

pub fn tie12(&self) -> TIE12_R[src]

Bit 12 - Transmission Interrupt Enable 12

pub fn tie13(&self) -> TIE13_R[src]

Bit 13 - Transmission Interrupt Enable 13

pub fn tie14(&self) -> TIE14_R[src]

Bit 14 - Transmission Interrupt Enable 14

pub fn tie15(&self) -> TIE15_R[src]

Bit 15 - Transmission Interrupt Enable 15

pub fn tie16(&self) -> TIE16_R[src]

Bit 16 - Transmission Interrupt Enable 16

pub fn tie17(&self) -> TIE17_R[src]

Bit 17 - Transmission Interrupt Enable 17

pub fn tie18(&self) -> TIE18_R[src]

Bit 18 - Transmission Interrupt Enable 18

pub fn tie19(&self) -> TIE19_R[src]

Bit 19 - Transmission Interrupt Enable 19

pub fn tie20(&self) -> TIE20_R[src]

Bit 20 - Transmission Interrupt Enable 20

pub fn tie21(&self) -> TIE21_R[src]

Bit 21 - Transmission Interrupt Enable 21

pub fn tie22(&self) -> TIE22_R[src]

Bit 22 - Transmission Interrupt Enable 22

pub fn tie23(&self) -> TIE23_R[src]

Bit 23 - Transmission Interrupt Enable 23

pub fn tie24(&self) -> TIE24_R[src]

Bit 24 - Transmission Interrupt Enable 24

pub fn tie25(&self) -> TIE25_R[src]

Bit 25 - Transmission Interrupt Enable 25

pub fn tie26(&self) -> TIE26_R[src]

Bit 26 - Transmission Interrupt Enable 26

pub fn tie27(&self) -> TIE27_R[src]

Bit 27 - Transmission Interrupt Enable 27

pub fn tie28(&self) -> TIE28_R[src]

Bit 28 - Transmission Interrupt Enable 28

pub fn tie29(&self) -> TIE29_R[src]

Bit 29 - Transmission Interrupt Enable 29

pub fn tie30(&self) -> TIE30_R[src]

Bit 30 - Transmission Interrupt Enable 30

pub fn tie31(&self) -> TIE31_R[src]

Bit 31 - Transmission Interrupt Enable 31

impl R<u32, Reg<u32, _TXBCIE>>[src]

pub fn cfie0(&self) -> CFIE0_R[src]

Bit 0 - Cancellation Finished Interrupt Enable 0

pub fn cfie1(&self) -> CFIE1_R[src]

Bit 1 - Cancellation Finished Interrupt Enable 1

pub fn cfie2(&self) -> CFIE2_R[src]

Bit 2 - Cancellation Finished Interrupt Enable 2

pub fn cfie3(&self) -> CFIE3_R[src]

Bit 3 - Cancellation Finished Interrupt Enable 3

pub fn cfie4(&self) -> CFIE4_R[src]

Bit 4 - Cancellation Finished Interrupt Enable 4

pub fn cfie5(&self) -> CFIE5_R[src]

Bit 5 - Cancellation Finished Interrupt Enable 5

pub fn cfie6(&self) -> CFIE6_R[src]

Bit 6 - Cancellation Finished Interrupt Enable 6

pub fn cfie7(&self) -> CFIE7_R[src]

Bit 7 - Cancellation Finished Interrupt Enable 7

pub fn cfie8(&self) -> CFIE8_R[src]

Bit 8 - Cancellation Finished Interrupt Enable 8

pub fn cfie9(&self) -> CFIE9_R[src]

Bit 9 - Cancellation Finished Interrupt Enable 9

pub fn cfie10(&self) -> CFIE10_R[src]

Bit 10 - Cancellation Finished Interrupt Enable 10

pub fn cfie11(&self) -> CFIE11_R[src]

Bit 11 - Cancellation Finished Interrupt Enable 11

pub fn cfie12(&self) -> CFIE12_R[src]

Bit 12 - Cancellation Finished Interrupt Enable 12

pub fn cfie13(&self) -> CFIE13_R[src]

Bit 13 - Cancellation Finished Interrupt Enable 13

pub fn cfie14(&self) -> CFIE14_R[src]

Bit 14 - Cancellation Finished Interrupt Enable 14

pub fn cfie15(&self) -> CFIE15_R[src]

Bit 15 - Cancellation Finished Interrupt Enable 15

pub fn cfie16(&self) -> CFIE16_R[src]

Bit 16 - Cancellation Finished Interrupt Enable 16

pub fn cfie17(&self) -> CFIE17_R[src]

Bit 17 - Cancellation Finished Interrupt Enable 17

pub fn cfie18(&self) -> CFIE18_R[src]

Bit 18 - Cancellation Finished Interrupt Enable 18

pub fn cfie19(&self) -> CFIE19_R[src]

Bit 19 - Cancellation Finished Interrupt Enable 19

pub fn cfie20(&self) -> CFIE20_R[src]

Bit 20 - Cancellation Finished Interrupt Enable 20

pub fn cfie21(&self) -> CFIE21_R[src]

Bit 21 - Cancellation Finished Interrupt Enable 21

pub fn cfie22(&self) -> CFIE22_R[src]

Bit 22 - Cancellation Finished Interrupt Enable 22

pub fn cfie23(&self) -> CFIE23_R[src]

Bit 23 - Cancellation Finished Interrupt Enable 23

pub fn cfie24(&self) -> CFIE24_R[src]

Bit 24 - Cancellation Finished Interrupt Enable 24

pub fn cfie25(&self) -> CFIE25_R[src]

Bit 25 - Cancellation Finished Interrupt Enable 25

pub fn cfie26(&self) -> CFIE26_R[src]

Bit 26 - Cancellation Finished Interrupt Enable 26

pub fn cfie27(&self) -> CFIE27_R[src]

Bit 27 - Cancellation Finished Interrupt Enable 27

pub fn cfie28(&self) -> CFIE28_R[src]

Bit 28 - Cancellation Finished Interrupt Enable 28

pub fn cfie29(&self) -> CFIE29_R[src]

Bit 29 - Cancellation Finished Interrupt Enable 29

pub fn cfie30(&self) -> CFIE30_R[src]

Bit 30 - Cancellation Finished Interrupt Enable 30

pub fn cfie31(&self) -> CFIE31_R[src]

Bit 31 - Cancellation Finished Interrupt Enable 31

impl R<u32, Reg<u32, _TXEFC>>[src]

pub fn efsa(&self) -> EFSA_R[src]

Bits 0:15 - Event FIFO Start Address

pub fn efs(&self) -> EFS_R[src]

Bits 16:21 - Event FIFO Size

pub fn efwm(&self) -> EFWM_R[src]

Bits 24:29 - Event FIFO Watermark

impl R<u32, Reg<u32, _TXEFS>>[src]

pub fn effl(&self) -> EFFL_R[src]

Bits 0:5 - Event FIFO Fill Level

pub fn efgi(&self) -> EFGI_R[src]

Bits 8:12 - Event FIFO Get Index

pub fn efpi(&self) -> EFPI_R[src]

Bits 16:20 - Event FIFO Put Index

pub fn eff(&self) -> EFF_R[src]

Bit 24 - Event FIFO Full

pub fn tefl(&self) -> TEFL_R[src]

Bit 25 - Tx Event FIFO Element Lost

impl R<u32, Reg<u32, _TXEFA>>[src]

pub fn efai(&self) -> EFAI_R[src]

Bits 0:4 - Event FIFO Acknowledge Index

impl R<bool, SWRST_A>[src]

pub fn variant(&self) -> SWRST_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, ENABLE_A>[src]

pub fn variant(&self) -> ENABLE_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, RUNSTDBY_A>[src]

pub fn variant(&self) -> RUNSTDBY_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u8, Reg<u8, _CTRL>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run in Standby

impl R<u8, SEQSEL_A>[src]

pub fn variant(&self) -> Variant<u8, SEQSEL_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_dff(&self) -> bool[src]

Checks if the value of the field is DFF

pub fn is_jk(&self) -> bool[src]

Checks if the value of the field is JK

pub fn is_latch(&self) -> bool[src]

Checks if the value of the field is LATCH

pub fn is_rs(&self) -> bool[src]

Checks if the value of the field is RS

impl R<u8, Reg<u8, _SEQCTRL>>[src]

pub fn seqsel(&self) -> SEQSEL_R[src]

Bits 0:3 - Sequential Selection

impl R<bool, ENABLE_A>[src]

pub fn variant(&self) -> ENABLE_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u8, FILTSEL_A>[src]

pub fn variant(&self) -> Variant<u8, FILTSEL_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_synch(&self) -> bool[src]

Checks if the value of the field is SYNCH

pub fn is_filter(&self) -> bool[src]

Checks if the value of the field is FILTER

impl R<bool, EDGESEL_A>[src]

pub fn variant(&self) -> EDGESEL_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u8, INSEL0_A>[src]

pub fn variant(&self) -> Variant<u8, INSEL0_A>[src]

Get enumerated values variant

pub fn is_mask(&self) -> bool[src]

Checks if the value of the field is MASK

pub fn is_feedback(&self) -> bool[src]

Checks if the value of the field is FEEDBACK

Checks if the value of the field is LINK

pub fn is_event(&self) -> bool[src]

Checks if the value of the field is EVENT

pub fn is_io(&self) -> bool[src]

Checks if the value of the field is IO

pub fn is_ac(&self) -> bool[src]

Checks if the value of the field is AC

pub fn is_tc(&self) -> bool[src]

Checks if the value of the field is TC

pub fn is_alttc(&self) -> bool[src]

Checks if the value of the field is ALTTC

pub fn is_tcc(&self) -> bool[src]

Checks if the value of the field is TCC

pub fn is_sercom(&self) -> bool[src]

Checks if the value of the field is SERCOM

impl R<u8, INSEL1_A>[src]

pub fn variant(&self) -> Variant<u8, INSEL1_A>[src]

Get enumerated values variant

pub fn is_mask(&self) -> bool[src]

Checks if the value of the field is MASK

pub fn is_feedback(&self) -> bool[src]

Checks if the value of the field is FEEDBACK

Checks if the value of the field is LINK

pub fn is_event(&self) -> bool[src]

Checks if the value of the field is EVENT

pub fn is_io(&self) -> bool[src]

Checks if the value of the field is IO

pub fn is_ac(&self) -> bool[src]

Checks if the value of the field is AC

pub fn is_tc(&self) -> bool[src]

Checks if the value of the field is TC

pub fn is_alttc(&self) -> bool[src]

Checks if the value of the field is ALTTC

pub fn is_tcc(&self) -> bool[src]

Checks if the value of the field is TCC

pub fn is_sercom(&self) -> bool[src]

Checks if the value of the field is SERCOM

impl R<u8, INSEL2_A>[src]

pub fn variant(&self) -> Variant<u8, INSEL2_A>[src]

Get enumerated values variant

pub fn is_mask(&self) -> bool[src]

Checks if the value of the field is MASK

pub fn is_feedback(&self) -> bool[src]

Checks if the value of the field is FEEDBACK

Checks if the value of the field is LINK

pub fn is_event(&self) -> bool[src]

Checks if the value of the field is EVENT

pub fn is_io(&self) -> bool[src]

Checks if the value of the field is IO

pub fn is_ac(&self) -> bool[src]

Checks if the value of the field is AC

pub fn is_tc(&self) -> bool[src]

Checks if the value of the field is TC

pub fn is_alttc(&self) -> bool[src]

Checks if the value of the field is ALTTC

pub fn is_tcc(&self) -> bool[src]

Checks if the value of the field is TCC

pub fn is_sercom(&self) -> bool[src]

Checks if the value of the field is SERCOM

impl R<bool, INVEI_A>[src]

pub fn variant(&self) -> INVEI_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LUTEI_A>[src]

pub fn variant(&self) -> LUTEI_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LUTEO_A>[src]

pub fn variant(&self) -> LUTEO_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u32, Reg<u32, _LUTCTRL>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - LUT Enable

pub fn filtsel(&self) -> FILTSEL_R[src]

Bits 4:5 - Filter Selection

pub fn edgesel(&self) -> EDGESEL_R[src]

Bit 7 - Edge Selection

pub fn insel0(&self) -> INSEL0_R[src]

Bits 8:11 - Input Selection 0

pub fn insel1(&self) -> INSEL1_R[src]

Bits 12:15 - Input Selection 1

pub fn insel2(&self) -> INSEL2_R[src]

Bits 16:19 - Input Selection 2

pub fn invei(&self) -> INVEI_R[src]

Bit 20 - Inverted Event Input Enable

pub fn lutei(&self) -> LUTEI_R[src]

Bit 21 - LUT Event Input Enable

pub fn luteo(&self) -> LUTEO_R[src]

Bit 22 - LUT Event Output Enable

pub fn truth(&self) -> TRUTH_R[src]

Bits 24:31 - Truth Value

impl R<u8, WAYNUM_A>[src]

pub fn variant(&self) -> Variant<u8, WAYNUM_A>[src]

Get enumerated values variant

pub fn is_dmapped(&self) -> bool[src]

Checks if the value of the field is DMAPPED

pub fn is_arch2way(&self) -> bool[src]

Checks if the value of the field is ARCH2WAY

pub fn is_arch4way(&self) -> bool[src]

Checks if the value of the field is ARCH4WAY

impl R<u8, CSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, CSIZE_A>[src]

Get enumerated values variant

pub fn is_csize_1kb(&self) -> bool[src]

Checks if the value of the field is CSIZE_1KB

pub fn is_csize_2kb(&self) -> bool[src]

Checks if the value of the field is CSIZE_2KB

pub fn is_csize_4kb(&self) -> bool[src]

Checks if the value of the field is CSIZE_4KB

pub fn is_csize_8kb(&self) -> bool[src]

Checks if the value of the field is CSIZE_8KB

pub fn is_csize_16kb(&self) -> bool[src]

Checks if the value of the field is CSIZE_16KB

pub fn is_csize_32kb(&self) -> bool[src]

Checks if the value of the field is CSIZE_32KB

pub fn is_csize_64kb(&self) -> bool[src]

Checks if the value of the field is CSIZE_64KB

impl R<u8, CLSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, CLSIZE_A>[src]

Get enumerated values variant

pub fn is_clsize_4b(&self) -> bool[src]

Checks if the value of the field is CLSIZE_4B

pub fn is_clsize_8b(&self) -> bool[src]

Checks if the value of the field is CLSIZE_8B

pub fn is_clsize_16b(&self) -> bool[src]

Checks if the value of the field is CLSIZE_16B

pub fn is_clsize_32b(&self) -> bool[src]

Checks if the value of the field is CLSIZE_32B

pub fn is_clsize_64b(&self) -> bool[src]

Checks if the value of the field is CLSIZE_64B

pub fn is_clsize_128b(&self) -> bool[src]

Checks if the value of the field is CLSIZE_128B

impl R<u32, Reg<u32, _TYPE>>[src]

pub fn gclk(&self) -> GCLK_R[src]

Bit 1 - dynamic Clock Gating supported

pub fn rrp(&self) -> RRP_R[src]

Bit 4 - Round Robin Policy supported

pub fn waynum(&self) -> WAYNUM_R[src]

Bits 5:6 - Number of Way

pub fn lckdown(&self) -> LCKDOWN_R[src]

Bit 7 - Lock Down supported

pub fn csize(&self) -> CSIZE_R[src]

Bits 8:10 - Cache Size

pub fn clsize(&self) -> CLSIZE_R[src]

Bits 11:13 - Cache Line Size

impl R<u8, CSIZESW_A>[src]

pub fn variant(&self) -> Variant<u8, CSIZESW_A>[src]

Get enumerated values variant

pub fn is_conf_csize_1kb(&self) -> bool[src]

Checks if the value of the field is CONF_CSIZE_1KB

pub fn is_conf_csize_2kb(&self) -> bool[src]

Checks if the value of the field is CONF_CSIZE_2KB

pub fn is_conf_csize_4kb(&self) -> bool[src]

Checks if the value of the field is CONF_CSIZE_4KB

pub fn is_conf_csize_8kb(&self) -> bool[src]

Checks if the value of the field is CONF_CSIZE_8KB

pub fn is_conf_csize_16kb(&self) -> bool[src]

Checks if the value of the field is CONF_CSIZE_16KB

pub fn is_conf_csize_32kb(&self) -> bool[src]

Checks if the value of the field is CONF_CSIZE_32KB

pub fn is_conf_csize_64kb(&self) -> bool[src]

Checks if the value of the field is CONF_CSIZE_64KB

impl R<u32, Reg<u32, _CFG>>[src]

pub fn icdis(&self) -> ICDIS_R[src]

Bit 1 - Instruction Cache Disable

pub fn dcdis(&self) -> DCDIS_R[src]

Bit 2 - Data Cache Disable

pub fn csizesw(&self) -> CSIZESW_R[src]

Bits 4:6 - Cache size configured by software

impl R<u32, Reg<u32, _SR>>[src]

pub fn csts(&self) -> CSTS_R[src]

Bit 0 - Cache Controller Status

impl R<u32, Reg<u32, _LCKWAY>>[src]

pub fn lckway(&self) -> LCKWAY_R[src]

Bits 0:3 - Lockdown way Register

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_cycle_count(&self) -> bool[src]

Checks if the value of the field is CYCLE_COUNT

pub fn is_ihit_count(&self) -> bool[src]

Checks if the value of the field is IHIT_COUNT

pub fn is_dhit_count(&self) -> bool[src]

Checks if the value of the field is DHIT_COUNT

impl R<u32, Reg<u32, _MCFG>>[src]

pub fn mode(&self) -> MODE_R[src]

Bits 0:1 - Cache Controller Monitor Counter Mode

impl R<u32, Reg<u32, _MEN>>[src]

pub fn menable(&self) -> MENABLE_R[src]

Bit 0 - Cache Controller Monitor Enable

impl R<u32, Reg<u32, _MSR>>[src]

pub fn event_cnt(&self) -> EVENT_CNT_R[src]

Bits 0:31 - Monitor Event Counter

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable DAC Controller

impl R<u8, REFSEL_A>[src]

pub fn variant(&self) -> REFSEL_A[src]

Get enumerated values variant

pub fn is_vrefpu(&self) -> bool[src]

Checks if the value of the field is VREFPU

pub fn is_vddana(&self) -> bool[src]

Checks if the value of the field is VDDANA

pub fn is_vrefpb(&self) -> bool[src]

Checks if the value of the field is VREFPB

pub fn is_intref(&self) -> bool[src]

Checks if the value of the field is INTREF

impl R<u8, Reg<u8, _CTRLB>>[src]

pub fn diff(&self) -> DIFF_R[src]

Bit 0 - Differential mode enable

pub fn refsel(&self) -> REFSEL_R[src]

Bits 1:2 - Reference Selection for DAC0/1

impl R<u8, Reg<u8, _EVCTRL>>[src]

pub fn startei0(&self) -> STARTEI0_R[src]

Bit 0 - Start Conversion Event Input DAC 0

pub fn startei1(&self) -> STARTEI1_R[src]

Bit 1 - Start Conversion Event Input DAC 1

pub fn emptyeo0(&self) -> EMPTYEO0_R[src]

Bit 2 - Data Buffer Empty Event Output DAC 0

pub fn emptyeo1(&self) -> EMPTYEO1_R[src]

Bit 3 - Data Buffer Empty Event Output DAC 1

pub fn invei0(&self) -> INVEI0_R[src]

Bit 4 - Enable Invertion of DAC 0 input event

pub fn invei1(&self) -> INVEI1_R[src]

Bit 5 - Enable Invertion of DAC 1 input event

pub fn resrdyeo0(&self) -> RESRDYEO0_R[src]

Bit 6 - Result Ready Event Output 0

pub fn resrdyeo1(&self) -> RESRDYEO1_R[src]

Bit 7 - Result Ready Event Output 1

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn underrun0(&self) -> UNDERRUN0_R[src]

Bit 0 - Underrun 0 Interrupt Enable

pub fn underrun1(&self) -> UNDERRUN1_R[src]

Bit 1 - Underrun 1 Interrupt Enable

pub fn empty0(&self) -> EMPTY0_R[src]

Bit 2 - Data Buffer 0 Empty Interrupt Enable

pub fn empty1(&self) -> EMPTY1_R[src]

Bit 3 - Data Buffer 1 Empty Interrupt Enable

pub fn resrdy0(&self) -> RESRDY0_R[src]

Bit 4 - Result 0 Ready Interrupt Enable

pub fn resrdy1(&self) -> RESRDY1_R[src]

Bit 5 - Result 1 Ready Interrupt Enable

pub fn overrun0(&self) -> OVERRUN0_R[src]

Bit 6 - Overrun 0 Interrupt Enable

pub fn overrun1(&self) -> OVERRUN1_R[src]

Bit 7 - Overrun 1 Interrupt Enable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn underrun0(&self) -> UNDERRUN0_R[src]

Bit 0 - Underrun 0 Interrupt Enable

pub fn underrun1(&self) -> UNDERRUN1_R[src]

Bit 1 - Underrun 1 Interrupt Enable

pub fn empty0(&self) -> EMPTY0_R[src]

Bit 2 - Data Buffer 0 Empty Interrupt Enable

pub fn empty1(&self) -> EMPTY1_R[src]

Bit 3 - Data Buffer 1 Empty Interrupt Enable

pub fn resrdy0(&self) -> RESRDY0_R[src]

Bit 4 - Result 0 Ready Interrupt Enable

pub fn resrdy1(&self) -> RESRDY1_R[src]

Bit 5 - Result 1 Ready Interrupt Enable

pub fn overrun0(&self) -> OVERRUN0_R[src]

Bit 6 - Overrun 0 Interrupt Enable

pub fn overrun1(&self) -> OVERRUN1_R[src]

Bit 7 - Overrun 1 Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn underrun0(&self) -> UNDERRUN0_R[src]

Bit 0 - Result 0 Underrun

pub fn underrun1(&self) -> UNDERRUN1_R[src]

Bit 1 - Result 1 Underrun

pub fn empty0(&self) -> EMPTY0_R[src]

Bit 2 - Data Buffer 0 Empty

pub fn empty1(&self) -> EMPTY1_R[src]

Bit 3 - Data Buffer 1 Empty

pub fn resrdy0(&self) -> RESRDY0_R[src]

Bit 4 - Result 0 Ready

pub fn resrdy1(&self) -> RESRDY1_R[src]

Bit 5 - Result 1 Ready

pub fn overrun0(&self) -> OVERRUN0_R[src]

Bit 6 - Result 0 Overrun

pub fn overrun1(&self) -> OVERRUN1_R[src]

Bit 7 - Result 1 Overrun

impl R<u8, Reg<u8, _STATUS>>[src]

pub fn ready0(&self) -> READY0_R[src]

Bit 0 - DAC 0 Startup Ready

pub fn ready1(&self) -> READY1_R[src]

Bit 1 - DAC 1 Startup Ready

pub fn eoc0(&self) -> EOC0_R[src]

Bit 2 - DAC 0 End of Conversion

pub fn eoc1(&self) -> EOC1_R[src]

Bit 3 - DAC 1 End of Conversion

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - DAC Enable Status

pub fn data0(&self) -> DATA0_R[src]

Bit 2 - Data DAC 0

pub fn data1(&self) -> DATA1_R[src]

Bit 3 - Data DAC 1

pub fn databuf0(&self) -> DATABUF0_R[src]

Bit 4 - Data Buffer DAC 0

pub fn databuf1(&self) -> DATABUF1_R[src]

Bit 5 - Data Buffer DAC 1

impl R<u8, CCTRL_A>[src]

pub fn variant(&self) -> Variant<u8, CCTRL_A>[src]

Get enumerated values variant

pub fn is_cc100k(&self) -> bool[src]

Checks if the value of the field is CC100K

pub fn is_cc1m(&self) -> bool[src]

Checks if the value of the field is CC1M

pub fn is_cc12m(&self) -> bool[src]

Checks if the value of the field is CC12M

impl R<u8, REFRESH_A>[src]

pub fn variant(&self) -> REFRESH_A[src]

Get enumerated values variant

pub fn is_refresh_0(&self) -> bool[src]

Checks if the value of the field is REFRESH_0

pub fn is_refresh_1(&self) -> bool[src]

Checks if the value of the field is REFRESH_1

pub fn is_refresh_2(&self) -> bool[src]

Checks if the value of the field is REFRESH_2

pub fn is_refresh_3(&self) -> bool[src]

Checks if the value of the field is REFRESH_3

pub fn is_refresh_4(&self) -> bool[src]

Checks if the value of the field is REFRESH_4

pub fn is_refresh_5(&self) -> bool[src]

Checks if the value of the field is REFRESH_5

pub fn is_refresh_6(&self) -> bool[src]

Checks if the value of the field is REFRESH_6

pub fn is_refresh_7(&self) -> bool[src]

Checks if the value of the field is REFRESH_7

pub fn is_refresh_8(&self) -> bool[src]

Checks if the value of the field is REFRESH_8

pub fn is_refresh_9(&self) -> bool[src]

Checks if the value of the field is REFRESH_9

pub fn is_refresh_10(&self) -> bool[src]

Checks if the value of the field is REFRESH_10

pub fn is_refresh_11(&self) -> bool[src]

Checks if the value of the field is REFRESH_11

pub fn is_refresh_12(&self) -> bool[src]

Checks if the value of the field is REFRESH_12

pub fn is_refresh_13(&self) -> bool[src]

Checks if the value of the field is REFRESH_13

pub fn is_refresh_14(&self) -> bool[src]

Checks if the value of the field is REFRESH_14

pub fn is_refresh_15(&self) -> bool[src]

Checks if the value of the field is REFRESH_15

impl R<u8, OSR_A>[src]

pub fn variant(&self) -> Variant<u8, OSR_A>[src]

Get enumerated values variant

pub fn is_osr_1(&self) -> bool[src]

Checks if the value of the field is OSR_1

pub fn is_osr_2(&self) -> bool[src]

Checks if the value of the field is OSR_2

pub fn is_osr_4(&self) -> bool[src]

Checks if the value of the field is OSR_4

pub fn is_osr_8(&self) -> bool[src]

Checks if the value of the field is OSR_8

pub fn is_osr_16(&self) -> bool[src]

Checks if the value of the field is OSR_16

pub fn is_osr_32(&self) -> bool[src]

Checks if the value of the field is OSR_32

impl R<u16, Reg<u16, _DACCTRL>>[src]

pub fn leftadj(&self) -> LEFTADJ_R[src]

Bit 0 - Left Adjusted Data

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable DAC0

pub fn cctrl(&self) -> CCTRL_R[src]

Bits 2:3 - Current Control

pub fn fext(&self) -> FEXT_R[src]

Bit 5 - Standalone Filter

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run in Standby

pub fn dither(&self) -> DITHER_R[src]

Bit 7 - Dithering Mode

pub fn refresh(&self) -> REFRESH_R[src]

Bits 8:11 - Refresh period

pub fn osr(&self) -> OSR_R[src]

Bits 13:15 - Sampling Rate

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Debug Run

impl R<u16, Reg<u16, _RESULT>>[src]

pub fn result(&self) -> RESULT_R[src]

Bits 0:15 - Filter Result

impl R<u8, TRIGSRC_A>[src]

pub fn variant(&self) -> Variant<u8, TRIGSRC_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<u8, TRIGACT_A>[src]

pub fn variant(&self) -> Variant<u8, TRIGACT_A>[src]

Get enumerated values variant

pub fn is_block(&self) -> bool[src]

Checks if the value of the field is BLOCK

pub fn is_burst(&self) -> bool[src]

Checks if the value of the field is BURST

pub fn is_transaction(&self) -> bool[src]

Checks if the value of the field is TRANSACTION

impl R<u8, BURSTLEN_A>[src]

pub fn variant(&self) -> BURSTLEN_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_2beat(&self) -> bool[src]

Checks if the value of the field is _2BEAT

pub fn is_3beat(&self) -> bool[src]

Checks if the value of the field is _3BEAT

pub fn is_4beat(&self) -> bool[src]

Checks if the value of the field is _4BEAT

pub fn is_5beat(&self) -> bool[src]

Checks if the value of the field is _5BEAT

pub fn is_6beat(&self) -> bool[src]

Checks if the value of the field is _6BEAT

pub fn is_7beat(&self) -> bool[src]

Checks if the value of the field is _7BEAT

pub fn is_8beat(&self) -> bool[src]

Checks if the value of the field is _8BEAT

pub fn is_9beat(&self) -> bool[src]

Checks if the value of the field is _9BEAT

pub fn is_10beat(&self) -> bool[src]

Checks if the value of the field is _10BEAT

pub fn is_11beat(&self) -> bool[src]

Checks if the value of the field is _11BEAT

pub fn is_12beat(&self) -> bool[src]

Checks if the value of the field is _12BEAT

pub fn is_13beat(&self) -> bool[src]

Checks if the value of the field is _13BEAT

pub fn is_14beat(&self) -> bool[src]

Checks if the value of the field is _14BEAT

pub fn is_15beat(&self) -> bool[src]

Checks if the value of the field is _15BEAT

pub fn is_16beat(&self) -> bool[src]

Checks if the value of the field is _16BEAT

impl R<u8, THRESHOLD_A>[src]

pub fn variant(&self) -> THRESHOLD_A[src]

Get enumerated values variant

pub fn is_1beat(&self) -> bool[src]

Checks if the value of the field is _1BEAT

pub fn is_2beats(&self) -> bool[src]

Checks if the value of the field is _2BEATS

pub fn is_4beats(&self) -> bool[src]

Checks if the value of the field is _4BEATS

pub fn is_8beats(&self) -> bool[src]

Checks if the value of the field is _8BEATS

impl R<u32, Reg<u32, _CHCTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Channel Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Channel Enable

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Channel Run in Standby

pub fn trigsrc(&self) -> TRIGSRC_R[src]

Bits 8:14 - Trigger Source

pub fn trigact(&self) -> TRIGACT_R[src]

Bits 20:21 - Trigger Action

pub fn burstlen(&self) -> BURSTLEN_R[src]

Bits 24:27 - Burst Length

pub fn threshold(&self) -> THRESHOLD_R[src]

Bits 28:29 - FIFO Threshold

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_noact(&self) -> bool[src]

Checks if the value of the field is NOACT

pub fn is_suspend(&self) -> bool[src]

Checks if the value of the field is SUSPEND

pub fn is_resume(&self) -> bool[src]

Checks if the value of the field is RESUME

impl R<u8, Reg<u8, _CHCTRLB>>[src]

pub fn cmd(&self) -> CMD_R[src]

Bits 0:1 - Software Command

impl R<u8, PRILVL_A>[src]

pub fn variant(&self) -> PRILVL_A[src]

Get enumerated values variant

pub fn is_lvl0(&self) -> bool[src]

Checks if the value of the field is LVL0

pub fn is_lvl1(&self) -> bool[src]

Checks if the value of the field is LVL1

pub fn is_lvl2(&self) -> bool[src]

Checks if the value of the field is LVL2

pub fn is_lvl3(&self) -> bool[src]

Checks if the value of the field is LVL3

impl R<u8, Reg<u8, _CHPRILVL>>[src]

pub fn prilvl(&self) -> PRILVL_R[src]

Bits 0:1 - Channel Priority Level

impl R<u8, EVACT_A>[src]

pub fn variant(&self) -> EVACT_A[src]

Get enumerated values variant

pub fn is_noact(&self) -> bool[src]

Checks if the value of the field is NOACT

pub fn is_trig(&self) -> bool[src]

Checks if the value of the field is TRIG

pub fn is_ctrig(&self) -> bool[src]

Checks if the value of the field is CTRIG

pub fn is_cblock(&self) -> bool[src]

Checks if the value of the field is CBLOCK

pub fn is_suspend(&self) -> bool[src]

Checks if the value of the field is SUSPEND

pub fn is_resume(&self) -> bool[src]

Checks if the value of the field is RESUME

pub fn is_sskip(&self) -> bool[src]

Checks if the value of the field is SSKIP

pub fn is_incpri(&self) -> bool[src]

Checks if the value of the field is INCPRI

impl R<u8, EVOMODE_A>[src]

pub fn variant(&self) -> Variant<u8, EVOMODE_A>[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_trigact(&self) -> bool[src]

Checks if the value of the field is TRIGACT

impl R<u8, Reg<u8, _CHEVCTRL>>[src]

pub fn evact(&self) -> EVACT_R[src]

Bits 0:2 - Channel Event Input Action

pub fn evomode(&self) -> EVOMODE_R[src]

Bits 4:5 - Channel Event Output Mode

pub fn evie(&self) -> EVIE_R[src]

Bit 6 - Channel Event Input Enable

pub fn evoe(&self) -> EVOE_R[src]

Bit 7 - Channel Event Output Enable

impl R<u8, Reg<u8, _CHINTENCLR>>[src]

pub fn terr(&self) -> TERR_R[src]

Bit 0 - Channel Transfer Error Interrupt Enable

pub fn tcmpl(&self) -> TCMPL_R[src]

Bit 1 - Channel Transfer Complete Interrupt Enable

pub fn susp(&self) -> SUSP_R[src]

Bit 2 - Channel Suspend Interrupt Enable

impl R<u8, Reg<u8, _CHINTENSET>>[src]

pub fn terr(&self) -> TERR_R[src]

Bit 0 - Channel Transfer Error Interrupt Enable

pub fn tcmpl(&self) -> TCMPL_R[src]

Bit 1 - Channel Transfer Complete Interrupt Enable

pub fn susp(&self) -> SUSP_R[src]

Bit 2 - Channel Suspend Interrupt Enable

impl R<u8, Reg<u8, _CHINTFLAG>>[src]

pub fn terr(&self) -> TERR_R[src]

Bit 0 - Channel Transfer Error

pub fn tcmpl(&self) -> TCMPL_R[src]

Bit 1 - Channel Transfer Complete

pub fn susp(&self) -> SUSP_R[src]

Bit 2 - Channel Suspend

impl R<u8, Reg<u8, _CHSTATUS>>[src]

pub fn pend(&self) -> PEND_R[src]

Bit 0 - Channel Pending

pub fn busy(&self) -> BUSY_R[src]

Bit 1 - Channel Busy

pub fn ferr(&self) -> FERR_R[src]

Bit 2 - Channel Fetch Error

pub fn crcerr(&self) -> CRCERR_R[src]

Bit 3 - Channel CRC Error

impl R<u16, Reg<u16, _CTRL>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn dmaenable(&self) -> DMAENABLE_R[src]

Bit 1 - DMA Enable

pub fn lvlen0(&self) -> LVLEN0_R[src]

Bit 8 - Priority Level 0 Enable

pub fn lvlen1(&self) -> LVLEN1_R[src]

Bit 9 - Priority Level 1 Enable

pub fn lvlen2(&self) -> LVLEN2_R[src]

Bit 10 - Priority Level 2 Enable

pub fn lvlen3(&self) -> LVLEN3_R[src]

Bit 11 - Priority Level 3 Enable

impl R<u8, CRCBEATSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, CRCBEATSIZE_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_hword(&self) -> bool[src]

Checks if the value of the field is HWORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u8, CRCPOLY_A>[src]

pub fn variant(&self) -> Variant<u8, CRCPOLY_A>[src]

Get enumerated values variant

pub fn is_crc16(&self) -> bool[src]

Checks if the value of the field is CRC16

pub fn is_crc32(&self) -> bool[src]

Checks if the value of the field is CRC32

impl R<u8, CRCSRC_A>[src]

pub fn variant(&self) -> Variant<u8, CRCSRC_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_io(&self) -> bool[src]

Checks if the value of the field is IO

impl R<u8, CRCMODE_A>[src]

pub fn variant(&self) -> Variant<u8, CRCMODE_A>[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_crcmon(&self) -> bool[src]

Checks if the value of the field is CRCMON

pub fn is_crcgen(&self) -> bool[src]

Checks if the value of the field is CRCGEN

impl R<u16, Reg<u16, _CRCCTRL>>[src]

pub fn crcbeatsize(&self) -> CRCBEATSIZE_R[src]

Bits 0:1 - CRC Beat Size

pub fn crcpoly(&self) -> CRCPOLY_R[src]

Bits 2:3 - CRC Polynomial Type

pub fn crcsrc(&self) -> CRCSRC_R[src]

Bits 8:13 - CRC Input Source

pub fn crcmode(&self) -> CRCMODE_R[src]

Bits 14:15 - CRC Operating Mode

impl R<u32, Reg<u32, _CRCDATAIN>>[src]

pub fn crcdatain(&self) -> CRCDATAIN_R[src]

Bits 0:31 - CRC Data Input

impl R<u32, Reg<u32, _CRCCHKSUM>>[src]

pub fn crcchksum(&self) -> CRCCHKSUM_R[src]

Bits 0:31 - CRC Checksum

impl R<u8, Reg<u8, _CRCSTATUS>>[src]

pub fn crcbusy(&self) -> CRCBUSY_R[src]

Bit 0 - CRC Module Busy

pub fn crczero(&self) -> CRCZERO_R[src]

Bit 1 - CRC Zero

pub fn crcerr(&self) -> CRCERR_R[src]

Bit 2 - CRC Error

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Debug Run

impl R<u32, Reg<u32, _SWTRIGCTRL>>[src]

pub fn swtrig0(&self) -> SWTRIG0_R[src]

Bit 0 - Channel 0 Software Trigger

pub fn swtrig1(&self) -> SWTRIG1_R[src]

Bit 1 - Channel 1 Software Trigger

pub fn swtrig2(&self) -> SWTRIG2_R[src]

Bit 2 - Channel 2 Software Trigger

pub fn swtrig3(&self) -> SWTRIG3_R[src]

Bit 3 - Channel 3 Software Trigger

pub fn swtrig4(&self) -> SWTRIG4_R[src]

Bit 4 - Channel 4 Software Trigger

pub fn swtrig5(&self) -> SWTRIG5_R[src]

Bit 5 - Channel 5 Software Trigger

pub fn swtrig6(&self) -> SWTRIG6_R[src]

Bit 6 - Channel 6 Software Trigger

pub fn swtrig7(&self) -> SWTRIG7_R[src]

Bit 7 - Channel 7 Software Trigger

pub fn swtrig8(&self) -> SWTRIG8_R[src]

Bit 8 - Channel 8 Software Trigger

pub fn swtrig9(&self) -> SWTRIG9_R[src]

Bit 9 - Channel 9 Software Trigger

pub fn swtrig10(&self) -> SWTRIG10_R[src]

Bit 10 - Channel 10 Software Trigger

pub fn swtrig11(&self) -> SWTRIG11_R[src]

Bit 11 - Channel 11 Software Trigger

pub fn swtrig12(&self) -> SWTRIG12_R[src]

Bit 12 - Channel 12 Software Trigger

pub fn swtrig13(&self) -> SWTRIG13_R[src]

Bit 13 - Channel 13 Software Trigger

pub fn swtrig14(&self) -> SWTRIG14_R[src]

Bit 14 - Channel 14 Software Trigger

pub fn swtrig15(&self) -> SWTRIG15_R[src]

Bit 15 - Channel 15 Software Trigger

pub fn swtrig16(&self) -> SWTRIG16_R[src]

Bit 16 - Channel 16 Software Trigger

pub fn swtrig17(&self) -> SWTRIG17_R[src]

Bit 17 - Channel 17 Software Trigger

pub fn swtrig18(&self) -> SWTRIG18_R[src]

Bit 18 - Channel 18 Software Trigger

pub fn swtrig19(&self) -> SWTRIG19_R[src]

Bit 19 - Channel 19 Software Trigger

pub fn swtrig20(&self) -> SWTRIG20_R[src]

Bit 20 - Channel 20 Software Trigger

pub fn swtrig21(&self) -> SWTRIG21_R[src]

Bit 21 - Channel 21 Software Trigger

pub fn swtrig22(&self) -> SWTRIG22_R[src]

Bit 22 - Channel 22 Software Trigger

pub fn swtrig23(&self) -> SWTRIG23_R[src]

Bit 23 - Channel 23 Software Trigger

pub fn swtrig24(&self) -> SWTRIG24_R[src]

Bit 24 - Channel 24 Software Trigger

pub fn swtrig25(&self) -> SWTRIG25_R[src]

Bit 25 - Channel 25 Software Trigger

pub fn swtrig26(&self) -> SWTRIG26_R[src]

Bit 26 - Channel 26 Software Trigger

pub fn swtrig27(&self) -> SWTRIG27_R[src]

Bit 27 - Channel 27 Software Trigger

pub fn swtrig28(&self) -> SWTRIG28_R[src]

Bit 28 - Channel 28 Software Trigger

pub fn swtrig29(&self) -> SWTRIG29_R[src]

Bit 29 - Channel 29 Software Trigger

pub fn swtrig30(&self) -> SWTRIG30_R[src]

Bit 30 - Channel 30 Software Trigger

pub fn swtrig31(&self) -> SWTRIG31_R[src]

Bit 31 - Channel 31 Software Trigger

impl R<u8, QOS0_A>[src]

pub fn variant(&self) -> QOS0_A[src]

Get enumerated values variant

pub fn is_regular(&self) -> bool[src]

Checks if the value of the field is REGULAR

pub fn is_shortage(&self) -> bool[src]

Checks if the value of the field is SHORTAGE

pub fn is_sensitive(&self) -> bool[src]

Checks if the value of the field is SENSITIVE

pub fn is_critical(&self) -> bool[src]

Checks if the value of the field is CRITICAL

impl R<u8, QOS1_A>[src]

pub fn variant(&self) -> QOS1_A[src]

Get enumerated values variant

pub fn is_regular(&self) -> bool[src]

Checks if the value of the field is REGULAR

pub fn is_shortage(&self) -> bool[src]

Checks if the value of the field is SHORTAGE

pub fn is_sensitive(&self) -> bool[src]

Checks if the value of the field is SENSITIVE

pub fn is_critical(&self) -> bool[src]

Checks if the value of the field is CRITICAL

impl R<u8, QOS2_A>[src]

pub fn variant(&self) -> QOS2_A[src]

Get enumerated values variant

pub fn is_regular(&self) -> bool[src]

Checks if the value of the field is REGULAR

pub fn is_shortage(&self) -> bool[src]

Checks if the value of the field is SHORTAGE

pub fn is_sensitive(&self) -> bool[src]

Checks if the value of the field is SENSITIVE

pub fn is_critical(&self) -> bool[src]

Checks if the value of the field is CRITICAL

impl R<u8, QOS3_A>[src]

pub fn variant(&self) -> QOS3_A[src]

Get enumerated values variant

pub fn is_regular(&self) -> bool[src]

Checks if the value of the field is REGULAR

pub fn is_shortage(&self) -> bool[src]

Checks if the value of the field is SHORTAGE

pub fn is_sensitive(&self) -> bool[src]

Checks if the value of the field is SENSITIVE

pub fn is_critical(&self) -> bool[src]

Checks if the value of the field is CRITICAL

impl R<u32, Reg<u32, _PRICTRL0>>[src]

pub fn lvlpri0(&self) -> LVLPRI0_R[src]

Bits 0:4 - Level 0 Channel Priority Number

pub fn qos0(&self) -> QOS0_R[src]

Bits 5:6 - Level 0 Quality of Service

pub fn rrlvlen0(&self) -> RRLVLEN0_R[src]

Bit 7 - Level 0 Round-Robin Scheduling Enable

pub fn lvlpri1(&self) -> LVLPRI1_R[src]

Bits 8:12 - Level 1 Channel Priority Number

pub fn qos1(&self) -> QOS1_R[src]

Bits 13:14 - Level 1 Quality of Service

pub fn rrlvlen1(&self) -> RRLVLEN1_R[src]

Bit 15 - Level 1 Round-Robin Scheduling Enable

pub fn lvlpri2(&self) -> LVLPRI2_R[src]

Bits 16:20 - Level 2 Channel Priority Number

pub fn qos2(&self) -> QOS2_R[src]

Bits 21:22 - Level 2 Quality of Service

pub fn rrlvlen2(&self) -> RRLVLEN2_R[src]

Bit 23 - Level 2 Round-Robin Scheduling Enable

pub fn lvlpri3(&self) -> LVLPRI3_R[src]

Bits 24:28 - Level 3 Channel Priority Number

pub fn qos3(&self) -> QOS3_R[src]

Bits 29:30 - Level 3 Quality of Service

pub fn rrlvlen3(&self) -> RRLVLEN3_R[src]

Bit 31 - Level 3 Round-Robin Scheduling Enable

impl R<u16, Reg<u16, _INTPEND>>[src]

pub fn id(&self) -> ID_R[src]

Bits 0:4 - Channel ID

pub fn terr(&self) -> TERR_R[src]

Bit 8 - Transfer Error

pub fn tcmpl(&self) -> TCMPL_R[src]

Bit 9 - Transfer Complete

pub fn susp(&self) -> SUSP_R[src]

Bit 10 - Channel Suspend

pub fn crcerr(&self) -> CRCERR_R[src]

Bit 12 - CRC Error

pub fn ferr(&self) -> FERR_R[src]

Bit 13 - Fetch Error

pub fn busy(&self) -> BUSY_R[src]

Bit 14 - Busy

pub fn pend(&self) -> PEND_R[src]

Bit 15 - Pending

impl R<u32, Reg<u32, _INTSTATUS>>[src]

pub fn chint0(&self) -> CHINT0_R[src]

Bit 0 - Channel 0 Pending Interrupt

pub fn chint1(&self) -> CHINT1_R[src]

Bit 1 - Channel 1 Pending Interrupt

pub fn chint2(&self) -> CHINT2_R[src]

Bit 2 - Channel 2 Pending Interrupt

pub fn chint3(&self) -> CHINT3_R[src]

Bit 3 - Channel 3 Pending Interrupt

pub fn chint4(&self) -> CHINT4_R[src]

Bit 4 - Channel 4 Pending Interrupt

pub fn chint5(&self) -> CHINT5_R[src]

Bit 5 - Channel 5 Pending Interrupt

pub fn chint6(&self) -> CHINT6_R[src]

Bit 6 - Channel 6 Pending Interrupt

pub fn chint7(&self) -> CHINT7_R[src]

Bit 7 - Channel 7 Pending Interrupt

pub fn chint8(&self) -> CHINT8_R[src]

Bit 8 - Channel 8 Pending Interrupt

pub fn chint9(&self) -> CHINT9_R[src]

Bit 9 - Channel 9 Pending Interrupt

pub fn chint10(&self) -> CHINT10_R[src]

Bit 10 - Channel 10 Pending Interrupt

pub fn chint11(&self) -> CHINT11_R[src]

Bit 11 - Channel 11 Pending Interrupt

pub fn chint12(&self) -> CHINT12_R[src]

Bit 12 - Channel 12 Pending Interrupt

pub fn chint13(&self) -> CHINT13_R[src]

Bit 13 - Channel 13 Pending Interrupt

pub fn chint14(&self) -> CHINT14_R[src]

Bit 14 - Channel 14 Pending Interrupt

pub fn chint15(&self) -> CHINT15_R[src]

Bit 15 - Channel 15 Pending Interrupt

pub fn chint16(&self) -> CHINT16_R[src]

Bit 16 - Channel 16 Pending Interrupt

pub fn chint17(&self) -> CHINT17_R[src]

Bit 17 - Channel 17 Pending Interrupt

pub fn chint18(&self) -> CHINT18_R[src]

Bit 18 - Channel 18 Pending Interrupt

pub fn chint19(&self) -> CHINT19_R[src]

Bit 19 - Channel 19 Pending Interrupt

pub fn chint20(&self) -> CHINT20_R[src]

Bit 20 - Channel 20 Pending Interrupt

pub fn chint21(&self) -> CHINT21_R[src]

Bit 21 - Channel 21 Pending Interrupt

pub fn chint22(&self) -> CHINT22_R[src]

Bit 22 - Channel 22 Pending Interrupt

pub fn chint23(&self) -> CHINT23_R[src]

Bit 23 - Channel 23 Pending Interrupt

pub fn chint24(&self) -> CHINT24_R[src]

Bit 24 - Channel 24 Pending Interrupt

pub fn chint25(&self) -> CHINT25_R[src]

Bit 25 - Channel 25 Pending Interrupt

pub fn chint26(&self) -> CHINT26_R[src]

Bit 26 - Channel 26 Pending Interrupt

pub fn chint27(&self) -> CHINT27_R[src]

Bit 27 - Channel 27 Pending Interrupt

pub fn chint28(&self) -> CHINT28_R[src]

Bit 28 - Channel 28 Pending Interrupt

pub fn chint29(&self) -> CHINT29_R[src]

Bit 29 - Channel 29 Pending Interrupt

pub fn chint30(&self) -> CHINT30_R[src]

Bit 30 - Channel 30 Pending Interrupt

pub fn chint31(&self) -> CHINT31_R[src]

Bit 31 - Channel 31 Pending Interrupt

impl R<u32, Reg<u32, _BUSYCH>>[src]

pub fn busych0(&self) -> BUSYCH0_R[src]

Bit 0 - Busy Channel 0

pub fn busych1(&self) -> BUSYCH1_R[src]

Bit 1 - Busy Channel 1

pub fn busych2(&self) -> BUSYCH2_R[src]

Bit 2 - Busy Channel 2

pub fn busych3(&self) -> BUSYCH3_R[src]

Bit 3 - Busy Channel 3

pub fn busych4(&self) -> BUSYCH4_R[src]

Bit 4 - Busy Channel 4

pub fn busych5(&self) -> BUSYCH5_R[src]

Bit 5 - Busy Channel 5

pub fn busych6(&self) -> BUSYCH6_R[src]

Bit 6 - Busy Channel 6

pub fn busych7(&self) -> BUSYCH7_R[src]

Bit 7 - Busy Channel 7

pub fn busych8(&self) -> BUSYCH8_R[src]

Bit 8 - Busy Channel 8

pub fn busych9(&self) -> BUSYCH9_R[src]

Bit 9 - Busy Channel 9

pub fn busych10(&self) -> BUSYCH10_R[src]

Bit 10 - Busy Channel 10

pub fn busych11(&self) -> BUSYCH11_R[src]

Bit 11 - Busy Channel 11

pub fn busych12(&self) -> BUSYCH12_R[src]

Bit 12 - Busy Channel 12

pub fn busych13(&self) -> BUSYCH13_R[src]

Bit 13 - Busy Channel 13

pub fn busych14(&self) -> BUSYCH14_R[src]

Bit 14 - Busy Channel 14

pub fn busych15(&self) -> BUSYCH15_R[src]

Bit 15 - Busy Channel 15

pub fn busych16(&self) -> BUSYCH16_R[src]

Bit 16 - Busy Channel 16

pub fn busych17(&self) -> BUSYCH17_R[src]

Bit 17 - Busy Channel 17

pub fn busych18(&self) -> BUSYCH18_R[src]

Bit 18 - Busy Channel 18

pub fn busych19(&self) -> BUSYCH19_R[src]

Bit 19 - Busy Channel 19

pub fn busych20(&self) -> BUSYCH20_R[src]

Bit 20 - Busy Channel 20

pub fn busych21(&self) -> BUSYCH21_R[src]

Bit 21 - Busy Channel 21

pub fn busych22(&self) -> BUSYCH22_R[src]

Bit 22 - Busy Channel 22

pub fn busych23(&self) -> BUSYCH23_R[src]

Bit 23 - Busy Channel 23

pub fn busych24(&self) -> BUSYCH24_R[src]

Bit 24 - Busy Channel 24

pub fn busych25(&self) -> BUSYCH25_R[src]

Bit 25 - Busy Channel 25

pub fn busych26(&self) -> BUSYCH26_R[src]

Bit 26 - Busy Channel 26

pub fn busych27(&self) -> BUSYCH27_R[src]

Bit 27 - Busy Channel 27

pub fn busych28(&self) -> BUSYCH28_R[src]

Bit 28 - Busy Channel 28

pub fn busych29(&self) -> BUSYCH29_R[src]

Bit 29 - Busy Channel 29

pub fn busych30(&self) -> BUSYCH30_R[src]

Bit 30 - Busy Channel 30

pub fn busych31(&self) -> BUSYCH31_R[src]

Bit 31 - Busy Channel 31

impl R<u32, Reg<u32, _PENDCH>>[src]

pub fn pendch0(&self) -> PENDCH0_R[src]

Bit 0 - Pending Channel 0

pub fn pendch1(&self) -> PENDCH1_R[src]

Bit 1 - Pending Channel 1

pub fn pendch2(&self) -> PENDCH2_R[src]

Bit 2 - Pending Channel 2

pub fn pendch3(&self) -> PENDCH3_R[src]

Bit 3 - Pending Channel 3

pub fn pendch4(&self) -> PENDCH4_R[src]

Bit 4 - Pending Channel 4

pub fn pendch5(&self) -> PENDCH5_R[src]

Bit 5 - Pending Channel 5

pub fn pendch6(&self) -> PENDCH6_R[src]

Bit 6 - Pending Channel 6

pub fn pendch7(&self) -> PENDCH7_R[src]

Bit 7 - Pending Channel 7

pub fn pendch8(&self) -> PENDCH8_R[src]

Bit 8 - Pending Channel 8

pub fn pendch9(&self) -> PENDCH9_R[src]

Bit 9 - Pending Channel 9

pub fn pendch10(&self) -> PENDCH10_R[src]

Bit 10 - Pending Channel 10

pub fn pendch11(&self) -> PENDCH11_R[src]

Bit 11 - Pending Channel 11

pub fn pendch12(&self) -> PENDCH12_R[src]

Bit 12 - Pending Channel 12

pub fn pendch13(&self) -> PENDCH13_R[src]

Bit 13 - Pending Channel 13

pub fn pendch14(&self) -> PENDCH14_R[src]

Bit 14 - Pending Channel 14

pub fn pendch15(&self) -> PENDCH15_R[src]

Bit 15 - Pending Channel 15

pub fn pendch16(&self) -> PENDCH16_R[src]

Bit 16 - Pending Channel 16

pub fn pendch17(&self) -> PENDCH17_R[src]

Bit 17 - Pending Channel 17

pub fn pendch18(&self) -> PENDCH18_R[src]

Bit 18 - Pending Channel 18

pub fn pendch19(&self) -> PENDCH19_R[src]

Bit 19 - Pending Channel 19

pub fn pendch20(&self) -> PENDCH20_R[src]

Bit 20 - Pending Channel 20

pub fn pendch21(&self) -> PENDCH21_R[src]

Bit 21 - Pending Channel 21

pub fn pendch22(&self) -> PENDCH22_R[src]

Bit 22 - Pending Channel 22

pub fn pendch23(&self) -> PENDCH23_R[src]

Bit 23 - Pending Channel 23

pub fn pendch24(&self) -> PENDCH24_R[src]

Bit 24 - Pending Channel 24

pub fn pendch25(&self) -> PENDCH25_R[src]

Bit 25 - Pending Channel 25

pub fn pendch26(&self) -> PENDCH26_R[src]

Bit 26 - Pending Channel 26

pub fn pendch27(&self) -> PENDCH27_R[src]

Bit 27 - Pending Channel 27

pub fn pendch28(&self) -> PENDCH28_R[src]

Bit 28 - Pending Channel 28

pub fn pendch29(&self) -> PENDCH29_R[src]

Bit 29 - Pending Channel 29

pub fn pendch30(&self) -> PENDCH30_R[src]

Bit 30 - Pending Channel 30

pub fn pendch31(&self) -> PENDCH31_R[src]

Bit 31 - Pending Channel 31

impl R<u32, Reg<u32, _ACTIVE>>[src]

pub fn lvlex0(&self) -> LVLEX0_R[src]

Bit 0 - Level 0 Channel Trigger Request Executing

pub fn lvlex1(&self) -> LVLEX1_R[src]

Bit 1 - Level 1 Channel Trigger Request Executing

pub fn lvlex2(&self) -> LVLEX2_R[src]

Bit 2 - Level 2 Channel Trigger Request Executing

pub fn lvlex3(&self) -> LVLEX3_R[src]

Bit 3 - Level 3 Channel Trigger Request Executing

pub fn id(&self) -> ID_R[src]

Bits 8:12 - Active Channel ID

pub fn abusy(&self) -> ABUSY_R[src]

Bit 15 - Active Channel Busy

pub fn btcnt(&self) -> BTCNT_R[src]

Bits 16:31 - Active Channel Block Transfer Count

impl R<u32, Reg<u32, _BASEADDR>>[src]

pub fn baseaddr(&self) -> BASEADDR_R[src]

Bits 0:31 - Descriptor Memory Base Address

impl R<u32, Reg<u32, _WRBADDR>>[src]

pub fn wrbaddr(&self) -> WRBADDR_R[src]

Bits 0:31 - Write-Back Memory Base Address

impl R<u8, Reg<u8, _STATUSA>>[src]

pub fn done(&self) -> DONE_R[src]

Bit 0 - Done

pub fn crstext(&self) -> CRSTEXT_R[src]

Bit 1 - CPU Reset Phase Extension

pub fn berr(&self) -> BERR_R[src]

Bit 2 - Bus Error

pub fn fail(&self) -> FAIL_R[src]

Bit 3 - Failure

pub fn perr(&self) -> PERR_R[src]

Bit 4 - Protection Error

impl R<u8, Reg<u8, _STATUSB>>[src]

pub fn prot(&self) -> PROT_R[src]

Bit 0 - Protected

pub fn dbgpres(&self) -> DBGPRES_R[src]

Bit 1 - Debugger Present

pub fn dccd0(&self) -> DCCD0_R[src]

Bit 2 - Debug Communication Channel 0 Dirty

pub fn dccd1(&self) -> DCCD1_R[src]

Bit 3 - Debug Communication Channel 1 Dirty

pub fn hpe(&self) -> HPE_R[src]

Bit 4 - Hot-Plugging Enable

pub fn celck(&self) -> CELCK_R[src]

Bit 5 - Chip Erase Locked

impl R<u32, Reg<u32, _ADDR>>[src]

pub fn amod(&self) -> AMOD_R[src]

Bits 0:1 - Access Mode

pub fn addr(&self) -> ADDR_R[src]

Bits 2:31 - Address

impl R<u32, Reg<u32, _LENGTH>>[src]

pub fn length(&self) -> LENGTH_R[src]

Bits 2:31 - Length

impl R<u32, Reg<u32, _DATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data

impl R<u32, Reg<u32, _DCC>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data

impl R<u8, SERIES_A>[src]

pub fn variant(&self) -> Variant<u8, SERIES_A>[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, FAMILY_A>[src]

pub fn variant(&self) -> Variant<u8, FAMILY_A>[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, PROCESSOR_A>[src]

pub fn variant(&self) -> Variant<u8, PROCESSOR_A>[src]

Get enumerated values variant

pub fn is_cm0p(&self) -> bool[src]

Checks if the value of the field is CM0P

pub fn is_cm23(&self) -> bool[src]

Checks if the value of the field is CM23

pub fn is_cm3(&self) -> bool[src]

Checks if the value of the field is CM3

pub fn is_cm4(&self) -> bool[src]

Checks if the value of the field is CM4

pub fn is_cm4f(&self) -> bool[src]

Checks if the value of the field is CM4F

pub fn is_cm33(&self) -> bool[src]

Checks if the value of the field is CM33

impl R<u32, Reg<u32, _DID>>[src]

pub fn devsel(&self) -> DEVSEL_R[src]

Bits 0:7 - Device Select

pub fn revision(&self) -> REVISION_R[src]

Bits 8:11 - Revision Number

pub fn die(&self) -> DIE_R[src]

Bits 12:15 - Die Number

pub fn series(&self) -> SERIES_R[src]

Bits 16:21 - Series

pub fn family(&self) -> FAMILY_R[src]

Bits 23:27 - Family

pub fn processor(&self) -> PROCESSOR_R[src]

Bits 28:31 - Processor

impl R<u8, DCCDMALEVEL_A>[src]

pub fn variant(&self) -> Variant<u8, DCCDMALEVEL_A>[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u32, Reg<u32, _CFG>>[src]

pub fn lqos(&self) -> LQOS_R[src]

Bits 0:1 - Latency Quality Of Service

pub fn dccdmalevel(&self) -> DCCDMALEVEL_R[src]

Bits 2:3 - DMA Trigger Level

pub fn etbramen(&self) -> ETBRAMEN_R[src]

Bit 4 - Trace Control

impl R<u32, Reg<u32, _DCFG>>[src]

pub fn dcfg(&self) -> DCFG_R[src]

Bits 0:31 - Device Configuration

impl R<u32, Reg<u32, _ENTRY0>>[src]

pub fn epres(&self) -> EPRES_R[src]

Bit 0 - Entry Present

pub fn fmt(&self) -> FMT_R[src]

Bit 1 - Format

pub fn addoff(&self) -> ADDOFF_R[src]

Bits 12:31 - Address Offset

impl R<u32, Reg<u32, _END>>[src]

pub fn end(&self) -> END_R[src]

Bits 0:31 - End Marker

impl R<u32, Reg<u32, _MEMTYPE>>[src]

pub fn smemp(&self) -> SMEMP_R[src]

Bit 0 - System Memory Present

impl R<u32, Reg<u32, _PID4>>[src]

pub fn jepcc(&self) -> JEPCC_R[src]

Bits 0:3 - JEP-106 Continuation Code

pub fn fkbc(&self) -> FKBC_R[src]

Bits 4:7 - 4KB count

impl R<u32, Reg<u32, _PID0>>[src]

pub fn partnbl(&self) -> PARTNBL_R[src]

Bits 0:7 - Part Number Low

impl R<u32, Reg<u32, _PID1>>[src]

pub fn partnbh(&self) -> PARTNBH_R[src]

Bits 0:3 - Part Number High

pub fn jepidcl(&self) -> JEPIDCL_R[src]

Bits 4:7 - Low part of the JEP-106 Identity Code

impl R<u32, Reg<u32, _PID2>>[src]

pub fn jepidch(&self) -> JEPIDCH_R[src]

Bits 0:2 - JEP-106 Identity Code High

pub fn jepu(&self) -> JEPU_R[src]

Bit 3 - JEP-106 Identity Code is used

pub fn revision(&self) -> REVISION_R[src]

Bits 4:7 - Revision Number

impl R<u32, Reg<u32, _PID3>>[src]

pub fn cusmod(&self) -> CUSMOD_R[src]

Bits 0:3 - ARM CUSMOD

pub fn revand(&self) -> REVAND_R[src]

Bits 4:7 - Revision Number

impl R<u32, Reg<u32, _CID0>>[src]

pub fn preambleb0(&self) -> PREAMBLEB0_R[src]

Bits 0:7 - Preamble Byte 0

impl R<u32, Reg<u32, _CID1>>[src]

pub fn preamble(&self) -> PREAMBLE_R[src]

Bits 0:3 - Preamble

pub fn cclass(&self) -> CCLASS_R[src]

Bits 4:7 - Component Class

impl R<u32, Reg<u32, _CID2>>[src]

pub fn preambleb2(&self) -> PREAMBLEB2_R[src]

Bits 0:7 - Preamble Byte 2

impl R<u32, Reg<u32, _CID3>>[src]

pub fn preambleb3(&self) -> PREAMBLEB3_R[src]

Bits 0:7 - Preamble Byte 3

impl R<bool, CKSEL_A>[src]

pub fn variant(&self) -> CKSEL_A[src]

Get enumerated values variant

pub fn is_clk_gclk(&self) -> bool[src]

Checks if the value of the field is CLK_GCLK

pub fn is_clk_ulp32k(&self) -> bool[src]

Checks if the value of the field is CLK_ULP32K

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn cksel(&self) -> CKSEL_R[src]

Bit 4 - Clock Selection

impl R<u8, NMISENSE_A>[src]

pub fn variant(&self) -> Variant<u8, NMISENSE_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rise(&self) -> bool[src]

Checks if the value of the field is RISE

pub fn is_fall(&self) -> bool[src]

Checks if the value of the field is FALL

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<bool, NMIASYNCH_A>[src]

pub fn variant(&self) -> NMIASYNCH_A[src]

Get enumerated values variant

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

pub fn is_async_(&self) -> bool[src]

Checks if the value of the field is ASYNC

impl R<u8, Reg<u8, _NMICTRL>>[src]

pub fn nmisense(&self) -> NMISENSE_R[src]

Bits 0:2 - Non-Maskable Interrupt Sense Configuration

pub fn nmifilten(&self) -> NMIFILTEN_R[src]

Bit 3 - Non-Maskable Interrupt Filter Enable

pub fn nmiasynch(&self) -> NMIASYNCH_R[src]

Bit 4 - Asynchronous Edge Detection Mode

impl R<u16, Reg<u16, _NMIFLAG>>[src]

pub fn nmi(&self) -> NMI_R[src]

Bit 0 - Non-Maskable Interrupt

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Busy Status

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable Synchronization Busy Status

impl R<u32, Reg<u32, _EVCTRL>>[src]

pub fn extinteo(&self) -> EXTINTEO_R[src]

Bits 0:15 - External Interrupt Event Output Enable

impl R<u32, Reg<u32, _INTENCLR>>[src]

pub fn extint(&self) -> EXTINT_R[src]

Bits 0:15 - External Interrupt Enable

impl R<u32, Reg<u32, _INTENSET>>[src]

pub fn extint(&self) -> EXTINT_R[src]

Bits 0:15 - External Interrupt Enable

impl R<u32, Reg<u32, _INTFLAG>>[src]

pub fn extint(&self) -> EXTINT_R[src]

Bits 0:15 - External Interrupt

impl R<u16, ASYNCH_A>[src]

pub fn variant(&self) -> Variant<u16, ASYNCH_A>[src]

Get enumerated values variant

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

pub fn is_async_(&self) -> bool[src]

Checks if the value of the field is ASYNC

impl R<u32, Reg<u32, _ASYNCH>>[src]

pub fn asynch(&self) -> ASYNCH_R[src]

Bits 0:15 - Asynchronous Edge Detection Mode

impl R<u8, SENSE0_A>[src]

pub fn variant(&self) -> Variant<u8, SENSE0_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rise(&self) -> bool[src]

Checks if the value of the field is RISE

pub fn is_fall(&self) -> bool[src]

Checks if the value of the field is FALL

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u8, SENSE1_A>[src]

pub fn variant(&self) -> Variant<u8, SENSE1_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rise(&self) -> bool[src]

Checks if the value of the field is RISE

pub fn is_fall(&self) -> bool[src]

Checks if the value of the field is FALL

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u8, SENSE2_A>[src]

pub fn variant(&self) -> Variant<u8, SENSE2_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rise(&self) -> bool[src]

Checks if the value of the field is RISE

pub fn is_fall(&self) -> bool[src]

Checks if the value of the field is FALL

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u8, SENSE3_A>[src]

pub fn variant(&self) -> Variant<u8, SENSE3_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rise(&self) -> bool[src]

Checks if the value of the field is RISE

pub fn is_fall(&self) -> bool[src]

Checks if the value of the field is FALL

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u8, SENSE4_A>[src]

pub fn variant(&self) -> Variant<u8, SENSE4_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rise(&self) -> bool[src]

Checks if the value of the field is RISE

pub fn is_fall(&self) -> bool[src]

Checks if the value of the field is FALL

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u8, SENSE5_A>[src]

pub fn variant(&self) -> Variant<u8, SENSE5_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rise(&self) -> bool[src]

Checks if the value of the field is RISE

pub fn is_fall(&self) -> bool[src]

Checks if the value of the field is FALL

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u8, SENSE6_A>[src]

pub fn variant(&self) -> Variant<u8, SENSE6_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rise(&self) -> bool[src]

Checks if the value of the field is RISE

pub fn is_fall(&self) -> bool[src]

Checks if the value of the field is FALL

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u8, SENSE7_A>[src]

pub fn variant(&self) -> Variant<u8, SENSE7_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rise(&self) -> bool[src]

Checks if the value of the field is RISE

pub fn is_fall(&self) -> bool[src]

Checks if the value of the field is FALL

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _CONFIG>>[src]

pub fn sense0(&self) -> SENSE0_R[src]

Bits 0:2 - Input Sense Configuration 0

pub fn filten0(&self) -> FILTEN0_R[src]

Bit 3 - Filter Enable 0

pub fn sense1(&self) -> SENSE1_R[src]

Bits 4:6 - Input Sense Configuration 1

pub fn filten1(&self) -> FILTEN1_R[src]

Bit 7 - Filter Enable 1

pub fn sense2(&self) -> SENSE2_R[src]

Bits 8:10 - Input Sense Configuration 2

pub fn filten2(&self) -> FILTEN2_R[src]

Bit 11 - Filter Enable 2

pub fn sense3(&self) -> SENSE3_R[src]

Bits 12:14 - Input Sense Configuration 3

pub fn filten3(&self) -> FILTEN3_R[src]

Bit 15 - Filter Enable 3

pub fn sense4(&self) -> SENSE4_R[src]

Bits 16:18 - Input Sense Configuration 4

pub fn filten4(&self) -> FILTEN4_R[src]

Bit 19 - Filter Enable 4

pub fn sense5(&self) -> SENSE5_R[src]

Bits 20:22 - Input Sense Configuration 5

pub fn filten5(&self) -> FILTEN5_R[src]

Bit 23 - Filter Enable 5

pub fn sense6(&self) -> SENSE6_R[src]

Bits 24:26 - Input Sense Configuration 6

pub fn filten6(&self) -> FILTEN6_R[src]

Bit 27 - Filter Enable 6

pub fn sense7(&self) -> SENSE7_R[src]

Bits 28:30 - Input Sense Configuration 7

pub fn filten7(&self) -> FILTEN7_R[src]

Bit 31 - Filter Enable 7

impl R<u32, Reg<u32, _DEBOUNCEN>>[src]

pub fn debouncen(&self) -> DEBOUNCEN_R[src]

Bits 0:15 - Debouncer Enable

impl R<u8, PRESCALER0_A>[src]

pub fn variant(&self) -> PRESCALER0_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<bool, STATES0_A>[src]

pub fn variant(&self) -> STATES0_A[src]

Get enumerated values variant

pub fn is_lfreq3(&self) -> bool[src]

Checks if the value of the field is LFREQ3

pub fn is_lfreq7(&self) -> bool[src]

Checks if the value of the field is LFREQ7

impl R<u8, PRESCALER1_A>[src]

pub fn variant(&self) -> PRESCALER1_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<bool, STATES1_A>[src]

pub fn variant(&self) -> STATES1_A[src]

Get enumerated values variant

pub fn is_lfreq3(&self) -> bool[src]

Checks if the value of the field is LFREQ3

pub fn is_lfreq7(&self) -> bool[src]

Checks if the value of the field is LFREQ7

impl R<bool, TICKON_A>[src]

pub fn variant(&self) -> TICKON_A[src]

Get enumerated values variant

pub fn is_clk_gclk_eic(&self) -> bool[src]

Checks if the value of the field is CLK_GCLK_EIC

pub fn is_clk_lfreq(&self) -> bool[src]

Checks if the value of the field is CLK_LFREQ

impl R<u32, Reg<u32, _DPRESCALER>>[src]

pub fn prescaler0(&self) -> PRESCALER0_R[src]

Bits 0:2 - Debouncer Prescaler

pub fn states0(&self) -> STATES0_R[src]

Bit 3 - Debouncer number of states

pub fn prescaler1(&self) -> PRESCALER1_R[src]

Bits 4:6 - Debouncer Prescaler

pub fn states1(&self) -> STATES1_R[src]

Bit 7 - Debouncer number of states

pub fn tickon(&self) -> TICKON_R[src]

Bit 16 - Pin Sampler frequency selection

impl R<u32, Reg<u32, _PINSTATE>>[src]

pub fn pinstate(&self) -> PINSTATE_R[src]

Bits 0:15 - Pin State

impl R<u8, PATH_A>[src]

pub fn variant(&self) -> Variant<u8, PATH_A>[src]

Get enumerated values variant

pub fn is_synchronous(&self) -> bool[src]

Checks if the value of the field is SYNCHRONOUS

pub fn is_resynchronized(&self) -> bool[src]

Checks if the value of the field is RESYNCHRONIZED

pub fn is_asynchronous(&self) -> bool[src]

Checks if the value of the field is ASYNCHRONOUS

impl R<u8, EDGSEL_A>[src]

pub fn variant(&self) -> EDGSEL_A[src]

Get enumerated values variant

pub fn is_no_evt_output(&self) -> bool[src]

Checks if the value of the field is NO_EVT_OUTPUT

pub fn is_rising_edge(&self) -> bool[src]

Checks if the value of the field is RISING_EDGE

pub fn is_falling_edge(&self) -> bool[src]

Checks if the value of the field is FALLING_EDGE

pub fn is_both_edges(&self) -> bool[src]

Checks if the value of the field is BOTH_EDGES

impl R<u32, Reg<u32, _CHANNEL>>[src]

pub fn evgen(&self) -> EVGEN_R[src]

Bits 0:6 - Event Generator Selection

pub fn path(&self) -> PATH_R[src]

Bits 8:9 - Path Selection

pub fn edgsel(&self) -> EDGSEL_R[src]

Bits 10:11 - Edge Detection Selection

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 14 - Run in standby

pub fn ondemand(&self) -> ONDEMAND_R[src]

Bit 15 - Generic Clock On Demand

impl R<u8, Reg<u8, _CHINTENCLR>>[src]

pub fn ovr(&self) -> OVR_R[src]

Bit 0 - Channel Overrun Interrupt Disable

pub fn evd(&self) -> EVD_R[src]

Bit 1 - Channel Event Detected Interrupt Disable

impl R<u8, Reg<u8, _CHINTENSET>>[src]

pub fn ovr(&self) -> OVR_R[src]

Bit 0 - Channel Overrun Interrupt Enable

pub fn evd(&self) -> EVD_R[src]

Bit 1 - Channel Event Detected Interrupt Enable

impl R<u8, Reg<u8, _CHINTFLAG>>[src]

pub fn ovr(&self) -> OVR_R[src]

Bit 0 - Channel Overrun

pub fn evd(&self) -> EVD_R[src]

Bit 1 - Channel Event Detected

impl R<u8, Reg<u8, _CHSTATUS>>[src]

pub fn rdyusr(&self) -> RDYUSR_R[src]

Bit 0 - Ready User

pub fn busych(&self) -> BUSYCH_R[src]

Bit 1 - Busy Channel

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

impl R<u8, Reg<u8, _PRICTRL>>[src]

pub fn pri(&self) -> PRI_R[src]

Bits 0:3 - Channel Priority Number

pub fn rren(&self) -> RREN_R[src]

Bit 7 - Round-Robin Scheduling Enable

impl R<u16, Reg<u16, _INTPEND>>[src]

pub fn id(&self) -> ID_R[src]

Bits 0:3 - Channel ID

pub fn ovr(&self) -> OVR_R[src]

Bit 8 - Channel Overrun

pub fn evd(&self) -> EVD_R[src]

Bit 9 - Channel Event Detected

pub fn ready(&self) -> READY_R[src]

Bit 14 - Ready

pub fn busy(&self) -> BUSY_R[src]

Bit 15 - Busy

impl R<u32, Reg<u32, _INTSTATUS>>[src]

pub fn chint0(&self) -> CHINT0_R[src]

Bit 0 - Channel 0 Pending Interrupt

pub fn chint1(&self) -> CHINT1_R[src]

Bit 1 - Channel 1 Pending Interrupt

pub fn chint2(&self) -> CHINT2_R[src]

Bit 2 - Channel 2 Pending Interrupt

pub fn chint3(&self) -> CHINT3_R[src]

Bit 3 - Channel 3 Pending Interrupt

pub fn chint4(&self) -> CHINT4_R[src]

Bit 4 - Channel 4 Pending Interrupt

pub fn chint5(&self) -> CHINT5_R[src]

Bit 5 - Channel 5 Pending Interrupt

pub fn chint6(&self) -> CHINT6_R[src]

Bit 6 - Channel 6 Pending Interrupt

pub fn chint7(&self) -> CHINT7_R[src]

Bit 7 - Channel 7 Pending Interrupt

pub fn chint8(&self) -> CHINT8_R[src]

Bit 8 - Channel 8 Pending Interrupt

pub fn chint9(&self) -> CHINT9_R[src]

Bit 9 - Channel 9 Pending Interrupt

pub fn chint10(&self) -> CHINT10_R[src]

Bit 10 - Channel 10 Pending Interrupt

pub fn chint11(&self) -> CHINT11_R[src]

Bit 11 - Channel 11 Pending Interrupt

impl R<u32, Reg<u32, _BUSYCH>>[src]

pub fn busych0(&self) -> BUSYCH0_R[src]

Bit 0 - Busy Channel 0

pub fn busych1(&self) -> BUSYCH1_R[src]

Bit 1 - Busy Channel 1

pub fn busych2(&self) -> BUSYCH2_R[src]

Bit 2 - Busy Channel 2

pub fn busych3(&self) -> BUSYCH3_R[src]

Bit 3 - Busy Channel 3

pub fn busych4(&self) -> BUSYCH4_R[src]

Bit 4 - Busy Channel 4

pub fn busych5(&self) -> BUSYCH5_R[src]

Bit 5 - Busy Channel 5

pub fn busych6(&self) -> BUSYCH6_R[src]

Bit 6 - Busy Channel 6

pub fn busych7(&self) -> BUSYCH7_R[src]

Bit 7 - Busy Channel 7

pub fn busych8(&self) -> BUSYCH8_R[src]

Bit 8 - Busy Channel 8

pub fn busych9(&self) -> BUSYCH9_R[src]

Bit 9 - Busy Channel 9

pub fn busych10(&self) -> BUSYCH10_R[src]

Bit 10 - Busy Channel 10

pub fn busych11(&self) -> BUSYCH11_R[src]

Bit 11 - Busy Channel 11

impl R<u32, Reg<u32, _READYUSR>>[src]

pub fn readyusr0(&self) -> READYUSR0_R[src]

Bit 0 - Ready User for Channel 0

pub fn readyusr1(&self) -> READYUSR1_R[src]

Bit 1 - Ready User for Channel 1

pub fn readyusr2(&self) -> READYUSR2_R[src]

Bit 2 - Ready User for Channel 2

pub fn readyusr3(&self) -> READYUSR3_R[src]

Bit 3 - Ready User for Channel 3

pub fn readyusr4(&self) -> READYUSR4_R[src]

Bit 4 - Ready User for Channel 4

pub fn readyusr5(&self) -> READYUSR5_R[src]

Bit 5 - Ready User for Channel 5

pub fn readyusr6(&self) -> READYUSR6_R[src]

Bit 6 - Ready User for Channel 6

pub fn readyusr7(&self) -> READYUSR7_R[src]

Bit 7 - Ready User for Channel 7

pub fn readyusr8(&self) -> READYUSR8_R[src]

Bit 8 - Ready User for Channel 8

pub fn readyusr9(&self) -> READYUSR9_R[src]

Bit 9 - Ready User for Channel 9

pub fn readyusr10(&self) -> READYUSR10_R[src]

Bit 10 - Ready User for Channel 10

pub fn readyusr11(&self) -> READYUSR11_R[src]

Bit 11 - Ready User for Channel 11

impl R<u32, Reg<u32, _USER>>[src]

pub fn channel(&self) -> CHANNEL_R[src]

Bits 0:5 - Channel Event Selection

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

impl R<u16, Reg<u16, _CFGA>>[src]

pub fn refnum(&self) -> REFNUM_R[src]

Bits 0:7 - Number of Reference Clock Cycles

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn done(&self) -> DONE_R[src]

Bit 0 - Measurement Done Interrupt Enable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn done(&self) -> DONE_R[src]

Bit 0 - Measurement Done Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn done(&self) -> DONE_R[src]

Bit 0 - Measurement Done

impl R<u8, Reg<u8, _STATUS>>[src]

pub fn busy(&self) -> BUSY_R[src]

Bit 0 - FREQM Status

pub fn ovf(&self) -> OVF_R[src]

Bit 1 - Sticky Count Value Overflow

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

impl R<u32, Reg<u32, _VALUE>>[src]

pub fn value(&self) -> VALUE_R[src]

Bits 0:23 - Measurement Value

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

impl R<u16, GENCTRL_A>[src]

pub fn variant(&self) -> Variant<u16, GENCTRL_A>[src]

Get enumerated values variant

pub fn is_gclk0(&self) -> bool[src]

Checks if the value of the field is GCLK0

pub fn is_gclk1(&self) -> bool[src]

Checks if the value of the field is GCLK1

pub fn is_gclk2(&self) -> bool[src]

Checks if the value of the field is GCLK2

pub fn is_gclk3(&self) -> bool[src]

Checks if the value of the field is GCLK3

pub fn is_gclk4(&self) -> bool[src]

Checks if the value of the field is GCLK4

pub fn is_gclk5(&self) -> bool[src]

Checks if the value of the field is GCLK5

pub fn is_gclk6(&self) -> bool[src]

Checks if the value of the field is GCLK6

pub fn is_gclk7(&self) -> bool[src]

Checks if the value of the field is GCLK7

pub fn is_gclk8(&self) -> bool[src]

Checks if the value of the field is GCLK8

pub fn is_gclk9(&self) -> bool[src]

Checks if the value of the field is GCLK9

pub fn is_gclk10(&self) -> bool[src]

Checks if the value of the field is GCLK10

pub fn is_gclk11(&self) -> bool[src]

Checks if the value of the field is GCLK11

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchroniation Busy bit

pub fn genctrl(&self) -> GENCTRL_R[src]

Bits 2:13 - Generic Clock Generator Control n Synchronization Busy bits

impl R<u8, SRC_A>[src]

pub fn variant(&self) -> Variant<u8, SRC_A>[src]

Get enumerated values variant

pub fn is_xosc0(&self) -> bool[src]

Checks if the value of the field is XOSC0

pub fn is_xosc1(&self) -> bool[src]

Checks if the value of the field is XOSC1

pub fn is_gclkin(&self) -> bool[src]

Checks if the value of the field is GCLKIN

pub fn is_gclkgen1(&self) -> bool[src]

Checks if the value of the field is GCLKGEN1

pub fn is_osculp32k(&self) -> bool[src]

Checks if the value of the field is OSCULP32K

pub fn is_xosc32k(&self) -> bool[src]

Checks if the value of the field is XOSC32K

pub fn is_dfll(&self) -> bool[src]

Checks if the value of the field is DFLL

pub fn is_dpll0(&self) -> bool[src]

Checks if the value of the field is DPLL0

pub fn is_dpll1(&self) -> bool[src]

Checks if the value of the field is DPLL1

impl R<bool, DIVSEL_A>[src]

pub fn variant(&self) -> DIVSEL_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

impl R<u32, Reg<u32, _GENCTRL>>[src]

pub fn src(&self) -> SRC_R[src]

Bits 0:3 - Source Select

pub fn genen(&self) -> GENEN_R[src]

Bit 8 - Generic Clock Generator Enable

pub fn idc(&self) -> IDC_R[src]

Bit 9 - Improve Duty Cycle

pub fn oov(&self) -> OOV_R[src]

Bit 10 - Output Off Value

pub fn oe(&self) -> OE_R[src]

Bit 11 - Output Enable

pub fn divsel(&self) -> DIVSEL_R[src]

Bit 12 - Divide Selection

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 13 - Run in Standby

pub fn div(&self) -> DIV_R[src]

Bits 16:31 - Division Factor

impl R<u8, GEN_A>[src]

pub fn variant(&self) -> Variant<u8, GEN_A>[src]

Get enumerated values variant

pub fn is_gclk0(&self) -> bool[src]

Checks if the value of the field is GCLK0

pub fn is_gclk1(&self) -> bool[src]

Checks if the value of the field is GCLK1

pub fn is_gclk2(&self) -> bool[src]

Checks if the value of the field is GCLK2

pub fn is_gclk3(&self) -> bool[src]

Checks if the value of the field is GCLK3

pub fn is_gclk4(&self) -> bool[src]

Checks if the value of the field is GCLK4

pub fn is_gclk5(&self) -> bool[src]

Checks if the value of the field is GCLK5

pub fn is_gclk6(&self) -> bool[src]

Checks if the value of the field is GCLK6

pub fn is_gclk7(&self) -> bool[src]

Checks if the value of the field is GCLK7

pub fn is_gclk8(&self) -> bool[src]

Checks if the value of the field is GCLK8

pub fn is_gclk9(&self) -> bool[src]

Checks if the value of the field is GCLK9

pub fn is_gclk10(&self) -> bool[src]

Checks if the value of the field is GCLK10

pub fn is_gclk11(&self) -> bool[src]

Checks if the value of the field is GCLK11

impl R<u32, Reg<u32, _PCHCTRL>>[src]

pub fn gen(&self) -> GEN_R[src]

Bits 0:3 - Generic Clock Generator

pub fn chen(&self) -> CHEN_R[src]

Bit 6 - Channel Enable

pub fn wrtlock(&self) -> WRTLOCK_R[src]

Bit 7 - Write Lock

impl R<u32, Reg<u32, _SAB>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Specific Address 1

impl R<u32, Reg<u32, _SAT>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:15 - Specific Address 1

impl R<u32, Reg<u32, _NCR>>[src]

pub fn lbl(&self) -> LBL_R[src]

Bit 1 - Loop Back Local

pub fn rxen(&self) -> RXEN_R[src]

Bit 2 - Receive Enable

pub fn txen(&self) -> TXEN_R[src]

Bit 3 - Transmit Enable

pub fn mpe(&self) -> MPE_R[src]

Bit 4 - Management Port Enable

pub fn clrstat(&self) -> CLRSTAT_R[src]

Bit 5 - Clear Statistics Registers

pub fn incstat(&self) -> INCSTAT_R[src]

Bit 6 - Increment Statistics Registers

pub fn westat(&self) -> WESTAT_R[src]

Bit 7 - Write Enable for Statistics Registers

pub fn bp(&self) -> BP_R[src]

Bit 8 - Back pressure

pub fn tstart(&self) -> TSTART_R[src]

Bit 9 - Start Transmission

pub fn thalt(&self) -> THALT_R[src]

Bit 10 - Transmit Halt

pub fn txpf(&self) -> TXPF_R[src]

Bit 11 - Transmit Pause Frame

pub fn txzqpf(&self) -> TXZQPF_R[src]

Bit 12 - Transmit Zero Quantum Pause Frame

pub fn srtsm(&self) -> SRTSM_R[src]

Bit 15 - Store Receive Time Stamp to Memory

pub fn enpbpr(&self) -> ENPBPR_R[src]

Bit 16 - Enable PFC Priority-based Pause Reception

pub fn txpbpf(&self) -> TXPBPF_R[src]

Bit 17 - Transmit PFC Priority-based Pause Frame

pub fn fnp(&self) -> FNP_R[src]

Bit 18 - Flush Next Packet

pub fn lpi(&self) -> LPI_R[src]

Bit 19 - Low Power Idle Enable

impl R<u32, Reg<u32, _NCFGR>>[src]

pub fn spd(&self) -> SPD_R[src]

Bit 0 - Speed

pub fn fd(&self) -> FD_R[src]

Bit 1 - Full Duplex

pub fn dnvlan(&self) -> DNVLAN_R[src]

Bit 2 - Discard Non-VLAN FRAMES

pub fn jframe(&self) -> JFRAME_R[src]

Bit 3 - Jumbo Frame Size

pub fn caf(&self) -> CAF_R[src]

Bit 4 - Copy All Frames

pub fn nbc(&self) -> NBC_R[src]

Bit 5 - No Broadcast

pub fn mtihen(&self) -> MTIHEN_R[src]

Bit 6 - Multicast Hash Enable

pub fn unihen(&self) -> UNIHEN_R[src]

Bit 7 - Unicast Hash Enable

pub fn maxfs(&self) -> MAXFS_R[src]

Bit 8 - 1536 Maximum Frame Size

pub fn rty(&self) -> RTY_R[src]

Bit 12 - Retry Test

pub fn pen(&self) -> PEN_R[src]

Bit 13 - Pause Enable

pub fn rxbufo(&self) -> RXBUFO_R[src]

Bits 14:15 - Receive Buffer Offset

pub fn lferd(&self) -> LFERD_R[src]

Bit 16 - Length Field Error Frame Discard

pub fn rfcs(&self) -> RFCS_R[src]

Bit 17 - Remove FCS

pub fn clk(&self) -> CLK_R[src]

Bits 18:20 - MDC CLock Division

pub fn dbw(&self) -> DBW_R[src]

Bits 21:22 - Data Bus Width

pub fn dcpf(&self) -> DCPF_R[src]

Bit 23 - Disable Copy of Pause Frames

pub fn rxcoen(&self) -> RXCOEN_R[src]

Bit 24 - Receive Checksum Offload Enable

pub fn efrhd(&self) -> EFRHD_R[src]

Bit 25 - Enable Frames Received in Half Duplex

pub fn irxfcs(&self) -> IRXFCS_R[src]

Bit 26 - Ignore RX FCS

pub fn ipgsen(&self) -> IPGSEN_R[src]

Bit 28 - IP Stretch Enable

pub fn rxbp(&self) -> RXBP_R[src]

Bit 29 - Receive Bad Preamble

pub fn irxer(&self) -> IRXER_R[src]

Bit 30 - Ignore IPG GRXER

impl R<u32, Reg<u32, _NSR>>[src]

pub fn mdio(&self) -> MDIO_R[src]

Bit 1 - MDIO Input Status

pub fn idle(&self) -> IDLE_R[src]

Bit 2 - PHY Management Logic Idle

impl R<u32, Reg<u32, _UR>>[src]

pub fn mii(&self) -> MII_R[src]

Bit 0 - MII Mode

impl R<u32, Reg<u32, _DCFGR>>[src]

pub fn fbldo(&self) -> FBLDO_R[src]

Bits 0:4 - Fixed Burst Length for DMA Data Operations:

pub fn esma(&self) -> ESMA_R[src]

Bit 6 - Endian Swap Mode Enable for Management Descriptor Accesses

pub fn espa(&self) -> ESPA_R[src]

Bit 7 - Endian Swap Mode Enable for Packet Data Accesses

pub fn rxbms(&self) -> RXBMS_R[src]

Bits 8:9 - Receiver Packet Buffer Memory Size Select

pub fn txpbms(&self) -> TXPBMS_R[src]

Bit 10 - Transmitter Packet Buffer Memory Size Select

pub fn txcoen(&self) -> TXCOEN_R[src]

Bit 11 - Transmitter Checksum Generation Offload Enable

pub fn drbs(&self) -> DRBS_R[src]

Bits 16:23 - DMA Receive Buffer Size

pub fn ddrp(&self) -> DDRP_R[src]

Bit 24 - DMA Discard Receive Packets

impl R<u32, Reg<u32, _TSR>>[src]

pub fn ubr(&self) -> UBR_R[src]

Bit 0 - Used Bit Read

pub fn col(&self) -> COL_R[src]

Bit 1 - Collision Occurred

pub fn rle(&self) -> RLE_R[src]

Bit 2 - Retry Limit Exceeded

pub fn txgo(&self) -> TXGO_R[src]

Bit 3 - Transmit Go

pub fn tfc(&self) -> TFC_R[src]

Bit 4 - Transmit Frame Corruption Due to AHB Error

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 5 - Transmit Complete

pub fn und(&self) -> UND_R[src]

Bit 6 - Transmit Underrun

pub fn hresp(&self) -> HRESP_R[src]

Bit 8 - HRESP Not OK

impl R<u32, Reg<u32, _RBQB>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 2:31 - Receive Buffer Queue Base Address

impl R<u32, Reg<u32, _TBQB>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 2:31 - Transmit Buffer Queue Base Address

impl R<u32, Reg<u32, _RSR>>[src]

pub fn bna(&self) -> BNA_R[src]

Bit 0 - Buffer Not Available

pub fn rec(&self) -> REC_R[src]

Bit 1 - Frame Received

pub fn rxovr(&self) -> RXOVR_R[src]

Bit 2 - Receive Overrun

pub fn hno(&self) -> HNO_R[src]

Bit 3 - HRESP Not OK

impl R<u32, Reg<u32, _ISR>>[src]

pub fn mfs(&self) -> MFS_R[src]

Bit 0 - Management Frame Sent

pub fn rcomp(&self) -> RCOMP_R[src]

Bit 1 - Receive Complete

pub fn rxubr(&self) -> RXUBR_R[src]

Bit 2 - RX Used Bit Read

pub fn txubr(&self) -> TXUBR_R[src]

Bit 3 - TX Used Bit Read

pub fn tur(&self) -> TUR_R[src]

Bit 4 - Transmit Underrun

pub fn rlex(&self) -> RLEX_R[src]

Bit 5 - Retry Limit Exceeded

pub fn tfc(&self) -> TFC_R[src]

Bit 6 - Transmit Frame Corruption Due to AHB Error

pub fn tcomp(&self) -> TCOMP_R[src]

Bit 7 - Transmit Complete

pub fn rovr(&self) -> ROVR_R[src]

Bit 10 - Receive Overrun

pub fn hresp(&self) -> HRESP_R[src]

Bit 11 - HRESP Not OK

pub fn pfnz(&self) -> PFNZ_R[src]

Bit 12 - Pause Frame with Non-zero Pause Quantum Received

pub fn ptz(&self) -> PTZ_R[src]

Bit 13 - Pause Time Zero

pub fn pftr(&self) -> PFTR_R[src]

Bit 14 - Pause Frame Transmitted

pub fn drqfr(&self) -> DRQFR_R[src]

Bit 18 - PTP Delay Request Frame Received

pub fn sfr(&self) -> SFR_R[src]

Bit 19 - PTP Sync Frame Received

pub fn drqft(&self) -> DRQFT_R[src]

Bit 20 - PTP Delay Request Frame Transmitted

pub fn sft(&self) -> SFT_R[src]

Bit 21 - PTP Sync Frame Transmitted

pub fn pdrqfr(&self) -> PDRQFR_R[src]

Bit 22 - PDelay Request Frame Received

pub fn pdrsfr(&self) -> PDRSFR_R[src]

Bit 23 - PDelay Response Frame Received

pub fn pdrqft(&self) -> PDRQFT_R[src]

Bit 24 - PDelay Request Frame Transmitted

pub fn pdrsft(&self) -> PDRSFT_R[src]

Bit 25 - PDelay Response Frame Transmitted

pub fn sri(&self) -> SRI_R[src]

Bit 26 - TSU Seconds Register Increment

pub fn rxlpisbc(&self) -> RXLPISBC_R[src]

Bit 27 - Enable RX LPI Indication

pub fn wol(&self) -> WOL_R[src]

Bit 28 - Wake On LAN

pub fn tsucmp(&self) -> TSUCMP_R[src]

Bit 29 - Tsu timer comparison

impl R<u32, Reg<u32, _IMR>>[src]

pub fn mfs(&self) -> MFS_R[src]

Bit 0 - Management Frame Sent

pub fn rcomp(&self) -> RCOMP_R[src]

Bit 1 - Receive Complete

pub fn rxubr(&self) -> RXUBR_R[src]

Bit 2 - RX Used Bit Read

pub fn txubr(&self) -> TXUBR_R[src]

Bit 3 - TX Used Bit Read

pub fn tur(&self) -> TUR_R[src]

Bit 4 - Transmit Underrun

pub fn rlex(&self) -> RLEX_R[src]

Bit 5 - Retry Limit Exceeded

pub fn tfc(&self) -> TFC_R[src]

Bit 6 - Transmit Frame Corruption Due to AHB Error

pub fn tcomp(&self) -> TCOMP_R[src]

Bit 7 - Transmit Complete

pub fn rovr(&self) -> ROVR_R[src]

Bit 10 - Receive Overrun

pub fn hresp(&self) -> HRESP_R[src]

Bit 11 - HRESP Not OK

pub fn pfnz(&self) -> PFNZ_R[src]

Bit 12 - Pause Frame with Non-zero Pause Quantum Received

pub fn ptz(&self) -> PTZ_R[src]

Bit 13 - Pause Time Zero

pub fn pftr(&self) -> PFTR_R[src]

Bit 14 - Pause Frame Transmitted

pub fn exint(&self) -> EXINT_R[src]

Bit 15 - External Interrupt

pub fn drqfr(&self) -> DRQFR_R[src]

Bit 18 - PTP Delay Request Frame Received

pub fn sfr(&self) -> SFR_R[src]

Bit 19 - PTP Sync Frame Received

pub fn drqft(&self) -> DRQFT_R[src]

Bit 20 - PTP Delay Request Frame Transmitted

pub fn sft(&self) -> SFT_R[src]

Bit 21 - PTP Sync Frame Transmitted

pub fn pdrqfr(&self) -> PDRQFR_R[src]

Bit 22 - PDelay Request Frame Received

pub fn pdrsfr(&self) -> PDRSFR_R[src]

Bit 23 - PDelay Response Frame Received

pub fn pdrqft(&self) -> PDRQFT_R[src]

Bit 24 - PDelay Request Frame Transmitted

pub fn pdrsft(&self) -> PDRSFT_R[src]

Bit 25 - PDelay Response Frame Transmitted

pub fn sri(&self) -> SRI_R[src]

Bit 26 - TSU Seconds Register Increment

pub fn rxlpisbc(&self) -> RXLPISBC_R[src]

Bit 27 - Enable RX LPI Indication

pub fn wol(&self) -> WOL_R[src]

Bit 28 - Wake On Lan

pub fn tsucmp(&self) -> TSUCMP_R[src]

Bit 29 - Tsu timer comparison

impl R<u32, Reg<u32, _MAN>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:15 - PHY Data

pub fn wtn(&self) -> WTN_R[src]

Bits 16:17 - Write Ten

pub fn rega(&self) -> REGA_R[src]

Bits 18:22 - Register Address

pub fn phya(&self) -> PHYA_R[src]

Bits 23:27 - PHY Address

pub fn op(&self) -> OP_R[src]

Bits 28:29 - Operation

pub fn cltto(&self) -> CLTTO_R[src]

Bit 30 - Clause 22 Operation

pub fn wzo(&self) -> WZO_R[src]

Bit 31 - Write ZERO

impl R<u32, Reg<u32, _RPQ>>[src]

pub fn rpq(&self) -> RPQ_R[src]

Bits 0:15 - Received Pause Quantum

impl R<u32, Reg<u32, _TPQ>>[src]

pub fn tpq(&self) -> TPQ_R[src]

Bits 0:15 - Transmit Pause Quantum

impl R<u32, Reg<u32, _TPSF>>[src]

pub fn tpb1adr(&self) -> TPB1ADR_R[src]

Bits 0:9 - TX packet buffer address

pub fn entxp(&self) -> ENTXP_R[src]

Bit 31 - Enable TX partial store and forward operation

impl R<u32, Reg<u32, _RPSF>>[src]

pub fn rpb1adr(&self) -> RPB1ADR_R[src]

Bits 0:9 - RX packet buffer address

pub fn enrxp(&self) -> ENRXP_R[src]

Bit 31 - Enable RX partial store and forward operation

impl R<u32, Reg<u32, _RJFML>>[src]

pub fn fml(&self) -> FML_R[src]

Bits 0:13 - Frame Max Length

impl R<u32, Reg<u32, _HRB>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Hash Address

impl R<u32, Reg<u32, _HRT>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Hash Address

impl R<u32, Reg<u32, _TIDM>>[src]

pub fn tid(&self) -> TID_R[src]

Bits 0:15 - Type ID Match n

pub fn enid(&self) -> ENID_R[src]

Bit 31 - Enable Copying of TID n Matched Frames

impl R<u32, Reg<u32, _WOL>>[src]

pub fn ip(&self) -> IP_R[src]

Bits 0:15 - IP address

pub fn mag(&self) -> MAG_R[src]

Bit 16 - Event enable

pub fn arp(&self) -> ARP_R[src]

Bit 17 - LAN ARP req

pub fn sa1(&self) -> SA1_R[src]

Bit 18 - WOL specific address reg 1

pub fn mti(&self) -> MTI_R[src]

Bit 19 - WOL LAN multicast

impl R<u32, Reg<u32, _IPGS>>[src]

pub fn fl(&self) -> FL_R[src]

Bits 0:15 - Frame Length

impl R<u32, Reg<u32, _SVLAN>>[src]

pub fn vlan_type(&self) -> VLAN_TYPE_R[src]

Bits 0:15 - User Defined VLAN_TYPE Field

pub fn esvlan(&self) -> ESVLAN_R[src]

Bit 31 - Enable Stacked VLAN Processing Mode

impl R<u32, Reg<u32, _TPFCP>>[src]

pub fn pev(&self) -> PEV_R[src]

Bits 0:7 - Priority Enable Vector

pub fn pq(&self) -> PQ_R[src]

Bits 8:15 - Pause Quantum

impl R<u32, Reg<u32, _SAMB1>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Specific Address 1 Mask

impl R<u32, Reg<u32, _SAMT1>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:15 - Specific Address 1 Mask

impl R<u32, Reg<u32, _NSC>>[src]

pub fn nanosec(&self) -> NANOSEC_R[src]

Bits 0:20 - 1588 Timer Nanosecond comparison value

impl R<u32, Reg<u32, _SCL>>[src]

pub fn sec(&self) -> SEC_R[src]

Bits 0:31 - 1588 Timer Second comparison value

impl R<u32, Reg<u32, _SCH>>[src]

pub fn sec(&self) -> SEC_R[src]

Bits 0:15 - 1588 Timer Second comparison value

impl R<u32, Reg<u32, _EFTSH>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:15 - Register Update

impl R<u32, Reg<u32, _EFRSH>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:15 - Register Update

impl R<u32, Reg<u32, _PEFTSH>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:15 - Register Update

impl R<u32, Reg<u32, _PEFRSH>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:15 - Register Update

impl R<u32, Reg<u32, _OTLO>>[src]

pub fn txo(&self) -> TXO_R[src]

Bits 0:31 - Transmitted Octets

impl R<u32, Reg<u32, _OTHI>>[src]

pub fn txo(&self) -> TXO_R[src]

Bits 0:15 - Transmitted Octets

impl R<u32, Reg<u32, _FT>>[src]

pub fn ftx(&self) -> FTX_R[src]

Bits 0:31 - Frames Transmitted without Error

impl R<u32, Reg<u32, _BCFT>>[src]

pub fn bftx(&self) -> BFTX_R[src]

Bits 0:31 - Broadcast Frames Transmitted without Error

impl R<u32, Reg<u32, _MFT>>[src]

pub fn mftx(&self) -> MFTX_R[src]

Bits 0:31 - Multicast Frames Transmitted without Error

impl R<u32, Reg<u32, _PFT>>[src]

pub fn pftx(&self) -> PFTX_R[src]

Bits 0:15 - Pause Frames Transmitted Register

impl R<u32, Reg<u32, _BFT64>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 64 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TBFT127>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 65 to 127 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TBFT255>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 128 to 255 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TBFT511>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 256 to 511 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TBFT1023>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 512 to 1023 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TBFT1518>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 1024 to 1518 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _GTBFT1518>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - Greater than 1518 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TUR>>[src]

pub fn txunr(&self) -> TXUNR_R[src]

Bits 0:9 - Transmit Underruns

impl R<u32, Reg<u32, _SCF>>[src]

pub fn scol(&self) -> SCOL_R[src]

Bits 0:17 - Single Collision

impl R<u32, Reg<u32, _MCF>>[src]

pub fn mcol(&self) -> MCOL_R[src]

Bits 0:17 - Multiple Collision

impl R<u32, Reg<u32, _EC>>[src]

pub fn xcol(&self) -> XCOL_R[src]

Bits 0:9 - Excessive Collisions

impl R<u32, Reg<u32, _LC>>[src]

pub fn lcol(&self) -> LCOL_R[src]

Bits 0:9 - Late Collisions

impl R<u32, Reg<u32, _DTF>>[src]

pub fn deft(&self) -> DEFT_R[src]

Bits 0:17 - Deferred Transmission

impl R<u32, Reg<u32, _CSE>>[src]

pub fn csr(&self) -> CSR_R[src]

Bits 0:9 - Carrier Sense Error

impl R<u32, Reg<u32, _ORLO>>[src]

pub fn rxo(&self) -> RXO_R[src]

Bits 0:31 - Received Octets

impl R<u32, Reg<u32, _ORHI>>[src]

pub fn rxo(&self) -> RXO_R[src]

Bits 0:15 - Received Octets

impl R<u32, Reg<u32, _FR>>[src]

pub fn frx(&self) -> FRX_R[src]

Bits 0:31 - Frames Received without Error

impl R<u32, Reg<u32, _BCFR>>[src]

pub fn bfrx(&self) -> BFRX_R[src]

Bits 0:31 - Broadcast Frames Received without Error

impl R<u32, Reg<u32, _MFR>>[src]

pub fn mfrx(&self) -> MFRX_R[src]

Bits 0:31 - Multicast Frames Received without Error

impl R<u32, Reg<u32, _PFR>>[src]

pub fn pfrx(&self) -> PFRX_R[src]

Bits 0:15 - Pause Frames Received Register

impl R<u32, Reg<u32, _BFR64>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 64 Byte Frames Received without Error

impl R<u32, Reg<u32, _TBFR127>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 65 to 127 Byte Frames Received without Error

impl R<u32, Reg<u32, _TBFR255>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 128 to 255 Byte Frames Received without Error

impl R<u32, Reg<u32, _TBFR511>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 256 to 511 Byte Frames Received without Error

impl R<u32, Reg<u32, _TBFR1023>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 512 to 1023 Byte Frames Received without Error

impl R<u32, Reg<u32, _TBFR1518>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 1024 to 1518 Byte Frames Received without Error

impl R<u32, Reg<u32, _TMXBFR>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 1519 to Maximum Byte Frames Received without Error

impl R<u32, Reg<u32, _UFR>>[src]

pub fn ufrx(&self) -> UFRX_R[src]

Bits 0:9 - Undersize Frames Received

impl R<u32, Reg<u32, _OFR>>[src]

pub fn ofrx(&self) -> OFRX_R[src]

Bits 0:9 - Oversized Frames Received

impl R<u32, Reg<u32, _JR>>[src]

pub fn jrx(&self) -> JRX_R[src]

Bits 0:9 - Jabbers Received

impl R<u32, Reg<u32, _FCSE>>[src]

pub fn fckr(&self) -> FCKR_R[src]

Bits 0:9 - Frame Check Sequence Errors

impl R<u32, Reg<u32, _LFFE>>[src]

pub fn lfer(&self) -> LFER_R[src]

Bits 0:9 - Length Field Frame Errors

impl R<u32, Reg<u32, _RSE>>[src]

pub fn rxse(&self) -> RXSE_R[src]

Bits 0:9 - Receive Symbol Errors

impl R<u32, Reg<u32, _AE>>[src]

pub fn aer(&self) -> AER_R[src]

Bits 0:9 - Alignment Errors

impl R<u32, Reg<u32, _RRE>>[src]

pub fn rxrer(&self) -> RXRER_R[src]

Bits 0:17 - Receive Resource Errors

impl R<u32, Reg<u32, _ROE>>[src]

pub fn rxovr(&self) -> RXOVR_R[src]

Bits 0:9 - Receive Overruns

impl R<u32, Reg<u32, _IHCE>>[src]

pub fn hcker(&self) -> HCKER_R[src]

Bits 0:7 - IP Header Checksum Errors

impl R<u32, Reg<u32, _TCE>>[src]

pub fn tcker(&self) -> TCKER_R[src]

Bits 0:7 - TCP Checksum Errors

impl R<u32, Reg<u32, _UCE>>[src]

pub fn ucker(&self) -> UCKER_R[src]

Bits 0:7 - UDP Checksum Errors

impl R<u32, Reg<u32, _TISUBN>>[src]

pub fn lsbtir(&self) -> LSBTIR_R[src]

Bits 0:15 - Lower Significant Bits of Timer Increment

impl R<u32, Reg<u32, _TSH>>[src]

pub fn tcs(&self) -> TCS_R[src]

Bits 0:15 - Timer Count in Seconds

impl R<u32, Reg<u32, _TSSSL>>[src]

pub fn vts(&self) -> VTS_R[src]

Bits 0:31 - Value of Timer Seconds Register Capture

impl R<u32, Reg<u32, _TSSN>>[src]

pub fn vtn(&self) -> VTN_R[src]

Bits 0:29 - Value Timer Nanoseconds Register Capture

impl R<u32, Reg<u32, _TSL>>[src]

pub fn tcs(&self) -> TCS_R[src]

Bits 0:31 - Timer Count in Seconds

impl R<u32, Reg<u32, _TN>>[src]

pub fn tns(&self) -> TNS_R[src]

Bits 0:29 - Timer Count in Nanoseconds

impl R<u32, Reg<u32, _TI>>[src]

pub fn cns(&self) -> CNS_R[src]

Bits 0:7 - Count Nanoseconds

pub fn acns(&self) -> ACNS_R[src]

Bits 8:15 - Alternative Count Nanoseconds

pub fn nit(&self) -> NIT_R[src]

Bits 16:23 - Number of Increments

impl R<u32, Reg<u32, _EFTSL>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:31 - Register Update

impl R<u32, Reg<u32, _EFTN>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:29 - Register Update

impl R<u32, Reg<u32, _EFRSL>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:31 - Register Update

impl R<u32, Reg<u32, _EFRN>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:29 - Register Update

impl R<u32, Reg<u32, _PEFTSL>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:31 - Register Update

impl R<u32, Reg<u32, _PEFTN>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:29 - Register Update

impl R<u32, Reg<u32, _PEFRSL>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:31 - Register Update

impl R<u32, Reg<u32, _PEFRN>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:29 - Register Update

impl R<u32, Reg<u32, _RLPITR>>[src]

pub fn rlpitr(&self) -> RLPITR_R[src]

Bits 0:15 - Count number of times transition from rx normal idle to low power idle

impl R<u32, Reg<u32, _RLPITI>>[src]

pub fn rlpiti(&self) -> RLPITI_R[src]

Bits 0:23 - Increment once over 16 ahb clock when LPI indication bit 20 is set in rx mode

impl R<u32, Reg<u32, _TLPITR>>[src]

pub fn tlpitr(&self) -> TLPITR_R[src]

Bits 0:15 - Count number of times enable LPI tx bit 20 goes from low to high

impl R<u32, Reg<u32, _TLPITI>>[src]

pub fn tlpiti(&self) -> TLPITI_R[src]

Bits 0:23 - Increment once over 16 ahb clock when LPI indication bit 20 is set in tx mode

impl R<u8, UALGO_A>[src]

pub fn variant(&self) -> Variant<u8, UALGO_A>[src]

Get enumerated values variant

pub fn is_sha1(&self) -> bool[src]

Checks if the value of the field is SHA1

pub fn is_sha256(&self) -> bool[src]

Checks if the value of the field is SHA256

pub fn is_sha224(&self) -> bool[src]

Checks if the value of the field is SHA224

impl R<u32, Reg<u32, _CFG>>[src]

pub fn wbdis(&self) -> WBDIS_R[src]

Bit 0 - Write Back Disable

pub fn eomdis(&self) -> EOMDIS_R[src]

Bit 1 - End of Monitoring Disable

pub fn slbdis(&self) -> SLBDIS_R[src]

Bit 2 - Secondary List Branching Disable

pub fn bbc(&self) -> BBC_R[src]

Bits 4:7 - Bus Burden Control

pub fn ascd(&self) -> ASCD_R[src]

Bit 8 - Automatic Switch To Compare Digest

pub fn dualbuff(&self) -> DUALBUFF_R[src]

Bit 9 - Dual Input Buffer

pub fn uihash(&self) -> UIHASH_R[src]

Bit 12 - User Initial Hash Value

pub fn ualgo(&self) -> UALGO_R[src]

Bits 13:15 - User SHA Algorithm

impl R<u32, Reg<u32, _SR>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 0 - ICM Controller Enable Register

pub fn rawrmdis(&self) -> RAWRMDIS_R[src]

Bits 8:11 - RAW Region Monitoring Disabled Status

pub fn rmdis(&self) -> RMDIS_R[src]

Bits 12:15 - Region Monitoring Disabled Status

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rhc(&self) -> RHC_R[src]

Bits 0:3 - Region Hash Completed Interrupt Mask

pub fn rdm(&self) -> RDM_R[src]

Bits 4:7 - Region Digest Mismatch Interrupt Mask

pub fn rbe(&self) -> RBE_R[src]

Bits 8:11 - Region Bus Error Interrupt Mask

pub fn rwc(&self) -> RWC_R[src]

Bits 12:15 - Region Wrap Condition Detected Interrupt Mask

pub fn rec(&self) -> REC_R[src]

Bits 16:19 - Region End bit Condition Detected Interrupt Mask

pub fn rsu(&self) -> RSU_R[src]

Bits 20:23 - Region Status Updated Interrupt Mask

pub fn urad(&self) -> URAD_R[src]

Bit 24 - Undefined Register Access Detection Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn rhc(&self) -> RHC_R[src]

Bits 0:3 - Region Hash Completed

pub fn rdm(&self) -> RDM_R[src]

Bits 4:7 - Region Digest Mismatch

pub fn rbe(&self) -> RBE_R[src]

Bits 8:11 - Region Bus Error

pub fn rwc(&self) -> RWC_R[src]

Bits 12:15 - Region Wrap Condition Detected

pub fn rec(&self) -> REC_R[src]

Bits 16:19 - Region End bit Condition Detected

pub fn rsu(&self) -> RSU_R[src]

Bits 20:23 - Region Status Updated Detected

pub fn urad(&self) -> URAD_R[src]

Bit 24 - Undefined Register Access Detection Status

impl R<u8, URAT_A>[src]

pub fn variant(&self) -> Variant<u8, URAT_A>[src]

Get enumerated values variant

pub fn is_unspec_struct_member(&self) -> bool[src]

Checks if the value of the field is UNSPEC_STRUCT_MEMBER

pub fn is_cfg_modified(&self) -> bool[src]

Checks if the value of the field is CFG_MODIFIED

pub fn is_dscr_modified(&self) -> bool[src]

Checks if the value of the field is DSCR_MODIFIED

pub fn is_hash_modified(&self) -> bool[src]

Checks if the value of the field is HASH_MODIFIED

pub fn is_read_access(&self) -> bool[src]

Checks if the value of the field is READ_ACCESS

impl R<u32, Reg<u32, _UASR>>[src]

pub fn urat(&self) -> URAT_R[src]

Bits 0:2 - Undefined Register Access Trace

impl R<u32, Reg<u32, _DSCR>>[src]

pub fn dasa(&self) -> DASA_R[src]

Bits 6:31 - Descriptor Area Start Address

impl R<u32, Reg<u32, _HASH>>[src]

pub fn hasa(&self) -> HASA_R[src]

Bits 7:31 - Hash Area Start Address

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn cken0(&self) -> CKEN0_R[src]

Bit 2 - Clock Unit 0 Enable

pub fn cken1(&self) -> CKEN1_R[src]

Bit 3 - Clock Unit 1 Enable

pub fn txen(&self) -> TXEN_R[src]

Bit 4 - Tx Serializer Enable

pub fn rxen(&self) -> RXEN_R[src]

Bit 5 - Rx Serializer Enable

impl R<u8, SLOTSIZE_A>[src]

pub fn variant(&self) -> SLOTSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_24(&self) -> bool[src]

Checks if the value of the field is _24

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

impl R<u8, FSWIDTH_A>[src]

pub fn variant(&self) -> FSWIDTH_A[src]

Get enumerated values variant

pub fn is_slot(&self) -> bool[src]

Checks if the value of the field is SLOT

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_bit_(&self) -> bool[src]

Checks if the value of the field is BIT

pub fn is_burst(&self) -> bool[src]

Checks if the value of the field is BURST

impl R<bool, BITDELAY_A>[src]

pub fn variant(&self) -> BITDELAY_A[src]

Get enumerated values variant

pub fn is_lj(&self) -> bool[src]

Checks if the value of the field is LJ

pub fn is_i2s(&self) -> bool[src]

Checks if the value of the field is I2S

impl R<bool, FSSEL_A>[src]

pub fn variant(&self) -> FSSEL_A[src]

Get enumerated values variant

pub fn is_sckdiv(&self) -> bool[src]

Checks if the value of the field is SCKDIV

pub fn is_fspin(&self) -> bool[src]

Checks if the value of the field is FSPIN

impl R<bool, SCKSEL_A>[src]

pub fn variant(&self) -> SCKSEL_A[src]

Get enumerated values variant

pub fn is_mckdiv(&self) -> bool[src]

Checks if the value of the field is MCKDIV

pub fn is_sckpin(&self) -> bool[src]

Checks if the value of the field is SCKPIN

impl R<bool, MCKSEL_A>[src]

pub fn variant(&self) -> MCKSEL_A[src]

Get enumerated values variant

pub fn is_gclk(&self) -> bool[src]

Checks if the value of the field is GCLK

pub fn is_mckpin(&self) -> bool[src]

Checks if the value of the field is MCKPIN

impl R<u32, Reg<u32, _CLKCTRL>>[src]

pub fn slotsize(&self) -> SLOTSIZE_R[src]

Bits 0:1 - Slot Size

pub fn nbslots(&self) -> NBSLOTS_R[src]

Bits 2:4 - Number of Slots in Frame

pub fn fswidth(&self) -> FSWIDTH_R[src]

Bits 5:6 - Frame Sync Width

pub fn bitdelay(&self) -> BITDELAY_R[src]

Bit 7 - Data Delay from Frame Sync

pub fn fssel(&self) -> FSSEL_R[src]

Bit 8 - Frame Sync Select

pub fn fsinv(&self) -> FSINV_R[src]

Bit 9 - Frame Sync Invert

pub fn fsoutinv(&self) -> FSOUTINV_R[src]

Bit 10 - Frame Sync Output Invert

pub fn scksel(&self) -> SCKSEL_R[src]

Bit 11 - Serial Clock Select

pub fn sckoutinv(&self) -> SCKOUTINV_R[src]

Bit 12 - Serial Clock Output Invert

pub fn mcksel(&self) -> MCKSEL_R[src]

Bit 13 - Master Clock Select

pub fn mcken(&self) -> MCKEN_R[src]

Bit 14 - Master Clock Enable

pub fn mckoutinv(&self) -> MCKOUTINV_R[src]

Bit 15 - Master Clock Output Invert

pub fn mckdiv(&self) -> MCKDIV_R[src]

Bits 16:21 - Master Clock Division Factor

pub fn mckoutdiv(&self) -> MCKOUTDIV_R[src]

Bits 24:29 - Master Clock Output Division Factor

impl R<u16, Reg<u16, _INTENCLR>>[src]

pub fn rxrdy0(&self) -> RXRDY0_R[src]

Bit 0 - Receive Ready 0 Interrupt Enable

pub fn rxrdy1(&self) -> RXRDY1_R[src]

Bit 1 - Receive Ready 1 Interrupt Enable

pub fn rxor0(&self) -> RXOR0_R[src]

Bit 4 - Receive Overrun 0 Interrupt Enable

pub fn rxor1(&self) -> RXOR1_R[src]

Bit 5 - Receive Overrun 1 Interrupt Enable

pub fn txrdy0(&self) -> TXRDY0_R[src]

Bit 8 - Transmit Ready 0 Interrupt Enable

pub fn txrdy1(&self) -> TXRDY1_R[src]

Bit 9 - Transmit Ready 1 Interrupt Enable

pub fn txur0(&self) -> TXUR0_R[src]

Bit 12 - Transmit Underrun 0 Interrupt Enable

pub fn txur1(&self) -> TXUR1_R[src]

Bit 13 - Transmit Underrun 1 Interrupt Enable

impl R<u16, Reg<u16, _INTENSET>>[src]

pub fn rxrdy0(&self) -> RXRDY0_R[src]

Bit 0 - Receive Ready 0 Interrupt Enable

pub fn rxrdy1(&self) -> RXRDY1_R[src]

Bit 1 - Receive Ready 1 Interrupt Enable

pub fn rxor0(&self) -> RXOR0_R[src]

Bit 4 - Receive Overrun 0 Interrupt Enable

pub fn rxor1(&self) -> RXOR1_R[src]

Bit 5 - Receive Overrun 1 Interrupt Enable

pub fn txrdy0(&self) -> TXRDY0_R[src]

Bit 8 - Transmit Ready 0 Interrupt Enable

pub fn txrdy1(&self) -> TXRDY1_R[src]

Bit 9 - Transmit Ready 1 Interrupt Enable

pub fn txur0(&self) -> TXUR0_R[src]

Bit 12 - Transmit Underrun 0 Interrupt Enable

pub fn txur1(&self) -> TXUR1_R[src]

Bit 13 - Transmit Underrun 1 Interrupt Enable

impl R<u16, Reg<u16, _INTFLAG>>[src]

pub fn rxrdy0(&self) -> RXRDY0_R[src]

Bit 0 - Receive Ready 0

pub fn rxrdy1(&self) -> RXRDY1_R[src]

Bit 1 - Receive Ready 1

pub fn rxor0(&self) -> RXOR0_R[src]

Bit 4 - Receive Overrun 0

pub fn rxor1(&self) -> RXOR1_R[src]

Bit 5 - Receive Overrun 1

pub fn txrdy0(&self) -> TXRDY0_R[src]

Bit 8 - Transmit Ready 0

pub fn txrdy1(&self) -> TXRDY1_R[src]

Bit 9 - Transmit Ready 1

pub fn txur0(&self) -> TXUR0_R[src]

Bit 12 - Transmit Underrun 0

pub fn txur1(&self) -> TXUR1_R[src]

Bit 13 - Transmit Underrun 1

impl R<u16, Reg<u16, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Status

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable Synchronization Status

pub fn cken0(&self) -> CKEN0_R[src]

Bit 2 - Clock Unit 0 Enable Synchronization Status

pub fn cken1(&self) -> CKEN1_R[src]

Bit 3 - Clock Unit 1 Enable Synchronization Status

pub fn txen(&self) -> TXEN_R[src]

Bit 4 - Tx Serializer Enable Synchronization Status

pub fn rxen(&self) -> RXEN_R[src]

Bit 5 - Rx Serializer Enable Synchronization Status

pub fn txdata(&self) -> TXDATA_R[src]

Bit 8 - Tx Data Synchronization Status

pub fn rxdata(&self) -> RXDATA_R[src]

Bit 9 - Rx Data Synchronization Status

impl R<u8, TXDEFAULT_A>[src]

pub fn variant(&self) -> Variant<u8, TXDEFAULT_A>[src]

Get enumerated values variant

pub fn is_zero(&self) -> bool[src]

Checks if the value of the field is ZERO

pub fn is_one(&self) -> bool[src]

Checks if the value of the field is ONE

pub fn is_hiz(&self) -> bool[src]

Checks if the value of the field is HIZ

impl R<bool, TXSAME_A>[src]

pub fn variant(&self) -> TXSAME_A[src]

Get enumerated values variant

pub fn is_zero(&self) -> bool[src]

Checks if the value of the field is ZERO

pub fn is_same(&self) -> bool[src]

Checks if the value of the field is SAME

impl R<bool, SLOTADJ_A>[src]

pub fn variant(&self) -> SLOTADJ_A[src]

Get enumerated values variant

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

impl R<u8, DATASIZE_A>[src]

pub fn variant(&self) -> DATASIZE_A[src]

Get enumerated values variant

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_24(&self) -> bool[src]

Checks if the value of the field is _24

pub fn is_20(&self) -> bool[src]

Checks if the value of the field is _20

pub fn is_18(&self) -> bool[src]

Checks if the value of the field is _18

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_16c(&self) -> bool[src]

Checks if the value of the field is _16C

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_8c(&self) -> bool[src]

Checks if the value of the field is _8C

impl R<bool, WORDADJ_A>[src]

pub fn variant(&self) -> WORDADJ_A[src]

Get enumerated values variant

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

impl R<u8, EXTEND_A>[src]

pub fn variant(&self) -> EXTEND_A[src]

Get enumerated values variant

pub fn is_zero(&self) -> bool[src]

Checks if the value of the field is ZERO

pub fn is_one(&self) -> bool[src]

Checks if the value of the field is ONE

pub fn is_msbit(&self) -> bool[src]

Checks if the value of the field is MSBIT

pub fn is_lsbit(&self) -> bool[src]

Checks if the value of the field is LSBIT

impl R<bool, BITREV_A>[src]

pub fn variant(&self) -> BITREV_A[src]

Get enumerated values variant

pub fn is_msbit(&self) -> bool[src]

Checks if the value of the field is MSBIT

pub fn is_lsbit(&self) -> bool[src]

Checks if the value of the field is LSBIT

impl R<bool, MONO_A>[src]

pub fn variant(&self) -> MONO_A[src]

Get enumerated values variant

pub fn is_stereo(&self) -> bool[src]

Checks if the value of the field is STEREO

pub fn is_mono(&self) -> bool[src]

Checks if the value of the field is MONO

impl R<bool, DMA_A>[src]

pub fn variant(&self) -> DMA_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_multiple(&self) -> bool[src]

Checks if the value of the field is MULTIPLE

impl R<u32, Reg<u32, _TXCTRL>>[src]

pub fn txdefault(&self) -> TXDEFAULT_R[src]

Bits 2:3 - Line Default Line when Slot Disabled

pub fn txsame(&self) -> TXSAME_R[src]

Bit 4 - Transmit Data when Underrun

pub fn slotadj(&self) -> SLOTADJ_R[src]

Bit 7 - Data Slot Formatting Adjust

pub fn datasize(&self) -> DATASIZE_R[src]

Bits 8:10 - Data Word Size

pub fn wordadj(&self) -> WORDADJ_R[src]

Bit 12 - Data Word Formatting Adjust

pub fn extend(&self) -> EXTEND_R[src]

Bits 13:14 - Data Formatting Bit Extension

pub fn bitrev(&self) -> BITREV_R[src]

Bit 15 - Data Formatting Bit Reverse

pub fn slotdis0(&self) -> SLOTDIS0_R[src]

Bit 16 - Slot 0 Disabled for this Serializer

pub fn slotdis1(&self) -> SLOTDIS1_R[src]

Bit 17 - Slot 1 Disabled for this Serializer

pub fn slotdis2(&self) -> SLOTDIS2_R[src]

Bit 18 - Slot 2 Disabled for this Serializer

pub fn slotdis3(&self) -> SLOTDIS3_R[src]

Bit 19 - Slot 3 Disabled for this Serializer

pub fn slotdis4(&self) -> SLOTDIS4_R[src]

Bit 20 - Slot 4 Disabled for this Serializer

pub fn slotdis5(&self) -> SLOTDIS5_R[src]

Bit 21 - Slot 5 Disabled for this Serializer

pub fn slotdis6(&self) -> SLOTDIS6_R[src]

Bit 22 - Slot 6 Disabled for this Serializer

pub fn slotdis7(&self) -> SLOTDIS7_R[src]

Bit 23 - Slot 7 Disabled for this Serializer

pub fn mono(&self) -> MONO_R[src]

Bit 24 - Mono Mode

pub fn dma(&self) -> DMA_R[src]

Bit 25 - Single or Multiple DMA Channels

impl R<u8, SERMODE_A>[src]

pub fn variant(&self) -> Variant<u8, SERMODE_A>[src]

Get enumerated values variant

pub fn is_rx(&self) -> bool[src]

Checks if the value of the field is RX

pub fn is_pdm2(&self) -> bool[src]

Checks if the value of the field is PDM2

impl R<bool, CLKSEL_A>[src]

pub fn variant(&self) -> CLKSEL_A[src]

Get enumerated values variant

pub fn is_clk0(&self) -> bool[src]

Checks if the value of the field is CLK0

pub fn is_clk1(&self) -> bool[src]

Checks if the value of the field is CLK1

impl R<bool, SLOTADJ_A>[src]

pub fn variant(&self) -> SLOTADJ_A[src]

Get enumerated values variant

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

impl R<u8, DATASIZE_A>[src]

pub fn variant(&self) -> DATASIZE_A[src]

Get enumerated values variant

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_24(&self) -> bool[src]

Checks if the value of the field is _24

pub fn is_20(&self) -> bool[src]

Checks if the value of the field is _20

pub fn is_18(&self) -> bool[src]

Checks if the value of the field is _18

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_16c(&self) -> bool[src]

Checks if the value of the field is _16C

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_8c(&self) -> bool[src]

Checks if the value of the field is _8C

impl R<bool, WORDADJ_A>[src]

pub fn variant(&self) -> WORDADJ_A[src]

Get enumerated values variant

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

impl R<u8, EXTEND_A>[src]

pub fn variant(&self) -> EXTEND_A[src]

Get enumerated values variant

pub fn is_zero(&self) -> bool[src]

Checks if the value of the field is ZERO

pub fn is_one(&self) -> bool[src]

Checks if the value of the field is ONE

pub fn is_msbit(&self) -> bool[src]

Checks if the value of the field is MSBIT

pub fn is_lsbit(&self) -> bool[src]

Checks if the value of the field is LSBIT

impl R<bool, BITREV_A>[src]

pub fn variant(&self) -> BITREV_A[src]

Get enumerated values variant

pub fn is_msbit(&self) -> bool[src]

Checks if the value of the field is MSBIT

pub fn is_lsbit(&self) -> bool[src]

Checks if the value of the field is LSBIT

impl R<bool, MONO_A>[src]

pub fn variant(&self) -> MONO_A[src]

Get enumerated values variant

pub fn is_stereo(&self) -> bool[src]

Checks if the value of the field is STEREO

pub fn is_mono(&self) -> bool[src]

Checks if the value of the field is MONO

impl R<bool, DMA_A>[src]

pub fn variant(&self) -> DMA_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_multiple(&self) -> bool[src]

Checks if the value of the field is MULTIPLE

impl R<u32, Reg<u32, _RXCTRL>>[src]

pub fn sermode(&self) -> SERMODE_R[src]

Bits 0:1 - Serializer Mode

pub fn clksel(&self) -> CLKSEL_R[src]

Bit 5 - Clock Unit Selection

pub fn slotadj(&self) -> SLOTADJ_R[src]

Bit 7 - Data Slot Formatting Adjust

pub fn datasize(&self) -> DATASIZE_R[src]

Bits 8:10 - Data Word Size

pub fn wordadj(&self) -> WORDADJ_R[src]

Bit 12 - Data Word Formatting Adjust

pub fn extend(&self) -> EXTEND_R[src]

Bits 13:14 - Data Formatting Bit Extension

pub fn bitrev(&self) -> BITREV_R[src]

Bit 15 - Data Formatting Bit Reverse

pub fn slotdis0(&self) -> SLOTDIS0_R[src]

Bit 16 - Slot 0 Disabled for this Serializer

pub fn slotdis1(&self) -> SLOTDIS1_R[src]

Bit 17 - Slot 1 Disabled for this Serializer

pub fn slotdis2(&self) -> SLOTDIS2_R[src]

Bit 18 - Slot 2 Disabled for this Serializer

pub fn slotdis3(&self) -> SLOTDIS3_R[src]

Bit 19 - Slot 3 Disabled for this Serializer

pub fn slotdis4(&self) -> SLOTDIS4_R[src]

Bit 20 - Slot 4 Disabled for this Serializer

pub fn slotdis5(&self) -> SLOTDIS5_R[src]

Bit 21 - Slot 5 Disabled for this Serializer

pub fn slotdis6(&self) -> SLOTDIS6_R[src]

Bit 22 - Slot 6 Disabled for this Serializer

pub fn slotdis7(&self) -> SLOTDIS7_R[src]

Bit 23 - Slot 7 Disabled for this Serializer

pub fn mono(&self) -> MONO_R[src]

Bit 24 - Mono Mode

pub fn dma(&self) -> DMA_R[src]

Bit 25 - Single or Multiple DMA Channels

pub fn rxloop(&self) -> RXLOOP_R[src]

Bit 26 - Loop-back Test Mode

impl R<u32, Reg<u32, _RXDATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Sample Data

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn ckrdy(&self) -> CKRDY_R[src]

Bit 0 - Clock Ready Interrupt Enable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn ckrdy(&self) -> CKRDY_R[src]

Bit 0 - Clock Ready Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn ckrdy(&self) -> CKRDY_R[src]

Bit 0 - Clock Ready

impl R<u8, DIV_A>[src]

pub fn variant(&self) -> Variant<u8, DIV_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

impl R<u8, Reg<u8, _HSDIV>>[src]

pub fn div(&self) -> DIV_R[src]

Bits 0:7 - CPU Clock Division Factor

impl R<u8, DIV_A>[src]

pub fn variant(&self) -> Variant<u8, DIV_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

impl R<u8, Reg<u8, _CPUDIV>>[src]

pub fn div(&self) -> DIV_R[src]

Bits 0:7 - Low-Power Clock Division Factor

impl R<u32, Reg<u32, _AHBMASK>>[src]

pub fn hpb0_(&self) -> HPB0__R[src]

Bit 0 - HPB0 AHB Clock Mask

pub fn hpb1_(&self) -> HPB1__R[src]

Bit 1 - HPB1 AHB Clock Mask

pub fn hpb2_(&self) -> HPB2__R[src]

Bit 2 - HPB2 AHB Clock Mask

pub fn hpb3_(&self) -> HPB3__R[src]

Bit 3 - HPB3 AHB Clock Mask

pub fn dsu_(&self) -> DSU__R[src]

Bit 4 - DSU AHB Clock Mask

pub fn hmatrix_(&self) -> HMATRIX__R[src]

Bit 5 - HMATRIX AHB Clock Mask

pub fn nvmctrl_(&self) -> NVMCTRL__R[src]

Bit 6 - NVMCTRL AHB Clock Mask

pub fn hsram_(&self) -> HSRAM__R[src]

Bit 7 - HSRAM AHB Clock Mask

pub fn cmcc_(&self) -> CMCC__R[src]

Bit 8 - CMCC AHB Clock Mask

pub fn dmac_(&self) -> DMAC__R[src]

Bit 9 - DMAC AHB Clock Mask

pub fn usb_(&self) -> USB__R[src]

Bit 10 - USB AHB Clock Mask

pub fn bkupram_(&self) -> BKUPRAM__R[src]

Bit 11 - BKUPRAM AHB Clock Mask

pub fn pac_(&self) -> PAC__R[src]

Bit 12 - PAC AHB Clock Mask

pub fn qspi_(&self) -> QSPI__R[src]

Bit 13 - QSPI AHB Clock Mask

pub fn gmac_(&self) -> GMAC__R[src]

Bit 14 - GMAC AHB Clock Mask

pub fn sdhc0_(&self) -> SDHC0__R[src]

Bit 15 - SDHC0 AHB Clock Mask

pub fn sdhc1_(&self) -> SDHC1__R[src]

Bit 16 - SDHC1 AHB Clock Mask

pub fn can0_(&self) -> CAN0__R[src]

Bit 17 - CAN0 AHB Clock Mask

pub fn can1_(&self) -> CAN1__R[src]

Bit 18 - CAN1 AHB Clock Mask

pub fn icm_(&self) -> ICM__R[src]

Bit 19 - ICM AHB Clock Mask

pub fn pukcc_(&self) -> PUKCC__R[src]

Bit 20 - PUKCC AHB Clock Mask

pub fn qspi_2x_(&self) -> QSPI_2X__R[src]

Bit 21 - QSPI_2X AHB Clock Mask

pub fn nvmctrl_smeeprom_(&self) -> NVMCTRL_SMEEPROM__R[src]

Bit 22 - NVMCTRL_SMEEPROM AHB Clock Mask

pub fn nvmctrl_cache_(&self) -> NVMCTRL_CACHE__R[src]

Bit 23 - NVMCTRL_CACHE AHB Clock Mask

impl R<u32, Reg<u32, _APBAMASK>>[src]

pub fn pac_(&self) -> PAC__R[src]

Bit 0 - PAC APB Clock Enable

pub fn pm_(&self) -> PM__R[src]

Bit 1 - PM APB Clock Enable

pub fn mclk_(&self) -> MCLK__R[src]

Bit 2 - MCLK APB Clock Enable

pub fn rstc_(&self) -> RSTC__R[src]

Bit 3 - RSTC APB Clock Enable

pub fn oscctrl_(&self) -> OSCCTRL__R[src]

Bit 4 - OSCCTRL APB Clock Enable

pub fn osc32kctrl_(&self) -> OSC32KCTRL__R[src]

Bit 5 - OSC32KCTRL APB Clock Enable

pub fn supc_(&self) -> SUPC__R[src]

Bit 6 - SUPC APB Clock Enable

pub fn gclk_(&self) -> GCLK__R[src]

Bit 7 - GCLK APB Clock Enable

pub fn wdt_(&self) -> WDT__R[src]

Bit 8 - WDT APB Clock Enable

pub fn rtc_(&self) -> RTC__R[src]

Bit 9 - RTC APB Clock Enable

pub fn eic_(&self) -> EIC__R[src]

Bit 10 - EIC APB Clock Enable

pub fn freqm_(&self) -> FREQM__R[src]

Bit 11 - FREQM APB Clock Enable

pub fn sercom0_(&self) -> SERCOM0__R[src]

Bit 12 - SERCOM0 APB Clock Enable

pub fn sercom1_(&self) -> SERCOM1__R[src]

Bit 13 - SERCOM1 APB Clock Enable

pub fn tc0_(&self) -> TC0__R[src]

Bit 14 - TC0 APB Clock Enable

pub fn tc1_(&self) -> TC1__R[src]

Bit 15 - TC1 APB Clock Enable

impl R<u32, Reg<u32, _APBBMASK>>[src]

pub fn usb_(&self) -> USB__R[src]

Bit 0 - USB APB Clock Enable

pub fn dsu_(&self) -> DSU__R[src]

Bit 1 - DSU APB Clock Enable

pub fn nvmctrl_(&self) -> NVMCTRL__R[src]

Bit 2 - NVMCTRL APB Clock Enable

pub fn port_(&self) -> PORT__R[src]

Bit 4 - PORT APB Clock Enable

pub fn hmatrix_(&self) -> HMATRIX__R[src]

Bit 6 - HMATRIX APB Clock Enable

pub fn evsys_(&self) -> EVSYS__R[src]

Bit 7 - EVSYS APB Clock Enable

pub fn sercom2_(&self) -> SERCOM2__R[src]

Bit 9 - SERCOM2 APB Clock Enable

pub fn sercom3_(&self) -> SERCOM3__R[src]

Bit 10 - SERCOM3 APB Clock Enable

pub fn tcc0_(&self) -> TCC0__R[src]

Bit 11 - TCC0 APB Clock Enable

pub fn tcc1_(&self) -> TCC1__R[src]

Bit 12 - TCC1 APB Clock Enable

pub fn tc2_(&self) -> TC2__R[src]

Bit 13 - TC2 APB Clock Enable

pub fn tc3_(&self) -> TC3__R[src]

Bit 14 - TC3 APB Clock Enable

pub fn ramecc_(&self) -> RAMECC__R[src]

Bit 16 - RAMECC APB Clock Enable

impl R<u32, Reg<u32, _APBCMASK>>[src]

pub fn gmac_(&self) -> GMAC__R[src]

Bit 2 - GMAC APB Clock Enable

pub fn tcc2_(&self) -> TCC2__R[src]

Bit 3 - TCC2 APB Clock Enable

pub fn tcc3_(&self) -> TCC3__R[src]

Bit 4 - TCC3 APB Clock Enable

pub fn tc4_(&self) -> TC4__R[src]

Bit 5 - TC4 APB Clock Enable

pub fn tc5_(&self) -> TC5__R[src]

Bit 6 - TC5 APB Clock Enable

pub fn pdec_(&self) -> PDEC__R[src]

Bit 7 - PDEC APB Clock Enable

pub fn ac_(&self) -> AC__R[src]

Bit 8 - AC APB Clock Enable

pub fn aes_(&self) -> AES__R[src]

Bit 9 - AES APB Clock Enable

pub fn trng_(&self) -> TRNG__R[src]

Bit 10 - TRNG APB Clock Enable

pub fn icm_(&self) -> ICM__R[src]

Bit 11 - ICM APB Clock Enable

pub fn qspi_(&self) -> QSPI__R[src]

Bit 13 - QSPI APB Clock Enable

pub fn ccl_(&self) -> CCL__R[src]

Bit 14 - CCL APB Clock Enable

impl R<u32, Reg<u32, _APBDMASK>>[src]

pub fn sercom4_(&self) -> SERCOM4__R[src]

Bit 0 - SERCOM4 APB Clock Enable

pub fn sercom5_(&self) -> SERCOM5__R[src]

Bit 1 - SERCOM5 APB Clock Enable

pub fn sercom6_(&self) -> SERCOM6__R[src]

Bit 2 - SERCOM6 APB Clock Enable

pub fn sercom7_(&self) -> SERCOM7__R[src]

Bit 3 - SERCOM7 APB Clock Enable

pub fn tcc4_(&self) -> TCC4__R[src]

Bit 4 - TCC4 APB Clock Enable

pub fn tc6_(&self) -> TC6__R[src]

Bit 5 - TC6 APB Clock Enable

pub fn tc7_(&self) -> TC7__R[src]

Bit 6 - TC7 APB Clock Enable

pub fn adc0_(&self) -> ADC0__R[src]

Bit 7 - ADC0 APB Clock Enable

pub fn adc1_(&self) -> ADC1__R[src]

Bit 8 - ADC1 APB Clock Enable

pub fn dac_(&self) -> DAC__R[src]

Bit 9 - DAC APB Clock Enable

pub fn i2s_(&self) -> I2S__R[src]

Bit 10 - I2S APB Clock Enable

pub fn pcc_(&self) -> PCC__R[src]

Bit 11 - PCC APB Clock Enable

impl R<u8, WMODE_A>[src]

pub fn variant(&self) -> WMODE_A[src]

Get enumerated values variant

pub fn is_man(&self) -> bool[src]

Checks if the value of the field is MAN

pub fn is_adw(&self) -> bool[src]

Checks if the value of the field is ADW

pub fn is_aqw(&self) -> bool[src]

Checks if the value of the field is AQW

pub fn is_ap(&self) -> bool[src]

Checks if the value of the field is AP

impl R<u8, PRM_A>[src]

pub fn variant(&self) -> Variant<u8, PRM_A>[src]

Get enumerated values variant

pub fn is_semiauto(&self) -> bool[src]

Checks if the value of the field is SEMIAUTO

pub fn is_fullauto(&self) -> bool[src]

Checks if the value of the field is FULLAUTO

pub fn is_manual(&self) -> bool[src]

Checks if the value of the field is MANUAL

impl R<u16, Reg<u16, _CTRLA>>[src]

pub fn autows(&self) -> AUTOWS_R[src]

Bit 2 - Auto Wait State Enable

pub fn suspen(&self) -> SUSPEN_R[src]

Bit 3 - Suspend Enable

pub fn wmode(&self) -> WMODE_R[src]

Bits 4:5 - Write Mode

pub fn prm(&self) -> PRM_R[src]

Bits 6:7 - Power Reduction Mode during Sleep

pub fn rws(&self) -> RWS_R[src]

Bits 8:11 - NVM Read Wait States

pub fn ahbns0(&self) -> AHBNS0_R[src]

Bit 12 - Force AHB0 access to NONSEQ, burst transfers are continuously rearbitrated

pub fn ahbns1(&self) -> AHBNS1_R[src]

Bit 13 - Force AHB1 access to NONSEQ, burst transfers are continuously rearbitrated

pub fn cachedis0(&self) -> CACHEDIS0_R[src]

Bit 14 - AHB0 Cache Disable

pub fn cachedis1(&self) -> CACHEDIS1_R[src]

Bit 15 - AHB1 Cache Disable

impl R<u8, PSZ_A>[src]

pub fn variant(&self) -> PSZ_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<u32, Reg<u32, _PARAM>>[src]

pub fn nvmp(&self) -> NVMP_R[src]

Bits 0:15 - NVM Pages

pub fn psz(&self) -> PSZ_R[src]

Bits 16:18 - Page Size

pub fn see(&self) -> SEE_R[src]

Bit 31 - SmartEEPROM Supported

impl R<u16, Reg<u16, _INTENCLR>>[src]

pub fn done(&self) -> DONE_R[src]

Bit 0 - Command Done Interrupt Clear

pub fn addre(&self) -> ADDRE_R[src]

Bit 1 - Address Error

pub fn proge(&self) -> PROGE_R[src]

Bit 2 - Programming Error Interrupt Clear

pub fn locke(&self) -> LOCKE_R[src]

Bit 3 - Lock Error Interrupt Clear

pub fn eccse(&self) -> ECCSE_R[src]

Bit 4 - ECC Single Error Interrupt Clear

pub fn eccde(&self) -> ECCDE_R[src]

Bit 5 - ECC Dual Error Interrupt Clear

pub fn nvme(&self) -> NVME_R[src]

Bit 6 - NVM Error Interrupt Clear

pub fn susp(&self) -> SUSP_R[src]

Bit 7 - Suspended Write Or Erase Interrupt Clear

pub fn seesfull(&self) -> SEESFULL_R[src]

Bit 8 - Active SEES Full Interrupt Clear

pub fn seesovf(&self) -> SEESOVF_R[src]

Bit 9 - Active SEES Overflow Interrupt Clear

pub fn seewrc(&self) -> SEEWRC_R[src]

Bit 10 - SEE Write Completed Interrupt Clear

impl R<u16, Reg<u16, _INTENSET>>[src]

pub fn done(&self) -> DONE_R[src]

Bit 0 - Command Done Interrupt Enable

pub fn addre(&self) -> ADDRE_R[src]

Bit 1 - Address Error Interrupt Enable

pub fn proge(&self) -> PROGE_R[src]

Bit 2 - Programming Error Interrupt Enable

pub fn locke(&self) -> LOCKE_R[src]

Bit 3 - Lock Error Interrupt Enable

pub fn eccse(&self) -> ECCSE_R[src]

Bit 4 - ECC Single Error Interrupt Enable

pub fn eccde(&self) -> ECCDE_R[src]

Bit 5 - ECC Dual Error Interrupt Enable

pub fn nvme(&self) -> NVME_R[src]

Bit 6 - NVM Error Interrupt Enable

pub fn susp(&self) -> SUSP_R[src]

Bit 7 - Suspended Write Or Erase Interrupt Enable

pub fn seesfull(&self) -> SEESFULL_R[src]

Bit 8 - Active SEES Full Interrupt Enable

pub fn seesovf(&self) -> SEESOVF_R[src]

Bit 9 - Active SEES Overflow Interrupt Enable

pub fn seewrc(&self) -> SEEWRC_R[src]

Bit 10 - SEE Write Completed Interrupt Enable

impl R<u16, Reg<u16, _INTFLAG>>[src]

pub fn done(&self) -> DONE_R[src]

Bit 0 - Command Done

pub fn addre(&self) -> ADDRE_R[src]

Bit 1 - Address Error

pub fn proge(&self) -> PROGE_R[src]

Bit 2 - Programming Error

pub fn locke(&self) -> LOCKE_R[src]

Bit 3 - Lock Error

pub fn eccse(&self) -> ECCSE_R[src]

Bit 4 - ECC Single Error

pub fn eccde(&self) -> ECCDE_R[src]

Bit 5 - ECC Dual Error

pub fn nvme(&self) -> NVME_R[src]

Bit 6 - NVM Error

pub fn susp(&self) -> SUSP_R[src]

Bit 7 - Suspended Write Or Erase Operation

pub fn seesfull(&self) -> SEESFULL_R[src]

Bit 8 - Active SEES Full

pub fn seesovf(&self) -> SEESOVF_R[src]

Bit 9 - Active SEES Overflow

pub fn seewrc(&self) -> SEEWRC_R[src]

Bit 10 - SEE Write Completed

impl R<u8, BOOTPROT_A>[src]

pub fn variant(&self) -> BOOTPROT_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_24(&self) -> bool[src]

Checks if the value of the field is _24

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_40(&self) -> bool[src]

Checks if the value of the field is _40

pub fn is_48(&self) -> bool[src]

Checks if the value of the field is _48

pub fn is_56(&self) -> bool[src]

Checks if the value of the field is _56

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_72(&self) -> bool[src]

Checks if the value of the field is _72

pub fn is_80(&self) -> bool[src]

Checks if the value of the field is _80

pub fn is_88(&self) -> bool[src]

Checks if the value of the field is _88

pub fn is_96(&self) -> bool[src]

Checks if the value of the field is _96

pub fn is_104(&self) -> bool[src]

Checks if the value of the field is _104

pub fn is_112(&self) -> bool[src]

Checks if the value of the field is _112

pub fn is_120(&self) -> bool[src]

Checks if the value of the field is _120

impl R<u16, Reg<u16, _STATUS>>[src]

pub fn ready(&self) -> READY_R[src]

Bit 0 - Ready to accept a command

pub fn prm(&self) -> PRM_R[src]

Bit 1 - Power Reduction Mode

pub fn load(&self) -> LOAD_R[src]

Bit 2 - NVM Page Buffer Active Loading

pub fn susp(&self) -> SUSP_R[src]

Bit 3 - NVM Write Or Erase Operation Is Suspended

pub fn afirst(&self) -> AFIRST_R[src]

Bit 4 - BANKA First

pub fn bpdis(&self) -> BPDIS_R[src]

Bit 5 - Boot Loader Protection Disable

pub fn bootprot(&self) -> BOOTPROT_R[src]

Bits 8:11 - Boot Loader Protection Size

impl R<u32, Reg<u32, _ADDR>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:23 - NVM Address

impl R<u32, Reg<u32, _RUNLOCK>>[src]

pub fn runlock(&self) -> RUNLOCK_R[src]

Bits 0:31 - Region Un-Lock Bits

impl R<u32, Reg<u32, _PBLDATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Page Buffer Data

impl R<u8, TYPEL_A>[src]

pub fn variant(&self) -> Variant<u8, TYPEL_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_dual(&self) -> bool[src]

Checks if the value of the field is DUAL

impl R<u8, TYPEH_A>[src]

pub fn variant(&self) -> Variant<u8, TYPEH_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_dual(&self) -> bool[src]

Checks if the value of the field is DUAL

impl R<u32, Reg<u32, _ECCERR>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:23 - Error Address

pub fn typel(&self) -> TYPEL_R[src]

Bits 28:29 - Low Double-Word Error Type

pub fn typeh(&self) -> TYPEH_R[src]

Bits 30:31 - High Double-Word Error Type

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn eccdis(&self) -> ECCDIS_R[src]

Bit 0 - Debugger ECC Read Disable

pub fn eccelog(&self) -> ECCELOG_R[src]

Bit 1 - Debugger ECC Error Tracking Mode

impl R<bool, WMODE_A>[src]

pub fn variant(&self) -> WMODE_A[src]

Get enumerated values variant

pub fn is_unbuffered(&self) -> bool[src]

Checks if the value of the field is UNBUFFERED

pub fn is_buffered(&self) -> bool[src]

Checks if the value of the field is BUFFERED

impl R<u8, Reg<u8, _SEECFG>>[src]

pub fn wmode(&self) -> WMODE_R[src]

Bit 0 - Write Mode

pub fn aprdis(&self) -> APRDIS_R[src]

Bit 1 - Automatic Page Reallocation Disable

impl R<u32, Reg<u32, _SEESTAT>>[src]

pub fn asees(&self) -> ASEES_R[src]

Bit 0 - Active SmartEEPROM Sector

pub fn load(&self) -> LOAD_R[src]

Bit 1 - Page Buffer Loaded

pub fn busy(&self) -> BUSY_R[src]

Bit 2 - Busy

pub fn lock(&self) -> LOCK_R[src]

Bit 3 - SmartEEPROM Write Access Is Locked

pub fn rlock(&self) -> RLOCK_R[src]

Bit 4 - SmartEEPROM Write Access To Register Address Space Is Locked

pub fn sblk(&self) -> SBLK_R[src]

Bits 8:11 - Blocks Number In a Sector

pub fn psz(&self) -> PSZ_R[src]

Bits 16:18 - SmartEEPROM Page Size

impl R<u8, Reg<u8, _DPLLCTRLA>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - DPLL Enable

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run in Standby

pub fn ondemand(&self) -> ONDEMAND_R[src]

Bit 7 - On Demand Control

impl R<u32, Reg<u32, _DPLLRATIO>>[src]

pub fn ldr(&self) -> LDR_R[src]

Bits 0:12 - Loop Divider Ratio

pub fn ldrfrac(&self) -> LDRFRAC_R[src]

Bits 16:20 - Loop Divider Ratio Fractional Part

impl R<u8, FILTER_A>[src]

pub fn variant(&self) -> FILTER_A[src]

Get enumerated values variant

pub fn is_filter1(&self) -> bool[src]

Checks if the value of the field is FILTER1

pub fn is_filter2(&self) -> bool[src]

Checks if the value of the field is FILTER2

pub fn is_filter3(&self) -> bool[src]

Checks if the value of the field is FILTER3

pub fn is_filter4(&self) -> bool[src]

Checks if the value of the field is FILTER4

pub fn is_filter5(&self) -> bool[src]

Checks if the value of the field is FILTER5

pub fn is_filter6(&self) -> bool[src]

Checks if the value of the field is FILTER6

pub fn is_filter7(&self) -> bool[src]

Checks if the value of the field is FILTER7

pub fn is_filter8(&self) -> bool[src]

Checks if the value of the field is FILTER8

pub fn is_filter9(&self) -> bool[src]

Checks if the value of the field is FILTER9

pub fn is_filter10(&self) -> bool[src]

Checks if the value of the field is FILTER10

pub fn is_filter11(&self) -> bool[src]

Checks if the value of the field is FILTER11

pub fn is_filter12(&self) -> bool[src]

Checks if the value of the field is FILTER12

pub fn is_filter13(&self) -> bool[src]

Checks if the value of the field is FILTER13

pub fn is_filter14(&self) -> bool[src]

Checks if the value of the field is FILTER14

pub fn is_filter15(&self) -> bool[src]

Checks if the value of the field is FILTER15

pub fn is_filter16(&self) -> bool[src]

Checks if the value of the field is FILTER16

impl R<u8, REFCLK_A>[src]

pub fn variant(&self) -> Variant<u8, REFCLK_A>[src]

Get enumerated values variant

pub fn is_gclk(&self) -> bool[src]

Checks if the value of the field is GCLK

pub fn is_xosc32(&self) -> bool[src]

Checks if the value of the field is XOSC32

pub fn is_xosc0(&self) -> bool[src]

Checks if the value of the field is XOSC0

pub fn is_xosc1(&self) -> bool[src]

Checks if the value of the field is XOSC1

impl R<u8, LTIME_A>[src]

pub fn variant(&self) -> Variant<u8, LTIME_A>[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_800us(&self) -> bool[src]

Checks if the value of the field is _800US

pub fn is_900us(&self) -> bool[src]

Checks if the value of the field is _900US

pub fn is_1ms(&self) -> bool[src]

Checks if the value of the field is _1MS

pub fn is_1p1ms(&self) -> bool[src]

Checks if the value of the field is _1P1MS

impl R<u8, DCOFILTER_A>[src]

pub fn variant(&self) -> DCOFILTER_A[src]

Get enumerated values variant

pub fn is_filter1(&self) -> bool[src]

Checks if the value of the field is FILTER1

pub fn is_filter2(&self) -> bool[src]

Checks if the value of the field is FILTER2

pub fn is_filter3(&self) -> bool[src]

Checks if the value of the field is FILTER3

pub fn is_filter4(&self) -> bool[src]

Checks if the value of the field is FILTER4

pub fn is_filter5(&self) -> bool[src]

Checks if the value of the field is FILTER5

pub fn is_filter6(&self) -> bool[src]

Checks if the value of the field is FILTER6

pub fn is_filter7(&self) -> bool[src]

Checks if the value of the field is FILTER7

pub fn is_filter8(&self) -> bool[src]

Checks if the value of the field is FILTER8

impl R<u32, Reg<u32, _DPLLCTRLB>>[src]

pub fn filter(&self) -> FILTER_R[src]

Bits 0:3 - Proportional Integral Filter Selection

pub fn wuf(&self) -> WUF_R[src]

Bit 4 - Wake Up Fast

pub fn refclk(&self) -> REFCLK_R[src]

Bits 5:7 - Reference Clock Selection

pub fn ltime(&self) -> LTIME_R[src]

Bits 8:10 - Lock Time

pub fn lbypass(&self) -> LBYPASS_R[src]

Bit 11 - Lock Bypass

pub fn dcofilter(&self) -> DCOFILTER_R[src]

Bits 12:14 - Sigma-Delta DCO Filter Selection

pub fn dcoen(&self) -> DCOEN_R[src]

Bit 15 - DCO Filter Enable

pub fn div(&self) -> DIV_R[src]

Bits 16:26 - Clock Divider

impl R<u32, Reg<u32, _DPLLSYNCBUSY>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - DPLL Enable Synchronization Status

pub fn dpllratio(&self) -> DPLLRATIO_R[src]

Bit 2 - DPLL Loop Divider Ratio Synchronization Status

impl R<u32, Reg<u32, _DPLLSTATUS>>[src]

pub fn lock(&self) -> LOCK_R[src]

Bit 0 - DPLL Lock Status

pub fn clkrdy(&self) -> CLKRDY_R[src]

Bit 1 - DPLL Clock Ready

impl R<u8, Reg<u8, _EVCTRL>>[src]

pub fn cfdeo0(&self) -> CFDEO0_R[src]

Bit 0 - Clock 0 Failure Detector Event Output Enable

pub fn cfdeo1(&self) -> CFDEO1_R[src]

Bit 1 - Clock 1 Failure Detector Event Output Enable

impl R<u32, Reg<u32, _INTENCLR>>[src]

pub fn xoscrdy0(&self) -> XOSCRDY0_R[src]

Bit 0 - XOSC 0 Ready Interrupt Enable

pub fn xoscrdy1(&self) -> XOSCRDY1_R[src]

Bit 1 - XOSC 1 Ready Interrupt Enable

pub fn xoscfail0(&self) -> XOSCFAIL0_R[src]

Bit 2 - XOSC 0 Clock Failure Detector Interrupt Enable

pub fn xoscfail1(&self) -> XOSCFAIL1_R[src]

Bit 3 - XOSC 1 Clock Failure Detector Interrupt Enable

pub fn dfllrdy(&self) -> DFLLRDY_R[src]

Bit 8 - DFLL Ready Interrupt Enable

pub fn dflloob(&self) -> DFLLOOB_R[src]

Bit 9 - DFLL Out Of Bounds Interrupt Enable

pub fn dflllckf(&self) -> DFLLLCKF_R[src]

Bit 10 - DFLL Lock Fine Interrupt Enable

pub fn dflllckc(&self) -> DFLLLCKC_R[src]

Bit 11 - DFLL Lock Coarse Interrupt Enable

pub fn dfllrcs(&self) -> DFLLRCS_R[src]

Bit 12 - DFLL Reference Clock Stopped Interrupt Enable

pub fn dpll0lckr(&self) -> DPLL0LCKR_R[src]

Bit 16 - DPLL0 Lock Rise Interrupt Enable

pub fn dpll0lckf(&self) -> DPLL0LCKF_R[src]

Bit 17 - DPLL0 Lock Fall Interrupt Enable

pub fn dpll0lto(&self) -> DPLL0LTO_R[src]

Bit 18 - DPLL0 Lock Timeout Interrupt Enable

pub fn dpll0ldrto(&self) -> DPLL0LDRTO_R[src]

Bit 19 - DPLL0 Loop Divider Ratio Update Complete Interrupt Enable

pub fn dpll1lckr(&self) -> DPLL1LCKR_R[src]

Bit 24 - DPLL1 Lock Rise Interrupt Enable

pub fn dpll1lckf(&self) -> DPLL1LCKF_R[src]

Bit 25 - DPLL1 Lock Fall Interrupt Enable

pub fn dpll1lto(&self) -> DPLL1LTO_R[src]

Bit 26 - DPLL1 Lock Timeout Interrupt Enable

pub fn dpll1ldrto(&self) -> DPLL1LDRTO_R[src]

Bit 27 - DPLL1 Loop Divider Ratio Update Complete Interrupt Enable

impl R<u32, Reg<u32, _INTENSET>>[src]

pub fn xoscrdy0(&self) -> XOSCRDY0_R[src]

Bit 0 - XOSC 0 Ready Interrupt Enable

pub fn xoscrdy1(&self) -> XOSCRDY1_R[src]

Bit 1 - XOSC 1 Ready Interrupt Enable

pub fn xoscfail0(&self) -> XOSCFAIL0_R[src]

Bit 2 - XOSC 0 Clock Failure Detector Interrupt Enable

pub fn xoscfail1(&self) -> XOSCFAIL1_R[src]

Bit 3 - XOSC 1 Clock Failure Detector Interrupt Enable

pub fn dfllrdy(&self) -> DFLLRDY_R[src]

Bit 8 - DFLL Ready Interrupt Enable

pub fn dflloob(&self) -> DFLLOOB_R[src]

Bit 9 - DFLL Out Of Bounds Interrupt Enable

pub fn dflllckf(&self) -> DFLLLCKF_R[src]

Bit 10 - DFLL Lock Fine Interrupt Enable

pub fn dflllckc(&self) -> DFLLLCKC_R[src]

Bit 11 - DFLL Lock Coarse Interrupt Enable

pub fn dfllrcs(&self) -> DFLLRCS_R[src]

Bit 12 - DFLL Reference Clock Stopped Interrupt Enable

pub fn dpll0lckr(&self) -> DPLL0LCKR_R[src]

Bit 16 - DPLL0 Lock Rise Interrupt Enable

pub fn dpll0lckf(&self) -> DPLL0LCKF_R[src]

Bit 17 - DPLL0 Lock Fall Interrupt Enable

pub fn dpll0lto(&self) -> DPLL0LTO_R[src]

Bit 18 - DPLL0 Lock Timeout Interrupt Enable

pub fn dpll0ldrto(&self) -> DPLL0LDRTO_R[src]

Bit 19 - DPLL0 Loop Divider Ratio Update Complete Interrupt Enable

pub fn dpll1lckr(&self) -> DPLL1LCKR_R[src]

Bit 24 - DPLL1 Lock Rise Interrupt Enable

pub fn dpll1lckf(&self) -> DPLL1LCKF_R[src]

Bit 25 - DPLL1 Lock Fall Interrupt Enable

pub fn dpll1lto(&self) -> DPLL1LTO_R[src]

Bit 26 - DPLL1 Lock Timeout Interrupt Enable

pub fn dpll1ldrto(&self) -> DPLL1LDRTO_R[src]

Bit 27 - DPLL1 Loop Divider Ratio Update Complete Interrupt Enable

impl R<u32, Reg<u32, _INTFLAG>>[src]

pub fn xoscrdy0(&self) -> XOSCRDY0_R[src]

Bit 0 - XOSC 0 Ready

pub fn xoscrdy1(&self) -> XOSCRDY1_R[src]

Bit 1 - XOSC 1 Ready

pub fn xoscfail0(&self) -> XOSCFAIL0_R[src]

Bit 2 - XOSC 0 Clock Failure Detector

pub fn xoscfail1(&self) -> XOSCFAIL1_R[src]

Bit 3 - XOSC 1 Clock Failure Detector

pub fn dfllrdy(&self) -> DFLLRDY_R[src]

Bit 8 - DFLL Ready

pub fn dflloob(&self) -> DFLLOOB_R[src]

Bit 9 - DFLL Out Of Bounds

pub fn dflllckf(&self) -> DFLLLCKF_R[src]

Bit 10 - DFLL Lock Fine

pub fn dflllckc(&self) -> DFLLLCKC_R[src]

Bit 11 - DFLL Lock Coarse

pub fn dfllrcs(&self) -> DFLLRCS_R[src]

Bit 12 - DFLL Reference Clock Stopped

pub fn dpll0lckr(&self) -> DPLL0LCKR_R[src]

Bit 16 - DPLL0 Lock Rise

pub fn dpll0lckf(&self) -> DPLL0LCKF_R[src]

Bit 17 - DPLL0 Lock Fall

pub fn dpll0lto(&self) -> DPLL0LTO_R[src]

Bit 18 - DPLL0 Lock Timeout

pub fn dpll0ldrto(&self) -> DPLL0LDRTO_R[src]

Bit 19 - DPLL0 Loop Divider Ratio Update Complete

pub fn dpll1lckr(&self) -> DPLL1LCKR_R[src]

Bit 24 - DPLL1 Lock Rise

pub fn dpll1lckf(&self) -> DPLL1LCKF_R[src]

Bit 25 - DPLL1 Lock Fall

pub fn dpll1lto(&self) -> DPLL1LTO_R[src]

Bit 26 - DPLL1 Lock Timeout

pub fn dpll1ldrto(&self) -> DPLL1LDRTO_R[src]

Bit 27 - DPLL1 Loop Divider Ratio Update Complete

impl R<u32, Reg<u32, _STATUS>>[src]

pub fn xoscrdy0(&self) -> XOSCRDY0_R[src]

Bit 0 - XOSC 0 Ready

pub fn xoscrdy1(&self) -> XOSCRDY1_R[src]

Bit 1 - XOSC 1 Ready

pub fn xoscfail0(&self) -> XOSCFAIL0_R[src]

Bit 2 - XOSC 0 Clock Failure Detector

pub fn xoscfail1(&self) -> XOSCFAIL1_R[src]

Bit 3 - XOSC 1 Clock Failure Detector

pub fn xosccksw0(&self) -> XOSCCKSW0_R[src]

Bit 4 - XOSC 0 Clock Switch

pub fn xosccksw1(&self) -> XOSCCKSW1_R[src]

Bit 5 - XOSC 1 Clock Switch

pub fn dfllrdy(&self) -> DFLLRDY_R[src]

Bit 8 - DFLL Ready

pub fn dflloob(&self) -> DFLLOOB_R[src]

Bit 9 - DFLL Out Of Bounds

pub fn dflllckf(&self) -> DFLLLCKF_R[src]

Bit 10 - DFLL Lock Fine

pub fn dflllckc(&self) -> DFLLLCKC_R[src]

Bit 11 - DFLL Lock Coarse

pub fn dfllrcs(&self) -> DFLLRCS_R[src]

Bit 12 - DFLL Reference Clock Stopped

pub fn dpll0lckr(&self) -> DPLL0LCKR_R[src]

Bit 16 - DPLL0 Lock Rise

pub fn dpll0lckf(&self) -> DPLL0LCKF_R[src]

Bit 17 - DPLL0 Lock Fall

pub fn dpll0to(&self) -> DPLL0TO_R[src]

Bit 18 - DPLL0 Timeout

pub fn dpll0ldrto(&self) -> DPLL0LDRTO_R[src]

Bit 19 - DPLL0 Loop Divider Ratio Update Complete

pub fn dpll1lckr(&self) -> DPLL1LCKR_R[src]

Bit 24 - DPLL1 Lock Rise

pub fn dpll1lckf(&self) -> DPLL1LCKF_R[src]

Bit 25 - DPLL1 Lock Fall

pub fn dpll1to(&self) -> DPLL1TO_R[src]

Bit 26 - DPLL1 Timeout

pub fn dpll1ldrto(&self) -> DPLL1LDRTO_R[src]

Bit 27 - DPLL1 Loop Divider Ratio Update Complete

impl R<u8, STARTUP_A>[src]

pub fn variant(&self) -> STARTUP_A[src]

Get enumerated values variant

pub fn is_cycle1(&self) -> bool[src]

Checks if the value of the field is CYCLE1

pub fn is_cycle2(&self) -> bool[src]

Checks if the value of the field is CYCLE2

pub fn is_cycle4(&self) -> bool[src]

Checks if the value of the field is CYCLE4

pub fn is_cycle8(&self) -> bool[src]

Checks if the value of the field is CYCLE8

pub fn is_cycle16(&self) -> bool[src]

Checks if the value of the field is CYCLE16

pub fn is_cycle32(&self) -> bool[src]

Checks if the value of the field is CYCLE32

pub fn is_cycle64(&self) -> bool[src]

Checks if the value of the field is CYCLE64

pub fn is_cycle128(&self) -> bool[src]

Checks if the value of the field is CYCLE128

pub fn is_cycle256(&self) -> bool[src]

Checks if the value of the field is CYCLE256

pub fn is_cycle512(&self) -> bool[src]

Checks if the value of the field is CYCLE512

pub fn is_cycle1024(&self) -> bool[src]

Checks if the value of the field is CYCLE1024

pub fn is_cycle2048(&self) -> bool[src]

Checks if the value of the field is CYCLE2048

pub fn is_cycle4096(&self) -> bool[src]

Checks if the value of the field is CYCLE4096

pub fn is_cycle8192(&self) -> bool[src]

Checks if the value of the field is CYCLE8192

pub fn is_cycle16384(&self) -> bool[src]

Checks if the value of the field is CYCLE16384

pub fn is_cycle32768(&self) -> bool[src]

Checks if the value of the field is CYCLE32768

impl R<u8, CFDPRESC_A>[src]

pub fn variant(&self) -> Variant<u8, CFDPRESC_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

impl R<u32, Reg<u32, _XOSCCTRL>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Oscillator Enable

pub fn xtalen(&self) -> XTALEN_R[src]

Bit 2 - Crystal Oscillator Enable

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run in Standby

pub fn ondemand(&self) -> ONDEMAND_R[src]

Bit 7 - On Demand Control

pub fn lowbufgain(&self) -> LOWBUFGAIN_R[src]

Bit 8 - Low Buffer Gain Enable

pub fn iptat(&self) -> IPTAT_R[src]

Bits 9:10 - Oscillator Current Reference

pub fn imult(&self) -> IMULT_R[src]

Bits 11:14 - Oscillator Current Multiplier

pub fn enalc(&self) -> ENALC_R[src]

Bit 15 - Automatic Loop Control Enable

pub fn cfden(&self) -> CFDEN_R[src]

Bit 16 - Clock Failure Detector Enable

pub fn swben(&self) -> SWBEN_R[src]

Bit 17 - Xosc Clock Switch Enable

pub fn startup(&self) -> STARTUP_R[src]

Bits 20:23 - Start-Up Time

pub fn cfdpresc(&self) -> CFDPRESC_R[src]

Bits 24:27 - Clock Failure Detector Prescaler

impl R<u8, Reg<u8, _DFLLCTRLA>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - DFLL Enable

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run in Standby

pub fn ondemand(&self) -> ONDEMAND_R[src]

Bit 7 - On Demand Control

impl R<u8, Reg<u8, _DFLLCTRLB>>[src]

pub fn mode(&self) -> MODE_R[src]

Bit 0 - Operating Mode Selection

pub fn stable(&self) -> STABLE_R[src]

Bit 1 - Stable DFLL Frequency

pub fn llaw(&self) -> LLAW_R[src]

Bit 2 - Lose Lock After Wake

pub fn usbcrm(&self) -> USBCRM_R[src]

Bit 3 - USB Clock Recovery Mode

pub fn ccdis(&self) -> CCDIS_R[src]

Bit 4 - Chill Cycle Disable

pub fn qldis(&self) -> QLDIS_R[src]

Bit 5 - Quick Lock Disable

pub fn bplckc(&self) -> BPLCKC_R[src]

Bit 6 - Bypass Coarse Lock

pub fn waitlock(&self) -> WAITLOCK_R[src]

Bit 7 - Wait Lock

impl R<u32, Reg<u32, _DFLLVAL>>[src]

pub fn fine(&self) -> FINE_R[src]

Bits 0:7 - Fine Value

pub fn coarse(&self) -> COARSE_R[src]

Bits 10:15 - Coarse Value

pub fn diff(&self) -> DIFF_R[src]

Bits 16:31 - Multiplication Ratio Difference

impl R<u32, Reg<u32, _DFLLMUL>>[src]

pub fn mul(&self) -> MUL_R[src]

Bits 0:15 - DFLL Multiply Factor

pub fn fstep(&self) -> FSTEP_R[src]

Bits 16:23 - Fine Maximum Step

pub fn cstep(&self) -> CSTEP_R[src]

Bits 26:31 - Coarse Maximum Step

impl R<u8, Reg<u8, _DFLLSYNC>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - ENABLE Synchronization Busy

pub fn dfllctrlb(&self) -> DFLLCTRLB_R[src]

Bit 2 - DFLLCTRLB Synchronization Busy

pub fn dfllval(&self) -> DFLLVAL_R[src]

Bit 3 - DFLLVAL Synchronization Busy

pub fn dfllmul(&self) -> DFLLMUL_R[src]

Bit 4 - DFLLMUL Synchronization Busy

impl R<u32, Reg<u32, _INTENCLR>>[src]

pub fn xosc32krdy(&self) -> XOSC32KRDY_R[src]

Bit 0 - XOSC32K Ready Interrupt Enable

pub fn xosc32kfail(&self) -> XOSC32KFAIL_R[src]

Bit 2 - XOSC32K Clock Failure Detector Interrupt Enable

impl R<u32, Reg<u32, _INTENSET>>[src]

pub fn xosc32krdy(&self) -> XOSC32KRDY_R[src]

Bit 0 - XOSC32K Ready Interrupt Enable

pub fn xosc32kfail(&self) -> XOSC32KFAIL_R[src]

Bit 2 - XOSC32K Clock Failure Detector Interrupt Enable

impl R<u32, Reg<u32, _INTFLAG>>[src]

pub fn xosc32krdy(&self) -> XOSC32KRDY_R[src]

Bit 0 - XOSC32K Ready

pub fn xosc32kfail(&self) -> XOSC32KFAIL_R[src]

Bit 2 - XOSC32K Clock Failure Detector

impl R<u32, Reg<u32, _STATUS>>[src]

pub fn xosc32krdy(&self) -> XOSC32KRDY_R[src]

Bit 0 - XOSC32K Ready

pub fn xosc32kfail(&self) -> XOSC32KFAIL_R[src]

Bit 2 - XOSC32K Clock Failure Detector

pub fn xosc32ksw(&self) -> XOSC32KSW_R[src]

Bit 3 - XOSC32K Clock switch

impl R<u8, RTCSEL_A>[src]

pub fn variant(&self) -> Variant<u8, RTCSEL_A>[src]

Get enumerated values variant

pub fn is_ulp1k(&self) -> bool[src]

Checks if the value of the field is ULP1K

pub fn is_ulp32k(&self) -> bool[src]

Checks if the value of the field is ULP32K

pub fn is_xosc1k(&self) -> bool[src]

Checks if the value of the field is XOSC1K

pub fn is_xosc32k(&self) -> bool[src]

Checks if the value of the field is XOSC32K

impl R<u8, Reg<u8, _RTCCTRL>>[src]

pub fn rtcsel(&self) -> RTCSEL_R[src]

Bits 0:2 - RTC Clock Selection

impl R<u8, STARTUP_A>[src]

pub fn variant(&self) -> Variant<u8, STARTUP_A>[src]

Get enumerated values variant

pub fn is_cycle2048(&self) -> bool[src]

Checks if the value of the field is CYCLE2048

pub fn is_cycle4096(&self) -> bool[src]

Checks if the value of the field is CYCLE4096

pub fn is_cycle16384(&self) -> bool[src]

Checks if the value of the field is CYCLE16384

pub fn is_cycle32768(&self) -> bool[src]

Checks if the value of the field is CYCLE32768

pub fn is_cycle65536(&self) -> bool[src]

Checks if the value of the field is CYCLE65536

pub fn is_cycle131072(&self) -> bool[src]

Checks if the value of the field is CYCLE131072

pub fn is_cycle262144(&self) -> bool[src]

Checks if the value of the field is CYCLE262144

impl R<u8, CGM_A>[src]

pub fn variant(&self) -> Variant<u8, CGM_A>[src]

Get enumerated values variant

pub fn is_xt(&self) -> bool[src]

Checks if the value of the field is XT

pub fn is_hs(&self) -> bool[src]

Checks if the value of the field is HS

impl R<u16, Reg<u16, _XOSC32K>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Oscillator Enable

pub fn xtalen(&self) -> XTALEN_R[src]

Bit 2 - Crystal Oscillator Enable

pub fn en32k(&self) -> EN32K_R[src]

Bit 3 - 32kHz Output Enable

pub fn en1k(&self) -> EN1K_R[src]

Bit 4 - 1kHz Output Enable

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run in Standby

pub fn ondemand(&self) -> ONDEMAND_R[src]

Bit 7 - On Demand Control

pub fn startup(&self) -> STARTUP_R[src]

Bits 8:10 - Oscillator Start-Up Time

pub fn wrtlock(&self) -> WRTLOCK_R[src]

Bit 12 - Write Lock

pub fn cgm(&self) -> CGM_R[src]

Bits 13:14 - Control Gain Mode

impl R<u8, Reg<u8, _CFDCTRL>>[src]

pub fn cfden(&self) -> CFDEN_R[src]

Bit 0 - Clock Failure Detector Enable

pub fn swback(&self) -> SWBACK_R[src]

Bit 1 - Clock Switch Back

pub fn cfdpresc(&self) -> CFDPRESC_R[src]

Bit 2 - Clock Failure Detector Prescaler

impl R<u8, Reg<u8, _EVCTRL>>[src]

pub fn cfdeo(&self) -> CFDEO_R[src]

Bit 0 - Clock Failure Detector Event Output Enable

impl R<u32, Reg<u32, _OSCULP32K>>[src]

pub fn en32k(&self) -> EN32K_R[src]

Bit 1 - Enable Out 32k

pub fn en1k(&self) -> EN1K_R[src]

Bit 2 - Enable Out 1k

pub fn wrtlock(&self) -> WRTLOCK_R[src]

Bit 15 - Write Lock

impl R<u8, KEY_A>[src]

pub fn variant(&self) -> Variant<u8, KEY_A>[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_clr(&self) -> bool[src]

Checks if the value of the field is CLR

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_setlck(&self) -> bool[src]

Checks if the value of the field is SETLCK

impl R<u32, Reg<u32, _WRCTRL>>[src]

pub fn perid(&self) -> PERID_R[src]

Bits 0:15 - Peripheral identifier

pub fn key(&self) -> KEY_R[src]

Bits 16:23 - Peripheral access control key

impl R<u8, Reg<u8, _EVCTRL>>[src]

pub fn erreo(&self) -> ERREO_R[src]

Bit 0 - Peripheral acess error event output

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn err(&self) -> ERR_R[src]

Bit 0 - Peripheral access error interrupt disable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn err(&self) -> ERR_R[src]

Bit 0 - Peripheral access error interrupt enable

impl R<u32, Reg<u32, _INTFLAGAHB>>[src]

pub fn flash_(&self) -> FLASH__R[src]

Bit 0 - FLASH

pub fn flash_alt_(&self) -> FLASH_ALT__R[src]

Bit 1 - FLASH_ALT

pub fn seeprom_(&self) -> SEEPROM__R[src]

Bit 2 - SEEPROM

pub fn ramcm4s_(&self) -> RAMCM4S__R[src]

Bit 3 - RAMCM4S

pub fn rampppdsu_(&self) -> RAMPPPDSU__R[src]

Bit 4 - RAMPPPDSU

pub fn ramdmawr_(&self) -> RAMDMAWR__R[src]

Bit 5 - RAMDMAWR

pub fn ramdmacicm_(&self) -> RAMDMACICM__R[src]

Bit 6 - RAMDMACICM

pub fn hpb0_(&self) -> HPB0__R[src]

Bit 7 - HPB0

pub fn hpb1_(&self) -> HPB1__R[src]

Bit 8 - HPB1

pub fn hpb2_(&self) -> HPB2__R[src]

Bit 9 - HPB2

pub fn hpb3_(&self) -> HPB3__R[src]

Bit 10 - HPB3

pub fn pukcc_(&self) -> PUKCC__R[src]

Bit 11 - PUKCC

pub fn sdhc0_(&self) -> SDHC0__R[src]

Bit 12 - SDHC0

pub fn sdhc1_(&self) -> SDHC1__R[src]

Bit 13 - SDHC1

pub fn qspi_(&self) -> QSPI__R[src]

Bit 14 - QSPI

pub fn bkupram_(&self) -> BKUPRAM__R[src]

Bit 15 - BKUPRAM

impl R<u32, Reg<u32, _INTFLAGA>>[src]

pub fn pac_(&self) -> PAC__R[src]

Bit 0 - PAC

pub fn pm_(&self) -> PM__R[src]

Bit 1 - PM

pub fn mclk_(&self) -> MCLK__R[src]

Bit 2 - MCLK

pub fn rstc_(&self) -> RSTC__R[src]

Bit 3 - RSTC

pub fn oscctrl_(&self) -> OSCCTRL__R[src]

Bit 4 - OSCCTRL

pub fn osc32kctrl_(&self) -> OSC32KCTRL__R[src]

Bit 5 - OSC32KCTRL

pub fn supc_(&self) -> SUPC__R[src]

Bit 6 - SUPC

pub fn gclk_(&self) -> GCLK__R[src]

Bit 7 - GCLK

pub fn wdt_(&self) -> WDT__R[src]

Bit 8 - WDT

pub fn rtc_(&self) -> RTC__R[src]

Bit 9 - RTC

pub fn eic_(&self) -> EIC__R[src]

Bit 10 - EIC

pub fn freqm_(&self) -> FREQM__R[src]

Bit 11 - FREQM

pub fn sercom0_(&self) -> SERCOM0__R[src]

Bit 12 - SERCOM0

pub fn sercom1_(&self) -> SERCOM1__R[src]

Bit 13 - SERCOM1

pub fn tc0_(&self) -> TC0__R[src]

Bit 14 - TC0

pub fn tc1_(&self) -> TC1__R[src]

Bit 15 - TC1

impl R<u32, Reg<u32, _INTFLAGB>>[src]

pub fn usb_(&self) -> USB__R[src]

Bit 0 - USB

pub fn dsu_(&self) -> DSU__R[src]

Bit 1 - DSU

pub fn nvmctrl_(&self) -> NVMCTRL__R[src]

Bit 2 - NVMCTRL

pub fn cmcc_(&self) -> CMCC__R[src]

Bit 3 - CMCC

pub fn port_(&self) -> PORT__R[src]

Bit 4 - PORT

pub fn dmac_(&self) -> DMAC__R[src]

Bit 5 - DMAC

pub fn hmatrix_(&self) -> HMATRIX__R[src]

Bit 6 - HMATRIX

pub fn evsys_(&self) -> EVSYS__R[src]

Bit 7 - EVSYS

pub fn sercom2_(&self) -> SERCOM2__R[src]

Bit 9 - SERCOM2

pub fn sercom3_(&self) -> SERCOM3__R[src]

Bit 10 - SERCOM3

pub fn tcc0_(&self) -> TCC0__R[src]

Bit 11 - TCC0

pub fn tcc1_(&self) -> TCC1__R[src]

Bit 12 - TCC1

pub fn tc2_(&self) -> TC2__R[src]

Bit 13 - TC2

pub fn tc3_(&self) -> TC3__R[src]

Bit 14 - TC3

pub fn ramecc_(&self) -> RAMECC__R[src]

Bit 16 - RAMECC

impl R<u32, Reg<u32, _INTFLAGC>>[src]

pub fn can0_(&self) -> CAN0__R[src]

Bit 0 - CAN0

pub fn can1_(&self) -> CAN1__R[src]

Bit 1 - CAN1

pub fn gmac_(&self) -> GMAC__R[src]

Bit 2 - GMAC

pub fn tcc2_(&self) -> TCC2__R[src]

Bit 3 - TCC2

pub fn tcc3_(&self) -> TCC3__R[src]

Bit 4 - TCC3

pub fn tc4_(&self) -> TC4__R[src]

Bit 5 - TC4

pub fn tc5_(&self) -> TC5__R[src]

Bit 6 - TC5

pub fn pdec_(&self) -> PDEC__R[src]

Bit 7 - PDEC

pub fn ac_(&self) -> AC__R[src]

Bit 8 - AC

pub fn aes_(&self) -> AES__R[src]

Bit 9 - AES

pub fn trng_(&self) -> TRNG__R[src]

Bit 10 - TRNG

pub fn icm_(&self) -> ICM__R[src]

Bit 11 - ICM

pub fn pukcc_(&self) -> PUKCC__R[src]

Bit 12 - PUKCC

pub fn qspi_(&self) -> QSPI__R[src]

Bit 13 - QSPI

pub fn ccl_(&self) -> CCL__R[src]

Bit 14 - CCL

impl R<u32, Reg<u32, _INTFLAGD>>[src]

pub fn sercom4_(&self) -> SERCOM4__R[src]

Bit 0 - SERCOM4

pub fn sercom5_(&self) -> SERCOM5__R[src]

Bit 1 - SERCOM5

pub fn sercom6_(&self) -> SERCOM6__R[src]

Bit 2 - SERCOM6

pub fn sercom7_(&self) -> SERCOM7__R[src]

Bit 3 - SERCOM7

pub fn tcc4_(&self) -> TCC4__R[src]

Bit 4 - TCC4

pub fn tc6_(&self) -> TC6__R[src]

Bit 5 - TC6

pub fn tc7_(&self) -> TC7__R[src]

Bit 6 - TC7

pub fn adc0_(&self) -> ADC0__R[src]

Bit 7 - ADC0

pub fn adc1_(&self) -> ADC1__R[src]

Bit 8 - ADC1

pub fn dac_(&self) -> DAC__R[src]

Bit 9 - DAC

pub fn i2s_(&self) -> I2S__R[src]

Bit 10 - I2S

pub fn pcc_(&self) -> PCC__R[src]

Bit 11 - PCC

impl R<u32, Reg<u32, _STATUSA>>[src]

pub fn pac_(&self) -> PAC__R[src]

Bit 0 - PAC APB Protect Enable

pub fn pm_(&self) -> PM__R[src]

Bit 1 - PM APB Protect Enable

pub fn mclk_(&self) -> MCLK__R[src]

Bit 2 - MCLK APB Protect Enable

pub fn rstc_(&self) -> RSTC__R[src]

Bit 3 - RSTC APB Protect Enable

pub fn oscctrl_(&self) -> OSCCTRL__R[src]

Bit 4 - OSCCTRL APB Protect Enable

pub fn osc32kctrl_(&self) -> OSC32KCTRL__R[src]

Bit 5 - OSC32KCTRL APB Protect Enable

pub fn supc_(&self) -> SUPC__R[src]

Bit 6 - SUPC APB Protect Enable

pub fn gclk_(&self) -> GCLK__R[src]

Bit 7 - GCLK APB Protect Enable

pub fn wdt_(&self) -> WDT__R[src]

Bit 8 - WDT APB Protect Enable

pub fn rtc_(&self) -> RTC__R[src]

Bit 9 - RTC APB Protect Enable

pub fn eic_(&self) -> EIC__R[src]

Bit 10 - EIC APB Protect Enable

pub fn freqm_(&self) -> FREQM__R[src]

Bit 11 - FREQM APB Protect Enable

pub fn sercom0_(&self) -> SERCOM0__R[src]

Bit 12 - SERCOM0 APB Protect Enable

pub fn sercom1_(&self) -> SERCOM1__R[src]

Bit 13 - SERCOM1 APB Protect Enable

pub fn tc0_(&self) -> TC0__R[src]

Bit 14 - TC0 APB Protect Enable

pub fn tc1_(&self) -> TC1__R[src]

Bit 15 - TC1 APB Protect Enable

impl R<u32, Reg<u32, _STATUSB>>[src]

pub fn usb_(&self) -> USB__R[src]

Bit 0 - USB APB Protect Enable

pub fn dsu_(&self) -> DSU__R[src]

Bit 1 - DSU APB Protect Enable

pub fn nvmctrl_(&self) -> NVMCTRL__R[src]

Bit 2 - NVMCTRL APB Protect Enable

pub fn cmcc_(&self) -> CMCC__R[src]

Bit 3 - CMCC APB Protect Enable

pub fn port_(&self) -> PORT__R[src]

Bit 4 - PORT APB Protect Enable

pub fn dmac_(&self) -> DMAC__R[src]

Bit 5 - DMAC APB Protect Enable

pub fn hmatrix_(&self) -> HMATRIX__R[src]

Bit 6 - HMATRIX APB Protect Enable

pub fn evsys_(&self) -> EVSYS__R[src]

Bit 7 - EVSYS APB Protect Enable

pub fn sercom2_(&self) -> SERCOM2__R[src]

Bit 9 - SERCOM2 APB Protect Enable

pub fn sercom3_(&self) -> SERCOM3__R[src]

Bit 10 - SERCOM3 APB Protect Enable

pub fn tcc0_(&self) -> TCC0__R[src]

Bit 11 - TCC0 APB Protect Enable

pub fn tcc1_(&self) -> TCC1__R[src]

Bit 12 - TCC1 APB Protect Enable

pub fn tc2_(&self) -> TC2__R[src]

Bit 13 - TC2 APB Protect Enable

pub fn tc3_(&self) -> TC3__R[src]

Bit 14 - TC3 APB Protect Enable

pub fn ramecc_(&self) -> RAMECC__R[src]

Bit 16 - RAMECC APB Protect Enable

impl R<u32, Reg<u32, _STATUSC>>[src]

pub fn can0_(&self) -> CAN0__R[src]

Bit 0 - CAN0 APB Protect Enable

pub fn can1_(&self) -> CAN1__R[src]

Bit 1 - CAN1 APB Protect Enable

pub fn gmac_(&self) -> GMAC__R[src]

Bit 2 - GMAC APB Protect Enable

pub fn tcc2_(&self) -> TCC2__R[src]

Bit 3 - TCC2 APB Protect Enable

pub fn tcc3_(&self) -> TCC3__R[src]

Bit 4 - TCC3 APB Protect Enable

pub fn tc4_(&self) -> TC4__R[src]

Bit 5 - TC4 APB Protect Enable

pub fn tc5_(&self) -> TC5__R[src]

Bit 6 - TC5 APB Protect Enable

pub fn pdec_(&self) -> PDEC__R[src]

Bit 7 - PDEC APB Protect Enable

pub fn ac_(&self) -> AC__R[src]

Bit 8 - AC APB Protect Enable

pub fn aes_(&self) -> AES__R[src]

Bit 9 - AES APB Protect Enable

pub fn trng_(&self) -> TRNG__R[src]

Bit 10 - TRNG APB Protect Enable

pub fn icm_(&self) -> ICM__R[src]

Bit 11 - ICM APB Protect Enable

pub fn pukcc_(&self) -> PUKCC__R[src]

Bit 12 - PUKCC APB Protect Enable

pub fn qspi_(&self) -> QSPI__R[src]

Bit 13 - QSPI APB Protect Enable

pub fn ccl_(&self) -> CCL__R[src]

Bit 14 - CCL APB Protect Enable

impl R<u32, Reg<u32, _STATUSD>>[src]

pub fn sercom4_(&self) -> SERCOM4__R[src]

Bit 0 - SERCOM4 APB Protect Enable

pub fn sercom5_(&self) -> SERCOM5__R[src]

Bit 1 - SERCOM5 APB Protect Enable

pub fn sercom6_(&self) -> SERCOM6__R[src]

Bit 2 - SERCOM6 APB Protect Enable

pub fn sercom7_(&self) -> SERCOM7__R[src]

Bit 3 - SERCOM7 APB Protect Enable

pub fn tcc4_(&self) -> TCC4__R[src]

Bit 4 - TCC4 APB Protect Enable

pub fn tc6_(&self) -> TC6__R[src]

Bit 5 - TC6 APB Protect Enable

pub fn tc7_(&self) -> TC7__R[src]

Bit 6 - TC7 APB Protect Enable

pub fn adc0_(&self) -> ADC0__R[src]

Bit 7 - ADC0 APB Protect Enable

pub fn adc1_(&self) -> ADC1__R[src]

Bit 8 - ADC1 APB Protect Enable

pub fn dac_(&self) -> DAC__R[src]

Bit 9 - DAC APB Protect Enable

pub fn i2s_(&self) -> I2S__R[src]

Bit 10 - I2S APB Protect Enable

pub fn pcc_(&self) -> PCC__R[src]

Bit 11 - PCC APB Protect Enable

impl R<u32, Reg<u32, _MR>>[src]

pub fn pcen(&self) -> PCEN_R[src]

Bit 0 - Parallel Capture Enable

pub fn dsize(&self) -> DSIZE_R[src]

Bits 4:5 - Data size

pub fn scale(&self) -> SCALE_R[src]

Bit 8 - Scale data

pub fn alwys(&self) -> ALWYS_R[src]

Bit 9 - Always Sampling

pub fn halfs(&self) -> HALFS_R[src]

Bit 10 - Half Sampling

pub fn frsts(&self) -> FRSTS_R[src]

Bit 11 - First sample

pub fn isize(&self) -> ISIZE_R[src]

Bits 16:18 - Input Data Size

pub fn cid(&self) -> CID_R[src]

Bits 30:31 - Clear If Disabled

impl R<u32, Reg<u32, _IMR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Data Ready Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Overrun Error Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Data Ready Interrupt Status

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Overrun Error Interrupt Status

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 0:31 - Reception Data

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Source

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Status

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_qdec(&self) -> bool[src]

Checks if the value of the field is QDEC

pub fn is_hall(&self) -> bool[src]

Checks if the value of the field is HALL

pub fn is_counter(&self) -> bool[src]

Checks if the value of the field is COUNTER

impl R<u8, CONF_A>[src]

pub fn variant(&self) -> Variant<u8, CONF_A>[src]

Get enumerated values variant

pub fn is_x4(&self) -> bool[src]

Checks if the value of the field is X4

pub fn is_x4s(&self) -> bool[src]

Checks if the value of the field is X4S

pub fn is_x2(&self) -> bool[src]

Checks if the value of the field is X2

pub fn is_x2s(&self) -> bool[src]

Checks if the value of the field is X2S

pub fn is_autoc(&self) -> bool[src]

Checks if the value of the field is AUTOC

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:3 - Operation Mode

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run in Standby

pub fn conf(&self) -> CONF_R[src]

Bits 8:10 - PDEC Configuration

pub fn alock(&self) -> ALOCK_R[src]

Bit 11 - Auto Lock

pub fn swap(&self) -> SWAP_R[src]

Bit 14 - PDEC Phase A and B Swap

pub fn peren(&self) -> PEREN_R[src]

Bit 15 - Period Enable

pub fn pinen0(&self) -> PINEN0_R[src]

Bit 16 - PDEC Input From Pin 0 Enable

pub fn pinen1(&self) -> PINEN1_R[src]

Bit 17 - PDEC Input From Pin 1 Enable

pub fn pinen2(&self) -> PINEN2_R[src]

Bit 18 - PDEC Input From Pin 2 Enable

pub fn pinven0(&self) -> PINVEN0_R[src]

Bit 20 - IO Pin 0 Invert Enable

pub fn pinven1(&self) -> PINVEN1_R[src]

Bit 21 - IO Pin 1 Invert Enable

pub fn pinven2(&self) -> PINVEN2_R[src]

Bit 22 - IO Pin 2 Invert Enable

pub fn angular(&self) -> ANGULAR_R[src]

Bits 24:26 - Angular Counter Length

pub fn maxcmp(&self) -> MAXCMP_R[src]

Bits 28:31 - Maximum Consecutive Missing Pulses

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_readsync(&self) -> bool[src]

Checks if the value of the field is READSYNC

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<u8, Reg<u8, _CTRLBCLR>>[src]

pub fn lupd(&self) -> LUPD_R[src]

Bit 1 - Lock Update

pub fn cmd(&self) -> CMD_R[src]

Bits 5:7 - Command

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_readsync(&self) -> bool[src]

Checks if the value of the field is READSYNC

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<u8, Reg<u8, _CTRLBSET>>[src]

pub fn lupd(&self) -> LUPD_R[src]

Bit 1 - Lock Update

pub fn cmd(&self) -> CMD_R[src]

Bits 5:7 - Command

impl R<u8, EVACT_A>[src]

pub fn variant(&self) -> Variant<u8, EVACT_A>[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_count(&self) -> bool[src]

Checks if the value of the field is COUNT

impl R<u16, Reg<u16, _EVCTRL>>[src]

pub fn evact(&self) -> EVACT_R[src]

Bits 0:1 - Event Action

pub fn evinv(&self) -> EVINV_R[src]

Bits 2:4 - Inverted Event Input Enable

pub fn evei(&self) -> EVEI_R[src]

Bits 5:7 - Event Input Enable

pub fn ovfeo(&self) -> OVFEO_R[src]

Bit 8 - Overflow/Underflow Output Event Enable

pub fn erreo(&self) -> ERREO_R[src]

Bit 9 - Error Output Event Enable

pub fn direo(&self) -> DIREO_R[src]

Bit 10 - Direction Output Event Enable

pub fn vlceo(&self) -> VLCEO_R[src]

Bit 11 - Velocity Output Event Enable

pub fn mceo0(&self) -> MCEO0_R[src]

Bit 12 - Match Channel 0 Event Output Enable

pub fn mceo1(&self) -> MCEO1_R[src]

Bit 13 - Match Channel 1 Event Output Enable

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - Overflow/Underflow Interrupt Disable

pub fn err(&self) -> ERR_R[src]

Bit 1 - Error Interrupt Disable

pub fn dir(&self) -> DIR_R[src]

Bit 2 - Direction Interrupt Disable

pub fn vlc(&self) -> VLC_R[src]

Bit 3 - Velocity Interrupt Disable

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - Channel 0 Compare Match Disable

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - Channel 1 Compare Match Disable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - Overflow/Underflow Interrupt Enable

pub fn err(&self) -> ERR_R[src]

Bit 1 - Error Interrupt Enable

pub fn dir(&self) -> DIR_R[src]

Bit 2 - Direction Interrupt Enable

pub fn vlc(&self) -> VLC_R[src]

Bit 3 - Velocity Interrupt Enable

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - Channel 0 Compare Match Enable

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - Channel 1 Compare Match Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - Overflow/Underflow

pub fn err(&self) -> ERR_R[src]

Bit 1 - Error

pub fn dir(&self) -> DIR_R[src]

Bit 2 - Direction Change

pub fn vlc(&self) -> VLC_R[src]

Bit 3 - Velocity

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - Channel 0 Compare Match

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - Channel 1 Compare Match

impl R<u16, Reg<u16, _STATUS>>[src]

pub fn qerr(&self) -> QERR_R[src]

Bit 0 - Quadrature Error Flag

pub fn idxerr(&self) -> IDXERR_R[src]

Bit 1 - Index Error Flag

pub fn mperr(&self) -> MPERR_R[src]

Bit 2 - Missing Pulse Error flag

pub fn winerr(&self) -> WINERR_R[src]

Bit 4 - Window Error Flag

pub fn herr(&self) -> HERR_R[src]

Bit 5 - Hall Error Flag

pub fn stop(&self) -> STOP_R[src]

Bit 6 - Stop

pub fn dir(&self) -> DIR_R[src]

Bit 7 - Direction Status Flag

pub fn prescbufv(&self) -> PRESCBUFV_R[src]

Bit 8 - Prescaler Buffer Valid

pub fn filterbufv(&self) -> FILTERBUFV_R[src]

Bit 9 - Filter Buffer Valid

pub fn ccbufv0(&self) -> CCBUFV0_R[src]

Bit 12 - Compare Channel 0 Buffer Valid

pub fn ccbufv1(&self) -> CCBUFV1_R[src]

Bit 13 - Compare Channel 1 Buffer Valid

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Debug Run Mode

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable Synchronization Busy

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 2 - Control B Synchronization Busy

pub fn status(&self) -> STATUS_R[src]

Bit 3 - Status Synchronization Busy

pub fn presc(&self) -> PRESC_R[src]

Bit 4 - Prescaler Synchronization Busy

pub fn filter(&self) -> FILTER_R[src]

Bit 5 - Filter Synchronization Busy

pub fn count(&self) -> COUNT_R[src]

Bit 6 - Count Synchronization Busy

pub fn cc0(&self) -> CC0_R[src]

Bit 7 - Compare Channel 0 Synchronization Busy

pub fn cc1(&self) -> CC1_R[src]

Bit 8 - Compare Channel 1 Synchronization Busy

impl R<u8, PRESC_A>[src]

pub fn variant(&self) -> Variant<u8, PRESC_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div512(&self) -> bool[src]

Checks if the value of the field is DIV512

pub fn is_div1024(&self) -> bool[src]

Checks if the value of the field is DIV1024

impl R<u8, Reg<u8, _PRESC>>[src]

pub fn presc(&self) -> PRESC_R[src]

Bits 0:3 - Prescaler Value

impl R<u8, Reg<u8, _FILTER>>[src]

pub fn filter(&self) -> FILTER_R[src]

Bits 0:7 - Filter Value

impl R<u8, PRESCBUF_A>[src]

pub fn variant(&self) -> Variant<u8, PRESCBUF_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div512(&self) -> bool[src]

Checks if the value of the field is DIV512

pub fn is_div1024(&self) -> bool[src]

Checks if the value of the field is DIV1024

impl R<u8, Reg<u8, _PRESCBUF>>[src]

pub fn prescbuf(&self) -> PRESCBUF_R[src]

Bits 0:3 - Prescaler Buffer Value

impl R<u8, Reg<u8, _FILTERBUF>>[src]

pub fn filterbuf(&self) -> FILTERBUF_R[src]

Bits 0:7 - Filter Buffer Value

impl R<u32, Reg<u32, _COUNT>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 0:15 - Counter Value

impl R<u32, Reg<u32, _CC>>[src]

pub fn cc(&self) -> CC_R[src]

Bits 0:15 - Channel Compare Value

impl R<u32, Reg<u32, _CCBUF>>[src]

pub fn ccbuf(&self) -> CCBUF_R[src]

Bits 0:15 - Channel Compare Buffer Value

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn ioret(&self) -> IORET_R[src]

Bit 2 - I/O Retention

impl R<u8, SLEEPMODE_A>[src]

pub fn variant(&self) -> Variant<u8, SLEEPMODE_A>[src]

Get enumerated values variant

pub fn is_idle(&self) -> bool[src]

Checks if the value of the field is IDLE

pub fn is_standby(&self) -> bool[src]

Checks if the value of the field is STANDBY

pub fn is_hibernate(&self) -> bool[src]

Checks if the value of the field is HIBERNATE

pub fn is_backup(&self) -> bool[src]

Checks if the value of the field is BACKUP

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

impl R<u8, Reg<u8, _SLEEPCFG>>[src]

pub fn sleepmode(&self) -> SLEEPMODE_R[src]

Bits 0:2 - Sleep Mode

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn sleeprdy(&self) -> SLEEPRDY_R[src]

Bit 0 - Sleep Mode Entry Ready Enable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn sleeprdy(&self) -> SLEEPRDY_R[src]

Bit 0 - Sleep Mode Entry Ready Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn sleeprdy(&self) -> SLEEPRDY_R[src]

Bit 0 - Sleep Mode Entry Ready

impl R<u8, RAMCFG_A>[src]

pub fn variant(&self) -> Variant<u8, RAMCFG_A>[src]

Get enumerated values variant

pub fn is_ret(&self) -> bool[src]

Checks if the value of the field is RET

pub fn is_partial(&self) -> bool[src]

Checks if the value of the field is PARTIAL

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

impl R<u8, FASTWKUP_A>[src]

pub fn variant(&self) -> FASTWKUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_nvm(&self) -> bool[src]

Checks if the value of the field is NVM

pub fn is_mainvreg(&self) -> bool[src]

Checks if the value of the field is MAINVREG

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

impl R<u8, Reg<u8, _STDBYCFG>>[src]

pub fn ramcfg(&self) -> RAMCFG_R[src]

Bits 0:1 - Ram Configuration

pub fn fastwkup(&self) -> FASTWKUP_R[src]

Bits 4:5 - Fast Wakeup

impl R<u8, RAMCFG_A>[src]

pub fn variant(&self) -> Variant<u8, RAMCFG_A>[src]

Get enumerated values variant

pub fn is_ret(&self) -> bool[src]

Checks if the value of the field is RET

pub fn is_partial(&self) -> bool[src]

Checks if the value of the field is PARTIAL

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

impl R<u8, BRAMCFG_A>[src]

pub fn variant(&self) -> Variant<u8, BRAMCFG_A>[src]

Get enumerated values variant

pub fn is_ret(&self) -> bool[src]

Checks if the value of the field is RET

pub fn is_partial(&self) -> bool[src]

Checks if the value of the field is PARTIAL

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

impl R<u8, Reg<u8, _HIBCFG>>[src]

pub fn ramcfg(&self) -> RAMCFG_R[src]

Bits 0:1 - Ram Configuration

pub fn bramcfg(&self) -> BRAMCFG_R[src]

Bits 2:3 - Backup Ram Configuration

impl R<u8, BRAMCFG_A>[src]

pub fn variant(&self) -> Variant<u8, BRAMCFG_A>[src]

Get enumerated values variant

pub fn is_ret(&self) -> bool[src]

Checks if the value of the field is RET

pub fn is_partial(&self) -> bool[src]

Checks if the value of the field is PARTIAL

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

impl R<u8, Reg<u8, _BKUPCFG>>[src]

pub fn bramcfg(&self) -> BRAMCFG_R[src]

Bits 0:1 - Ram Configuration

impl R<u8, Reg<u8, _PWSAKDLY>>[src]

pub fn dlyval(&self) -> DLYVAL_R[src]

Bits 0:6 - Delay Value

pub fn ignack(&self) -> IGNACK_R[src]

Bit 7 - Ignore Acknowledge

impl R<u32, Reg<u32, _DIR>>[src]

pub fn dir(&self) -> DIR_R[src]

Bits 0:31 - Port Data Direction

impl R<u32, Reg<u32, _DIRCLR>>[src]

pub fn dirclr(&self) -> DIRCLR_R[src]

Bits 0:31 - Port Data Direction Clear

impl R<u32, Reg<u32, _DIRSET>>[src]

pub fn dirset(&self) -> DIRSET_R[src]

Bits 0:31 - Port Data Direction Set

impl R<u32, Reg<u32, _DIRTGL>>[src]

pub fn dirtgl(&self) -> DIRTGL_R[src]

Bits 0:31 - Port Data Direction Toggle

impl R<u32, Reg<u32, _OUT>>[src]

pub fn out(&self) -> OUT_R[src]

Bits 0:31 - PORT Data Output Value

impl R<u32, Reg<u32, _OUTCLR>>[src]

pub fn outclr(&self) -> OUTCLR_R[src]

Bits 0:31 - PORT Data Output Value Clear

impl R<u32, Reg<u32, _OUTSET>>[src]

pub fn outset(&self) -> OUTSET_R[src]

Bits 0:31 - PORT Data Output Value Set

impl R<u32, Reg<u32, _OUTTGL>>[src]

pub fn outtgl(&self) -> OUTTGL_R[src]

Bits 0:31 - PORT Data Output Value Toggle

impl R<u32, Reg<u32, _IN>>[src]

pub fn in_(&self) -> IN_R[src]

Bits 0:31 - PORT Data Input Value

impl R<u32, Reg<u32, _CTRL>>[src]

pub fn sampling(&self) -> SAMPLING_R[src]

Bits 0:31 - Input Sampling Mode

impl R<u8, EVACT0_A>[src]

pub fn variant(&self) -> EVACT0_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clr(&self) -> bool[src]

Checks if the value of the field is CLR

pub fn is_tgl(&self) -> bool[src]

Checks if the value of the field is TGL

impl R<u32, Reg<u32, _EVCTRL>>[src]

pub fn pid0(&self) -> PID0_R[src]

Bits 0:4 - PORT Event Pin Identifier 0

pub fn evact0(&self) -> EVACT0_R[src]

Bits 5:6 - PORT Event Action 0

pub fn portei0(&self) -> PORTEI0_R[src]

Bit 7 - PORT Event Input Enable 0

pub fn pid1(&self) -> PID1_R[src]

Bits 8:12 - PORT Event Pin Identifier 1

pub fn evact1(&self) -> EVACT1_R[src]

Bits 13:14 - PORT Event Action 1

pub fn portei1(&self) -> PORTEI1_R[src]

Bit 15 - PORT Event Input Enable 1

pub fn pid2(&self) -> PID2_R[src]

Bits 16:20 - PORT Event Pin Identifier 2

pub fn evact2(&self) -> EVACT2_R[src]

Bits 21:22 - PORT Event Action 2

pub fn portei2(&self) -> PORTEI2_R[src]

Bit 23 - PORT Event Input Enable 2

pub fn pid3(&self) -> PID3_R[src]

Bits 24:28 - PORT Event Pin Identifier 3

pub fn evact3(&self) -> EVACT3_R[src]

Bits 29:30 - PORT Event Action 3

pub fn portei3(&self) -> PORTEI3_R[src]

Bit 31 - PORT Event Input Enable 3

impl R<u8, PMUXE_A>[src]

pub fn variant(&self) -> Variant<u8, PMUXE_A>[src]

Get enumerated values variant

pub fn is_a(&self) -> bool[src]

Checks if the value of the field is A

pub fn is_b(&self) -> bool[src]

Checks if the value of the field is B

pub fn is_c(&self) -> bool[src]

Checks if the value of the field is C

pub fn is_d(&self) -> bool[src]

Checks if the value of the field is D

pub fn is_e(&self) -> bool[src]

Checks if the value of the field is E

pub fn is_f(&self) -> bool[src]

Checks if the value of the field is F

pub fn is_g(&self) -> bool[src]

Checks if the value of the field is G

pub fn is_h(&self) -> bool[src]

Checks if the value of the field is H

pub fn is_i(&self) -> bool[src]

Checks if the value of the field is I

pub fn is_j(&self) -> bool[src]

Checks if the value of the field is J

pub fn is_k(&self) -> bool[src]

Checks if the value of the field is K

pub fn is_l(&self) -> bool[src]

Checks if the value of the field is L

pub fn is_m(&self) -> bool[src]

Checks if the value of the field is M

pub fn is_n(&self) -> bool[src]

Checks if the value of the field is N

impl R<u8, PMUXO_A>[src]

pub fn variant(&self) -> Variant<u8, PMUXO_A>[src]

Get enumerated values variant

pub fn is_a(&self) -> bool[src]

Checks if the value of the field is A

pub fn is_b(&self) -> bool[src]

Checks if the value of the field is B

pub fn is_c(&self) -> bool[src]

Checks if the value of the field is C

pub fn is_d(&self) -> bool[src]

Checks if the value of the field is D

pub fn is_e(&self) -> bool[src]

Checks if the value of the field is E

pub fn is_f(&self) -> bool[src]

Checks if the value of the field is F

pub fn is_g(&self) -> bool[src]

Checks if the value of the field is G

pub fn is_h(&self) -> bool[src]

Checks if the value of the field is H

pub fn is_i(&self) -> bool[src]

Checks if the value of the field is I

pub fn is_j(&self) -> bool[src]

Checks if the value of the field is J

pub fn is_k(&self) -> bool[src]

Checks if the value of the field is K

pub fn is_l(&self) -> bool[src]

Checks if the value of the field is L

pub fn is_m(&self) -> bool[src]

Checks if the value of the field is M

pub fn is_n(&self) -> bool[src]

Checks if the value of the field is N

impl R<u8, Reg<u8, _PMUX>>[src]

pub fn pmuxe(&self) -> PMUXE_R[src]

Bits 0:3 - Peripheral Multiplexing for Even-Numbered Pin

pub fn pmuxo(&self) -> PMUXO_R[src]

Bits 4:7 - Peripheral Multiplexing for Odd-Numbered Pin

impl R<u8, Reg<u8, _PINCFG>>[src]

pub fn pmuxen(&self) -> PMUXEN_R[src]

Bit 0 - Peripheral Multiplexer Enable

pub fn inen(&self) -> INEN_R[src]

Bit 1 - Input Enable

pub fn pullen(&self) -> PULLEN_R[src]

Bit 2 - Pull Enable

pub fn drvstr(&self) -> DRVSTR_R[src]

Bit 6 - Output Driver Strength Selection

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn lastxfer(&self) -> LASTXFER_R[src]

Bit 24 - Last Transfer

impl R<bool, MODE_A>[src]

pub fn variant(&self) -> MODE_A[src]

Get enumerated values variant

pub fn is_spi(&self) -> bool[src]

Checks if the value of the field is SPI

pub fn is_memory(&self) -> bool[src]

Checks if the value of the field is MEMORY

impl R<bool, LOOPEN_A>[src]

pub fn variant(&self) -> LOOPEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CSMODE_A>[src]

pub fn variant(&self) -> Variant<u8, CSMODE_A>[src]

Get enumerated values variant

pub fn is_noreload(&self) -> bool[src]

Checks if the value of the field is NORELOAD

pub fn is_lastxfer(&self) -> bool[src]

Checks if the value of the field is LASTXFER

pub fn is_systematically(&self) -> bool[src]

Checks if the value of the field is SYSTEMATICALLY

impl R<u8, DATALEN_A>[src]

pub fn variant(&self) -> Variant<u8, DATALEN_A>[src]

Get enumerated values variant

pub fn is_8bits(&self) -> bool[src]

Checks if the value of the field is _8BITS

pub fn is_9bits(&self) -> bool[src]

Checks if the value of the field is _9BITS

pub fn is_10bits(&self) -> bool[src]

Checks if the value of the field is _10BITS

pub fn is_11bits(&self) -> bool[src]

Checks if the value of the field is _11BITS

pub fn is_12bits(&self) -> bool[src]

Checks if the value of the field is _12BITS

pub fn is_13bits(&self) -> bool[src]

Checks if the value of the field is _13BITS

pub fn is_14bits(&self) -> bool[src]

Checks if the value of the field is _14BITS

pub fn is_15bits(&self) -> bool[src]

Checks if the value of the field is _15BITS

pub fn is_16bits(&self) -> bool[src]

Checks if the value of the field is _16BITS

impl R<u32, Reg<u32, _CTRLB>>[src]

pub fn mode(&self) -> MODE_R[src]

Bit 0 - Serial Memory Mode

pub fn loopen(&self) -> LOOPEN_R[src]

Bit 1 - Local Loopback Enable

pub fn wdrbt(&self) -> WDRBT_R[src]

Bit 2 - Wait Data Read Before Transfer

pub fn smemreg(&self) -> SMEMREG_R[src]

Bit 3 - Serial Memory reg

pub fn csmode(&self) -> CSMODE_R[src]

Bits 4:5 - Chip Select Mode

pub fn datalen(&self) -> DATALEN_R[src]

Bits 8:11 - Data Length

pub fn dlybct(&self) -> DLYBCT_R[src]

Bits 16:23 - Delay Between Consecutive Transfers

pub fn dlycs(&self) -> DLYCS_R[src]

Bits 24:31 - Minimum Inactive CS Delay

impl R<u32, Reg<u32, _BAUD>>[src]

pub fn cpol(&self) -> CPOL_R[src]

Bit 0 - Clock Polarity

pub fn cpha(&self) -> CPHA_R[src]

Bit 1 - Clock Phase

pub fn baud(&self) -> BAUD_R[src]

Bits 8:15 - Serial Clock Baud Rate

pub fn dlybs(&self) -> DLYBS_R[src]

Bits 16:23 - Delay Before SCK

impl R<u32, Reg<u32, _RXDATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:15 - Receive Data

impl R<u32, Reg<u32, _INTENCLR>>[src]

pub fn rxc(&self) -> RXC_R[src]

Bit 0 - Receive Data Register Full Interrupt Disable

pub fn dre(&self) -> DRE_R[src]

Bit 1 - Transmit Data Register Empty Interrupt Disable

pub fn txc(&self) -> TXC_R[src]

Bit 2 - Transmission Complete Interrupt Disable

pub fn error(&self) -> ERROR_R[src]

Bit 3 - Overrun Error Interrupt Disable

pub fn csrise(&self) -> CSRISE_R[src]

Bit 8 - Chip Select Rise Interrupt Disable

pub fn instrend(&self) -> INSTREND_R[src]

Bit 10 - Instruction End Interrupt Disable

impl R<u32, Reg<u32, _INTENSET>>[src]

pub fn rxc(&self) -> RXC_R[src]

Bit 0 - Receive Data Register Full Interrupt Enable

pub fn dre(&self) -> DRE_R[src]

Bit 1 - Transmit Data Register Empty Interrupt Enable

pub fn txc(&self) -> TXC_R[src]

Bit 2 - Transmission Complete Interrupt Enable

pub fn error(&self) -> ERROR_R[src]

Bit 3 - Overrun Error Interrupt Enable

pub fn csrise(&self) -> CSRISE_R[src]

Bit 8 - Chip Select Rise Interrupt Enable

pub fn instrend(&self) -> INSTREND_R[src]

Bit 10 - Instruction End Interrupt Enable

impl R<u32, Reg<u32, _INTFLAG>>[src]

pub fn rxc(&self) -> RXC_R[src]

Bit 0 - Receive Data Register Full

pub fn dre(&self) -> DRE_R[src]

Bit 1 - Transmit Data Register Empty

pub fn txc(&self) -> TXC_R[src]

Bit 2 - Transmission Complete

pub fn error(&self) -> ERROR_R[src]

Bit 3 - Overrun Error

pub fn csrise(&self) -> CSRISE_R[src]

Bit 8 - Chip Select Rise

pub fn instrend(&self) -> INSTREND_R[src]

Bit 10 - Instruction End

impl R<u32, Reg<u32, _STATUS>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn csstatus(&self) -> CSSTATUS_R[src]

Bit 9 - Chip Select

impl R<u32, Reg<u32, _INSTRADDR>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Instruction Address

impl R<u32, Reg<u32, _INSTRCTRL>>[src]

pub fn instr(&self) -> INSTR_R[src]

Bits 0:7 - Instruction Code

pub fn optcode(&self) -> OPTCODE_R[src]

Bits 16:23 - Option Code

impl R<u8, WIDTH_A>[src]

pub fn variant(&self) -> Variant<u8, WIDTH_A>[src]

Get enumerated values variant

pub fn is_single_bit_spi(&self) -> bool[src]

Checks if the value of the field is SINGLE_BIT_SPI

pub fn is_dual_output(&self) -> bool[src]

Checks if the value of the field is DUAL_OUTPUT

pub fn is_quad_output(&self) -> bool[src]

Checks if the value of the field is QUAD_OUTPUT

pub fn is_dual_io(&self) -> bool[src]

Checks if the value of the field is DUAL_IO

pub fn is_quad_io(&self) -> bool[src]

Checks if the value of the field is QUAD_IO

pub fn is_dual_cmd(&self) -> bool[src]

Checks if the value of the field is DUAL_CMD

pub fn is_quad_cmd(&self) -> bool[src]

Checks if the value of the field is QUAD_CMD

impl R<u8, OPTCODELEN_A>[src]

pub fn variant(&self) -> OPTCODELEN_A[src]

Get enumerated values variant

pub fn is_1bit(&self) -> bool[src]

Checks if the value of the field is _1BIT

pub fn is_2bits(&self) -> bool[src]

Checks if the value of the field is _2BITS

pub fn is_4bits(&self) -> bool[src]

Checks if the value of the field is _4BITS

pub fn is_8bits(&self) -> bool[src]

Checks if the value of the field is _8BITS

impl R<bool, ADDRLEN_A>[src]

pub fn variant(&self) -> ADDRLEN_A[src]

Get enumerated values variant

pub fn is_24bits(&self) -> bool[src]

Checks if the value of the field is _24BITS

pub fn is_32bits(&self) -> bool[src]

Checks if the value of the field is _32BITS

impl R<u8, TFRTYPE_A>[src]

pub fn variant(&self) -> TFRTYPE_A[src]

Get enumerated values variant

pub fn is_read(&self) -> bool[src]

Checks if the value of the field is READ

pub fn is_readmemory(&self) -> bool[src]

Checks if the value of the field is READMEMORY

pub fn is_write(&self) -> bool[src]

Checks if the value of the field is WRITE

pub fn is_writememory(&self) -> bool[src]

Checks if the value of the field is WRITEMEMORY

impl R<u32, Reg<u32, _INSTRFRAME>>[src]

pub fn width(&self) -> WIDTH_R[src]

Bits 0:2 - Instruction Code, Address, Option Code and Data Width

pub fn instren(&self) -> INSTREN_R[src]

Bit 4 - Instruction Enable

pub fn addren(&self) -> ADDREN_R[src]

Bit 5 - Address Enable

pub fn optcodeen(&self) -> OPTCODEEN_R[src]

Bit 6 - Option Enable

pub fn dataen(&self) -> DATAEN_R[src]

Bit 7 - Data Enable

pub fn optcodelen(&self) -> OPTCODELEN_R[src]

Bits 8:9 - Option Code Length

pub fn addrlen(&self) -> ADDRLEN_R[src]

Bit 10 - Address Length

pub fn tfrtype(&self) -> TFRTYPE_R[src]

Bits 12:13 - Data Transfer Type

pub fn crmode(&self) -> CRMODE_R[src]

Bit 14 - Continuous Read Mode

pub fn ddren(&self) -> DDREN_R[src]

Bit 15 - Double Data Rate Enable

pub fn dummylen(&self) -> DUMMYLEN_R[src]

Bits 16:20 - Dummy Cycles Length

impl R<u32, Reg<u32, _SCRAMBCTRL>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 0 - Scrambling/Unscrambling Enable

pub fn randomdis(&self) -> RANDOMDIS_R[src]

Bit 1 - Scrambling/Unscrambling Random Value Disable

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn singlee(&self) -> SINGLEE_R[src]

Bit 0 - Single Bit ECC Error Interrupt Enable Clear

pub fn duale(&self) -> DUALE_R[src]

Bit 1 - Dual Bit ECC Error Interrupt Enable Clear

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn singlee(&self) -> SINGLEE_R[src]

Bit 0 - Single Bit ECC Error Interrupt Enable Set

pub fn duale(&self) -> DUALE_R[src]

Bit 1 - Dual Bit ECC Error Interrupt Enable Set

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn singlee(&self) -> SINGLEE_R[src]

Bit 0 - Single Bit ECC Error Interrupt

pub fn duale(&self) -> DUALE_R[src]

Bit 1 - Dual Bit ECC Error Interrupt

impl R<u8, Reg<u8, _STATUS>>[src]

pub fn eccdis(&self) -> ECCDIS_R[src]

Bit 0 - ECC Disable

impl R<u32, Reg<u32, _ERRADDR>>[src]

pub fn erraddr(&self) -> ERRADDR_R[src]

Bits 0:16 - Error Address

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn eccdis(&self) -> ECCDIS_R[src]

Bit 0 - ECC Disable

pub fn eccelog(&self) -> ECCELOG_R[src]

Bit 1 - ECC Error Log

impl R<u8, Reg<u8, _RCAUSE>>[src]

pub fn por(&self) -> POR_R[src]

Bit 0 - Power On Reset

pub fn bodcore(&self) -> BODCORE_R[src]

Bit 1 - Brown Out CORE Detector Reset

pub fn bodvdd(&self) -> BODVDD_R[src]

Bit 2 - Brown Out VDD Detector Reset

pub fn nvm(&self) -> NVM_R[src]

Bit 3 - NVM Reset

pub fn ext(&self) -> EXT_R[src]

Bit 4 - External Reset

pub fn wdt(&self) -> WDT_R[src]

Bit 5 - Watchdog Reset

pub fn syst(&self) -> SYST_R[src]

Bit 6 - System Reset Request

pub fn backup(&self) -> BACKUP_R[src]

Bit 7 - Backup Reset

impl R<u8, Reg<u8, _BKUPEXIT>>[src]

pub fn rtc(&self) -> RTC_R[src]

Bit 1 - Real Timer Counter Interrupt

pub fn bbps(&self) -> BBPS_R[src]

Bit 2 - Battery Backup Power Switch

pub fn hib(&self) -> HIB_R[src]

Bit 7 - Hibernate

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_count32(&self) -> bool[src]

Checks if the value of the field is COUNT32

pub fn is_count16(&self) -> bool[src]

Checks if the value of the field is COUNT16

pub fn is_clock(&self) -> bool[src]

Checks if the value of the field is CLOCK

impl R<u8, PRESCALER_A>[src]

pub fn variant(&self) -> Variant<u8, PRESCALER_A>[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div512(&self) -> bool[src]

Checks if the value of the field is DIV512

pub fn is_div1024(&self) -> bool[src]

Checks if the value of the field is DIV1024

impl R<u16, Reg<u16, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:3 - Operating Mode

pub fn matchclr(&self) -> MATCHCLR_R[src]

Bit 7 - Clear on Match

pub fn prescaler(&self) -> PRESCALER_R[src]

Bits 8:11 - Prescaler

pub fn bktrst(&self) -> BKTRST_R[src]

Bit 13 - BKUP Registers Reset On Tamper Enable

pub fn gptrst(&self) -> GPTRST_R[src]

Bit 14 - GP Registers Reset On Tamper Enable

pub fn countsync(&self) -> COUNTSYNC_R[src]

Bit 15 - Count Read Synchronization Enable

impl R<u8, DEBF_A>[src]

pub fn variant(&self) -> DEBF_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<u8, ACTF_A>[src]

pub fn variant(&self) -> ACTF_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<u16, Reg<u16, _CTRLB>>[src]

pub fn gp0en(&self) -> GP0EN_R[src]

Bit 0 - General Purpose 0 Enable

pub fn gp2en(&self) -> GP2EN_R[src]

Bit 1 - General Purpose 2 Enable

pub fn debmaj(&self) -> DEBMAJ_R[src]

Bit 4 - Debouncer Majority Enable

pub fn debasync(&self) -> DEBASYNC_R[src]

Bit 5 - Debouncer Asynchronous Enable

pub fn rtcout(&self) -> RTCOUT_R[src]

Bit 6 - RTC Output Enable

pub fn dmaen(&self) -> DMAEN_R[src]

Bit 7 - DMA Enable

pub fn debf(&self) -> DEBF_R[src]

Bits 8:10 - Debounce Freqnuency

pub fn actf(&self) -> ACTF_R[src]

Bits 12:14 - Active Layer Freqnuency

impl R<u32, Reg<u32, _EVCTRL>>[src]

pub fn pereo0(&self) -> PEREO0_R[src]

Bit 0 - Periodic Interval 0 Event Output Enable

pub fn pereo1(&self) -> PEREO1_R[src]

Bit 1 - Periodic Interval 1 Event Output Enable

pub fn pereo2(&self) -> PEREO2_R[src]

Bit 2 - Periodic Interval 2 Event Output Enable

pub fn pereo3(&self) -> PEREO3_R[src]

Bit 3 - Periodic Interval 3 Event Output Enable

pub fn pereo4(&self) -> PEREO4_R[src]

Bit 4 - Periodic Interval 4 Event Output Enable

pub fn pereo5(&self) -> PEREO5_R[src]

Bit 5 - Periodic Interval 5 Event Output Enable

pub fn pereo6(&self) -> PEREO6_R[src]

Bit 6 - Periodic Interval 6 Event Output Enable

pub fn pereo7(&self) -> PEREO7_R[src]

Bit 7 - Periodic Interval 7 Event Output Enable

pub fn cmpeo0(&self) -> CMPEO0_R[src]

Bit 8 - Compare 0 Event Output Enable

pub fn cmpeo1(&self) -> CMPEO1_R[src]

Bit 9 - Compare 1 Event Output Enable

pub fn tampereo(&self) -> TAMPEREO_R[src]

Bit 14 - Tamper Event Output Enable

pub fn ovfeo(&self) -> OVFEO_R[src]

Bit 15 - Overflow Event Output Enable

pub fn tampevei(&self) -> TAMPEVEI_R[src]

Bit 16 - Tamper Event Input Enable

impl R<u16, Reg<u16, _INTENCLR>>[src]

pub fn per0(&self) -> PER0_R[src]

Bit 0 - Periodic Interval 0 Interrupt Enable

pub fn per1(&self) -> PER1_R[src]

Bit 1 - Periodic Interval 1 Interrupt Enable

pub fn per2(&self) -> PER2_R[src]

Bit 2 - Periodic Interval 2 Interrupt Enable

pub fn per3(&self) -> PER3_R[src]

Bit 3 - Periodic Interval 3 Interrupt Enable

pub fn per4(&self) -> PER4_R[src]

Bit 4 - Periodic Interval 4 Interrupt Enable

pub fn per5(&self) -> PER5_R[src]

Bit 5 - Periodic Interval 5 Interrupt Enable

pub fn per6(&self) -> PER6_R[src]

Bit 6 - Periodic Interval 6 Interrupt Enable

pub fn per7(&self) -> PER7_R[src]

Bit 7 - Periodic Interval 7 Interrupt Enable

pub fn cmp0(&self) -> CMP0_R[src]

Bit 8 - Compare 0 Interrupt Enable

pub fn cmp1(&self) -> CMP1_R[src]

Bit 9 - Compare 1 Interrupt Enable

pub fn tamper(&self) -> TAMPER_R[src]

Bit 14 - Tamper Enable

pub fn ovf(&self) -> OVF_R[src]

Bit 15 - Overflow Interrupt Enable

impl R<u16, Reg<u16, _INTENSET>>[src]

pub fn per0(&self) -> PER0_R[src]

Bit 0 - Periodic Interval 0 Interrupt Enable

pub fn per1(&self) -> PER1_R[src]

Bit 1 - Periodic Interval 1 Interrupt Enable

pub fn per2(&self) -> PER2_R[src]

Bit 2 - Periodic Interval 2 Interrupt Enable

pub fn per3(&self) -> PER3_R[src]

Bit 3 - Periodic Interval 3 Interrupt Enable

pub fn per4(&self) -> PER4_R[src]

Bit 4 - Periodic Interval 4 Interrupt Enable

pub fn per5(&self) -> PER5_R[src]

Bit 5 - Periodic Interval 5 Interrupt Enable

pub fn per6(&self) -> PER6_R[src]

Bit 6 - Periodic Interval 6 Interrupt Enable

pub fn per7(&self) -> PER7_R[src]

Bit 7 - Periodic Interval 7 Interrupt Enable

pub fn cmp0(&self) -> CMP0_R[src]

Bit 8 - Compare 0 Interrupt Enable

pub fn cmp1(&self) -> CMP1_R[src]

Bit 9 - Compare 1 Interrupt Enable

pub fn tamper(&self) -> TAMPER_R[src]

Bit 14 - Tamper Enable

pub fn ovf(&self) -> OVF_R[src]

Bit 15 - Overflow Interrupt Enable

impl R<u16, Reg<u16, _INTFLAG>>[src]

pub fn per0(&self) -> PER0_R[src]

Bit 0 - Periodic Interval 0

pub fn per1(&self) -> PER1_R[src]

Bit 1 - Periodic Interval 1

pub fn per2(&self) -> PER2_R[src]

Bit 2 - Periodic Interval 2

pub fn per3(&self) -> PER3_R[src]

Bit 3 - Periodic Interval 3

pub fn per4(&self) -> PER4_R[src]

Bit 4 - Periodic Interval 4

pub fn per5(&self) -> PER5_R[src]

Bit 5 - Periodic Interval 5

pub fn per6(&self) -> PER6_R[src]

Bit 6 - Periodic Interval 6

pub fn per7(&self) -> PER7_R[src]

Bit 7 - Periodic Interval 7

pub fn cmp0(&self) -> CMP0_R[src]

Bit 8 - Compare 0

pub fn cmp1(&self) -> CMP1_R[src]

Bit 9 - Compare 1

pub fn tamper(&self) -> TAMPER_R[src]

Bit 14 - Tamper

pub fn ovf(&self) -> OVF_R[src]

Bit 15 - Overflow

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Run During Debug

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable Bit Busy

pub fn freqcorr(&self) -> FREQCORR_R[src]

Bit 2 - FREQCORR Register Busy

pub fn count(&self) -> COUNT_R[src]

Bit 3 - COUNT Register Busy

pub fn comp0(&self) -> COMP0_R[src]

Bit 5 - COMP 0 Register Busy

pub fn comp1(&self) -> COMP1_R[src]

Bit 6 - COMP 1 Register Busy

pub fn countsync(&self) -> COUNTSYNC_R[src]

Bit 15 - Count Synchronization Enable Bit Busy

pub fn gp0(&self) -> GP0_R[src]

Bit 16 - General Purpose 0 Register Busy

pub fn gp1(&self) -> GP1_R[src]

Bit 17 - General Purpose 1 Register Busy

pub fn gp2(&self) -> GP2_R[src]

Bit 18 - General Purpose 2 Register Busy

pub fn gp3(&self) -> GP3_R[src]

Bit 19 - General Purpose 3 Register Busy

impl R<u8, Reg<u8, _FREQCORR>>[src]

pub fn value(&self) -> VALUE_R[src]

Bits 0:6 - Correction Value

pub fn sign(&self) -> SIGN_R[src]

Bit 7 - Correction Sign

impl R<u32, Reg<u32, _COUNT>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 0:31 - Counter Value

impl R<u32, Reg<u32, _COMP>>[src]

pub fn comp(&self) -> COMP_R[src]

Bits 0:31 - Compare Value

impl R<u32, Reg<u32, _GP>>[src]

pub fn gp(&self) -> GP_R[src]

Bits 0:31 - General Purpose

impl R<u8, IN0ACT_A>[src]

pub fn variant(&self) -> IN0ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN1ACT_A>[src]

pub fn variant(&self) -> IN1ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN2ACT_A>[src]

pub fn variant(&self) -> IN2ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN3ACT_A>[src]

pub fn variant(&self) -> IN3ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN4ACT_A>[src]

pub fn variant(&self) -> IN4ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u32, Reg<u32, _TAMPCTRL>>[src]

pub fn in0act(&self) -> IN0ACT_R[src]

Bits 0:1 - Tamper Input 0 Action

pub fn in1act(&self) -> IN1ACT_R[src]

Bits 2:3 - Tamper Input 1 Action

pub fn in2act(&self) -> IN2ACT_R[src]

Bits 4:5 - Tamper Input 2 Action

pub fn in3act(&self) -> IN3ACT_R[src]

Bits 6:7 - Tamper Input 3 Action

pub fn in4act(&self) -> IN4ACT_R[src]

Bits 8:9 - Tamper Input 4 Action

pub fn tamlvl0(&self) -> TAMLVL0_R[src]

Bit 16 - Tamper Level Select 0

pub fn tamlvl1(&self) -> TAMLVL1_R[src]

Bit 17 - Tamper Level Select 1

pub fn tamlvl2(&self) -> TAMLVL2_R[src]

Bit 18 - Tamper Level Select 2

pub fn tamlvl3(&self) -> TAMLVL3_R[src]

Bit 19 - Tamper Level Select 3

pub fn tamlvl4(&self) -> TAMLVL4_R[src]

Bit 20 - Tamper Level Select 4

pub fn debnc0(&self) -> DEBNC0_R[src]

Bit 24 - Debouncer Enable 0

pub fn debnc1(&self) -> DEBNC1_R[src]

Bit 25 - Debouncer Enable 1

pub fn debnc2(&self) -> DEBNC2_R[src]

Bit 26 - Debouncer Enable 2

pub fn debnc3(&self) -> DEBNC3_R[src]

Bit 27 - Debouncer Enable 3

pub fn debnc4(&self) -> DEBNC4_R[src]

Bit 28 - Debouncer Enable 4

impl R<u32, Reg<u32, _TIMESTAMP>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 0:31 - Count Timestamp Value

impl R<u32, Reg<u32, _TAMPID>>[src]

pub fn tampid0(&self) -> TAMPID0_R[src]

Bit 0 - Tamper Input 0 Detected

pub fn tampid1(&self) -> TAMPID1_R[src]

Bit 1 - Tamper Input 1 Detected

pub fn tampid2(&self) -> TAMPID2_R[src]

Bit 2 - Tamper Input 2 Detected

pub fn tampid3(&self) -> TAMPID3_R[src]

Bit 3 - Tamper Input 3 Detected

pub fn tampid4(&self) -> TAMPID4_R[src]

Bit 4 - Tamper Input 4 Detected

pub fn tampevt(&self) -> TAMPEVT_R[src]

Bit 31 - Tamper Event Detected

impl R<u32, Reg<u32, _BKUP>>[src]

pub fn bkup(&self) -> BKUP_R[src]

Bits 0:31 - Backup

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_count32(&self) -> bool[src]

Checks if the value of the field is COUNT32

pub fn is_count16(&self) -> bool[src]

Checks if the value of the field is COUNT16

pub fn is_clock(&self) -> bool[src]

Checks if the value of the field is CLOCK

impl R<u8, PRESCALER_A>[src]

pub fn variant(&self) -> Variant<u8, PRESCALER_A>[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div512(&self) -> bool[src]

Checks if the value of the field is DIV512

pub fn is_div1024(&self) -> bool[src]

Checks if the value of the field is DIV1024

impl R<u16, Reg<u16, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:3 - Operating Mode

pub fn prescaler(&self) -> PRESCALER_R[src]

Bits 8:11 - Prescaler

pub fn bktrst(&self) -> BKTRST_R[src]

Bit 13 - BKUP Registers Reset On Tamper Enable

pub fn gptrst(&self) -> GPTRST_R[src]

Bit 14 - GP Registers Reset On Tamper Enable

pub fn countsync(&self) -> COUNTSYNC_R[src]

Bit 15 - Count Read Synchronization Enable

impl R<u8, DEBF_A>[src]

pub fn variant(&self) -> DEBF_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<u8, ACTF_A>[src]

pub fn variant(&self) -> ACTF_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<u16, Reg<u16, _CTRLB>>[src]

pub fn gp0en(&self) -> GP0EN_R[src]

Bit 0 - General Purpose 0 Enable

pub fn gp2en(&self) -> GP2EN_R[src]

Bit 1 - General Purpose 2 Enable

pub fn debmaj(&self) -> DEBMAJ_R[src]

Bit 4 - Debouncer Majority Enable

pub fn debasync(&self) -> DEBASYNC_R[src]

Bit 5 - Debouncer Asynchronous Enable

pub fn rtcout(&self) -> RTCOUT_R[src]

Bit 6 - RTC Output Enable

pub fn dmaen(&self) -> DMAEN_R[src]

Bit 7 - DMA Enable

pub fn debf(&self) -> DEBF_R[src]

Bits 8:10 - Debounce Freqnuency

pub fn actf(&self) -> ACTF_R[src]

Bits 12:14 - Active Layer Freqnuency

impl R<u32, Reg<u32, _EVCTRL>>[src]

pub fn pereo0(&self) -> PEREO0_R[src]

Bit 0 - Periodic Interval 0 Event Output Enable

pub fn pereo1(&self) -> PEREO1_R[src]

Bit 1 - Periodic Interval 1 Event Output Enable

pub fn pereo2(&self) -> PEREO2_R[src]

Bit 2 - Periodic Interval 2 Event Output Enable

pub fn pereo3(&self) -> PEREO3_R[src]

Bit 3 - Periodic Interval 3 Event Output Enable

pub fn pereo4(&self) -> PEREO4_R[src]

Bit 4 - Periodic Interval 4 Event Output Enable

pub fn pereo5(&self) -> PEREO5_R[src]

Bit 5 - Periodic Interval 5 Event Output Enable

pub fn pereo6(&self) -> PEREO6_R[src]

Bit 6 - Periodic Interval 6 Event Output Enable

pub fn pereo7(&self) -> PEREO7_R[src]

Bit 7 - Periodic Interval 7 Event Output Enable

pub fn cmpeo0(&self) -> CMPEO0_R[src]

Bit 8 - Compare 0 Event Output Enable

pub fn cmpeo1(&self) -> CMPEO1_R[src]

Bit 9 - Compare 1 Event Output Enable

pub fn cmpeo2(&self) -> CMPEO2_R[src]

Bit 10 - Compare 2 Event Output Enable

pub fn cmpeo3(&self) -> CMPEO3_R[src]

Bit 11 - Compare 3 Event Output Enable

pub fn tampereo(&self) -> TAMPEREO_R[src]

Bit 14 - Tamper Event Output Enable

pub fn ovfeo(&self) -> OVFEO_R[src]

Bit 15 - Overflow Event Output Enable

pub fn tampevei(&self) -> TAMPEVEI_R[src]

Bit 16 - Tamper Event Input Enable

impl R<u16, Reg<u16, _INTENCLR>>[src]

pub fn per0(&self) -> PER0_R[src]

Bit 0 - Periodic Interval 0 Interrupt Enable

pub fn per1(&self) -> PER1_R[src]

Bit 1 - Periodic Interval 1 Interrupt Enable

pub fn per2(&self) -> PER2_R[src]

Bit 2 - Periodic Interval 2 Interrupt Enable

pub fn per3(&self) -> PER3_R[src]

Bit 3 - Periodic Interval 3 Interrupt Enable

pub fn per4(&self) -> PER4_R[src]

Bit 4 - Periodic Interval 4 Interrupt Enable

pub fn per5(&self) -> PER5_R[src]

Bit 5 - Periodic Interval 5 Interrupt Enable

pub fn per6(&self) -> PER6_R[src]

Bit 6 - Periodic Interval 6 Interrupt Enable

pub fn per7(&self) -> PER7_R[src]

Bit 7 - Periodic Interval 7 Interrupt Enable

pub fn cmp0(&self) -> CMP0_R[src]

Bit 8 - Compare 0 Interrupt Enable

pub fn cmp1(&self) -> CMP1_R[src]

Bit 9 - Compare 1 Interrupt Enable

pub fn cmp2(&self) -> CMP2_R[src]

Bit 10 - Compare 2 Interrupt Enable

pub fn cmp3(&self) -> CMP3_R[src]

Bit 11 - Compare 3 Interrupt Enable

pub fn tamper(&self) -> TAMPER_R[src]

Bit 14 - Tamper Enable

pub fn ovf(&self) -> OVF_R[src]

Bit 15 - Overflow Interrupt Enable

impl R<u16, Reg<u16, _INTENSET>>[src]

pub fn per0(&self) -> PER0_R[src]

Bit 0 - Periodic Interval 0 Interrupt Enable

pub fn per1(&self) -> PER1_R[src]

Bit 1 - Periodic Interval 1 Interrupt Enable

pub fn per2(&self) -> PER2_R[src]

Bit 2 - Periodic Interval 2 Interrupt Enable

pub fn per3(&self) -> PER3_R[src]

Bit 3 - Periodic Interval 3 Interrupt Enable

pub fn per4(&self) -> PER4_R[src]

Bit 4 - Periodic Interval 4 Interrupt Enable

pub fn per5(&self) -> PER5_R[src]

Bit 5 - Periodic Interval 5 Interrupt Enable

pub fn per6(&self) -> PER6_R[src]

Bit 6 - Periodic Interval 6 Interrupt Enable

pub fn per7(&self) -> PER7_R[src]

Bit 7 - Periodic Interval 7 Interrupt Enable

pub fn cmp0(&self) -> CMP0_R[src]

Bit 8 - Compare 0 Interrupt Enable

pub fn cmp1(&self) -> CMP1_R[src]

Bit 9 - Compare 1 Interrupt Enable

pub fn cmp2(&self) -> CMP2_R[src]

Bit 10 - Compare 2 Interrupt Enable

pub fn cmp3(&self) -> CMP3_R[src]

Bit 11 - Compare 3 Interrupt Enable

pub fn tamper(&self) -> TAMPER_R[src]

Bit 14 - Tamper Enable

pub fn ovf(&self) -> OVF_R[src]

Bit 15 - Overflow Interrupt Enable

impl R<u16, Reg<u16, _INTFLAG>>[src]

pub fn per0(&self) -> PER0_R[src]

Bit 0 - Periodic Interval 0

pub fn per1(&self) -> PER1_R[src]

Bit 1 - Periodic Interval 1

pub fn per2(&self) -> PER2_R[src]

Bit 2 - Periodic Interval 2

pub fn per3(&self) -> PER3_R[src]

Bit 3 - Periodic Interval 3

pub fn per4(&self) -> PER4_R[src]

Bit 4 - Periodic Interval 4

pub fn per5(&self) -> PER5_R[src]

Bit 5 - Periodic Interval 5

pub fn per6(&self) -> PER6_R[src]

Bit 6 - Periodic Interval 6

pub fn per7(&self) -> PER7_R[src]

Bit 7 - Periodic Interval 7

pub fn cmp0(&self) -> CMP0_R[src]

Bit 8 - Compare 0

pub fn cmp1(&self) -> CMP1_R[src]

Bit 9 - Compare 1

pub fn cmp2(&self) -> CMP2_R[src]

Bit 10 - Compare 2

pub fn cmp3(&self) -> CMP3_R[src]

Bit 11 - Compare 3

pub fn tamper(&self) -> TAMPER_R[src]

Bit 14 - Tamper

pub fn ovf(&self) -> OVF_R[src]

Bit 15 - Overflow

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Run During Debug

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Bit Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable Bit Busy

pub fn freqcorr(&self) -> FREQCORR_R[src]

Bit 2 - FREQCORR Register Busy

pub fn count(&self) -> COUNT_R[src]

Bit 3 - COUNT Register Busy

pub fn per(&self) -> PER_R[src]

Bit 4 - PER Register Busy

pub fn comp0(&self) -> COMP0_R[src]

Bit 5 - COMP 0 Register Busy

pub fn comp1(&self) -> COMP1_R[src]

Bit 6 - COMP 1 Register Busy

pub fn comp2(&self) -> COMP2_R[src]

Bit 7 - COMP 2 Register Busy

pub fn comp3(&self) -> COMP3_R[src]

Bit 8 - COMP 3 Register Busy

pub fn countsync(&self) -> COUNTSYNC_R[src]

Bit 15 - Count Synchronization Enable Bit Busy

pub fn gp0(&self) -> GP0_R[src]

Bit 16 - General Purpose 0 Register Busy

pub fn gp1(&self) -> GP1_R[src]

Bit 17 - General Purpose 1 Register Busy

pub fn gp2(&self) -> GP2_R[src]

Bit 18 - General Purpose 2 Register Busy

pub fn gp3(&self) -> GP3_R[src]

Bit 19 - General Purpose 3 Register Busy

impl R<u8, Reg<u8, _FREQCORR>>[src]

pub fn value(&self) -> VALUE_R[src]

Bits 0:6 - Correction Value

pub fn sign(&self) -> SIGN_R[src]

Bit 7 - Correction Sign

impl R<u16, Reg<u16, _COUNT>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 0:15 - Counter Value

impl R<u16, Reg<u16, _PER>>[src]

pub fn per(&self) -> PER_R[src]

Bits 0:15 - Counter Period

impl R<u16, Reg<u16, _COMP>>[src]

pub fn comp(&self) -> COMP_R[src]

Bits 0:15 - Compare Value

impl R<u32, Reg<u32, _GP>>[src]

pub fn gp(&self) -> GP_R[src]

Bits 0:31 - General Purpose

impl R<u8, IN0ACT_A>[src]

pub fn variant(&self) -> IN0ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN1ACT_A>[src]

pub fn variant(&self) -> IN1ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN2ACT_A>[src]

pub fn variant(&self) -> IN2ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN3ACT_A>[src]

pub fn variant(&self) -> IN3ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN4ACT_A>[src]

pub fn variant(&self) -> IN4ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u32, Reg<u32, _TAMPCTRL>>[src]

pub fn in0act(&self) -> IN0ACT_R[src]

Bits 0:1 - Tamper Input 0 Action

pub fn in1act(&self) -> IN1ACT_R[src]

Bits 2:3 - Tamper Input 1 Action

pub fn in2act(&self) -> IN2ACT_R[src]

Bits 4:5 - Tamper Input 2 Action

pub fn in3act(&self) -> IN3ACT_R[src]

Bits 6:7 - Tamper Input 3 Action

pub fn in4act(&self) -> IN4ACT_R[src]

Bits 8:9 - Tamper Input 4 Action

pub fn tamlvl0(&self) -> TAMLVL0_R[src]

Bit 16 - Tamper Level Select 0

pub fn tamlvl1(&self) -> TAMLVL1_R[src]

Bit 17 - Tamper Level Select 1

pub fn tamlvl2(&self) -> TAMLVL2_R[src]

Bit 18 - Tamper Level Select 2

pub fn tamlvl3(&self) -> TAMLVL3_R[src]

Bit 19 - Tamper Level Select 3

pub fn tamlvl4(&self) -> TAMLVL4_R[src]

Bit 20 - Tamper Level Select 4

pub fn debnc0(&self) -> DEBNC0_R[src]

Bit 24 - Debouncer Enable 0

pub fn debnc1(&self) -> DEBNC1_R[src]

Bit 25 - Debouncer Enable 1

pub fn debnc2(&self) -> DEBNC2_R[src]

Bit 26 - Debouncer Enable 2

pub fn debnc3(&self) -> DEBNC3_R[src]

Bit 27 - Debouncer Enable 3

pub fn debnc4(&self) -> DEBNC4_R[src]

Bit 28 - Debouncer Enable 4

impl R<u32, Reg<u32, _TIMESTAMP>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 0:15 - Count Timestamp Value

impl R<u32, Reg<u32, _TAMPID>>[src]

pub fn tampid0(&self) -> TAMPID0_R[src]

Bit 0 - Tamper Input 0 Detected

pub fn tampid1(&self) -> TAMPID1_R[src]

Bit 1 - Tamper Input 1 Detected

pub fn tampid2(&self) -> TAMPID2_R[src]

Bit 2 - Tamper Input 2 Detected

pub fn tampid3(&self) -> TAMPID3_R[src]

Bit 3 - Tamper Input 3 Detected

pub fn tampid4(&self) -> TAMPID4_R[src]

Bit 4 - Tamper Input 4 Detected

pub fn tampevt(&self) -> TAMPEVT_R[src]

Bit 31 - Tamper Event Detected

impl R<u32, Reg<u32, _BKUP>>[src]

pub fn bkup(&self) -> BKUP_R[src]

Bits 0:31 - Backup

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_count32(&self) -> bool[src]

Checks if the value of the field is COUNT32

pub fn is_count16(&self) -> bool[src]

Checks if the value of the field is COUNT16

pub fn is_clock(&self) -> bool[src]

Checks if the value of the field is CLOCK

impl R<u8, PRESCALER_A>[src]

pub fn variant(&self) -> Variant<u8, PRESCALER_A>[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div512(&self) -> bool[src]

Checks if the value of the field is DIV512

pub fn is_div1024(&self) -> bool[src]

Checks if the value of the field is DIV1024

impl R<u16, Reg<u16, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:3 - Operating Mode

pub fn clkrep(&self) -> CLKREP_R[src]

Bit 6 - Clock Representation

pub fn matchclr(&self) -> MATCHCLR_R[src]

Bit 7 - Clear on Match

pub fn prescaler(&self) -> PRESCALER_R[src]

Bits 8:11 - Prescaler

pub fn bktrst(&self) -> BKTRST_R[src]

Bit 13 - BKUP Registers Reset On Tamper Enable

pub fn gptrst(&self) -> GPTRST_R[src]

Bit 14 - GP Registers Reset On Tamper Enable

pub fn clocksync(&self) -> CLOCKSYNC_R[src]

Bit 15 - Clock Read Synchronization Enable

impl R<u8, DEBF_A>[src]

pub fn variant(&self) -> DEBF_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<u8, ACTF_A>[src]

pub fn variant(&self) -> ACTF_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<u16, Reg<u16, _CTRLB>>[src]

pub fn gp0en(&self) -> GP0EN_R[src]

Bit 0 - General Purpose 0 Enable

pub fn gp2en(&self) -> GP2EN_R[src]

Bit 1 - General Purpose 2 Enable

pub fn debmaj(&self) -> DEBMAJ_R[src]

Bit 4 - Debouncer Majority Enable

pub fn debasync(&self) -> DEBASYNC_R[src]

Bit 5 - Debouncer Asynchronous Enable

pub fn rtcout(&self) -> RTCOUT_R[src]

Bit 6 - RTC Output Enable

pub fn dmaen(&self) -> DMAEN_R[src]

Bit 7 - DMA Enable

pub fn debf(&self) -> DEBF_R[src]

Bits 8:10 - Debounce Freqnuency

pub fn actf(&self) -> ACTF_R[src]

Bits 12:14 - Active Layer Freqnuency

impl R<u32, Reg<u32, _EVCTRL>>[src]

pub fn pereo0(&self) -> PEREO0_R[src]

Bit 0 - Periodic Interval 0 Event Output Enable

pub fn pereo1(&self) -> PEREO1_R[src]

Bit 1 - Periodic Interval 1 Event Output Enable

pub fn pereo2(&self) -> PEREO2_R[src]

Bit 2 - Periodic Interval 2 Event Output Enable

pub fn pereo3(&self) -> PEREO3_R[src]

Bit 3 - Periodic Interval 3 Event Output Enable

pub fn pereo4(&self) -> PEREO4_R[src]

Bit 4 - Periodic Interval 4 Event Output Enable

pub fn pereo5(&self) -> PEREO5_R[src]

Bit 5 - Periodic Interval 5 Event Output Enable

pub fn pereo6(&self) -> PEREO6_R[src]

Bit 6 - Periodic Interval 6 Event Output Enable

pub fn pereo7(&self) -> PEREO7_R[src]

Bit 7 - Periodic Interval 7 Event Output Enable

pub fn alarmeo0(&self) -> ALARMEO0_R[src]

Bit 8 - Alarm 0 Event Output Enable

pub fn alarmeo1(&self) -> ALARMEO1_R[src]

Bit 9 - Alarm 1 Event Output Enable

pub fn tampereo(&self) -> TAMPEREO_R[src]

Bit 14 - Tamper Event Output Enable

pub fn ovfeo(&self) -> OVFEO_R[src]

Bit 15 - Overflow Event Output Enable

pub fn tampevei(&self) -> TAMPEVEI_R[src]

Bit 16 - Tamper Event Input Enable

impl R<u16, Reg<u16, _INTENCLR>>[src]

pub fn per0(&self) -> PER0_R[src]

Bit 0 - Periodic Interval 0 Interrupt Enable

pub fn per1(&self) -> PER1_R[src]

Bit 1 - Periodic Interval 1 Interrupt Enable

pub fn per2(&self) -> PER2_R[src]

Bit 2 - Periodic Interval 2 Interrupt Enable

pub fn per3(&self) -> PER3_R[src]

Bit 3 - Periodic Interval 3 Interrupt Enable

pub fn per4(&self) -> PER4_R[src]

Bit 4 - Periodic Interval 4 Interrupt Enable

pub fn per5(&self) -> PER5_R[src]

Bit 5 - Periodic Interval 5 Interrupt Enable

pub fn per6(&self) -> PER6_R[src]

Bit 6 - Periodic Interval 6 Interrupt Enable

pub fn per7(&self) -> PER7_R[src]

Bit 7 - Periodic Interval 7 Interrupt Enable

pub fn alarm0(&self) -> ALARM0_R[src]

Bit 8 - Alarm 0 Interrupt Enable

pub fn alarm1(&self) -> ALARM1_R[src]

Bit 9 - Alarm 1 Interrupt Enable

pub fn tamper(&self) -> TAMPER_R[src]

Bit 14 - Tamper Enable

pub fn ovf(&self) -> OVF_R[src]

Bit 15 - Overflow Interrupt Enable

impl R<u16, Reg<u16, _INTENSET>>[src]

pub fn per0(&self) -> PER0_R[src]

Bit 0 - Periodic Interval 0 Enable

pub fn per1(&self) -> PER1_R[src]

Bit 1 - Periodic Interval 1 Enable

pub fn per2(&self) -> PER2_R[src]

Bit 2 - Periodic Interval 2 Enable

pub fn per3(&self) -> PER3_R[src]

Bit 3 - Periodic Interval 3 Enable

pub fn per4(&self) -> PER4_R[src]

Bit 4 - Periodic Interval 4 Enable

pub fn per5(&self) -> PER5_R[src]

Bit 5 - Periodic Interval 5 Enable

pub fn per6(&self) -> PER6_R[src]

Bit 6 - Periodic Interval 6 Enable

pub fn per7(&self) -> PER7_R[src]

Bit 7 - Periodic Interval 7 Enable

pub fn alarm0(&self) -> ALARM0_R[src]

Bit 8 - Alarm 0 Interrupt Enable

pub fn alarm1(&self) -> ALARM1_R[src]

Bit 9 - Alarm 1 Interrupt Enable

pub fn tamper(&self) -> TAMPER_R[src]

Bit 14 - Tamper Enable

pub fn ovf(&self) -> OVF_R[src]

Bit 15 - Overflow Interrupt Enable

impl R<u16, Reg<u16, _INTFLAG>>[src]

pub fn per0(&self) -> PER0_R[src]

Bit 0 - Periodic Interval 0

pub fn per1(&self) -> PER1_R[src]

Bit 1 - Periodic Interval 1

pub fn per2(&self) -> PER2_R[src]

Bit 2 - Periodic Interval 2

pub fn per3(&self) -> PER3_R[src]

Bit 3 - Periodic Interval 3

pub fn per4(&self) -> PER4_R[src]

Bit 4 - Periodic Interval 4

pub fn per5(&self) -> PER5_R[src]

Bit 5 - Periodic Interval 5

pub fn per6(&self) -> PER6_R[src]

Bit 6 - Periodic Interval 6

pub fn per7(&self) -> PER7_R[src]

Bit 7 - Periodic Interval 7

pub fn alarm0(&self) -> ALARM0_R[src]

Bit 8 - Alarm 0

pub fn alarm1(&self) -> ALARM1_R[src]

Bit 9 - Alarm 1

pub fn tamper(&self) -> TAMPER_R[src]

Bit 14 - Tamper

pub fn ovf(&self) -> OVF_R[src]

Bit 15 - Overflow

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Run During Debug

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Bit Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable Bit Busy

pub fn freqcorr(&self) -> FREQCORR_R[src]

Bit 2 - FREQCORR Register Busy

pub fn clock(&self) -> CLOCK_R[src]

Bit 3 - CLOCK Register Busy

pub fn alarm0(&self) -> ALARM0_R[src]

Bit 5 - ALARM 0 Register Busy

pub fn alarm1(&self) -> ALARM1_R[src]

Bit 6 - ALARM 1 Register Busy

pub fn mask0(&self) -> MASK0_R[src]

Bit 11 - MASK 0 Register Busy

pub fn mask1(&self) -> MASK1_R[src]

Bit 12 - MASK 1 Register Busy

pub fn clocksync(&self) -> CLOCKSYNC_R[src]

Bit 15 - Clock Synchronization Enable Bit Busy

pub fn gp0(&self) -> GP0_R[src]

Bit 16 - General Purpose 0 Register Busy

pub fn gp1(&self) -> GP1_R[src]

Bit 17 - General Purpose 1 Register Busy

pub fn gp2(&self) -> GP2_R[src]

Bit 18 - General Purpose 2 Register Busy

pub fn gp3(&self) -> GP3_R[src]

Bit 19 - General Purpose 3 Register Busy

impl R<u8, Reg<u8, _FREQCORR>>[src]

pub fn value(&self) -> VALUE_R[src]

Bits 0:6 - Correction Value

pub fn sign(&self) -> SIGN_R[src]

Bit 7 - Correction Sign

impl R<u8, HOUR_A>[src]

pub fn variant(&self) -> Variant<u8, HOUR_A>[src]

Get enumerated values variant

pub fn is_am(&self) -> bool[src]

Checks if the value of the field is AM

pub fn is_pm(&self) -> bool[src]

Checks if the value of the field is PM

impl R<u32, Reg<u32, _CLOCK>>[src]

pub fn second(&self) -> SECOND_R[src]

Bits 0:5 - Second

pub fn minute(&self) -> MINUTE_R[src]

Bits 6:11 - Minute

pub fn hour(&self) -> HOUR_R[src]

Bits 12:16 - Hour

pub fn day(&self) -> DAY_R[src]

Bits 17:21 - Day

pub fn month(&self) -> MONTH_R[src]

Bits 22:25 - Month

pub fn year(&self) -> YEAR_R[src]

Bits 26:31 - Year

impl R<u32, Reg<u32, _GP>>[src]

pub fn gp(&self) -> GP_R[src]

Bits 0:31 - General Purpose

impl R<u8, HOUR_A>[src]

pub fn variant(&self) -> Variant<u8, HOUR_A>[src]

Get enumerated values variant

pub fn is_am(&self) -> bool[src]

Checks if the value of the field is AM

pub fn is_pm(&self) -> bool[src]

Checks if the value of the field is PM

impl R<u32, Reg<u32, _ALARM0>>[src]

pub fn second(&self) -> SECOND_R[src]

Bits 0:5 - Second

pub fn minute(&self) -> MINUTE_R[src]

Bits 6:11 - Minute

pub fn hour(&self) -> HOUR_R[src]

Bits 12:16 - Hour

pub fn day(&self) -> DAY_R[src]

Bits 17:21 - Day

pub fn month(&self) -> MONTH_R[src]

Bits 22:25 - Month

pub fn year(&self) -> YEAR_R[src]

Bits 26:31 - Year

impl R<u8, SEL_A>[src]

pub fn variant(&self) -> Variant<u8, SEL_A>[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_ss(&self) -> bool[src]

Checks if the value of the field is SS

pub fn is_mmss(&self) -> bool[src]

Checks if the value of the field is MMSS

pub fn is_hhmmss(&self) -> bool[src]

Checks if the value of the field is HHMMSS

pub fn is_ddhhmmss(&self) -> bool[src]

Checks if the value of the field is DDHHMMSS

pub fn is_mmddhhmmss(&self) -> bool[src]

Checks if the value of the field is MMDDHHMMSS

pub fn is_yymmddhhmmss(&self) -> bool[src]

Checks if the value of the field is YYMMDDHHMMSS

impl R<u8, Reg<u8, _MASK0>>[src]

pub fn sel(&self) -> SEL_R[src]

Bits 0:2 - Alarm Mask Selection

impl R<u8, HOUR_A>[src]

pub fn variant(&self) -> Variant<u8, HOUR_A>[src]

Get enumerated values variant

pub fn is_am(&self) -> bool[src]

Checks if the value of the field is AM

pub fn is_pm(&self) -> bool[src]

Checks if the value of the field is PM

impl R<u32, Reg<u32, _ALARM1>>[src]

pub fn second(&self) -> SECOND_R[src]

Bits 0:5 - Second

pub fn minute(&self) -> MINUTE_R[src]

Bits 6:11 - Minute

pub fn hour(&self) -> HOUR_R[src]

Bits 12:16 - Hour

pub fn day(&self) -> DAY_R[src]

Bits 17:21 - Day

pub fn month(&self) -> MONTH_R[src]

Bits 22:25 - Month

pub fn year(&self) -> YEAR_R[src]

Bits 26:31 - Year

impl R<u8, SEL_A>[src]

pub fn variant(&self) -> Variant<u8, SEL_A>[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_ss(&self) -> bool[src]

Checks if the value of the field is SS

pub fn is_mmss(&self) -> bool[src]

Checks if the value of the field is MMSS

pub fn is_hhmmss(&self) -> bool[src]

Checks if the value of the field is HHMMSS

pub fn is_ddhhmmss(&self) -> bool[src]

Checks if the value of the field is DDHHMMSS

pub fn is_mmddhhmmss(&self) -> bool[src]

Checks if the value of the field is MMDDHHMMSS

pub fn is_yymmddhhmmss(&self) -> bool[src]

Checks if the value of the field is YYMMDDHHMMSS

impl R<u8, Reg<u8, _MASK1>>[src]

pub fn sel(&self) -> SEL_R[src]

Bits 0:2 - Alarm Mask Selection

impl R<u8, IN0ACT_A>[src]

pub fn variant(&self) -> IN0ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN1ACT_A>[src]

pub fn variant(&self) -> IN1ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN2ACT_A>[src]

pub fn variant(&self) -> IN2ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN3ACT_A>[src]

pub fn variant(&self) -> IN3ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u8, IN4ACT_A>[src]

pub fn variant(&self) -> IN4ACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_wake(&self) -> bool[src]

Checks if the value of the field is WAKE

pub fn is_capture(&self) -> bool[src]

Checks if the value of the field is CAPTURE

pub fn is_actl(&self) -> bool[src]

Checks if the value of the field is ACTL

impl R<u32, Reg<u32, _TAMPCTRL>>[src]

pub fn in0act(&self) -> IN0ACT_R[src]

Bits 0:1 - Tamper Input 0 Action

pub fn in1act(&self) -> IN1ACT_R[src]

Bits 2:3 - Tamper Input 1 Action

pub fn in2act(&self) -> IN2ACT_R[src]

Bits 4:5 - Tamper Input 2 Action

pub fn in3act(&self) -> IN3ACT_R[src]

Bits 6:7 - Tamper Input 3 Action

pub fn in4act(&self) -> IN4ACT_R[src]

Bits 8:9 - Tamper Input 4 Action

pub fn tamlvl0(&self) -> TAMLVL0_R[src]

Bit 16 - Tamper Level Select 0

pub fn tamlvl1(&self) -> TAMLVL1_R[src]

Bit 17 - Tamper Level Select 1

pub fn tamlvl2(&self) -> TAMLVL2_R[src]

Bit 18 - Tamper Level Select 2

pub fn tamlvl3(&self) -> TAMLVL3_R[src]

Bit 19 - Tamper Level Select 3

pub fn tamlvl4(&self) -> TAMLVL4_R[src]

Bit 20 - Tamper Level Select 4

pub fn debnc0(&self) -> DEBNC0_R[src]

Bit 24 - Debouncer Enable 0

pub fn debnc1(&self) -> DEBNC1_R[src]

Bit 25 - Debouncer Enable 1

pub fn debnc2(&self) -> DEBNC2_R[src]

Bit 26 - Debouncer Enable 2

pub fn debnc3(&self) -> DEBNC3_R[src]

Bit 27 - Debouncer Enable 3

pub fn debnc4(&self) -> DEBNC4_R[src]

Bit 28 - Debouncer Enable 4

impl R<u8, HOUR_A>[src]

pub fn variant(&self) -> Variant<u8, HOUR_A>[src]

Get enumerated values variant

pub fn is_am(&self) -> bool[src]

Checks if the value of the field is AM

pub fn is_pm(&self) -> bool[src]

Checks if the value of the field is PM

impl R<u32, Reg<u32, _TIMESTAMP>>[src]

pub fn second(&self) -> SECOND_R[src]

Bits 0:5 - Second Timestamp Value

pub fn minute(&self) -> MINUTE_R[src]

Bits 6:11 - Minute Timestamp Value

pub fn hour(&self) -> HOUR_R[src]

Bits 12:16 - Hour Timestamp Value

pub fn day(&self) -> DAY_R[src]

Bits 17:21 - Day Timestamp Value

pub fn month(&self) -> MONTH_R[src]

Bits 22:25 - Month Timestamp Value

pub fn year(&self) -> YEAR_R[src]

Bits 26:31 - Year Timestamp Value

impl R<u32, Reg<u32, _TAMPID>>[src]

pub fn tampid0(&self) -> TAMPID0_R[src]

Bit 0 - Tamper Input 0 Detected

pub fn tampid1(&self) -> TAMPID1_R[src]

Bit 1 - Tamper Input 1 Detected

pub fn tampid2(&self) -> TAMPID2_R[src]

Bit 2 - Tamper Input 2 Detected

pub fn tampid3(&self) -> TAMPID3_R[src]

Bit 3 - Tamper Input 3 Detected

pub fn tampid4(&self) -> TAMPID4_R[src]

Bit 4 - Tamper Input 4 Detected

pub fn tampevt(&self) -> TAMPEVT_R[src]

Bit 31 - Tamper Event Detected

impl R<u32, Reg<u32, _BKUP>>[src]

pub fn bkup(&self) -> BKUP_R[src]

Bits 0:31 - Backup

impl R<u32, Reg<u32, _SSAR>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - SDMA System Address

impl R<u32, Reg<u32, _SSAR_CMD23_MODE>>[src]

pub fn arg2(&self) -> ARG2_R[src]

Bits 0:31 - Argument 2

impl R<u8, BOUNDARY_A>[src]

pub fn variant(&self) -> BOUNDARY_A[src]

Get enumerated values variant

pub fn is_4k(&self) -> bool[src]

Checks if the value of the field is _4K

pub fn is_8k(&self) -> bool[src]

Checks if the value of the field is _8K

pub fn is_16k(&self) -> bool[src]

Checks if the value of the field is _16K

pub fn is_32k(&self) -> bool[src]

Checks if the value of the field is _32K

pub fn is_64k(&self) -> bool[src]

Checks if the value of the field is _64K

pub fn is_128k(&self) -> bool[src]

Checks if the value of the field is _128K

pub fn is_256k(&self) -> bool[src]

Checks if the value of the field is _256K

pub fn is_512k(&self) -> bool[src]

Checks if the value of the field is _512K

impl R<u16, Reg<u16, _BSR>>[src]

pub fn blocksize(&self) -> BLOCKSIZE_R[src]

Bits 0:9 - Transfer Block Size

pub fn boundary(&self) -> BOUNDARY_R[src]

Bits 12:14 - SDMA Buffer Boundary

impl R<u16, Reg<u16, _BCR>>[src]

pub fn bcnt(&self) -> BCNT_R[src]

Bits 0:15 - Blocks Count for Current Transfer

impl R<u32, Reg<u32, _ARG1R>>[src]

pub fn arg(&self) -> ARG_R[src]

Bits 0:31 - Argument 1

impl R<bool, DMAEN_A>[src]

pub fn variant(&self) -> DMAEN_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, BCEN_A>[src]

pub fn variant(&self) -> BCEN_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u8, ACMDEN_A>[src]

pub fn variant(&self) -> Variant<u8, ACMDEN_A>[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_cmd12(&self) -> bool[src]

Checks if the value of the field is CMD12

pub fn is_cmd23(&self) -> bool[src]

Checks if the value of the field is CMD23

impl R<bool, DTDSEL_A>[src]

pub fn variant(&self) -> DTDSEL_A[src]

Get enumerated values variant

pub fn is_write(&self) -> bool[src]

Checks if the value of the field is WRITE

pub fn is_read(&self) -> bool[src]

Checks if the value of the field is READ

impl R<bool, MSBSEL_A>[src]

pub fn variant(&self) -> MSBSEL_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_multiple(&self) -> bool[src]

Checks if the value of the field is MULTIPLE

impl R<u16, Reg<u16, _TMR>>[src]

pub fn dmaen(&self) -> DMAEN_R[src]

Bit 0 - DMA Enable

pub fn bcen(&self) -> BCEN_R[src]

Bit 1 - Block Count Enable

pub fn acmden(&self) -> ACMDEN_R[src]

Bits 2:3 - Auto Command Enable

pub fn dtdsel(&self) -> DTDSEL_R[src]

Bit 4 - Data Transfer Direction Selection

pub fn msbsel(&self) -> MSBSEL_R[src]

Bit 5 - Multi/Single Block Selection

impl R<u8, RESPTYP_A>[src]

pub fn variant(&self) -> RESPTYP_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_136_bit(&self) -> bool[src]

Checks if the value of the field is _136_BIT

pub fn is_48_bit(&self) -> bool[src]

Checks if the value of the field is _48_BIT

pub fn is_48_bit_busy(&self) -> bool[src]

Checks if the value of the field is _48_BIT_BUSY

impl R<bool, CMDCCEN_A>[src]

pub fn variant(&self) -> CMDCCEN_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, CMDICEN_A>[src]

pub fn variant(&self) -> CMDICEN_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, DPSEL_A>[src]

pub fn variant(&self) -> DPSEL_A[src]

Get enumerated values variant

pub fn is_no_data(&self) -> bool[src]

Checks if the value of the field is NO_DATA

pub fn is_data(&self) -> bool[src]

Checks if the value of the field is DATA

impl R<u8, CMDTYP_A>[src]

pub fn variant(&self) -> CMDTYP_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_suspend(&self) -> bool[src]

Checks if the value of the field is SUSPEND

pub fn is_resume(&self) -> bool[src]

Checks if the value of the field is RESUME

pub fn is_abort(&self) -> bool[src]

Checks if the value of the field is ABORT

impl R<u16, Reg<u16, _CR>>[src]

pub fn resptyp(&self) -> RESPTYP_R[src]

Bits 0:1 - Response Type

pub fn cmdccen(&self) -> CMDCCEN_R[src]

Bit 3 - Command CRC Check Enable

pub fn cmdicen(&self) -> CMDICEN_R[src]

Bit 4 - Command Index Check Enable

pub fn dpsel(&self) -> DPSEL_R[src]

Bit 5 - Data Present Select

pub fn cmdtyp(&self) -> CMDTYP_R[src]

Bits 6:7 - Command Type

pub fn cmdidx(&self) -> CMDIDX_R[src]

Bits 8:13 - Command Index

impl R<u32, Reg<u32, _RR>>[src]

pub fn cmdresp(&self) -> CMDRESP_R[src]

Bits 0:31 - Command Response

impl R<u32, Reg<u32, _BDPR>>[src]

pub fn bufdata(&self) -> BUFDATA_R[src]

Bits 0:31 - Buffer Data

impl R<bool, CMDINHC_A>[src]

pub fn variant(&self) -> CMDINHC_A[src]

Get enumerated values variant

pub fn is_can(&self) -> bool[src]

Checks if the value of the field is CAN

pub fn is_cannot(&self) -> bool[src]

Checks if the value of the field is CANNOT

impl R<bool, CMDINHD_A>[src]

pub fn variant(&self) -> CMDINHD_A[src]

Get enumerated values variant

pub fn is_can(&self) -> bool[src]

Checks if the value of the field is CAN

pub fn is_cannot(&self) -> bool[src]

Checks if the value of the field is CANNOT

impl R<bool, DLACT_A>[src]

pub fn variant(&self) -> DLACT_A[src]

Get enumerated values variant

pub fn is_inactive(&self) -> bool[src]

Checks if the value of the field is INACTIVE

pub fn is_active(&self) -> bool[src]

Checks if the value of the field is ACTIVE

impl R<bool, RTREQ_A>[src]

pub fn variant(&self) -> RTREQ_A[src]

Get enumerated values variant

pub fn is_ok(&self) -> bool[src]

Checks if the value of the field is OK

pub fn is_required(&self) -> bool[src]

Checks if the value of the field is REQUIRED

impl R<bool, WTACT_A>[src]

pub fn variant(&self) -> WTACT_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, RTACT_A>[src]

pub fn variant(&self) -> RTACT_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, BUFWREN_A>[src]

pub fn variant(&self) -> BUFWREN_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, BUFRDEN_A>[src]

pub fn variant(&self) -> BUFRDEN_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, CARDINS_A>[src]

pub fn variant(&self) -> CARDINS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CARDSS_A>[src]

pub fn variant(&self) -> CARDSS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CARDDPL_A>[src]

pub fn variant(&self) -> CARDDPL_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, WRPPL_A>[src]

pub fn variant(&self) -> WRPPL_A[src]

Get enumerated values variant

pub fn is_protected(&self) -> bool[src]

Checks if the value of the field is PROTECTED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _PSR>>[src]

pub fn cmdinhc(&self) -> CMDINHC_R[src]

Bit 0 - Command Inhibit (CMD)

pub fn cmdinhd(&self) -> CMDINHD_R[src]

Bit 1 - Command Inhibit (DAT)

pub fn dlact(&self) -> DLACT_R[src]

Bit 2 - DAT Line Active

pub fn rtreq(&self) -> RTREQ_R[src]

Bit 3 - Re-Tuning Request

pub fn wtact(&self) -> WTACT_R[src]

Bit 8 - Write Transfer Active

pub fn rtact(&self) -> RTACT_R[src]

Bit 9 - Read Transfer Active

pub fn bufwren(&self) -> BUFWREN_R[src]

Bit 10 - Buffer Write Enable

pub fn bufrden(&self) -> BUFRDEN_R[src]

Bit 11 - Buffer Read Enable

pub fn cardins(&self) -> CARDINS_R[src]

Bit 16 - Card Inserted

pub fn cardss(&self) -> CARDSS_R[src]

Bit 17 - Card State Stable

pub fn carddpl(&self) -> CARDDPL_R[src]

Bit 18 - Card Detect Pin Level

pub fn wrppl(&self) -> WRPPL_R[src]

Bit 19 - Write Protect Pin Level

pub fn datll(&self) -> DATLL_R[src]

Bits 20:23 - DAT[3:0] Line Level

pub fn cmdll(&self) -> CMDLL_R[src]

Bit 24 - CMD Line Level

impl R<bool, LEDCTRL_A>[src]

pub fn variant(&self) -> LEDCTRL_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, DW_A>[src]

pub fn variant(&self) -> DW_A[src]

Get enumerated values variant

pub fn is_1bit(&self) -> bool[src]

Checks if the value of the field is _1BIT

pub fn is_4bit(&self) -> bool[src]

Checks if the value of the field is _4BIT

impl R<bool, HSEN_A>[src]

pub fn variant(&self) -> HSEN_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<u8, DMASEL_A>[src]

pub fn variant(&self) -> Variant<u8, DMASEL_A>[src]

Get enumerated values variant

pub fn is_sdma(&self) -> bool[src]

Checks if the value of the field is SDMA

pub fn is_32bit(&self) -> bool[src]

Checks if the value of the field is _32BIT

impl R<bool, CARDDTL_A>[src]

pub fn variant(&self) -> CARDDTL_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CARDDSEL_A>[src]

pub fn variant(&self) -> CARDDSEL_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_test(&self) -> bool[src]

Checks if the value of the field is TEST

impl R<u8, Reg<u8, _HC1R>>[src]

pub fn ledctrl(&self) -> LEDCTRL_R[src]

Bit 0 - LED Control

pub fn dw(&self) -> DW_R[src]

Bit 1 - Data Width

pub fn hsen(&self) -> HSEN_R[src]

Bit 2 - High Speed Enable

pub fn dmasel(&self) -> DMASEL_R[src]

Bits 3:4 - DMA Select

pub fn carddtl(&self) -> CARDDTL_R[src]

Bit 6 - Card Detect Test Level

pub fn carddsel(&self) -> CARDDSEL_R[src]

Bit 7 - Card Detect Signal Selection

impl R<bool, DW_A>[src]

pub fn variant(&self) -> DW_A[src]

Get enumerated values variant

pub fn is_1bit(&self) -> bool[src]

Checks if the value of the field is _1BIT

pub fn is_4bit(&self) -> bool[src]

Checks if the value of the field is _4BIT

impl R<bool, HSEN_A>[src]

pub fn variant(&self) -> HSEN_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<u8, DMASEL_A>[src]

pub fn variant(&self) -> Variant<u8, DMASEL_A>[src]

Get enumerated values variant

pub fn is_sdma(&self) -> bool[src]

Checks if the value of the field is SDMA

pub fn is_32bit(&self) -> bool[src]

Checks if the value of the field is _32BIT

impl R<u8, Reg<u8, _HC1R_EMMC_MODE>>[src]

pub fn dw(&self) -> DW_R[src]

Bit 1 - Data Width

pub fn hsen(&self) -> HSEN_R[src]

Bit 2 - High Speed Enable

pub fn dmasel(&self) -> DMASEL_R[src]

Bits 3:4 - DMA Select

impl R<bool, SDBPWR_A>[src]

pub fn variant(&self) -> SDBPWR_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<u8, SDBVSEL_A>[src]

pub fn variant(&self) -> Variant<u8, SDBVSEL_A>[src]

Get enumerated values variant

pub fn is_1v8(&self) -> bool[src]

Checks if the value of the field is _1V8

pub fn is_3v0(&self) -> bool[src]

Checks if the value of the field is _3V0

pub fn is_3v3(&self) -> bool[src]

Checks if the value of the field is _3V3

impl R<u8, Reg<u8, _PCR>>[src]

pub fn sdbpwr(&self) -> SDBPWR_R[src]

Bit 0 - SD Bus Power

pub fn sdbvsel(&self) -> SDBVSEL_R[src]

Bits 1:3 - SD Bus Voltage Select

impl R<bool, STPBGR_A>[src]

pub fn variant(&self) -> STPBGR_A[src]

Get enumerated values variant

pub fn is_transfer(&self) -> bool[src]

Checks if the value of the field is TRANSFER

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, CONTR_A>[src]

pub fn variant(&self) -> CONTR_A[src]

Get enumerated values variant

pub fn is_go_on(&self) -> bool[src]

Checks if the value of the field is GO_ON

pub fn is_restart(&self) -> bool[src]

Checks if the value of the field is RESTART

impl R<bool, RWCTRL_A>[src]

pub fn variant(&self) -> RWCTRL_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, INTBG_A>[src]

pub fn variant(&self) -> INTBG_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, Reg<u8, _BGCR>>[src]

pub fn stpbgr(&self) -> STPBGR_R[src]

Bit 0 - Stop at Block Gap Request

pub fn contr(&self) -> CONTR_R[src]

Bit 1 - Continue Request

pub fn rwctrl(&self) -> RWCTRL_R[src]

Bit 2 - Read Wait Control

pub fn intbg(&self) -> INTBG_R[src]

Bit 3 - Interrupt at Block Gap

impl R<bool, STPBGR_A>[src]

pub fn variant(&self) -> STPBGR_A[src]

Get enumerated values variant

pub fn is_transfer(&self) -> bool[src]

Checks if the value of the field is TRANSFER

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, CONTR_A>[src]

pub fn variant(&self) -> CONTR_A[src]

Get enumerated values variant

pub fn is_go_on(&self) -> bool[src]

Checks if the value of the field is GO_ON

pub fn is_restart(&self) -> bool[src]

Checks if the value of the field is RESTART

impl R<u8, Reg<u8, _BGCR_EMMC_MODE>>[src]

pub fn stpbgr(&self) -> STPBGR_R[src]

Bit 0 - Stop at Block Gap Request

pub fn contr(&self) -> CONTR_R[src]

Bit 1 - Continue Request

impl R<bool, WKENCINT_A>[src]

pub fn variant(&self) -> WKENCINT_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKENCINS_A>[src]

pub fn variant(&self) -> WKENCINS_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKENCREM_A>[src]

pub fn variant(&self) -> WKENCREM_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u8, Reg<u8, _WCR>>[src]

pub fn wkencint(&self) -> WKENCINT_R[src]

Bit 0 - Wakeup Event Enable on Card Interrupt

pub fn wkencins(&self) -> WKENCINS_R[src]

Bit 1 - Wakeup Event Enable on Card Insertion

pub fn wkencrem(&self) -> WKENCREM_R[src]

Bit 2 - Wakeup Event Enable on Card Removal

impl R<bool, INTCLKEN_A>[src]

pub fn variant(&self) -> INTCLKEN_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, INTCLKS_A>[src]

pub fn variant(&self) -> INTCLKS_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOT_READY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<bool, SDCLKEN_A>[src]

pub fn variant(&self) -> SDCLKEN_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, CLKGSEL_A>[src]

pub fn variant(&self) -> CLKGSEL_A[src]

Get enumerated values variant

pub fn is_div(&self) -> bool[src]

Checks if the value of the field is DIV

pub fn is_prog(&self) -> bool[src]

Checks if the value of the field is PROG

impl R<u16, Reg<u16, _CCR>>[src]

pub fn intclken(&self) -> INTCLKEN_R[src]

Bit 0 - Internal Clock Enable

pub fn intclks(&self) -> INTCLKS_R[src]

Bit 1 - Internal Clock Stable

pub fn sdclken(&self) -> SDCLKEN_R[src]

Bit 2 - SD Clock Enable

pub fn clkgsel(&self) -> CLKGSEL_R[src]

Bit 5 - Clock Generator Select

pub fn usdclkfsel(&self) -> USDCLKFSEL_R[src]

Bits 6:7 - Upper Bits of SDCLK Frequency Select

pub fn sdclkfsel(&self) -> SDCLKFSEL_R[src]

Bits 8:15 - SDCLK Frequency Select

impl R<u8, Reg<u8, _TCR>>[src]

pub fn dtcval(&self) -> DTCVAL_R[src]

Bits 0:3 - Data Timeout Counter Value

impl R<bool, SWRSTALL_A>[src]

pub fn variant(&self) -> SWRSTALL_A[src]

Get enumerated values variant

pub fn is_work(&self) -> bool[src]

Checks if the value of the field is WORK

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<bool, SWRSTCMD_A>[src]

pub fn variant(&self) -> SWRSTCMD_A[src]

Get enumerated values variant

pub fn is_work(&self) -> bool[src]

Checks if the value of the field is WORK

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<bool, SWRSTDAT_A>[src]

pub fn variant(&self) -> SWRSTDAT_A[src]

Get enumerated values variant

pub fn is_work(&self) -> bool[src]

Checks if the value of the field is WORK

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u8, Reg<u8, _SRR>>[src]

pub fn swrstall(&self) -> SWRSTALL_R[src]

Bit 0 - Software Reset For All

pub fn swrstcmd(&self) -> SWRSTCMD_R[src]

Bit 1 - Software Reset For CMD Line

pub fn swrstdat(&self) -> SWRSTDAT_R[src]

Bit 2 - Software Reset For DAT Line

impl R<bool, CMDC_A>[src]

pub fn variant(&self) -> CMDC_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, TRFC_A>[src]

pub fn variant(&self) -> TRFC_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, BLKGE_A>[src]

pub fn variant(&self) -> BLKGE_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, DMAINT_A>[src]

pub fn variant(&self) -> DMAINT_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, BWRRDY_A>[src]

pub fn variant(&self) -> BWRRDY_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, BRDRDY_A>[src]

pub fn variant(&self) -> BRDRDY_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CINS_A>[src]

pub fn variant(&self) -> CINS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CREM_A>[src]

pub fn variant(&self) -> CREM_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CINT_A>[src]

pub fn variant(&self) -> CINT_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, ERRINT_A>[src]

pub fn variant(&self) -> ERRINT_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<u16, Reg<u16, _NISTR>>[src]

pub fn cmdc(&self) -> CMDC_R[src]

Bit 0 - Command Complete

pub fn trfc(&self) -> TRFC_R[src]

Bit 1 - Transfer Complete

pub fn blkge(&self) -> BLKGE_R[src]

Bit 2 - Block Gap Event

pub fn dmaint(&self) -> DMAINT_R[src]

Bit 3 - DMA Interrupt

pub fn bwrrdy(&self) -> BWRRDY_R[src]

Bit 4 - Buffer Write Ready

pub fn brdrdy(&self) -> BRDRDY_R[src]

Bit 5 - Buffer Read Ready

pub fn cins(&self) -> CINS_R[src]

Bit 6 - Card Insertion

pub fn crem(&self) -> CREM_R[src]

Bit 7 - Card Removal

pub fn cint(&self) -> CINT_R[src]

Bit 8 - Card Interrupt

pub fn errint(&self) -> ERRINT_R[src]

Bit 15 - Error Interrupt

impl R<bool, CMDC_A>[src]

pub fn variant(&self) -> CMDC_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, TRFC_A>[src]

pub fn variant(&self) -> TRFC_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, BLKGE_A>[src]

pub fn variant(&self) -> BLKGE_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, DMAINT_A>[src]

pub fn variant(&self) -> DMAINT_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, BWRRDY_A>[src]

pub fn variant(&self) -> BWRRDY_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, BRDRDY_A>[src]

pub fn variant(&self) -> BRDRDY_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, ERRINT_A>[src]

pub fn variant(&self) -> ERRINT_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<u16, Reg<u16, _NISTR_EMMC_MODE>>[src]

pub fn cmdc(&self) -> CMDC_R[src]

Bit 0 - Command Complete

pub fn trfc(&self) -> TRFC_R[src]

Bit 1 - Transfer Complete

pub fn blkge(&self) -> BLKGE_R[src]

Bit 2 - Block Gap Event

pub fn dmaint(&self) -> DMAINT_R[src]

Bit 3 - DMA Interrupt

pub fn bwrrdy(&self) -> BWRRDY_R[src]

Bit 4 - Buffer Write Ready

pub fn brdrdy(&self) -> BRDRDY_R[src]

Bit 5 - Buffer Read Ready

pub fn bootar(&self) -> BOOTAR_R[src]

Bit 14 - Boot Acknowledge Received

pub fn errint(&self) -> ERRINT_R[src]

Bit 15 - Error Interrupt

impl R<bool, CMDTEO_A>[src]

pub fn variant(&self) -> CMDTEO_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CMDCRC_A>[src]

pub fn variant(&self) -> CMDCRC_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CMDEND_A>[src]

pub fn variant(&self) -> CMDEND_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CMDIDX_A>[src]

pub fn variant(&self) -> CMDIDX_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, DATTEO_A>[src]

pub fn variant(&self) -> DATTEO_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, DATCRC_A>[src]

pub fn variant(&self) -> DATCRC_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, DATEND_A>[src]

pub fn variant(&self) -> DATEND_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CURLIM_A>[src]

pub fn variant(&self) -> CURLIM_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, ACMD_A>[src]

pub fn variant(&self) -> ACMD_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, ADMA_A>[src]

pub fn variant(&self) -> ADMA_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<u16, Reg<u16, _EISTR>>[src]

pub fn cmdteo(&self) -> CMDTEO_R[src]

Bit 0 - Command Timeout Error

pub fn cmdcrc(&self) -> CMDCRC_R[src]

Bit 1 - Command CRC Error

pub fn cmdend(&self) -> CMDEND_R[src]

Bit 2 - Command End Bit Error

pub fn cmdidx(&self) -> CMDIDX_R[src]

Bit 3 - Command Index Error

pub fn datteo(&self) -> DATTEO_R[src]

Bit 4 - Data Timeout Error

pub fn datcrc(&self) -> DATCRC_R[src]

Bit 5 - Data CRC Error

pub fn datend(&self) -> DATEND_R[src]

Bit 6 - Data End Bit Error

pub fn curlim(&self) -> CURLIM_R[src]

Bit 7 - Current Limit Error

pub fn acmd(&self) -> ACMD_R[src]

Bit 8 - Auto CMD Error

pub fn adma(&self) -> ADMA_R[src]

Bit 9 - ADMA Error

impl R<bool, CMDTEO_A>[src]

pub fn variant(&self) -> CMDTEO_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CMDCRC_A>[src]

pub fn variant(&self) -> CMDCRC_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CMDEND_A>[src]

pub fn variant(&self) -> CMDEND_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CMDIDX_A>[src]

pub fn variant(&self) -> CMDIDX_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, DATTEO_A>[src]

pub fn variant(&self) -> DATTEO_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, DATCRC_A>[src]

pub fn variant(&self) -> DATCRC_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, DATEND_A>[src]

pub fn variant(&self) -> DATEND_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CURLIM_A>[src]

pub fn variant(&self) -> CURLIM_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, ACMD_A>[src]

pub fn variant(&self) -> ACMD_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, ADMA_A>[src]

pub fn variant(&self) -> ADMA_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, BOOTAE_A>[src]

pub fn variant(&self) -> BOOTAE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u16, Reg<u16, _EISTR_EMMC_MODE>>[src]

pub fn cmdteo(&self) -> CMDTEO_R[src]

Bit 0 - Command Timeout Error

pub fn cmdcrc(&self) -> CMDCRC_R[src]

Bit 1 - Command CRC Error

pub fn cmdend(&self) -> CMDEND_R[src]

Bit 2 - Command End Bit Error

pub fn cmdidx(&self) -> CMDIDX_R[src]

Bit 3 - Command Index Error

pub fn datteo(&self) -> DATTEO_R[src]

Bit 4 - Data Timeout Error

pub fn datcrc(&self) -> DATCRC_R[src]

Bit 5 - Data CRC Error

pub fn datend(&self) -> DATEND_R[src]

Bit 6 - Data End Bit Error

pub fn curlim(&self) -> CURLIM_R[src]

Bit 7 - Current Limit Error

pub fn acmd(&self) -> ACMD_R[src]

Bit 8 - Auto CMD Error

pub fn adma(&self) -> ADMA_R[src]

Bit 9 - ADMA Error

pub fn bootae(&self) -> BOOTAE_R[src]

Bit 12 - Boot Acknowledge Error

impl R<bool, CMDC_A>[src]

pub fn variant(&self) -> CMDC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TRFC_A>[src]

pub fn variant(&self) -> TRFC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BLKGE_A>[src]

pub fn variant(&self) -> BLKGE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DMAINT_A>[src]

pub fn variant(&self) -> DMAINT_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BWRRDY_A>[src]

pub fn variant(&self) -> BWRRDY_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BRDRDY_A>[src]

pub fn variant(&self) -> BRDRDY_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CINS_A>[src]

pub fn variant(&self) -> CINS_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CREM_A>[src]

pub fn variant(&self) -> CREM_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CINT_A>[src]

pub fn variant(&self) -> CINT_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u16, Reg<u16, _NISTER>>[src]

pub fn cmdc(&self) -> CMDC_R[src]

Bit 0 - Command Complete Status Enable

pub fn trfc(&self) -> TRFC_R[src]

Bit 1 - Transfer Complete Status Enable

pub fn blkge(&self) -> BLKGE_R[src]

Bit 2 - Block Gap Event Status Enable

pub fn dmaint(&self) -> DMAINT_R[src]

Bit 3 - DMA Interrupt Status Enable

pub fn bwrrdy(&self) -> BWRRDY_R[src]

Bit 4 - Buffer Write Ready Status Enable

pub fn brdrdy(&self) -> BRDRDY_R[src]

Bit 5 - Buffer Read Ready Status Enable

pub fn cins(&self) -> CINS_R[src]

Bit 6 - Card Insertion Status Enable

pub fn crem(&self) -> CREM_R[src]

Bit 7 - Card Removal Status Enable

pub fn cint(&self) -> CINT_R[src]

Bit 8 - Card Interrupt Status Enable

impl R<bool, CMDC_A>[src]

pub fn variant(&self) -> CMDC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TRFC_A>[src]

pub fn variant(&self) -> TRFC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BLKGE_A>[src]

pub fn variant(&self) -> BLKGE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DMAINT_A>[src]

pub fn variant(&self) -> DMAINT_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BWRRDY_A>[src]

pub fn variant(&self) -> BWRRDY_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BRDRDY_A>[src]

pub fn variant(&self) -> BRDRDY_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u16, Reg<u16, _NISTER_EMMC_MODE>>[src]

pub fn cmdc(&self) -> CMDC_R[src]

Bit 0 - Command Complete Status Enable

pub fn trfc(&self) -> TRFC_R[src]

Bit 1 - Transfer Complete Status Enable

pub fn blkge(&self) -> BLKGE_R[src]

Bit 2 - Block Gap Event Status Enable

pub fn dmaint(&self) -> DMAINT_R[src]

Bit 3 - DMA Interrupt Status Enable

pub fn bwrrdy(&self) -> BWRRDY_R[src]

Bit 4 - Buffer Write Ready Status Enable

pub fn brdrdy(&self) -> BRDRDY_R[src]

Bit 5 - Buffer Read Ready Status Enable

pub fn bootar(&self) -> BOOTAR_R[src]

Bit 14 - Boot Acknowledge Received Status Enable

impl R<bool, CMDTEO_A>[src]

pub fn variant(&self) -> CMDTEO_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDCRC_A>[src]

pub fn variant(&self) -> CMDCRC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDEND_A>[src]

pub fn variant(&self) -> CMDEND_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDIDX_A>[src]

pub fn variant(&self) -> CMDIDX_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATTEO_A>[src]

pub fn variant(&self) -> DATTEO_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATCRC_A>[src]

pub fn variant(&self) -> DATCRC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATEND_A>[src]

pub fn variant(&self) -> DATEND_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CURLIM_A>[src]

pub fn variant(&self) -> CURLIM_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ACMD_A>[src]

pub fn variant(&self) -> ACMD_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ADMA_A>[src]

pub fn variant(&self) -> ADMA_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u16, Reg<u16, _EISTER>>[src]

pub fn cmdteo(&self) -> CMDTEO_R[src]

Bit 0 - Command Timeout Error Status Enable

pub fn cmdcrc(&self) -> CMDCRC_R[src]

Bit 1 - Command CRC Error Status Enable

pub fn cmdend(&self) -> CMDEND_R[src]

Bit 2 - Command End Bit Error Status Enable

pub fn cmdidx(&self) -> CMDIDX_R[src]

Bit 3 - Command Index Error Status Enable

pub fn datteo(&self) -> DATTEO_R[src]

Bit 4 - Data Timeout Error Status Enable

pub fn datcrc(&self) -> DATCRC_R[src]

Bit 5 - Data CRC Error Status Enable

pub fn datend(&self) -> DATEND_R[src]

Bit 6 - Data End Bit Error Status Enable

pub fn curlim(&self) -> CURLIM_R[src]

Bit 7 - Current Limit Error Status Enable

pub fn acmd(&self) -> ACMD_R[src]

Bit 8 - Auto CMD Error Status Enable

pub fn adma(&self) -> ADMA_R[src]

Bit 9 - ADMA Error Status Enable

impl R<bool, CMDTEO_A>[src]

pub fn variant(&self) -> CMDTEO_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDCRC_A>[src]

pub fn variant(&self) -> CMDCRC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDEND_A>[src]

pub fn variant(&self) -> CMDEND_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDIDX_A>[src]

pub fn variant(&self) -> CMDIDX_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATTEO_A>[src]

pub fn variant(&self) -> DATTEO_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATCRC_A>[src]

pub fn variant(&self) -> DATCRC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATEND_A>[src]

pub fn variant(&self) -> DATEND_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CURLIM_A>[src]

pub fn variant(&self) -> CURLIM_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ACMD_A>[src]

pub fn variant(&self) -> ACMD_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ADMA_A>[src]

pub fn variant(&self) -> ADMA_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u16, Reg<u16, _EISTER_EMMC_MODE>>[src]

pub fn cmdteo(&self) -> CMDTEO_R[src]

Bit 0 - Command Timeout Error Status Enable

pub fn cmdcrc(&self) -> CMDCRC_R[src]

Bit 1 - Command CRC Error Status Enable

pub fn cmdend(&self) -> CMDEND_R[src]

Bit 2 - Command End Bit Error Status Enable

pub fn cmdidx(&self) -> CMDIDX_R[src]

Bit 3 - Command Index Error Status Enable

pub fn datteo(&self) -> DATTEO_R[src]

Bit 4 - Data Timeout Error Status Enable

pub fn datcrc(&self) -> DATCRC_R[src]

Bit 5 - Data CRC Error Status Enable

pub fn datend(&self) -> DATEND_R[src]

Bit 6 - Data End Bit Error Status Enable

pub fn curlim(&self) -> CURLIM_R[src]

Bit 7 - Current Limit Error Status Enable

pub fn acmd(&self) -> ACMD_R[src]

Bit 8 - Auto CMD Error Status Enable

pub fn adma(&self) -> ADMA_R[src]

Bit 9 - ADMA Error Status Enable

pub fn bootae(&self) -> BOOTAE_R[src]

Bit 12 - Boot Acknowledge Error Status Enable

impl R<bool, CMDC_A>[src]

pub fn variant(&self) -> CMDC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TRFC_A>[src]

pub fn variant(&self) -> TRFC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BLKGE_A>[src]

pub fn variant(&self) -> BLKGE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DMAINT_A>[src]

pub fn variant(&self) -> DMAINT_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BWRRDY_A>[src]

pub fn variant(&self) -> BWRRDY_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BRDRDY_A>[src]

pub fn variant(&self) -> BRDRDY_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CINS_A>[src]

pub fn variant(&self) -> CINS_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CREM_A>[src]

pub fn variant(&self) -> CREM_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CINT_A>[src]

pub fn variant(&self) -> CINT_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u16, Reg<u16, _NISIER>>[src]

pub fn cmdc(&self) -> CMDC_R[src]

Bit 0 - Command Complete Signal Enable

pub fn trfc(&self) -> TRFC_R[src]

Bit 1 - Transfer Complete Signal Enable

pub fn blkge(&self) -> BLKGE_R[src]

Bit 2 - Block Gap Event Signal Enable

pub fn dmaint(&self) -> DMAINT_R[src]

Bit 3 - DMA Interrupt Signal Enable

pub fn bwrrdy(&self) -> BWRRDY_R[src]

Bit 4 - Buffer Write Ready Signal Enable

pub fn brdrdy(&self) -> BRDRDY_R[src]

Bit 5 - Buffer Read Ready Signal Enable

pub fn cins(&self) -> CINS_R[src]

Bit 6 - Card Insertion Signal Enable

pub fn crem(&self) -> CREM_R[src]

Bit 7 - Card Removal Signal Enable

pub fn cint(&self) -> CINT_R[src]

Bit 8 - Card Interrupt Signal Enable

impl R<bool, CMDC_A>[src]

pub fn variant(&self) -> CMDC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TRFC_A>[src]

pub fn variant(&self) -> TRFC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BLKGE_A>[src]

pub fn variant(&self) -> BLKGE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DMAINT_A>[src]

pub fn variant(&self) -> DMAINT_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BWRRDY_A>[src]

pub fn variant(&self) -> BWRRDY_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BRDRDY_A>[src]

pub fn variant(&self) -> BRDRDY_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u16, Reg<u16, _NISIER_EMMC_MODE>>[src]

pub fn cmdc(&self) -> CMDC_R[src]

Bit 0 - Command Complete Signal Enable

pub fn trfc(&self) -> TRFC_R[src]

Bit 1 - Transfer Complete Signal Enable

pub fn blkge(&self) -> BLKGE_R[src]

Bit 2 - Block Gap Event Signal Enable

pub fn dmaint(&self) -> DMAINT_R[src]

Bit 3 - DMA Interrupt Signal Enable

pub fn bwrrdy(&self) -> BWRRDY_R[src]

Bit 4 - Buffer Write Ready Signal Enable

pub fn brdrdy(&self) -> BRDRDY_R[src]

Bit 5 - Buffer Read Ready Signal Enable

pub fn bootar(&self) -> BOOTAR_R[src]

Bit 14 - Boot Acknowledge Received Signal Enable

impl R<bool, CMDTEO_A>[src]

pub fn variant(&self) -> CMDTEO_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDCRC_A>[src]

pub fn variant(&self) -> CMDCRC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDEND_A>[src]

pub fn variant(&self) -> CMDEND_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDIDX_A>[src]

pub fn variant(&self) -> CMDIDX_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATTEO_A>[src]

pub fn variant(&self) -> DATTEO_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATCRC_A>[src]

pub fn variant(&self) -> DATCRC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATEND_A>[src]

pub fn variant(&self) -> DATEND_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CURLIM_A>[src]

pub fn variant(&self) -> CURLIM_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ACMD_A>[src]

pub fn variant(&self) -> ACMD_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ADMA_A>[src]

pub fn variant(&self) -> ADMA_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u16, Reg<u16, _EISIER>>[src]

pub fn cmdteo(&self) -> CMDTEO_R[src]

Bit 0 - Command Timeout Error Signal Enable

pub fn cmdcrc(&self) -> CMDCRC_R[src]

Bit 1 - Command CRC Error Signal Enable

pub fn cmdend(&self) -> CMDEND_R[src]

Bit 2 - Command End Bit Error Signal Enable

pub fn cmdidx(&self) -> CMDIDX_R[src]

Bit 3 - Command Index Error Signal Enable

pub fn datteo(&self) -> DATTEO_R[src]

Bit 4 - Data Timeout Error Signal Enable

pub fn datcrc(&self) -> DATCRC_R[src]

Bit 5 - Data CRC Error Signal Enable

pub fn datend(&self) -> DATEND_R[src]

Bit 6 - Data End Bit Error Signal Enable

pub fn curlim(&self) -> CURLIM_R[src]

Bit 7 - Current Limit Error Signal Enable

pub fn acmd(&self) -> ACMD_R[src]

Bit 8 - Auto CMD Error Signal Enable

pub fn adma(&self) -> ADMA_R[src]

Bit 9 - ADMA Error Signal Enable

impl R<bool, CMDTEO_A>[src]

pub fn variant(&self) -> CMDTEO_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDCRC_A>[src]

pub fn variant(&self) -> CMDCRC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDEND_A>[src]

pub fn variant(&self) -> CMDEND_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CMDIDX_A>[src]

pub fn variant(&self) -> CMDIDX_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATTEO_A>[src]

pub fn variant(&self) -> DATTEO_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATCRC_A>[src]

pub fn variant(&self) -> DATCRC_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DATEND_A>[src]

pub fn variant(&self) -> DATEND_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CURLIM_A>[src]

pub fn variant(&self) -> CURLIM_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ACMD_A>[src]

pub fn variant(&self) -> ACMD_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ADMA_A>[src]

pub fn variant(&self) -> ADMA_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u16, Reg<u16, _EISIER_EMMC_MODE>>[src]

pub fn cmdteo(&self) -> CMDTEO_R[src]

Bit 0 - Command Timeout Error Signal Enable

pub fn cmdcrc(&self) -> CMDCRC_R[src]

Bit 1 - Command CRC Error Signal Enable

pub fn cmdend(&self) -> CMDEND_R[src]

Bit 2 - Command End Bit Error Signal Enable

pub fn cmdidx(&self) -> CMDIDX_R[src]

Bit 3 - Command Index Error Signal Enable

pub fn datteo(&self) -> DATTEO_R[src]

Bit 4 - Data Timeout Error Signal Enable

pub fn datcrc(&self) -> DATCRC_R[src]

Bit 5 - Data CRC Error Signal Enable

pub fn datend(&self) -> DATEND_R[src]

Bit 6 - Data End Bit Error Signal Enable

pub fn curlim(&self) -> CURLIM_R[src]

Bit 7 - Current Limit Error Signal Enable

pub fn acmd(&self) -> ACMD_R[src]

Bit 8 - Auto CMD Error Signal Enable

pub fn adma(&self) -> ADMA_R[src]

Bit 9 - ADMA Error Signal Enable

pub fn bootae(&self) -> BOOTAE_R[src]

Bit 12 - Boot Acknowledge Error Signal Enable

impl R<bool, ACMD12NE_A>[src]

pub fn variant(&self) -> ACMD12NE_A[src]

Get enumerated values variant

pub fn is_exec(&self) -> bool[src]

Checks if the value of the field is EXEC

pub fn is_not_exec(&self) -> bool[src]

Checks if the value of the field is NOT_EXEC

impl R<bool, ACMDTEO_A>[src]

pub fn variant(&self) -> ACMDTEO_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, ACMDCRC_A>[src]

pub fn variant(&self) -> ACMDCRC_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, ACMDEND_A>[src]

pub fn variant(&self) -> ACMDEND_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, ACMDIDX_A>[src]

pub fn variant(&self) -> ACMDIDX_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, CMDNI_A>[src]

pub fn variant(&self) -> CMDNI_A[src]

Get enumerated values variant

pub fn is_ok(&self) -> bool[src]

Checks if the value of the field is OK

pub fn is_not_issued(&self) -> bool[src]

Checks if the value of the field is NOT_ISSUED

impl R<u16, Reg<u16, _ACESR>>[src]

pub fn acmd12ne(&self) -> ACMD12NE_R[src]

Bit 0 - Auto CMD12 Not Executed

pub fn acmdteo(&self) -> ACMDTEO_R[src]

Bit 1 - Auto CMD Timeout Error

pub fn acmdcrc(&self) -> ACMDCRC_R[src]

Bit 2 - Auto CMD CRC Error

pub fn acmdend(&self) -> ACMDEND_R[src]

Bit 3 - Auto CMD End Bit Error

pub fn acmdidx(&self) -> ACMDIDX_R[src]

Bit 4 - Auto CMD Index Error

pub fn cmdni(&self) -> CMDNI_R[src]

Bit 7 - Command not Issued By Auto CMD12 Error

impl R<u8, UHSMS_A>[src]

pub fn variant(&self) -> Variant<u8, UHSMS_A>[src]

Get enumerated values variant

pub fn is_sdr12(&self) -> bool[src]

Checks if the value of the field is SDR12

pub fn is_sdr25(&self) -> bool[src]

Checks if the value of the field is SDR25

pub fn is_sdr50(&self) -> bool[src]

Checks if the value of the field is SDR50

pub fn is_sdr104(&self) -> bool[src]

Checks if the value of the field is SDR104

pub fn is_ddr50(&self) -> bool[src]

Checks if the value of the field is DDR50

impl R<bool, VS18EN_A>[src]

pub fn variant(&self) -> VS18EN_A[src]

Get enumerated values variant

pub fn is_s33v(&self) -> bool[src]

Checks if the value of the field is S33V

pub fn is_s18v(&self) -> bool[src]

Checks if the value of the field is S18V

impl R<u8, DRVSEL_A>[src]

pub fn variant(&self) -> DRVSEL_A[src]

Get enumerated values variant

pub fn is_b(&self) -> bool[src]

Checks if the value of the field is B

pub fn is_a(&self) -> bool[src]

Checks if the value of the field is A

pub fn is_c(&self) -> bool[src]

Checks if the value of the field is C

pub fn is_d(&self) -> bool[src]

Checks if the value of the field is D

impl R<bool, EXTUN_A>[src]

pub fn variant(&self) -> EXTUN_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_requested(&self) -> bool[src]

Checks if the value of the field is REQUESTED

impl R<bool, SLCKSEL_A>[src]

pub fn variant(&self) -> SLCKSEL_A[src]

Get enumerated values variant

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

pub fn is_tuned(&self) -> bool[src]

Checks if the value of the field is TUNED

impl R<bool, ASINTEN_A>[src]

pub fn variant(&self) -> ASINTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PVALEN_A>[src]

pub fn variant(&self) -> PVALEN_A[src]

Get enumerated values variant

pub fn is_host(&self) -> bool[src]

Checks if the value of the field is HOST

pub fn is_auto(&self) -> bool[src]

Checks if the value of the field is AUTO

impl R<u16, Reg<u16, _HC2R>>[src]

pub fn uhsms(&self) -> UHSMS_R[src]

Bits 0:2 - UHS Mode Select

pub fn vs18en(&self) -> VS18EN_R[src]

Bit 3 - 1.8V Signaling Enable

pub fn drvsel(&self) -> DRVSEL_R[src]

Bits 4:5 - Driver Strength Select

pub fn extun(&self) -> EXTUN_R[src]

Bit 6 - Execute Tuning

pub fn slcksel(&self) -> SLCKSEL_R[src]

Bit 7 - Sampling Clock Select

pub fn asinten(&self) -> ASINTEN_R[src]

Bit 14 - Asynchronous Interrupt Enable

pub fn pvalen(&self) -> PVALEN_R[src]

Bit 15 - Preset Value Enable

impl R<u8, HS200EN_A>[src]

pub fn variant(&self) -> Variant<u8, HS200EN_A>[src]

Get enumerated values variant

pub fn is_sdr12(&self) -> bool[src]

Checks if the value of the field is SDR12

pub fn is_sdr25(&self) -> bool[src]

Checks if the value of the field is SDR25

pub fn is_sdr50(&self) -> bool[src]

Checks if the value of the field is SDR50

pub fn is_sdr104(&self) -> bool[src]

Checks if the value of the field is SDR104

pub fn is_ddr50(&self) -> bool[src]

Checks if the value of the field is DDR50

impl R<u8, DRVSEL_A>[src]

pub fn variant(&self) -> DRVSEL_A[src]

Get enumerated values variant

pub fn is_b(&self) -> bool[src]

Checks if the value of the field is B

pub fn is_a(&self) -> bool[src]

Checks if the value of the field is A

pub fn is_c(&self) -> bool[src]

Checks if the value of the field is C

pub fn is_d(&self) -> bool[src]

Checks if the value of the field is D

impl R<bool, EXTUN_A>[src]

pub fn variant(&self) -> EXTUN_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_requested(&self) -> bool[src]

Checks if the value of the field is REQUESTED

impl R<bool, SLCKSEL_A>[src]

pub fn variant(&self) -> SLCKSEL_A[src]

Get enumerated values variant

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

pub fn is_tuned(&self) -> bool[src]

Checks if the value of the field is TUNED

impl R<bool, PVALEN_A>[src]

pub fn variant(&self) -> PVALEN_A[src]

Get enumerated values variant

pub fn is_host(&self) -> bool[src]

Checks if the value of the field is HOST

pub fn is_auto(&self) -> bool[src]

Checks if the value of the field is AUTO

impl R<u16, Reg<u16, _HC2R_EMMC_MODE>>[src]

pub fn hs200en(&self) -> HS200EN_R[src]

Bits 0:3 - HS200 Mode Enable

pub fn drvsel(&self) -> DRVSEL_R[src]

Bits 4:5 - Driver Strength Select

pub fn extun(&self) -> EXTUN_R[src]

Bit 6 - Execute Tuning

pub fn slcksel(&self) -> SLCKSEL_R[src]

Bit 7 - Sampling Clock Select

pub fn pvalen(&self) -> PVALEN_R[src]

Bit 15 - Preset Value Enable

impl R<u8, TEOCLKF_A>[src]

pub fn variant(&self) -> Variant<u8, TEOCLKF_A>[src]

Get enumerated values variant

pub fn is_other(&self) -> bool[src]

Checks if the value of the field is OTHER

impl R<bool, TEOCLKU_A>[src]

pub fn variant(&self) -> TEOCLKU_A[src]

Get enumerated values variant

pub fn is_khz(&self) -> bool[src]

Checks if the value of the field is KHZ

pub fn is_mhz(&self) -> bool[src]

Checks if the value of the field is MHZ

impl R<u8, BASECLKF_A>[src]

pub fn variant(&self) -> Variant<u8, BASECLKF_A>[src]

Get enumerated values variant

pub fn is_other(&self) -> bool[src]

Checks if the value of the field is OTHER

impl R<u8, MAXBLKL_A>[src]

pub fn variant(&self) -> Variant<u8, MAXBLKL_A>[src]

Get enumerated values variant

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

pub fn is_2048(&self) -> bool[src]

Checks if the value of the field is _2048

impl R<bool, ED8SUP_A>[src]

pub fn variant(&self) -> ED8SUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, ADMA2SUP_A>[src]

pub fn variant(&self) -> ADMA2SUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, HSSUP_A>[src]

pub fn variant(&self) -> HSSUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, SDMASUP_A>[src]

pub fn variant(&self) -> SDMASUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, SRSUP_A>[src]

pub fn variant(&self) -> SRSUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, V33VSUP_A>[src]

pub fn variant(&self) -> V33VSUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, V30VSUP_A>[src]

pub fn variant(&self) -> V30VSUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, V18VSUP_A>[src]

pub fn variant(&self) -> V18VSUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, SB64SUP_A>[src]

pub fn variant(&self) -> SB64SUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, ASINTSUP_A>[src]

pub fn variant(&self) -> ASINTSUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<u8, SLTYPE_A>[src]

pub fn variant(&self) -> Variant<u8, SLTYPE_A>[src]

Get enumerated values variant

pub fn is_removable(&self) -> bool[src]

Checks if the value of the field is REMOVABLE

pub fn is_embedded(&self) -> bool[src]

Checks if the value of the field is EMBEDDED

impl R<u32, Reg<u32, _CA0R>>[src]

pub fn teoclkf(&self) -> TEOCLKF_R[src]

Bits 0:5 - Timeout Clock Frequency

pub fn teoclku(&self) -> TEOCLKU_R[src]

Bit 7 - Timeout Clock Unit

pub fn baseclkf(&self) -> BASECLKF_R[src]

Bits 8:15 - Base Clock Frequency

pub fn maxblkl(&self) -> MAXBLKL_R[src]

Bits 16:17 - Max Block Length

pub fn ed8sup(&self) -> ED8SUP_R[src]

Bit 18 - 8-bit Support for Embedded Device

pub fn adma2sup(&self) -> ADMA2SUP_R[src]

Bit 19 - ADMA2 Support

pub fn hssup(&self) -> HSSUP_R[src]

Bit 21 - High Speed Support

pub fn sdmasup(&self) -> SDMASUP_R[src]

Bit 22 - SDMA Support

pub fn srsup(&self) -> SRSUP_R[src]

Bit 23 - Suspend/Resume Support

pub fn v33vsup(&self) -> V33VSUP_R[src]

Bit 24 - Voltage Support 3.3V

pub fn v30vsup(&self) -> V30VSUP_R[src]

Bit 25 - Voltage Support 3.0V

pub fn v18vsup(&self) -> V18VSUP_R[src]

Bit 26 - Voltage Support 1.8V

pub fn sb64sup(&self) -> SB64SUP_R[src]

Bit 28 - 64-Bit System Bus Support

pub fn asintsup(&self) -> ASINTSUP_R[src]

Bit 29 - Asynchronous Interrupt Support

pub fn sltype(&self) -> SLTYPE_R[src]

Bits 30:31 - Slot Type

impl R<bool, SDR50SUP_A>[src]

pub fn variant(&self) -> SDR50SUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, SDR104SUP_A>[src]

pub fn variant(&self) -> SDR104SUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, DDR50SUP_A>[src]

pub fn variant(&self) -> DDR50SUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, DRVASUP_A>[src]

pub fn variant(&self) -> DRVASUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, DRVCSUP_A>[src]

pub fn variant(&self) -> DRVCSUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, DRVDSUP_A>[src]

pub fn variant(&self) -> DRVDSUP_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<u8, TCNTRT_A>[src]

pub fn variant(&self) -> Variant<u8, TCNTRT_A>[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_1s(&self) -> bool[src]

Checks if the value of the field is _1S

pub fn is_2s(&self) -> bool[src]

Checks if the value of the field is _2S

pub fn is_4s(&self) -> bool[src]

Checks if the value of the field is _4S

pub fn is_8s(&self) -> bool[src]

Checks if the value of the field is _8S

pub fn is_16s(&self) -> bool[src]

Checks if the value of the field is _16S

pub fn is_32s(&self) -> bool[src]

Checks if the value of the field is _32S

pub fn is_64s(&self) -> bool[src]

Checks if the value of the field is _64S

pub fn is_128s(&self) -> bool[src]

Checks if the value of the field is _128S

pub fn is_256s(&self) -> bool[src]

Checks if the value of the field is _256S

pub fn is_512s(&self) -> bool[src]

Checks if the value of the field is _512S

pub fn is_1024s(&self) -> bool[src]

Checks if the value of the field is _1024S

pub fn is_other(&self) -> bool[src]

Checks if the value of the field is OTHER

impl R<bool, TSDR50_A>[src]

pub fn variant(&self) -> TSDR50_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<u8, CLKMULT_A>[src]

pub fn variant(&self) -> Variant<u8, CLKMULT_A>[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

impl R<u32, Reg<u32, _CA1R>>[src]

pub fn sdr50sup(&self) -> SDR50SUP_R[src]

Bit 0 - SDR50 Support

pub fn sdr104sup(&self) -> SDR104SUP_R[src]

Bit 1 - SDR104 Support

pub fn ddr50sup(&self) -> DDR50SUP_R[src]

Bit 2 - DDR50 Support

pub fn drvasup(&self) -> DRVASUP_R[src]

Bit 4 - Driver Type A Support

pub fn drvcsup(&self) -> DRVCSUP_R[src]

Bit 5 - Driver Type C Support

pub fn drvdsup(&self) -> DRVDSUP_R[src]

Bit 6 - Driver Type D Support

pub fn tcntrt(&self) -> TCNTRT_R[src]

Bits 8:11 - Timer Count for Re-Tuning

pub fn tsdr50(&self) -> TSDR50_R[src]

Bit 13 - Use Tuning for SDR50

pub fn clkmult(&self) -> CLKMULT_R[src]

Bits 16:23 - Clock Multiplier

impl R<u8, MAXCUR33V_A>[src]

pub fn variant(&self) -> Variant<u8, MAXCUR33V_A>[src]

Get enumerated values variant

pub fn is_other(&self) -> bool[src]

Checks if the value of the field is OTHER

pub fn is_4ma(&self) -> bool[src]

Checks if the value of the field is _4MA

pub fn is_8ma(&self) -> bool[src]

Checks if the value of the field is _8MA

pub fn is_12ma(&self) -> bool[src]

Checks if the value of the field is _12MA

impl R<u8, MAXCUR30V_A>[src]

pub fn variant(&self) -> Variant<u8, MAXCUR30V_A>[src]

Get enumerated values variant

pub fn is_other(&self) -> bool[src]

Checks if the value of the field is OTHER

pub fn is_4ma(&self) -> bool[src]

Checks if the value of the field is _4MA

pub fn is_8ma(&self) -> bool[src]

Checks if the value of the field is _8MA

pub fn is_12ma(&self) -> bool[src]

Checks if the value of the field is _12MA

impl R<u8, MAXCUR18V_A>[src]

pub fn variant(&self) -> Variant<u8, MAXCUR18V_A>[src]

Get enumerated values variant

pub fn is_other(&self) -> bool[src]

Checks if the value of the field is OTHER

pub fn is_4ma(&self) -> bool[src]

Checks if the value of the field is _4MA

pub fn is_8ma(&self) -> bool[src]

Checks if the value of the field is _8MA

pub fn is_12ma(&self) -> bool[src]

Checks if the value of the field is _12MA

impl R<u32, Reg<u32, _MCCAR>>[src]

pub fn maxcur33v(&self) -> MAXCUR33V_R[src]

Bits 0:7 - Maximum Current for 3.3V

pub fn maxcur30v(&self) -> MAXCUR30V_R[src]

Bits 8:15 - Maximum Current for 3.0V

pub fn maxcur18v(&self) -> MAXCUR18V_R[src]

Bits 16:23 - Maximum Current for 1.8V

impl R<u8, ERRST_A>[src]

pub fn variant(&self) -> Variant<u8, ERRST_A>[src]

Get enumerated values variant

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

pub fn is_fds(&self) -> bool[src]

Checks if the value of the field is FDS

pub fn is_tfr(&self) -> bool[src]

Checks if the value of the field is TFR

impl R<bool, LMIS_A>[src]

pub fn variant(&self) -> LMIS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<u8, Reg<u8, _AESR>>[src]

pub fn errst(&self) -> ERRST_R[src]

Bits 0:1 - ADMA Error State

pub fn lmis(&self) -> LMIS_R[src]

Bit 2 - ADMA Length Mismatch Error

impl R<u32, Reg<u32, _ASAR>>[src]

pub fn admasa(&self) -> ADMASA_R[src]

Bits 0:31 - ADMA System Address

impl R<bool, CLKGSEL_A>[src]

pub fn variant(&self) -> CLKGSEL_A[src]

Get enumerated values variant

pub fn is_div(&self) -> bool[src]

Checks if the value of the field is DIV

pub fn is_prog(&self) -> bool[src]

Checks if the value of the field is PROG

impl R<u8, DRVSEL_A>[src]

pub fn variant(&self) -> DRVSEL_A[src]

Get enumerated values variant

pub fn is_b(&self) -> bool[src]

Checks if the value of the field is B

pub fn is_a(&self) -> bool[src]

Checks if the value of the field is A

pub fn is_c(&self) -> bool[src]

Checks if the value of the field is C

pub fn is_d(&self) -> bool[src]

Checks if the value of the field is D

impl R<u16, Reg<u16, _PVR>>[src]

pub fn sdclkfsel(&self) -> SDCLKFSEL_R[src]

Bits 0:9 - SDCLK Frequency Select Value for Initialization

pub fn clkgsel(&self) -> CLKGSEL_R[src]

Bit 10 - Clock Generator Select Value for Initialization

pub fn drvsel(&self) -> DRVSEL_R[src]

Bits 14:15 - Driver Strength Select Value for Initialization

impl R<u16, Reg<u16, _SISR>>[src]

pub fn intssl(&self) -> INTSSL_R[src]

Bit 0 - Interrupt Signal for Each Slot

impl R<u16, Reg<u16, _HCVR>>[src]

pub fn sver(&self) -> SVER_R[src]

Bits 0:7 - Spec Version

pub fn vver(&self) -> VVER_R[src]

Bits 8:15 - Vendor Version

impl R<u8, CMDTYP_A>[src]

pub fn variant(&self) -> CMDTYP_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_waitirq(&self) -> bool[src]

Checks if the value of the field is WAITIRQ

pub fn is_stream(&self) -> bool[src]

Checks if the value of the field is STREAM

pub fn is_boot(&self) -> bool[src]

Checks if the value of the field is BOOT

impl R<u8, Reg<u8, _MC1R>>[src]

pub fn cmdtyp(&self) -> CMDTYP_R[src]

Bits 0:1 - e.MMC Command Type

pub fn ddr(&self) -> DDR_R[src]

Bit 3 - e.MMC HSDDR Mode

pub fn opd(&self) -> OPD_R[src]

Bit 4 - e.MMC Open Drain Mode

pub fn boota(&self) -> BOOTA_R[src]

Bit 5 - e.MMC Boot Acknowledge Enable

pub fn rstn(&self) -> RSTN_R[src]

Bit 6 - e.MMC Reset Signal

pub fn fcd(&self) -> FCD_R[src]

Bit 7 - e.MMC Force Card Detect

impl R<u8, BMAX_A>[src]

pub fn variant(&self) -> BMAX_A[src]

Get enumerated values variant

pub fn is_incr16(&self) -> bool[src]

Checks if the value of the field is INCR16

pub fn is_incr8(&self) -> bool[src]

Checks if the value of the field is INCR8

pub fn is_incr4(&self) -> bool[src]

Checks if the value of the field is INCR4

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

impl R<u32, Reg<u32, _ACR>>[src]

pub fn bmax(&self) -> BMAX_R[src]

Bits 0:1 - AHB Maximum Burst

impl R<bool, FSDCLKD_A>[src]

pub fn variant(&self) -> FSDCLKD_A[src]

Get enumerated values variant

pub fn is_noeffect(&self) -> bool[src]

Checks if the value of the field is NOEFFECT

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<u32, Reg<u32, _CC2R>>[src]

pub fn fsdclkd(&self) -> FSDCLKD_R[src]

Bit 0 - Force SDCK Disabled

impl R<u32, Reg<u32, _CACR>>[src]

pub fn capwren(&self) -> CAPWREN_R[src]

Bit 0 - Capabilities Registers Write Enable (Required to write the correct frequencies in the Capabilities Registers)

pub fn key(&self) -> KEY_R[src]

Bits 8:15 - Key (0x46)

impl R<bool, NIDBG_A>[src]

pub fn variant(&self) -> NIDBG_A[src]

Get enumerated values variant

pub fn is_idbg(&self) -> bool[src]

Checks if the value of the field is IDBG

pub fn is_nidbg(&self) -> bool[src]

Checks if the value of the field is NIDBG

impl R<u8, Reg<u8, _DBGR>>[src]

pub fn nidbg(&self) -> NIDBG_R[src]

Bit 0 - Non-intrusive debug enable

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_usart_ext_clk(&self) -> bool[src]

Checks if the value of the field is USART_EXT_CLK

pub fn is_usart_int_clk(&self) -> bool[src]

Checks if the value of the field is USART_INT_CLK

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_i2c_slave(&self) -> bool[src]

Checks if the value of the field is I2C_SLAVE

pub fn is_i2c_master(&self) -> bool[src]

Checks if the value of the field is I2C_MASTER

impl R<u8, SDAHOLD_A>[src]

pub fn variant(&self) -> SDAHOLD_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_75ns(&self) -> bool[src]

Checks if the value of the field is _75NS

pub fn is_450ns(&self) -> bool[src]

Checks if the value of the field is _450NS

pub fn is_600ns(&self) -> bool[src]

Checks if the value of the field is _600NS

impl R<u8, SPEED_A>[src]

pub fn variant(&self) -> Variant<u8, SPEED_A>[src]

Get enumerated values variant

pub fn is_standard_and_fast_mode(&self) -> bool[src]

Checks if the value of the field is STANDARD_AND_FAST_MODE

pub fn is_fastplus_mode(&self) -> bool[src]

Checks if the value of the field is FASTPLUS_MODE

pub fn is_high_speed_mode(&self) -> bool[src]

Checks if the value of the field is HIGH_SPEED_MODE

impl R<u8, INACTOUT_A>[src]

pub fn variant(&self) -> INACTOUT_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_55us(&self) -> bool[src]

Checks if the value of the field is _55US

pub fn is_105us(&self) -> bool[src]

Checks if the value of the field is _105US

pub fn is_205us(&self) -> bool[src]

Checks if the value of the field is _205US

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:4 - Operating Mode

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 7 - Run in Standby

pub fn pinout(&self) -> PINOUT_R[src]

Bit 16 - Pin Usage

pub fn sdahold(&self) -> SDAHOLD_R[src]

Bits 20:21 - SDA Hold Time

pub fn mexttoen(&self) -> MEXTTOEN_R[src]

Bit 22 - Master SCL Low Extend Timeout

pub fn sexttoen(&self) -> SEXTTOEN_R[src]

Bit 23 - Slave SCL Low Extend Timeout

pub fn speed(&self) -> SPEED_R[src]

Bits 24:25 - Transfer Speed

pub fn sclsm(&self) -> SCLSM_R[src]

Bit 27 - SCL Clock Stretch Mode

pub fn inactout(&self) -> INACTOUT_R[src]

Bits 28:29 - Inactive Time-Out

pub fn lowtouten(&self) -> LOWTOUTEN_R[src]

Bit 30 - SCL Low Timeout Enable

impl R<u32, Reg<u32, _CTRLB>>[src]

pub fn smen(&self) -> SMEN_R[src]

Bit 8 - Smart Mode Enable

pub fn qcen(&self) -> QCEN_R[src]

Bit 9 - Quick Command Enable

pub fn cmd(&self) -> CMD_R[src]

Bits 16:17 - Command

pub fn ackact(&self) -> ACKACT_R[src]

Bit 18 - Acknowledge Action

impl R<bool, DATA32B_A>[src]

pub fn variant(&self) -> DATA32B_A[src]

Get enumerated values variant

pub fn is_data_trans_8bit(&self) -> bool[src]

Checks if the value of the field is DATA_TRANS_8BIT

pub fn is_data_trans_32bit(&self) -> bool[src]

Checks if the value of the field is DATA_TRANS_32BIT

impl R<u32, Reg<u32, _CTRLC>>[src]

pub fn data32b(&self) -> DATA32B_R[src]

Bit 24 - Data 32 Bit

impl R<u32, Reg<u32, _BAUD>>[src]

pub fn baud(&self) -> BAUD_R[src]

Bits 0:7 - Baud Rate Value

pub fn baudlow(&self) -> BAUDLOW_R[src]

Bits 8:15 - Baud Rate Value Low

pub fn hsbaud(&self) -> HSBAUD_R[src]

Bits 16:23 - High Speed Baud Rate Value

pub fn hsbaudlow(&self) -> HSBAUDLOW_R[src]

Bits 24:31 - High Speed Baud Rate Value Low

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn mb(&self) -> MB_R[src]

Bit 0 - Master On Bus Interrupt Disable

pub fn sb(&self) -> SB_R[src]

Bit 1 - Slave On Bus Interrupt Disable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Disable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn mb(&self) -> MB_R[src]

Bit 0 - Master On Bus Interrupt Enable

pub fn sb(&self) -> SB_R[src]

Bit 1 - Slave On Bus Interrupt Enable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn mb(&self) -> MB_R[src]

Bit 0 - Master On Bus Interrupt

pub fn sb(&self) -> SB_R[src]

Bit 1 - Slave On Bus Interrupt

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt

impl R<u16, Reg<u16, _STATUS>>[src]

pub fn buserr(&self) -> BUSERR_R[src]

Bit 0 - Bus Error

pub fn arblost(&self) -> ARBLOST_R[src]

Bit 1 - Arbitration Lost

pub fn rxnack(&self) -> RXNACK_R[src]

Bit 2 - Received Not Acknowledge

pub fn busstate(&self) -> BUSSTATE_R[src]

Bits 4:5 - Bus State

pub fn lowtout(&self) -> LOWTOUT_R[src]

Bit 6 - SCL Low Timeout

pub fn clkhold(&self) -> CLKHOLD_R[src]

Bit 7 - Clock Hold

pub fn mexttout(&self) -> MEXTTOUT_R[src]

Bit 8 - Master SCL Low Extend Timeout

pub fn sexttout(&self) -> SEXTTOUT_R[src]

Bit 9 - Slave SCL Low Extend Timeout

pub fn lenerr(&self) -> LENERR_R[src]

Bit 10 - Length Error

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - SERCOM Enable Synchronization Busy

pub fn sysop(&self) -> SYSOP_R[src]

Bit 2 - System Operation Synchronization Busy

impl R<u32, Reg<u32, _ADDR>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:10 - Address Value

pub fn lenen(&self) -> LENEN_R[src]

Bit 13 - Length Enable

pub fn hs(&self) -> HS_R[src]

Bit 14 - High Speed Mode

pub fn tenbiten(&self) -> TENBITEN_R[src]

Bit 15 - Ten Bit Addressing Enable

pub fn len(&self) -> LEN_R[src]

Bits 16:23 - Length

impl R<u32, Reg<u32, _DATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data Value

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgstop(&self) -> DBGSTOP_R[src]

Bit 0 - Debug Mode

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_usart_ext_clk(&self) -> bool[src]

Checks if the value of the field is USART_EXT_CLK

pub fn is_usart_int_clk(&self) -> bool[src]

Checks if the value of the field is USART_INT_CLK

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_i2c_slave(&self) -> bool[src]

Checks if the value of the field is I2C_SLAVE

pub fn is_i2c_master(&self) -> bool[src]

Checks if the value of the field is I2C_MASTER

impl R<u8, SDAHOLD_A>[src]

pub fn variant(&self) -> SDAHOLD_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_75ns(&self) -> bool[src]

Checks if the value of the field is _75NS

pub fn is_450ns(&self) -> bool[src]

Checks if the value of the field is _450NS

pub fn is_600ns(&self) -> bool[src]

Checks if the value of the field is _600NS

impl R<u8, SPEED_A>[src]

pub fn variant(&self) -> Variant<u8, SPEED_A>[src]

Get enumerated values variant

pub fn is_standard_and_fast_mode(&self) -> bool[src]

Checks if the value of the field is STANDARD_AND_FAST_MODE

pub fn is_fastplus_mode(&self) -> bool[src]

Checks if the value of the field is FASTPLUS_MODE

pub fn is_high_speed_mode(&self) -> bool[src]

Checks if the value of the field is HIGH_SPEED_MODE

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:4 - Operating Mode

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 7 - Run during Standby

pub fn pinout(&self) -> PINOUT_R[src]

Bit 16 - Pin Usage

pub fn sdahold(&self) -> SDAHOLD_R[src]

Bits 20:21 - SDA Hold Time

pub fn sexttoen(&self) -> SEXTTOEN_R[src]

Bit 23 - Slave SCL Low Extend Timeout

pub fn speed(&self) -> SPEED_R[src]

Bits 24:25 - Transfer Speed

pub fn sclsm(&self) -> SCLSM_R[src]

Bit 27 - SCL Clock Stretch Mode

pub fn lowtouten(&self) -> LOWTOUTEN_R[src]

Bit 30 - SCL Low Timeout Enable

impl R<u32, Reg<u32, _CTRLB>>[src]

pub fn smen(&self) -> SMEN_R[src]

Bit 8 - Smart Mode Enable

pub fn gcmd(&self) -> GCMD_R[src]

Bit 9 - PMBus Group Command

pub fn aacken(&self) -> AACKEN_R[src]

Bit 10 - Automatic Address Acknowledge

pub fn amode(&self) -> AMODE_R[src]

Bits 14:15 - Address Mode

pub fn cmd(&self) -> CMD_R[src]

Bits 16:17 - Command

pub fn ackact(&self) -> ACKACT_R[src]

Bit 18 - Acknowledge Action

impl R<bool, DATA32B_A>[src]

pub fn variant(&self) -> DATA32B_A[src]

Get enumerated values variant

pub fn is_data_trans_8bit(&self) -> bool[src]

Checks if the value of the field is DATA_TRANS_8BIT

pub fn is_data_trans_32bit(&self) -> bool[src]

Checks if the value of the field is DATA_TRANS_32BIT

impl R<u32, Reg<u32, _CTRLC>>[src]

pub fn sdasetup(&self) -> SDASETUP_R[src]

Bits 0:3 - SDA Setup Time

pub fn data32b(&self) -> DATA32B_R[src]

Bit 24 - Data 32 Bit

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn prec(&self) -> PREC_R[src]

Bit 0 - Stop Received Interrupt Disable

pub fn amatch(&self) -> AMATCH_R[src]

Bit 1 - Address Match Interrupt Disable

pub fn drdy(&self) -> DRDY_R[src]

Bit 2 - Data Interrupt Disable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Disable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn prec(&self) -> PREC_R[src]

Bit 0 - Stop Received Interrupt Enable

pub fn amatch(&self) -> AMATCH_R[src]

Bit 1 - Address Match Interrupt Enable

pub fn drdy(&self) -> DRDY_R[src]

Bit 2 - Data Interrupt Enable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn prec(&self) -> PREC_R[src]

Bit 0 - Stop Received Interrupt

pub fn amatch(&self) -> AMATCH_R[src]

Bit 1 - Address Match Interrupt

pub fn drdy(&self) -> DRDY_R[src]

Bit 2 - Data Interrupt

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt

impl R<u16, Reg<u16, _STATUS>>[src]

pub fn buserr(&self) -> BUSERR_R[src]

Bit 0 - Bus Error

pub fn coll(&self) -> COLL_R[src]

Bit 1 - Transmit Collision

pub fn rxnack(&self) -> RXNACK_R[src]

Bit 2 - Received Not Acknowledge

pub fn dir(&self) -> DIR_R[src]

Bit 3 - Read/Write Direction

pub fn sr(&self) -> SR_R[src]

Bit 4 - Repeated Start

pub fn lowtout(&self) -> LOWTOUT_R[src]

Bit 6 - SCL Low Timeout

pub fn clkhold(&self) -> CLKHOLD_R[src]

Bit 7 - Clock Hold

pub fn sexttout(&self) -> SEXTTOUT_R[src]

Bit 9 - Slave SCL Low Extend Timeout

pub fn hs(&self) -> HS_R[src]

Bit 10 - High Speed

pub fn lenerr(&self) -> LENERR_R[src]

Bit 11 - Transaction Length Error

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - SERCOM Enable Synchronization Busy

pub fn length(&self) -> LENGTH_R[src]

Bit 4 - Length Synchronization Busy

impl R<u16, Reg<u16, _LENGTH>>[src]

pub fn len(&self) -> LEN_R[src]

Bits 0:7 - Data Length

pub fn lenen(&self) -> LENEN_R[src]

Bit 8 - Data Length Enable

impl R<u32, Reg<u32, _ADDR>>[src]

pub fn gencen(&self) -> GENCEN_R[src]

Bit 0 - General Call Address Enable

pub fn addr(&self) -> ADDR_R[src]

Bits 1:10 - Address Value

pub fn tenbiten(&self) -> TENBITEN_R[src]

Bit 15 - Ten Bit Addressing Enable

pub fn addrmask(&self) -> ADDRMASK_R[src]

Bits 17:26 - Address Mask

impl R<u32, Reg<u32, _DATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data Value

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_usart_ext_clk(&self) -> bool[src]

Checks if the value of the field is USART_EXT_CLK

pub fn is_usart_int_clk(&self) -> bool[src]

Checks if the value of the field is USART_INT_CLK

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_i2c_slave(&self) -> bool[src]

Checks if the value of the field is I2C_SLAVE

pub fn is_i2c_master(&self) -> bool[src]

Checks if the value of the field is I2C_MASTER

impl R<u8, DOPO_A>[src]

pub fn variant(&self) -> Variant<u8, DOPO_A>[src]

Get enumerated values variant

pub fn is_pad0(&self) -> bool[src]

Checks if the value of the field is PAD0

pub fn is_pad2(&self) -> bool[src]

Checks if the value of the field is PAD2

impl R<u8, DIPO_A>[src]

pub fn variant(&self) -> DIPO_A[src]

Get enumerated values variant

pub fn is_pad0(&self) -> bool[src]

Checks if the value of the field is PAD0

pub fn is_pad1(&self) -> bool[src]

Checks if the value of the field is PAD1

pub fn is_pad2(&self) -> bool[src]

Checks if the value of the field is PAD2

pub fn is_pad3(&self) -> bool[src]

Checks if the value of the field is PAD3

impl R<u8, FORM_A>[src]

pub fn variant(&self) -> Variant<u8, FORM_A>[src]

Get enumerated values variant

pub fn is_spi_frame(&self) -> bool[src]

Checks if the value of the field is SPI_FRAME

pub fn is_spi_frame_with_addr(&self) -> bool[src]

Checks if the value of the field is SPI_FRAME_WITH_ADDR

impl R<bool, CPHA_A>[src]

pub fn variant(&self) -> CPHA_A[src]

Get enumerated values variant

pub fn is_leading_edge(&self) -> bool[src]

Checks if the value of the field is LEADING_EDGE

pub fn is_trailing_edge(&self) -> bool[src]

Checks if the value of the field is TRAILING_EDGE

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_idle_low(&self) -> bool[src]

Checks if the value of the field is IDLE_LOW

pub fn is_idle_high(&self) -> bool[src]

Checks if the value of the field is IDLE_HIGH

impl R<bool, DORD_A>[src]

pub fn variant(&self) -> DORD_A[src]

Get enumerated values variant

pub fn is_msb(&self) -> bool[src]

Checks if the value of the field is MSB

pub fn is_lsb(&self) -> bool[src]

Checks if the value of the field is LSB

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:4 - Operating Mode

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 7 - Run during Standby

pub fn ibon(&self) -> IBON_R[src]

Bit 8 - Immediate Buffer Overflow Notification

pub fn dopo(&self) -> DOPO_R[src]

Bits 16:17 - Data Out Pinout

pub fn dipo(&self) -> DIPO_R[src]

Bits 20:21 - Data In Pinout

pub fn form(&self) -> FORM_R[src]

Bits 24:27 - Frame Format

pub fn cpha(&self) -> CPHA_R[src]

Bit 28 - Clock Phase

pub fn cpol(&self) -> CPOL_R[src]

Bit 29 - Clock Polarity

pub fn dord(&self) -> DORD_R[src]

Bit 30 - Data Order

impl R<u8, CHSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, CHSIZE_A>[src]

Get enumerated values variant

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

pub fn is_9_bit(&self) -> bool[src]

Checks if the value of the field is _9_BIT

impl R<u8, AMODE_A>[src]

pub fn variant(&self) -> Variant<u8, AMODE_A>[src]

Get enumerated values variant

pub fn is_mask(&self) -> bool[src]

Checks if the value of the field is MASK

pub fn is_2_addresses(&self) -> bool[src]

Checks if the value of the field is _2_ADDRESSES

pub fn is_range(&self) -> bool[src]

Checks if the value of the field is RANGE

impl R<u32, Reg<u32, _CTRLB>>[src]

pub fn chsize(&self) -> CHSIZE_R[src]

Bits 0:2 - Character Size

pub fn ploaden(&self) -> PLOADEN_R[src]

Bit 6 - Data Preload Enable

pub fn ssde(&self) -> SSDE_R[src]

Bit 9 - Slave Select Low Detect Enable

pub fn mssen(&self) -> MSSEN_R[src]

Bit 13 - Master Slave Select Enable

pub fn amode(&self) -> AMODE_R[src]

Bits 14:15 - Address Mode

pub fn rxen(&self) -> RXEN_R[src]

Bit 17 - Receiver Enable

impl R<bool, DATA32B_A>[src]

pub fn variant(&self) -> DATA32B_A[src]

Get enumerated values variant

pub fn is_data_trans_8bit(&self) -> bool[src]

Checks if the value of the field is DATA_TRANS_8BIT

pub fn is_data_trans_32bit(&self) -> bool[src]

Checks if the value of the field is DATA_TRANS_32BIT

impl R<u32, Reg<u32, _CTRLC>>[src]

pub fn icspace(&self) -> ICSPACE_R[src]

Bits 0:5 - Inter-Character Spacing

pub fn data32b(&self) -> DATA32B_R[src]

Bit 24 - Data 32 Bit

impl R<u8, Reg<u8, _BAUD>>[src]

pub fn baud(&self) -> BAUD_R[src]

Bits 0:7 - Baud Rate Value

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt Disable

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt Disable

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt Disable

pub fn ssl(&self) -> SSL_R[src]

Bit 3 - Slave Select Low Interrupt Disable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Disable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt Enable

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt Enable

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt Enable

pub fn ssl(&self) -> SSL_R[src]

Bit 3 - Slave Select Low Interrupt Enable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt

pub fn ssl(&self) -> SSL_R[src]

Bit 3 - Slave Select Low Interrupt Flag

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt

impl R<u16, Reg<u16, _STATUS>>[src]

pub fn bufovf(&self) -> BUFOVF_R[src]

Bit 2 - Buffer Overflow

pub fn lenerr(&self) -> LENERR_R[src]

Bit 11 - Transaction Length Error

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - SERCOM Enable Synchronization Busy

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 2 - CTRLB Synchronization Busy

pub fn length(&self) -> LENGTH_R[src]

Bit 4 - LENGTH Synchronization Busy

impl R<u16, Reg<u16, _LENGTH>>[src]

pub fn len(&self) -> LEN_R[src]

Bits 0:7 - Data Length

pub fn lenen(&self) -> LENEN_R[src]

Bit 8 - Data Length Enable

impl R<u32, Reg<u32, _ADDR>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:7 - Address Value

pub fn addrmask(&self) -> ADDRMASK_R[src]

Bits 16:23 - Address Mask

impl R<u32, Reg<u32, _DATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data Value

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgstop(&self) -> DBGSTOP_R[src]

Bit 0 - Debug Mode

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_usart_ext_clk(&self) -> bool[src]

Checks if the value of the field is USART_EXT_CLK

pub fn is_usart_int_clk(&self) -> bool[src]

Checks if the value of the field is USART_INT_CLK

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_i2c_slave(&self) -> bool[src]

Checks if the value of the field is I2C_SLAVE

pub fn is_i2c_master(&self) -> bool[src]

Checks if the value of the field is I2C_MASTER

impl R<u8, DOPO_A>[src]

pub fn variant(&self) -> Variant<u8, DOPO_A>[src]

Get enumerated values variant

pub fn is_pad0(&self) -> bool[src]

Checks if the value of the field is PAD0

pub fn is_pad2(&self) -> bool[src]

Checks if the value of the field is PAD2

impl R<u8, DIPO_A>[src]

pub fn variant(&self) -> DIPO_A[src]

Get enumerated values variant

pub fn is_pad0(&self) -> bool[src]

Checks if the value of the field is PAD0

pub fn is_pad1(&self) -> bool[src]

Checks if the value of the field is PAD1

pub fn is_pad2(&self) -> bool[src]

Checks if the value of the field is PAD2

pub fn is_pad3(&self) -> bool[src]

Checks if the value of the field is PAD3

impl R<u8, FORM_A>[src]

pub fn variant(&self) -> Variant<u8, FORM_A>[src]

Get enumerated values variant

pub fn is_spi_frame(&self) -> bool[src]

Checks if the value of the field is SPI_FRAME

pub fn is_spi_frame_with_addr(&self) -> bool[src]

Checks if the value of the field is SPI_FRAME_WITH_ADDR

impl R<bool, CPHA_A>[src]

pub fn variant(&self) -> CPHA_A[src]

Get enumerated values variant

pub fn is_leading_edge(&self) -> bool[src]

Checks if the value of the field is LEADING_EDGE

pub fn is_trailing_edge(&self) -> bool[src]

Checks if the value of the field is TRAILING_EDGE

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_idle_low(&self) -> bool[src]

Checks if the value of the field is IDLE_LOW

pub fn is_idle_high(&self) -> bool[src]

Checks if the value of the field is IDLE_HIGH

impl R<bool, DORD_A>[src]

pub fn variant(&self) -> DORD_A[src]

Get enumerated values variant

pub fn is_msb(&self) -> bool[src]

Checks if the value of the field is MSB

pub fn is_lsb(&self) -> bool[src]

Checks if the value of the field is LSB

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:4 - Operating Mode

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 7 - Run during Standby

pub fn ibon(&self) -> IBON_R[src]

Bit 8 - Immediate Buffer Overflow Notification

pub fn dopo(&self) -> DOPO_R[src]

Bits 16:17 - Data Out Pinout

pub fn dipo(&self) -> DIPO_R[src]

Bits 20:21 - Data In Pinout

pub fn form(&self) -> FORM_R[src]

Bits 24:27 - Frame Format

pub fn cpha(&self) -> CPHA_R[src]

Bit 28 - Clock Phase

pub fn cpol(&self) -> CPOL_R[src]

Bit 29 - Clock Polarity

pub fn dord(&self) -> DORD_R[src]

Bit 30 - Data Order

impl R<u8, CHSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, CHSIZE_A>[src]

Get enumerated values variant

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

pub fn is_9_bit(&self) -> bool[src]

Checks if the value of the field is _9_BIT

impl R<u8, AMODE_A>[src]

pub fn variant(&self) -> Variant<u8, AMODE_A>[src]

Get enumerated values variant

pub fn is_mask(&self) -> bool[src]

Checks if the value of the field is MASK

pub fn is_2_addresses(&self) -> bool[src]

Checks if the value of the field is _2_ADDRESSES

pub fn is_range(&self) -> bool[src]

Checks if the value of the field is RANGE

impl R<u32, Reg<u32, _CTRLB>>[src]

pub fn chsize(&self) -> CHSIZE_R[src]

Bits 0:2 - Character Size

pub fn ploaden(&self) -> PLOADEN_R[src]

Bit 6 - Data Preload Enable

pub fn ssde(&self) -> SSDE_R[src]

Bit 9 - Slave Select Low Detect Enable

pub fn mssen(&self) -> MSSEN_R[src]

Bit 13 - Master Slave Select Enable

pub fn amode(&self) -> AMODE_R[src]

Bits 14:15 - Address Mode

pub fn rxen(&self) -> RXEN_R[src]

Bit 17 - Receiver Enable

impl R<bool, DATA32B_A>[src]

pub fn variant(&self) -> DATA32B_A[src]

Get enumerated values variant

pub fn is_data_trans_8bit(&self) -> bool[src]

Checks if the value of the field is DATA_TRANS_8BIT

pub fn is_data_trans_32bit(&self) -> bool[src]

Checks if the value of the field is DATA_TRANS_32BIT

impl R<u32, Reg<u32, _CTRLC>>[src]

pub fn icspace(&self) -> ICSPACE_R[src]

Bits 0:5 - Inter-Character Spacing

pub fn data32b(&self) -> DATA32B_R[src]

Bit 24 - Data 32 Bit

impl R<u8, Reg<u8, _BAUD>>[src]

pub fn baud(&self) -> BAUD_R[src]

Bits 0:7 - Baud Rate Value

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt Disable

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt Disable

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt Disable

pub fn ssl(&self) -> SSL_R[src]

Bit 3 - Slave Select Low Interrupt Disable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Disable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt Enable

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt Enable

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt Enable

pub fn ssl(&self) -> SSL_R[src]

Bit 3 - Slave Select Low Interrupt Enable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt

pub fn ssl(&self) -> SSL_R[src]

Bit 3 - Slave Select Low Interrupt Flag

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt

impl R<u16, Reg<u16, _STATUS>>[src]

pub fn bufovf(&self) -> BUFOVF_R[src]

Bit 2 - Buffer Overflow

pub fn lenerr(&self) -> LENERR_R[src]

Bit 11 - Transaction Length Error

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - SERCOM Enable Synchronization Busy

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 2 - CTRLB Synchronization Busy

pub fn length(&self) -> LENGTH_R[src]

Bit 4 - LENGTH Synchronization Busy

impl R<u16, Reg<u16, _LENGTH>>[src]

pub fn len(&self) -> LEN_R[src]

Bits 0:7 - Data Length

pub fn lenen(&self) -> LENEN_R[src]

Bit 8 - Data Length Enable

impl R<u32, Reg<u32, _ADDR>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:7 - Address Value

pub fn addrmask(&self) -> ADDRMASK_R[src]

Bits 16:23 - Address Mask

impl R<u32, Reg<u32, _DATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data Value

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgstop(&self) -> DBGSTOP_R[src]

Bit 0 - Debug Mode

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_usart_ext_clk(&self) -> bool[src]

Checks if the value of the field is USART_EXT_CLK

pub fn is_usart_int_clk(&self) -> bool[src]

Checks if the value of the field is USART_INT_CLK

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_i2c_slave(&self) -> bool[src]

Checks if the value of the field is I2C_SLAVE

pub fn is_i2c_master(&self) -> bool[src]

Checks if the value of the field is I2C_MASTER

impl R<u8, SAMPR_A>[src]

pub fn variant(&self) -> Variant<u8, SAMPR_A>[src]

Get enumerated values variant

pub fn is_16x_arithmetic(&self) -> bool[src]

Checks if the value of the field is _16X_ARITHMETIC

pub fn is_16x_fractional(&self) -> bool[src]

Checks if the value of the field is _16X_FRACTIONAL

pub fn is_8x_arithmetic(&self) -> bool[src]

Checks if the value of the field is _8X_ARITHMETIC

pub fn is_8x_fractional(&self) -> bool[src]

Checks if the value of the field is _8X_FRACTIONAL

pub fn is_3x_arithmetic(&self) -> bool[src]

Checks if the value of the field is _3X_ARITHMETIC

impl R<u8, TXPO_A>[src]

pub fn variant(&self) -> Variant<u8, TXPO_A>[src]

Get enumerated values variant

pub fn is_pad0(&self) -> bool[src]

Checks if the value of the field is PAD0

pub fn is_pad2(&self) -> bool[src]

Checks if the value of the field is PAD2

pub fn is_pad3(&self) -> bool[src]

Checks if the value of the field is PAD3

impl R<u8, RXPO_A>[src]

pub fn variant(&self) -> RXPO_A[src]

Get enumerated values variant

pub fn is_pad0(&self) -> bool[src]

Checks if the value of the field is PAD0

pub fn is_pad1(&self) -> bool[src]

Checks if the value of the field is PAD1

pub fn is_pad2(&self) -> bool[src]

Checks if the value of the field is PAD2

pub fn is_pad3(&self) -> bool[src]

Checks if the value of the field is PAD3

impl R<u8, SAMPA_A>[src]

pub fn variant(&self) -> SAMPA_A[src]

Get enumerated values variant

pub fn is_adj0(&self) -> bool[src]

Checks if the value of the field is ADJ0

pub fn is_adj1(&self) -> bool[src]

Checks if the value of the field is ADJ1

pub fn is_adj2(&self) -> bool[src]

Checks if the value of the field is ADJ2

pub fn is_adj3(&self) -> bool[src]

Checks if the value of the field is ADJ3

impl R<u8, FORM_A>[src]

pub fn variant(&self) -> Variant<u8, FORM_A>[src]

Get enumerated values variant

pub fn is_usart_frame_no_parity(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_NO_PARITY

pub fn is_usart_frame_with_parity(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_WITH_PARITY

pub fn is_usart_frame_lin_master_mode(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_LIN_MASTER_MODE

pub fn is_usart_frame_auto_baud_no_parity(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_AUTO_BAUD_NO_PARITY

pub fn is_usart_frame_auto_baud_with_parity(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_AUTO_BAUD_WITH_PARITY

pub fn is_usart_frame_iso_7816(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_ISO_7816

impl R<bool, CMODE_A>[src]

pub fn variant(&self) -> CMODE_A[src]

Get enumerated values variant

pub fn is_async_(&self) -> bool[src]

Checks if the value of the field is ASYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_idle_low(&self) -> bool[src]

Checks if the value of the field is IDLE_LOW

pub fn is_idle_high(&self) -> bool[src]

Checks if the value of the field is IDLE_HIGH

impl R<bool, DORD_A>[src]

pub fn variant(&self) -> DORD_A[src]

Get enumerated values variant

pub fn is_msb(&self) -> bool[src]

Checks if the value of the field is MSB

pub fn is_lsb(&self) -> bool[src]

Checks if the value of the field is LSB

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:4 - Operating Mode

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 7 - Run during Standby

pub fn ibon(&self) -> IBON_R[src]

Bit 8 - Immediate Buffer Overflow Notification

pub fn txinv(&self) -> TXINV_R[src]

Bit 9 - Transmit Data Invert

pub fn rxinv(&self) -> RXINV_R[src]

Bit 10 - Receive Data Invert

pub fn sampr(&self) -> SAMPR_R[src]

Bits 13:15 - Sample

pub fn txpo(&self) -> TXPO_R[src]

Bits 16:17 - Transmit Data Pinout

pub fn rxpo(&self) -> RXPO_R[src]

Bits 20:21 - Receive Data Pinout

pub fn sampa(&self) -> SAMPA_R[src]

Bits 22:23 - Sample Adjustment

pub fn form(&self) -> FORM_R[src]

Bits 24:27 - Frame Format

pub fn cmode(&self) -> CMODE_R[src]

Bit 28 - Communication Mode

pub fn cpol(&self) -> CPOL_R[src]

Bit 29 - Clock Polarity

pub fn dord(&self) -> DORD_R[src]

Bit 30 - Data Order

impl R<u8, CHSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, CHSIZE_A>[src]

Get enumerated values variant

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

pub fn is_9_bit(&self) -> bool[src]

Checks if the value of the field is _9_BIT

pub fn is_5_bit(&self) -> bool[src]

Checks if the value of the field is _5_BIT

pub fn is_6_bit(&self) -> bool[src]

Checks if the value of the field is _6_BIT

pub fn is_7_bit(&self) -> bool[src]

Checks if the value of the field is _7_BIT

impl R<bool, SBMODE_A>[src]

pub fn variant(&self) -> SBMODE_A[src]

Get enumerated values variant

pub fn is_1_bit(&self) -> bool[src]

Checks if the value of the field is _1_BIT

pub fn is_2_bit(&self) -> bool[src]

Checks if the value of the field is _2_BIT

impl R<bool, PMODE_A>[src]

pub fn variant(&self) -> PMODE_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<u8, LINCMD_A>[src]

pub fn variant(&self) -> Variant<u8, LINCMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_software_control_transmit_cmd(&self) -> bool[src]

Checks if the value of the field is SOFTWARE_CONTROL_TRANSMIT_CMD

pub fn is_auto_transmit_cmd(&self) -> bool[src]

Checks if the value of the field is AUTO_TRANSMIT_CMD

impl R<u32, Reg<u32, _CTRLB>>[src]

pub fn chsize(&self) -> CHSIZE_R[src]

Bits 0:2 - Character Size

pub fn sbmode(&self) -> SBMODE_R[src]

Bit 6 - Stop Bit Mode

pub fn colden(&self) -> COLDEN_R[src]

Bit 8 - Collision Detection Enable

pub fn sfde(&self) -> SFDE_R[src]

Bit 9 - Start of Frame Detection Enable

pub fn enc(&self) -> ENC_R[src]

Bit 10 - Encoding Format

pub fn pmode(&self) -> PMODE_R[src]

Bit 13 - Parity Mode

pub fn txen(&self) -> TXEN_R[src]

Bit 16 - Transmitter Enable

pub fn rxen(&self) -> RXEN_R[src]

Bit 17 - Receiver Enable

pub fn lincmd(&self) -> LINCMD_R[src]

Bits 24:25 - LIN Command

impl R<u8, BRKLEN_A>[src]

pub fn variant(&self) -> BRKLEN_A[src]

Get enumerated values variant

pub fn is_13_bit(&self) -> bool[src]

Checks if the value of the field is _13_BIT

pub fn is_17_bit(&self) -> bool[src]

Checks if the value of the field is _17_BIT

pub fn is_21_bit(&self) -> bool[src]

Checks if the value of the field is _21_BIT

pub fn is_26_bit(&self) -> bool[src]

Checks if the value of the field is _26_BIT

impl R<u8, HDRDLY_A>[src]

pub fn variant(&self) -> HDRDLY_A[src]

Get enumerated values variant

pub fn is_delay0(&self) -> bool[src]

Checks if the value of the field is DELAY0

pub fn is_delay1(&self) -> bool[src]

Checks if the value of the field is DELAY1

pub fn is_delay2(&self) -> bool[src]

Checks if the value of the field is DELAY2

pub fn is_delay3(&self) -> bool[src]

Checks if the value of the field is DELAY3

impl R<u8, DATA32B_A>[src]

pub fn variant(&self) -> DATA32B_A[src]

Get enumerated values variant

pub fn is_data_read_write_chsize(&self) -> bool[src]

Checks if the value of the field is DATA_READ_WRITE_CHSIZE

pub fn is_data_read_chsize_write_32bit(&self) -> bool[src]

Checks if the value of the field is DATA_READ_CHSIZE_WRITE_32BIT

pub fn is_data_read_32bit_write_chsize(&self) -> bool[src]

Checks if the value of the field is DATA_READ_32BIT_WRITE_CHSIZE

pub fn is_data_read_write_32bit(&self) -> bool[src]

Checks if the value of the field is DATA_READ_WRITE_32BIT

impl R<u32, Reg<u32, _CTRLC>>[src]

pub fn gtime(&self) -> GTIME_R[src]

Bits 0:2 - Guard Time

pub fn brklen(&self) -> BRKLEN_R[src]

Bits 8:9 - LIN Master Break Length

pub fn hdrdly(&self) -> HDRDLY_R[src]

Bits 10:11 - LIN Master Header Delay

pub fn inack(&self) -> INACK_R[src]

Bit 16 - Inhibit Not Acknowledge

pub fn dsnack(&self) -> DSNACK_R[src]

Bit 17 - Disable Successive NACK

pub fn maxiter(&self) -> MAXITER_R[src]

Bits 20:22 - Maximum Iterations

pub fn data32b(&self) -> DATA32B_R[src]

Bits 24:25 - Data 32 Bit

impl R<u16, Reg<u16, _BAUD>>[src]

pub fn baud(&self) -> BAUD_R[src]

Bits 0:15 - Baud Rate Value

impl R<u16, Reg<u16, _BAUD_FRAC_MODE>>[src]

pub fn baud(&self) -> BAUD_R[src]

Bits 0:12 - Baud Rate Value

pub fn fp(&self) -> FP_R[src]

Bits 13:15 - Fractional Part

impl R<u16, Reg<u16, _BAUD_FRACFP_MODE>>[src]

pub fn baud(&self) -> BAUD_R[src]

Bits 0:12 - Baud Rate Value

pub fn fp(&self) -> FP_R[src]

Bits 13:15 - Fractional Part

impl R<u16, Reg<u16, _BAUD_USARTFP_MODE>>[src]

pub fn baud(&self) -> BAUD_R[src]

Bits 0:15 - Baud Rate Value

impl R<u8, Reg<u8, _RXPL>>[src]

pub fn rxpl(&self) -> RXPL_R[src]

Bits 0:7 - Receive Pulse Length

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt Disable

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt Disable

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt Disable

pub fn rxs(&self) -> RXS_R[src]

Bit 3 - Receive Start Interrupt Disable

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 4 - Clear To Send Input Change Interrupt Disable

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 5 - Break Received Interrupt Disable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Disable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt Enable

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt Enable

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt Enable

pub fn rxs(&self) -> RXS_R[src]

Bit 3 - Receive Start Interrupt Enable

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 4 - Clear To Send Input Change Interrupt Enable

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 5 - Break Received Interrupt Enable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt

pub fn rxs(&self) -> RXS_R[src]

Bit 3 - Receive Start Interrupt

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 4 - Clear To Send Input Change Interrupt

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 5 - Break Received Interrupt

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt

impl R<u16, Reg<u16, _STATUS>>[src]

pub fn perr(&self) -> PERR_R[src]

Bit 0 - Parity Error

pub fn ferr(&self) -> FERR_R[src]

Bit 1 - Frame Error

pub fn bufovf(&self) -> BUFOVF_R[src]

Bit 2 - Buffer Overflow

pub fn cts(&self) -> CTS_R[src]

Bit 3 - Clear To Send

pub fn isf(&self) -> ISF_R[src]

Bit 4 - Inconsistent Sync Field

pub fn coll(&self) -> COLL_R[src]

Bit 5 - Collision Detected

pub fn txe(&self) -> TXE_R[src]

Bit 6 - Transmitter Empty

pub fn iter(&self) -> ITER_R[src]

Bit 7 - Maximum Number of Repetitions Reached

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - SERCOM Enable Synchronization Busy

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 2 - CTRLB Synchronization Busy

pub fn rxerrcnt(&self) -> RXERRCNT_R[src]

Bit 3 - RXERRCNT Synchronization Busy

pub fn length(&self) -> LENGTH_R[src]

Bit 4 - LENGTH Synchronization Busy

impl R<u8, Reg<u8, _RXERRCNT>>[src]

pub fn rxerrcnt(&self) -> RXERRCNT_R[src]

Bits 0:7 - Receive Error Count

impl R<u16, Reg<u16, _LENGTH>>[src]

pub fn len(&self) -> LEN_R[src]

Bits 0:7 - Data Length

pub fn lenen(&self) -> LENEN_R[src]

Bits 8:9 - Data Length Enable

impl R<u32, Reg<u32, _DATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data Value

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgstop(&self) -> DBGSTOP_R[src]

Bit 0 - Debug Mode

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_usart_ext_clk(&self) -> bool[src]

Checks if the value of the field is USART_EXT_CLK

pub fn is_usart_int_clk(&self) -> bool[src]

Checks if the value of the field is USART_INT_CLK

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_i2c_slave(&self) -> bool[src]

Checks if the value of the field is I2C_SLAVE

pub fn is_i2c_master(&self) -> bool[src]

Checks if the value of the field is I2C_MASTER

impl R<u8, SAMPR_A>[src]

pub fn variant(&self) -> Variant<u8, SAMPR_A>[src]

Get enumerated values variant

pub fn is_16x_arithmetic(&self) -> bool[src]

Checks if the value of the field is _16X_ARITHMETIC

pub fn is_16x_fractional(&self) -> bool[src]

Checks if the value of the field is _16X_FRACTIONAL

pub fn is_8x_arithmetic(&self) -> bool[src]

Checks if the value of the field is _8X_ARITHMETIC

pub fn is_8x_fractional(&self) -> bool[src]

Checks if the value of the field is _8X_FRACTIONAL

pub fn is_3x_arithmetic(&self) -> bool[src]

Checks if the value of the field is _3X_ARITHMETIC

impl R<u8, TXPO_A>[src]

pub fn variant(&self) -> Variant<u8, TXPO_A>[src]

Get enumerated values variant

pub fn is_pad0(&self) -> bool[src]

Checks if the value of the field is PAD0

pub fn is_pad2(&self) -> bool[src]

Checks if the value of the field is PAD2

pub fn is_pad3(&self) -> bool[src]

Checks if the value of the field is PAD3

impl R<u8, RXPO_A>[src]

pub fn variant(&self) -> RXPO_A[src]

Get enumerated values variant

pub fn is_pad0(&self) -> bool[src]

Checks if the value of the field is PAD0

pub fn is_pad1(&self) -> bool[src]

Checks if the value of the field is PAD1

pub fn is_pad2(&self) -> bool[src]

Checks if the value of the field is PAD2

pub fn is_pad3(&self) -> bool[src]

Checks if the value of the field is PAD3

impl R<u8, SAMPA_A>[src]

pub fn variant(&self) -> SAMPA_A[src]

Get enumerated values variant

pub fn is_adj0(&self) -> bool[src]

Checks if the value of the field is ADJ0

pub fn is_adj1(&self) -> bool[src]

Checks if the value of the field is ADJ1

pub fn is_adj2(&self) -> bool[src]

Checks if the value of the field is ADJ2

pub fn is_adj3(&self) -> bool[src]

Checks if the value of the field is ADJ3

impl R<u8, FORM_A>[src]

pub fn variant(&self) -> Variant<u8, FORM_A>[src]

Get enumerated values variant

pub fn is_usart_frame_no_parity(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_NO_PARITY

pub fn is_usart_frame_with_parity(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_WITH_PARITY

pub fn is_usart_frame_lin_master_mode(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_LIN_MASTER_MODE

pub fn is_usart_frame_auto_baud_no_parity(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_AUTO_BAUD_NO_PARITY

pub fn is_usart_frame_auto_baud_with_parity(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_AUTO_BAUD_WITH_PARITY

pub fn is_usart_frame_iso_7816(&self) -> bool[src]

Checks if the value of the field is USART_FRAME_ISO_7816

impl R<bool, CMODE_A>[src]

pub fn variant(&self) -> CMODE_A[src]

Get enumerated values variant

pub fn is_async_(&self) -> bool[src]

Checks if the value of the field is ASYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_idle_low(&self) -> bool[src]

Checks if the value of the field is IDLE_LOW

pub fn is_idle_high(&self) -> bool[src]

Checks if the value of the field is IDLE_HIGH

impl R<bool, DORD_A>[src]

pub fn variant(&self) -> DORD_A[src]

Get enumerated values variant

pub fn is_msb(&self) -> bool[src]

Checks if the value of the field is MSB

pub fn is_lsb(&self) -> bool[src]

Checks if the value of the field is LSB

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:4 - Operating Mode

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 7 - Run during Standby

pub fn ibon(&self) -> IBON_R[src]

Bit 8 - Immediate Buffer Overflow Notification

pub fn txinv(&self) -> TXINV_R[src]

Bit 9 - Transmit Data Invert

pub fn rxinv(&self) -> RXINV_R[src]

Bit 10 - Receive Data Invert

pub fn sampr(&self) -> SAMPR_R[src]

Bits 13:15 - Sample

pub fn txpo(&self) -> TXPO_R[src]

Bits 16:17 - Transmit Data Pinout

pub fn rxpo(&self) -> RXPO_R[src]

Bits 20:21 - Receive Data Pinout

pub fn sampa(&self) -> SAMPA_R[src]

Bits 22:23 - Sample Adjustment

pub fn form(&self) -> FORM_R[src]

Bits 24:27 - Frame Format

pub fn cmode(&self) -> CMODE_R[src]

Bit 28 - Communication Mode

pub fn cpol(&self) -> CPOL_R[src]

Bit 29 - Clock Polarity

pub fn dord(&self) -> DORD_R[src]

Bit 30 - Data Order

impl R<u8, CHSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, CHSIZE_A>[src]

Get enumerated values variant

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

pub fn is_9_bit(&self) -> bool[src]

Checks if the value of the field is _9_BIT

pub fn is_5_bit(&self) -> bool[src]

Checks if the value of the field is _5_BIT

pub fn is_6_bit(&self) -> bool[src]

Checks if the value of the field is _6_BIT

pub fn is_7_bit(&self) -> bool[src]

Checks if the value of the field is _7_BIT

impl R<bool, SBMODE_A>[src]

pub fn variant(&self) -> SBMODE_A[src]

Get enumerated values variant

pub fn is_1_bit(&self) -> bool[src]

Checks if the value of the field is _1_BIT

pub fn is_2_bit(&self) -> bool[src]

Checks if the value of the field is _2_BIT

impl R<bool, PMODE_A>[src]

pub fn variant(&self) -> PMODE_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<u8, LINCMD_A>[src]

pub fn variant(&self) -> Variant<u8, LINCMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_software_control_transmit_cmd(&self) -> bool[src]

Checks if the value of the field is SOFTWARE_CONTROL_TRANSMIT_CMD

pub fn is_auto_transmit_cmd(&self) -> bool[src]

Checks if the value of the field is AUTO_TRANSMIT_CMD

impl R<u32, Reg<u32, _CTRLB>>[src]

pub fn chsize(&self) -> CHSIZE_R[src]

Bits 0:2 - Character Size

pub fn sbmode(&self) -> SBMODE_R[src]

Bit 6 - Stop Bit Mode

pub fn colden(&self) -> COLDEN_R[src]

Bit 8 - Collision Detection Enable

pub fn sfde(&self) -> SFDE_R[src]

Bit 9 - Start of Frame Detection Enable

pub fn enc(&self) -> ENC_R[src]

Bit 10 - Encoding Format

pub fn pmode(&self) -> PMODE_R[src]

Bit 13 - Parity Mode

pub fn txen(&self) -> TXEN_R[src]

Bit 16 - Transmitter Enable

pub fn rxen(&self) -> RXEN_R[src]

Bit 17 - Receiver Enable

pub fn lincmd(&self) -> LINCMD_R[src]

Bits 24:25 - LIN Command

impl R<u8, BRKLEN_A>[src]

pub fn variant(&self) -> BRKLEN_A[src]

Get enumerated values variant

pub fn is_13_bit(&self) -> bool[src]

Checks if the value of the field is _13_BIT

pub fn is_17_bit(&self) -> bool[src]

Checks if the value of the field is _17_BIT

pub fn is_21_bit(&self) -> bool[src]

Checks if the value of the field is _21_BIT

pub fn is_26_bit(&self) -> bool[src]

Checks if the value of the field is _26_BIT

impl R<u8, HDRDLY_A>[src]

pub fn variant(&self) -> HDRDLY_A[src]

Get enumerated values variant

pub fn is_delay0(&self) -> bool[src]

Checks if the value of the field is DELAY0

pub fn is_delay1(&self) -> bool[src]

Checks if the value of the field is DELAY1

pub fn is_delay2(&self) -> bool[src]

Checks if the value of the field is DELAY2

pub fn is_delay3(&self) -> bool[src]

Checks if the value of the field is DELAY3

impl R<u8, DATA32B_A>[src]

pub fn variant(&self) -> DATA32B_A[src]

Get enumerated values variant

pub fn is_data_read_write_chsize(&self) -> bool[src]

Checks if the value of the field is DATA_READ_WRITE_CHSIZE

pub fn is_data_read_chsize_write_32bit(&self) -> bool[src]

Checks if the value of the field is DATA_READ_CHSIZE_WRITE_32BIT

pub fn is_data_read_32bit_write_chsize(&self) -> bool[src]

Checks if the value of the field is DATA_READ_32BIT_WRITE_CHSIZE

pub fn is_data_read_write_32bit(&self) -> bool[src]

Checks if the value of the field is DATA_READ_WRITE_32BIT

impl R<u32, Reg<u32, _CTRLC>>[src]

pub fn gtime(&self) -> GTIME_R[src]

Bits 0:2 - Guard Time

pub fn brklen(&self) -> BRKLEN_R[src]

Bits 8:9 - LIN Master Break Length

pub fn hdrdly(&self) -> HDRDLY_R[src]

Bits 10:11 - LIN Master Header Delay

pub fn inack(&self) -> INACK_R[src]

Bit 16 - Inhibit Not Acknowledge

pub fn dsnack(&self) -> DSNACK_R[src]

Bit 17 - Disable Successive NACK

pub fn maxiter(&self) -> MAXITER_R[src]

Bits 20:22 - Maximum Iterations

pub fn data32b(&self) -> DATA32B_R[src]

Bits 24:25 - Data 32 Bit

impl R<u16, Reg<u16, _BAUD>>[src]

pub fn baud(&self) -> BAUD_R[src]

Bits 0:15 - Baud Rate Value

impl R<u16, Reg<u16, _BAUD_FRAC_MODE>>[src]

pub fn baud(&self) -> BAUD_R[src]

Bits 0:12 - Baud Rate Value

pub fn fp(&self) -> FP_R[src]

Bits 13:15 - Fractional Part

impl R<u16, Reg<u16, _BAUD_FRACFP_MODE>>[src]

pub fn baud(&self) -> BAUD_R[src]

Bits 0:12 - Baud Rate Value

pub fn fp(&self) -> FP_R[src]

Bits 13:15 - Fractional Part

impl R<u16, Reg<u16, _BAUD_USARTFP_MODE>>[src]

pub fn baud(&self) -> BAUD_R[src]

Bits 0:15 - Baud Rate Value

impl R<u8, Reg<u8, _RXPL>>[src]

pub fn rxpl(&self) -> RXPL_R[src]

Bits 0:7 - Receive Pulse Length

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt Disable

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt Disable

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt Disable

pub fn rxs(&self) -> RXS_R[src]

Bit 3 - Receive Start Interrupt Disable

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 4 - Clear To Send Input Change Interrupt Disable

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 5 - Break Received Interrupt Disable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Disable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt Enable

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt Enable

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt Enable

pub fn rxs(&self) -> RXS_R[src]

Bit 3 - Receive Start Interrupt Enable

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 4 - Clear To Send Input Change Interrupt Enable

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 5 - Break Received Interrupt Enable

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn dre(&self) -> DRE_R[src]

Bit 0 - Data Register Empty Interrupt

pub fn txc(&self) -> TXC_R[src]

Bit 1 - Transmit Complete Interrupt

pub fn rxc(&self) -> RXC_R[src]

Bit 2 - Receive Complete Interrupt

pub fn rxs(&self) -> RXS_R[src]

Bit 3 - Receive Start Interrupt

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 4 - Clear To Send Input Change Interrupt

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 5 - Break Received Interrupt

pub fn error(&self) -> ERROR_R[src]

Bit 7 - Combined Error Interrupt

impl R<u16, Reg<u16, _STATUS>>[src]

pub fn perr(&self) -> PERR_R[src]

Bit 0 - Parity Error

pub fn ferr(&self) -> FERR_R[src]

Bit 1 - Frame Error

pub fn bufovf(&self) -> BUFOVF_R[src]

Bit 2 - Buffer Overflow

pub fn cts(&self) -> CTS_R[src]

Bit 3 - Clear To Send

pub fn isf(&self) -> ISF_R[src]

Bit 4 - Inconsistent Sync Field

pub fn coll(&self) -> COLL_R[src]

Bit 5 - Collision Detected

pub fn txe(&self) -> TXE_R[src]

Bit 6 - Transmitter Empty

pub fn iter(&self) -> ITER_R[src]

Bit 7 - Maximum Number of Repetitions Reached

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - SERCOM Enable Synchronization Busy

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 2 - CTRLB Synchronization Busy

pub fn rxerrcnt(&self) -> RXERRCNT_R[src]

Bit 3 - RXERRCNT Synchronization Busy

pub fn length(&self) -> LENGTH_R[src]

Bit 4 - LENGTH Synchronization Busy

impl R<u8, Reg<u8, _RXERRCNT>>[src]

pub fn rxerrcnt(&self) -> RXERRCNT_R[src]

Bits 0:7 - Receive Error Count

impl R<u16, Reg<u16, _LENGTH>>[src]

pub fn len(&self) -> LEN_R[src]

Bits 0:7 - Data Length

pub fn lenen(&self) -> LENEN_R[src]

Bits 8:9 - Data Length Enable

impl R<u32, Reg<u32, _DATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data Value

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgstop(&self) -> DBGSTOP_R[src]

Bit 0 - Debug Mode

impl R<u32, Reg<u32, _INTENCLR>>[src]

pub fn bod33rdy(&self) -> BOD33RDY_R[src]

Bit 0 - BOD33 Ready

pub fn bod33det(&self) -> BOD33DET_R[src]

Bit 1 - BOD33 Detection

pub fn b33srdy(&self) -> B33SRDY_R[src]

Bit 2 - BOD33 Synchronization Ready

pub fn vregrdy(&self) -> VREGRDY_R[src]

Bit 8 - Voltage Regulator Ready

pub fn vcorerdy(&self) -> VCORERDY_R[src]

Bit 10 - VDDCORE Ready

impl R<u32, Reg<u32, _INTENSET>>[src]

pub fn bod33rdy(&self) -> BOD33RDY_R[src]

Bit 0 - BOD33 Ready

pub fn bod33det(&self) -> BOD33DET_R[src]

Bit 1 - BOD33 Detection

pub fn b33srdy(&self) -> B33SRDY_R[src]

Bit 2 - BOD33 Synchronization Ready

pub fn vregrdy(&self) -> VREGRDY_R[src]

Bit 8 - Voltage Regulator Ready

pub fn vcorerdy(&self) -> VCORERDY_R[src]

Bit 10 - VDDCORE Ready

impl R<u32, Reg<u32, _INTFLAG>>[src]

pub fn bod33rdy(&self) -> BOD33RDY_R[src]

Bit 0 - BOD33 Ready

pub fn bod33det(&self) -> BOD33DET_R[src]

Bit 1 - BOD33 Detection

pub fn b33srdy(&self) -> B33SRDY_R[src]

Bit 2 - BOD33 Synchronization Ready

pub fn vregrdy(&self) -> VREGRDY_R[src]

Bit 8 - Voltage Regulator Ready

pub fn vcorerdy(&self) -> VCORERDY_R[src]

Bit 10 - VDDCORE Ready

impl R<u32, Reg<u32, _STATUS>>[src]

pub fn bod33rdy(&self) -> BOD33RDY_R[src]

Bit 0 - BOD33 Ready

pub fn bod33det(&self) -> BOD33DET_R[src]

Bit 1 - BOD33 Detection

pub fn b33srdy(&self) -> B33SRDY_R[src]

Bit 2 - BOD33 Synchronization Ready

pub fn vregrdy(&self) -> VREGRDY_R[src]

Bit 8 - Voltage Regulator Ready

pub fn vcorerdy(&self) -> VCORERDY_R[src]

Bit 10 - VDDCORE Ready

impl R<u8, ACTION_A>[src]

pub fn variant(&self) -> ACTION_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_int(&self) -> bool[src]

Checks if the value of the field is INT

pub fn is_bkup(&self) -> bool[src]

Checks if the value of the field is BKUP

impl R<u8, PSEL_A>[src]

pub fn variant(&self) -> PSEL_A[src]

Get enumerated values variant

pub fn is_nodiv(&self) -> bool[src]

Checks if the value of the field is NODIV

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<u32, Reg<u32, _BOD33>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn action(&self) -> ACTION_R[src]

Bits 2:3 - Action when Threshold Crossed

pub fn stdbycfg(&self) -> STDBYCFG_R[src]

Bit 4 - Configuration in Standby mode

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 5 - Run in Standby mode

pub fn runhib(&self) -> RUNHIB_R[src]

Bit 6 - Run in Hibernate mode

pub fn runbkup(&self) -> RUNBKUP_R[src]

Bit 7 - Run in Backup mode

pub fn hyst(&self) -> HYST_R[src]

Bits 8:11 - Hysteresis value

pub fn psel(&self) -> PSEL_R[src]

Bits 12:14 - Prescaler Select

pub fn level(&self) -> LEVEL_R[src]

Bits 16:23 - Threshold Level for VDD

pub fn vbatlevel(&self) -> VBATLEVEL_R[src]

Bits 24:31 - Threshold Level in battery backup sleep mode for VBAT

impl R<bool, SEL_A>[src]

pub fn variant(&self) -> SEL_A[src]

Get enumerated values variant

pub fn is_ldo(&self) -> bool[src]

Checks if the value of the field is LDO

pub fn is_buck(&self) -> bool[src]

Checks if the value of the field is BUCK

impl R<u32, Reg<u32, _VREG>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn sel(&self) -> SEL_R[src]

Bit 2 - Voltage Regulator Selection

pub fn runbkup(&self) -> RUNBKUP_R[src]

Bit 7 - Run in Backup mode

pub fn vsen(&self) -> VSEN_R[src]

Bit 16 - Voltage Scaling Enable

pub fn vsper(&self) -> VSPER_R[src]

Bits 24:26 - Voltage Scaling Period

impl R<u8, SEL_A>[src]

pub fn variant(&self) -> Variant<u8, SEL_A>[src]

Get enumerated values variant

pub fn is_1v0(&self) -> bool[src]

Checks if the value of the field is _1V0

pub fn is_1v1(&self) -> bool[src]

Checks if the value of the field is _1V1

pub fn is_1v2(&self) -> bool[src]

Checks if the value of the field is _1V2

pub fn is_1v25(&self) -> bool[src]

Checks if the value of the field is _1V25

pub fn is_2v0(&self) -> bool[src]

Checks if the value of the field is _2V0

pub fn is_2v2(&self) -> bool[src]

Checks if the value of the field is _2V2

pub fn is_2v4(&self) -> bool[src]

Checks if the value of the field is _2V4

pub fn is_2v5(&self) -> bool[src]

Checks if the value of the field is _2V5

impl R<u32, Reg<u32, _VREF>>[src]

pub fn tsen(&self) -> TSEN_R[src]

Bit 1 - Temperature Sensor Output Enable

pub fn vrefoe(&self) -> VREFOE_R[src]

Bit 2 - Voltage Reference Output Enable

pub fn tssel(&self) -> TSSEL_R[src]

Bit 3 - Temperature Sensor Selection

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run during Standby

pub fn ondemand(&self) -> ONDEMAND_R[src]

Bit 7 - On Demand Contrl

pub fn sel(&self) -> SEL_R[src]

Bits 16:19 - Voltage Reference Selection

impl R<bool, CONF_A>[src]

pub fn variant(&self) -> CONF_A[src]

Get enumerated values variant

pub fn is_bod33(&self) -> bool[src]

Checks if the value of the field is BOD33

pub fn is_forced(&self) -> bool[src]

Checks if the value of the field is FORCED

impl R<u32, Reg<u32, _BBPS>>[src]

pub fn conf(&self) -> CONF_R[src]

Bit 0 - Battery Backup Configuration

pub fn wakeen(&self) -> WAKEEN_R[src]

Bit 2 - Wake Enable

impl R<u32, Reg<u32, _BKOUT>>[src]

pub fn enout0(&self) -> ENOUT0_R[src]

Bit 0 - Enable OUT0

pub fn enout1(&self) -> ENOUT1_R[src]

Bit 1 - Enable OUT1

pub fn clrout0(&self) -> CLROUT0_R[src]

Bit 8 - Clear OUT0

pub fn clrout1(&self) -> CLROUT1_R[src]

Bit 9 - Clear OUT1

pub fn setout0(&self) -> SETOUT0_R[src]

Bit 16 - Set OUT0

pub fn setout1(&self) -> SETOUT1_R[src]

Bit 17 - Set OUT1

pub fn rtctglout0(&self) -> RTCTGLOUT0_R[src]

Bit 24 - RTC Toggle OUT0

pub fn rtctglout1(&self) -> RTCTGLOUT1_R[src]

Bit 25 - RTC Toggle OUT1

impl R<u32, Reg<u32, _BKIN>>[src]

pub fn bkin0(&self) -> BKIN0_R[src]

Bit 0 - Backup Input 0

pub fn bkin1(&self) -> BKIN1_R[src]

Bit 1 - Backup Input 1

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_count16(&self) -> bool[src]

Checks if the value of the field is COUNT16

pub fn is_count8(&self) -> bool[src]

Checks if the value of the field is COUNT8

pub fn is_count32(&self) -> bool[src]

Checks if the value of the field is COUNT32

impl R<u8, PRESCSYNC_A>[src]

pub fn variant(&self) -> Variant<u8, PRESCSYNC_A>[src]

Get enumerated values variant

pub fn is_gclk(&self) -> bool[src]

Checks if the value of the field is GCLK

pub fn is_presc(&self) -> bool[src]

Checks if the value of the field is PRESC

pub fn is_resync(&self) -> bool[src]

Checks if the value of the field is RESYNC

impl R<u8, PRESCALER_A>[src]

pub fn variant(&self) -> PRESCALER_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div1024(&self) -> bool[src]

Checks if the value of the field is DIV1024

impl R<u8, CAPTMODE0_A>[src]

pub fn variant(&self) -> Variant<u8, CAPTMODE0_A>[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_captmin(&self) -> bool[src]

Checks if the value of the field is CAPTMIN

pub fn is_captmax(&self) -> bool[src]

Checks if the value of the field is CAPTMAX

impl R<u8, CAPTMODE1_A>[src]

pub fn variant(&self) -> Variant<u8, CAPTMODE1_A>[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_captmin(&self) -> bool[src]

Checks if the value of the field is CAPTMIN

pub fn is_captmax(&self) -> bool[src]

Checks if the value of the field is CAPTMAX

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:3 - Timer Counter Mode

pub fn prescsync(&self) -> PRESCSYNC_R[src]

Bits 4:5 - Prescaler and Counter Synchronization

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run during Standby

pub fn ondemand(&self) -> ONDEMAND_R[src]

Bit 7 - Clock On Demand

pub fn prescaler(&self) -> PRESCALER_R[src]

Bits 8:10 - Prescaler

pub fn alock(&self) -> ALOCK_R[src]

Bit 11 - Auto Lock

pub fn capten0(&self) -> CAPTEN0_R[src]

Bit 16 - Capture Channel 0 Enable

pub fn capten1(&self) -> CAPTEN1_R[src]

Bit 17 - Capture Channel 1 Enable

pub fn copen0(&self) -> COPEN0_R[src]

Bit 20 - Capture On Pin 0 Enable

pub fn copen1(&self) -> COPEN1_R[src]

Bit 21 - Capture On Pin 1 Enable

pub fn captmode0(&self) -> CAPTMODE0_R[src]

Bits 24:25 - Capture Mode Channel 0

pub fn captmode1(&self) -> CAPTMODE1_R[src]

Bits 27:28 - Capture mode Channel 1

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_readsync(&self) -> bool[src]

Checks if the value of the field is READSYNC

impl R<u8, Reg<u8, _CTRLBCLR>>[src]

pub fn dir(&self) -> DIR_R[src]

Bit 0 - Counter Direction

pub fn lupd(&self) -> LUPD_R[src]

Bit 1 - Lock Update

pub fn oneshot(&self) -> ONESHOT_R[src]

Bit 2 - One-Shot on Counter

pub fn cmd(&self) -> CMD_R[src]

Bits 5:7 - Command

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_readsync(&self) -> bool[src]

Checks if the value of the field is READSYNC

impl R<u8, Reg<u8, _CTRLBSET>>[src]

pub fn dir(&self) -> DIR_R[src]

Bit 0 - Counter Direction

pub fn lupd(&self) -> LUPD_R[src]

Bit 1 - Lock Update

pub fn oneshot(&self) -> ONESHOT_R[src]

Bit 2 - One-Shot on Counter

pub fn cmd(&self) -> CMD_R[src]

Bits 5:7 - Command

impl R<u8, EVACT_A>[src]

pub fn variant(&self) -> EVACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_count(&self) -> bool[src]

Checks if the value of the field is COUNT

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_stamp(&self) -> bool[src]

Checks if the value of the field is STAMP

pub fn is_ppw(&self) -> bool[src]

Checks if the value of the field is PPW

pub fn is_pwp(&self) -> bool[src]

Checks if the value of the field is PWP

pub fn is_pw(&self) -> bool[src]

Checks if the value of the field is PW

impl R<u16, Reg<u16, _EVCTRL>>[src]

pub fn evact(&self) -> EVACT_R[src]

Bits 0:2 - Event Action

pub fn tcinv(&self) -> TCINV_R[src]

Bit 4 - TC Event Input Polarity

pub fn tcei(&self) -> TCEI_R[src]

Bit 5 - TC Event Enable

pub fn ovfeo(&self) -> OVFEO_R[src]

Bit 8 - Event Output Enable

pub fn mceo0(&self) -> MCEO0_R[src]

Bit 12 - MC Event Output Enable 0

pub fn mceo1(&self) -> MCEO1_R[src]

Bit 13 - MC Event Output Enable 1

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - OVF Interrupt Disable

pub fn err(&self) -> ERR_R[src]

Bit 1 - ERR Interrupt Disable

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - MC Interrupt Disable 0

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - MC Interrupt Disable 1

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - OVF Interrupt Enable

pub fn err(&self) -> ERR_R[src]

Bit 1 - ERR Interrupt Enable

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - MC Interrupt Enable 0

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - MC Interrupt Enable 1

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - OVF Interrupt Flag

pub fn err(&self) -> ERR_R[src]

Bit 1 - ERR Interrupt Flag

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - MC Interrupt Flag 0

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - MC Interrupt Flag 1

impl R<u8, Reg<u8, _STATUS>>[src]

pub fn stop(&self) -> STOP_R[src]

Bit 0 - Stop Status Flag

pub fn slave(&self) -> SLAVE_R[src]

Bit 1 - Slave Status Flag

pub fn perbufv(&self) -> PERBUFV_R[src]

Bit 3 - Synchronization Busy Status

pub fn ccbufv0(&self) -> CCBUFV0_R[src]

Bit 4 - Compare channel buffer 0 valid

pub fn ccbufv1(&self) -> CCBUFV1_R[src]

Bit 5 - Compare channel buffer 1 valid

impl R<u8, WAVEGEN_A>[src]

pub fn variant(&self) -> WAVEGEN_A[src]

Get enumerated values variant

pub fn is_nfrq(&self) -> bool[src]

Checks if the value of the field is NFRQ

pub fn is_mfrq(&self) -> bool[src]

Checks if the value of the field is MFRQ

pub fn is_npwm(&self) -> bool[src]

Checks if the value of the field is NPWM

pub fn is_mpwm(&self) -> bool[src]

Checks if the value of the field is MPWM

impl R<u8, Reg<u8, _WAVE>>[src]

pub fn wavegen(&self) -> WAVEGEN_R[src]

Bits 0:1 - Waveform Generation Mode

impl R<u8, Reg<u8, _DRVCTRL>>[src]

pub fn inven0(&self) -> INVEN0_R[src]

Bit 0 - Output Waveform Invert Enable 0

pub fn inven1(&self) -> INVEN1_R[src]

Bit 1 - Output Waveform Invert Enable 1

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Run During Debug

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - swrst

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - enable

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 2 - CTRLB

pub fn status(&self) -> STATUS_R[src]

Bit 3 - STATUS

pub fn count(&self) -> COUNT_R[src]

Bit 4 - Counter

pub fn per(&self) -> PER_R[src]

Bit 5 - Period

pub fn cc0(&self) -> CC0_R[src]

Bit 6 - Compare Channel 0

pub fn cc1(&self) -> CC1_R[src]

Bit 7 - Compare Channel 1

impl R<u8, Reg<u8, _COUNT>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 0:7 - Counter Value

impl R<u8, Reg<u8, _PER>>[src]

pub fn per(&self) -> PER_R[src]

Bits 0:7 - Period Value

impl R<u8, Reg<u8, _CC>>[src]

pub fn cc(&self) -> CC_R[src]

Bits 0:7 - Counter/Compare Value

impl R<u8, Reg<u8, _PERBUF>>[src]

pub fn perbuf(&self) -> PERBUF_R[src]

Bits 0:7 - Period Buffer Value

impl R<u8, Reg<u8, _CCBUF>>[src]

pub fn ccbuf(&self) -> CCBUF_R[src]

Bits 0:7 - Counter/Compare Buffer Value

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_count16(&self) -> bool[src]

Checks if the value of the field is COUNT16

pub fn is_count8(&self) -> bool[src]

Checks if the value of the field is COUNT8

pub fn is_count32(&self) -> bool[src]

Checks if the value of the field is COUNT32

impl R<u8, PRESCSYNC_A>[src]

pub fn variant(&self) -> Variant<u8, PRESCSYNC_A>[src]

Get enumerated values variant

pub fn is_gclk(&self) -> bool[src]

Checks if the value of the field is GCLK

pub fn is_presc(&self) -> bool[src]

Checks if the value of the field is PRESC

pub fn is_resync(&self) -> bool[src]

Checks if the value of the field is RESYNC

impl R<u8, PRESCALER_A>[src]

pub fn variant(&self) -> PRESCALER_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div1024(&self) -> bool[src]

Checks if the value of the field is DIV1024

impl R<u8, CAPTMODE0_A>[src]

pub fn variant(&self) -> Variant<u8, CAPTMODE0_A>[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_captmin(&self) -> bool[src]

Checks if the value of the field is CAPTMIN

pub fn is_captmax(&self) -> bool[src]

Checks if the value of the field is CAPTMAX

impl R<u8, CAPTMODE1_A>[src]

pub fn variant(&self) -> Variant<u8, CAPTMODE1_A>[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_captmin(&self) -> bool[src]

Checks if the value of the field is CAPTMIN

pub fn is_captmax(&self) -> bool[src]

Checks if the value of the field is CAPTMAX

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:3 - Timer Counter Mode

pub fn prescsync(&self) -> PRESCSYNC_R[src]

Bits 4:5 - Prescaler and Counter Synchronization

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run during Standby

pub fn ondemand(&self) -> ONDEMAND_R[src]

Bit 7 - Clock On Demand

pub fn prescaler(&self) -> PRESCALER_R[src]

Bits 8:10 - Prescaler

pub fn alock(&self) -> ALOCK_R[src]

Bit 11 - Auto Lock

pub fn capten0(&self) -> CAPTEN0_R[src]

Bit 16 - Capture Channel 0 Enable

pub fn capten1(&self) -> CAPTEN1_R[src]

Bit 17 - Capture Channel 1 Enable

pub fn copen0(&self) -> COPEN0_R[src]

Bit 20 - Capture On Pin 0 Enable

pub fn copen1(&self) -> COPEN1_R[src]

Bit 21 - Capture On Pin 1 Enable

pub fn captmode0(&self) -> CAPTMODE0_R[src]

Bits 24:25 - Capture Mode Channel 0

pub fn captmode1(&self) -> CAPTMODE1_R[src]

Bits 27:28 - Capture mode Channel 1

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_readsync(&self) -> bool[src]

Checks if the value of the field is READSYNC

impl R<u8, Reg<u8, _CTRLBCLR>>[src]

pub fn dir(&self) -> DIR_R[src]

Bit 0 - Counter Direction

pub fn lupd(&self) -> LUPD_R[src]

Bit 1 - Lock Update

pub fn oneshot(&self) -> ONESHOT_R[src]

Bit 2 - One-Shot on Counter

pub fn cmd(&self) -> CMD_R[src]

Bits 5:7 - Command

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_readsync(&self) -> bool[src]

Checks if the value of the field is READSYNC

impl R<u8, Reg<u8, _CTRLBSET>>[src]

pub fn dir(&self) -> DIR_R[src]

Bit 0 - Counter Direction

pub fn lupd(&self) -> LUPD_R[src]

Bit 1 - Lock Update

pub fn oneshot(&self) -> ONESHOT_R[src]

Bit 2 - One-Shot on Counter

pub fn cmd(&self) -> CMD_R[src]

Bits 5:7 - Command

impl R<u8, EVACT_A>[src]

pub fn variant(&self) -> EVACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_count(&self) -> bool[src]

Checks if the value of the field is COUNT

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_stamp(&self) -> bool[src]

Checks if the value of the field is STAMP

pub fn is_ppw(&self) -> bool[src]

Checks if the value of the field is PPW

pub fn is_pwp(&self) -> bool[src]

Checks if the value of the field is PWP

pub fn is_pw(&self) -> bool[src]

Checks if the value of the field is PW

impl R<u16, Reg<u16, _EVCTRL>>[src]

pub fn evact(&self) -> EVACT_R[src]

Bits 0:2 - Event Action

pub fn tcinv(&self) -> TCINV_R[src]

Bit 4 - TC Event Input Polarity

pub fn tcei(&self) -> TCEI_R[src]

Bit 5 - TC Event Enable

pub fn ovfeo(&self) -> OVFEO_R[src]

Bit 8 - Event Output Enable

pub fn mceo0(&self) -> MCEO0_R[src]

Bit 12 - MC Event Output Enable 0

pub fn mceo1(&self) -> MCEO1_R[src]

Bit 13 - MC Event Output Enable 1

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - OVF Interrupt Disable

pub fn err(&self) -> ERR_R[src]

Bit 1 - ERR Interrupt Disable

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - MC Interrupt Disable 0

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - MC Interrupt Disable 1

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - OVF Interrupt Enable

pub fn err(&self) -> ERR_R[src]

Bit 1 - ERR Interrupt Enable

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - MC Interrupt Enable 0

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - MC Interrupt Enable 1

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - OVF Interrupt Flag

pub fn err(&self) -> ERR_R[src]

Bit 1 - ERR Interrupt Flag

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - MC Interrupt Flag 0

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - MC Interrupt Flag 1

impl R<u8, Reg<u8, _STATUS>>[src]

pub fn stop(&self) -> STOP_R[src]

Bit 0 - Stop Status Flag

pub fn slave(&self) -> SLAVE_R[src]

Bit 1 - Slave Status Flag

pub fn perbufv(&self) -> PERBUFV_R[src]

Bit 3 - Synchronization Busy Status

pub fn ccbufv0(&self) -> CCBUFV0_R[src]

Bit 4 - Compare channel buffer 0 valid

pub fn ccbufv1(&self) -> CCBUFV1_R[src]

Bit 5 - Compare channel buffer 1 valid

impl R<u8, WAVEGEN_A>[src]

pub fn variant(&self) -> WAVEGEN_A[src]

Get enumerated values variant

pub fn is_nfrq(&self) -> bool[src]

Checks if the value of the field is NFRQ

pub fn is_mfrq(&self) -> bool[src]

Checks if the value of the field is MFRQ

pub fn is_npwm(&self) -> bool[src]

Checks if the value of the field is NPWM

pub fn is_mpwm(&self) -> bool[src]

Checks if the value of the field is MPWM

impl R<u8, Reg<u8, _WAVE>>[src]

pub fn wavegen(&self) -> WAVEGEN_R[src]

Bits 0:1 - Waveform Generation Mode

impl R<u8, Reg<u8, _DRVCTRL>>[src]

pub fn inven0(&self) -> INVEN0_R[src]

Bit 0 - Output Waveform Invert Enable 0

pub fn inven1(&self) -> INVEN1_R[src]

Bit 1 - Output Waveform Invert Enable 1

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Run During Debug

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - swrst

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - enable

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 2 - CTRLB

pub fn status(&self) -> STATUS_R[src]

Bit 3 - STATUS

pub fn count(&self) -> COUNT_R[src]

Bit 4 - Counter

pub fn per(&self) -> PER_R[src]

Bit 5 - Period

pub fn cc0(&self) -> CC0_R[src]

Bit 6 - Compare Channel 0

pub fn cc1(&self) -> CC1_R[src]

Bit 7 - Compare Channel 1

impl R<u16, Reg<u16, _COUNT>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 0:15 - Counter Value

impl R<u16, Reg<u16, _CC>>[src]

pub fn cc(&self) -> CC_R[src]

Bits 0:15 - Counter/Compare Value

impl R<u16, Reg<u16, _CCBUF>>[src]

pub fn ccbuf(&self) -> CCBUF_R[src]

Bits 0:15 - Counter/Compare Buffer Value

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_count16(&self) -> bool[src]

Checks if the value of the field is COUNT16

pub fn is_count8(&self) -> bool[src]

Checks if the value of the field is COUNT8

pub fn is_count32(&self) -> bool[src]

Checks if the value of the field is COUNT32

impl R<u8, PRESCSYNC_A>[src]

pub fn variant(&self) -> Variant<u8, PRESCSYNC_A>[src]

Get enumerated values variant

pub fn is_gclk(&self) -> bool[src]

Checks if the value of the field is GCLK

pub fn is_presc(&self) -> bool[src]

Checks if the value of the field is PRESC

pub fn is_resync(&self) -> bool[src]

Checks if the value of the field is RESYNC

impl R<u8, PRESCALER_A>[src]

pub fn variant(&self) -> PRESCALER_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div1024(&self) -> bool[src]

Checks if the value of the field is DIV1024

impl R<u8, CAPTMODE0_A>[src]

pub fn variant(&self) -> Variant<u8, CAPTMODE0_A>[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_captmin(&self) -> bool[src]

Checks if the value of the field is CAPTMIN

pub fn is_captmax(&self) -> bool[src]

Checks if the value of the field is CAPTMAX

impl R<u8, CAPTMODE1_A>[src]

pub fn variant(&self) -> Variant<u8, CAPTMODE1_A>[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_captmin(&self) -> bool[src]

Checks if the value of the field is CAPTMIN

pub fn is_captmax(&self) -> bool[src]

Checks if the value of the field is CAPTMAX

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn mode(&self) -> MODE_R[src]

Bits 2:3 - Timer Counter Mode

pub fn prescsync(&self) -> PRESCSYNC_R[src]

Bits 4:5 - Prescaler and Counter Synchronization

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run during Standby

pub fn ondemand(&self) -> ONDEMAND_R[src]

Bit 7 - Clock On Demand

pub fn prescaler(&self) -> PRESCALER_R[src]

Bits 8:10 - Prescaler

pub fn alock(&self) -> ALOCK_R[src]

Bit 11 - Auto Lock

pub fn capten0(&self) -> CAPTEN0_R[src]

Bit 16 - Capture Channel 0 Enable

pub fn capten1(&self) -> CAPTEN1_R[src]

Bit 17 - Capture Channel 1 Enable

pub fn copen0(&self) -> COPEN0_R[src]

Bit 20 - Capture On Pin 0 Enable

pub fn copen1(&self) -> COPEN1_R[src]

Bit 21 - Capture On Pin 1 Enable

pub fn captmode0(&self) -> CAPTMODE0_R[src]

Bits 24:25 - Capture Mode Channel 0

pub fn captmode1(&self) -> CAPTMODE1_R[src]

Bits 27:28 - Capture mode Channel 1

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_readsync(&self) -> bool[src]

Checks if the value of the field is READSYNC

impl R<u8, Reg<u8, _CTRLBCLR>>[src]

pub fn dir(&self) -> DIR_R[src]

Bit 0 - Counter Direction

pub fn lupd(&self) -> LUPD_R[src]

Bit 1 - Lock Update

pub fn oneshot(&self) -> ONESHOT_R[src]

Bit 2 - One-Shot on Counter

pub fn cmd(&self) -> CMD_R[src]

Bits 5:7 - Command

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_readsync(&self) -> bool[src]

Checks if the value of the field is READSYNC

impl R<u8, Reg<u8, _CTRLBSET>>[src]

pub fn dir(&self) -> DIR_R[src]

Bit 0 - Counter Direction

pub fn lupd(&self) -> LUPD_R[src]

Bit 1 - Lock Update

pub fn oneshot(&self) -> ONESHOT_R[src]

Bit 2 - One-Shot on Counter

pub fn cmd(&self) -> CMD_R[src]

Bits 5:7 - Command

impl R<u8, EVACT_A>[src]

pub fn variant(&self) -> EVACT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_count(&self) -> bool[src]

Checks if the value of the field is COUNT

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_stamp(&self) -> bool[src]

Checks if the value of the field is STAMP

pub fn is_ppw(&self) -> bool[src]

Checks if the value of the field is PPW

pub fn is_pwp(&self) -> bool[src]

Checks if the value of the field is PWP

pub fn is_pw(&self) -> bool[src]

Checks if the value of the field is PW

impl R<u16, Reg<u16, _EVCTRL>>[src]

pub fn evact(&self) -> EVACT_R[src]

Bits 0:2 - Event Action

pub fn tcinv(&self) -> TCINV_R[src]

Bit 4 - TC Event Input Polarity

pub fn tcei(&self) -> TCEI_R[src]

Bit 5 - TC Event Enable

pub fn ovfeo(&self) -> OVFEO_R[src]

Bit 8 - Event Output Enable

pub fn mceo0(&self) -> MCEO0_R[src]

Bit 12 - MC Event Output Enable 0

pub fn mceo1(&self) -> MCEO1_R[src]

Bit 13 - MC Event Output Enable 1

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - OVF Interrupt Disable

pub fn err(&self) -> ERR_R[src]

Bit 1 - ERR Interrupt Disable

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - MC Interrupt Disable 0

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - MC Interrupt Disable 1

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - OVF Interrupt Enable

pub fn err(&self) -> ERR_R[src]

Bit 1 - ERR Interrupt Enable

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - MC Interrupt Enable 0

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - MC Interrupt Enable 1

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - OVF Interrupt Flag

pub fn err(&self) -> ERR_R[src]

Bit 1 - ERR Interrupt Flag

pub fn mc0(&self) -> MC0_R[src]

Bit 4 - MC Interrupt Flag 0

pub fn mc1(&self) -> MC1_R[src]

Bit 5 - MC Interrupt Flag 1

impl R<u8, Reg<u8, _STATUS>>[src]

pub fn stop(&self) -> STOP_R[src]

Bit 0 - Stop Status Flag

pub fn slave(&self) -> SLAVE_R[src]

Bit 1 - Slave Status Flag

pub fn perbufv(&self) -> PERBUFV_R[src]

Bit 3 - Synchronization Busy Status

pub fn ccbufv0(&self) -> CCBUFV0_R[src]

Bit 4 - Compare channel buffer 0 valid

pub fn ccbufv1(&self) -> CCBUFV1_R[src]

Bit 5 - Compare channel buffer 1 valid

impl R<u8, WAVEGEN_A>[src]

pub fn variant(&self) -> WAVEGEN_A[src]

Get enumerated values variant

pub fn is_nfrq(&self) -> bool[src]

Checks if the value of the field is NFRQ

pub fn is_mfrq(&self) -> bool[src]

Checks if the value of the field is MFRQ

pub fn is_npwm(&self) -> bool[src]

Checks if the value of the field is NPWM

pub fn is_mpwm(&self) -> bool[src]

Checks if the value of the field is MPWM

impl R<u8, Reg<u8, _WAVE>>[src]

pub fn wavegen(&self) -> WAVEGEN_R[src]

Bits 0:1 - Waveform Generation Mode

impl R<u8, Reg<u8, _DRVCTRL>>[src]

pub fn inven0(&self) -> INVEN0_R[src]

Bit 0 - Output Waveform Invert Enable 0

pub fn inven1(&self) -> INVEN1_R[src]

Bit 1 - Output Waveform Invert Enable 1

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Run During Debug

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - swrst

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - enable

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 2 - CTRLB

pub fn status(&self) -> STATUS_R[src]

Bit 3 - STATUS

pub fn count(&self) -> COUNT_R[src]

Bit 4 - Counter

pub fn per(&self) -> PER_R[src]

Bit 5 - Period

pub fn cc0(&self) -> CC0_R[src]

Bit 6 - Compare Channel 0

pub fn cc1(&self) -> CC1_R[src]

Bit 7 - Compare Channel 1

impl R<u32, Reg<u32, _COUNT>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 0:31 - Counter Value

impl R<u32, Reg<u32, _CC>>[src]

pub fn cc(&self) -> CC_R[src]

Bits 0:31 - Counter/Compare Value

impl R<u32, Reg<u32, _CCBUF>>[src]

pub fn ccbuf(&self) -> CCBUF_R[src]

Bits 0:31 - Counter/Compare Buffer Value

impl R<u8, RESOLUTION_A>[src]

pub fn variant(&self) -> RESOLUTION_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_dith4(&self) -> bool[src]

Checks if the value of the field is DITH4

pub fn is_dith5(&self) -> bool[src]

Checks if the value of the field is DITH5

pub fn is_dith6(&self) -> bool[src]

Checks if the value of the field is DITH6

impl R<u8, PRESCALER_A>[src]

pub fn variant(&self) -> PRESCALER_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div1024(&self) -> bool[src]

Checks if the value of the field is DIV1024

impl R<u8, PRESCSYNC_A>[src]

pub fn variant(&self) -> Variant<u8, PRESCSYNC_A>[src]

Get enumerated values variant

pub fn is_gclk(&self) -> bool[src]

Checks if the value of the field is GCLK

pub fn is_presc(&self) -> bool[src]

Checks if the value of the field is PRESC

pub fn is_resync(&self) -> bool[src]

Checks if the value of the field is RESYNC

impl R<u32, Reg<u32, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn resolution(&self) -> RESOLUTION_R[src]

Bits 5:6 - Enhanced Resolution

pub fn prescaler(&self) -> PRESCALER_R[src]

Bits 8:10 - Prescaler

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 11 - Run in Standby

pub fn prescsync(&self) -> PRESCSYNC_R[src]

Bits 12:13 - Prescaler and Counter Synchronization Selection

pub fn alock(&self) -> ALOCK_R[src]

Bit 14 - Auto Lock

pub fn msync(&self) -> MSYNC_R[src]

Bit 15 - Master Synchronization (only for TCC Slave Instance)

pub fn dmaos(&self) -> DMAOS_R[src]

Bit 23 - DMA One-shot Trigger Mode

pub fn cpten0(&self) -> CPTEN0_R[src]

Bit 24 - Capture Channel 0 Enable

pub fn cpten1(&self) -> CPTEN1_R[src]

Bit 25 - Capture Channel 1 Enable

pub fn cpten2(&self) -> CPTEN2_R[src]

Bit 26 - Capture Channel 2 Enable

pub fn cpten3(&self) -> CPTEN3_R[src]

Bit 27 - Capture Channel 3 Enable

pub fn cpten4(&self) -> CPTEN4_R[src]

Bit 28 - Capture Channel 4 Enable

pub fn cpten5(&self) -> CPTEN5_R[src]

Bit 29 - Capture Channel 5 Enable

impl R<u8, IDXCMD_A>[src]

pub fn variant(&self) -> IDXCMD_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_hold(&self) -> bool[src]

Checks if the value of the field is HOLD

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_readsync(&self) -> bool[src]

Checks if the value of the field is READSYNC

pub fn is_dmaos(&self) -> bool[src]

Checks if the value of the field is DMAOS

impl R<u8, Reg<u8, _CTRLBCLR>>[src]

pub fn dir(&self) -> DIR_R[src]

Bit 0 - Counter Direction

pub fn lupd(&self) -> LUPD_R[src]

Bit 1 - Lock Update

pub fn oneshot(&self) -> ONESHOT_R[src]

Bit 2 - One-Shot

pub fn idxcmd(&self) -> IDXCMD_R[src]

Bits 3:4 - Ramp Index Command

pub fn cmd(&self) -> CMD_R[src]

Bits 5:7 - TCC Command

impl R<u8, IDXCMD_A>[src]

pub fn variant(&self) -> IDXCMD_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_hold(&self) -> bool[src]

Checks if the value of the field is HOLD

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_readsync(&self) -> bool[src]

Checks if the value of the field is READSYNC

pub fn is_dmaos(&self) -> bool[src]

Checks if the value of the field is DMAOS

impl R<u8, Reg<u8, _CTRLBSET>>[src]

pub fn dir(&self) -> DIR_R[src]

Bit 0 - Counter Direction

pub fn lupd(&self) -> LUPD_R[src]

Bit 1 - Lock Update

pub fn oneshot(&self) -> ONESHOT_R[src]

Bit 2 - One-Shot

pub fn idxcmd(&self) -> IDXCMD_R[src]

Bits 3:4 - Ramp Index Command

pub fn cmd(&self) -> CMD_R[src]

Bits 5:7 - TCC Command

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Swrst Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable Busy

pub fn ctrlb(&self) -> CTRLB_R[src]

Bit 2 - Ctrlb Busy

pub fn status(&self) -> STATUS_R[src]

Bit 3 - Status Busy

pub fn count(&self) -> COUNT_R[src]

Bit 4 - Count Busy

pub fn patt(&self) -> PATT_R[src]

Bit 5 - Pattern Busy

pub fn wave(&self) -> WAVE_R[src]

Bit 6 - Wave Busy

pub fn per(&self) -> PER_R[src]

Bit 7 - Period Busy

pub fn cc0(&self) -> CC0_R[src]

Bit 8 - Compare Channel 0 Busy

pub fn cc1(&self) -> CC1_R[src]

Bit 9 - Compare Channel 1 Busy

pub fn cc2(&self) -> CC2_R[src]

Bit 10 - Compare Channel 2 Busy

pub fn cc3(&self) -> CC3_R[src]

Bit 11 - Compare Channel 3 Busy

pub fn cc4(&self) -> CC4_R[src]

Bit 12 - Compare Channel 4 Busy

pub fn cc5(&self) -> CC5_R[src]

Bit 13 - Compare Channel 5 Busy

impl R<u8, SRC_A>[src]

pub fn variant(&self) -> SRC_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_invert(&self) -> bool[src]

Checks if the value of the field is INVERT

pub fn is_altfault(&self) -> bool[src]

Checks if the value of the field is ALTFAULT

impl R<u8, BLANK_A>[src]

pub fn variant(&self) -> BLANK_A[src]

Get enumerated values variant

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_rise(&self) -> bool[src]

Checks if the value of the field is RISE

pub fn is_fall(&self) -> bool[src]

Checks if the value of the field is FALL

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

impl R<u8, HALT_A>[src]

pub fn variant(&self) -> HALT_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_hw(&self) -> bool[src]

Checks if the value of the field is HW

pub fn is_sw(&self) -> bool[src]

Checks if the value of the field is SW

pub fn is_nr(&self) -> bool[src]

Checks if the value of the field is NR

impl R<u8, CHSEL_A>[src]

pub fn variant(&self) -> CHSEL_A[src]

Get enumerated values variant

pub fn is_cc0(&self) -> bool[src]

Checks if the value of the field is CC0

pub fn is_cc1(&self) -> bool[src]

Checks if the value of the field is CC1

pub fn is_cc2(&self) -> bool[src]

Checks if the value of the field is CC2

pub fn is_cc3(&self) -> bool[src]

Checks if the value of the field is CC3

impl R<u8, CAPTURE_A>[src]

pub fn variant(&self) -> CAPTURE_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_capt(&self) -> bool[src]

Checks if the value of the field is CAPT

pub fn is_captmin(&self) -> bool[src]

Checks if the value of the field is CAPTMIN

pub fn is_captmax(&self) -> bool[src]

Checks if the value of the field is CAPTMAX

pub fn is_locmin(&self) -> bool[src]

Checks if the value of the field is LOCMIN

pub fn is_locmax(&self) -> bool[src]

Checks if the value of the field is LOCMAX

pub fn is_deriv0(&self) -> bool[src]

Checks if the value of the field is DERIV0

pub fn is_captmark(&self) -> bool[src]

Checks if the value of the field is CAPTMARK

impl R<u32, Reg<u32, _FCTRLA>>[src]

pub fn src(&self) -> SRC_R[src]

Bits 0:1 - Fault A Source

pub fn keep(&self) -> KEEP_R[src]

Bit 3 - Fault A Keeper

pub fn qual(&self) -> QUAL_R[src]

Bit 4 - Fault A Qualification

pub fn blank(&self) -> BLANK_R[src]

Bits 5:6 - Fault A Blanking Mode

pub fn restart(&self) -> RESTART_R[src]

Bit 7 - Fault A Restart

pub fn halt(&self) -> HALT_R[src]

Bits 8:9 - Fault A Halt Mode

pub fn chsel(&self) -> CHSEL_R[src]

Bits 10:11 - Fault A Capture Channel

pub fn capture(&self) -> CAPTURE_R[src]

Bits 12:14 - Fault A Capture Action

pub fn blankpresc(&self) -> BLANKPRESC_R[src]

Bit 15 - Fault A Blanking Prescaler

pub fn blankval(&self) -> BLANKVAL_R[src]

Bits 16:23 - Fault A Blanking Time

pub fn filterval(&self) -> FILTERVAL_R[src]

Bits 24:27 - Fault A Filter Value

impl R<u8, SRC_A>[src]

pub fn variant(&self) -> SRC_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_invert(&self) -> bool[src]

Checks if the value of the field is INVERT

pub fn is_altfault(&self) -> bool[src]

Checks if the value of the field is ALTFAULT

impl R<u8, BLANK_A>[src]

pub fn variant(&self) -> BLANK_A[src]

Get enumerated values variant

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_rise(&self) -> bool[src]

Checks if the value of the field is RISE

pub fn is_fall(&self) -> bool[src]

Checks if the value of the field is FALL

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

impl R<u8, HALT_A>[src]

pub fn variant(&self) -> HALT_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_hw(&self) -> bool[src]

Checks if the value of the field is HW

pub fn is_sw(&self) -> bool[src]

Checks if the value of the field is SW

pub fn is_nr(&self) -> bool[src]

Checks if the value of the field is NR

impl R<u8, CHSEL_A>[src]

pub fn variant(&self) -> CHSEL_A[src]

Get enumerated values variant

pub fn is_cc0(&self) -> bool[src]

Checks if the value of the field is CC0

pub fn is_cc1(&self) -> bool[src]

Checks if the value of the field is CC1

pub fn is_cc2(&self) -> bool[src]

Checks if the value of the field is CC2

pub fn is_cc3(&self) -> bool[src]

Checks if the value of the field is CC3

impl R<u8, CAPTURE_A>[src]

pub fn variant(&self) -> CAPTURE_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_capt(&self) -> bool[src]

Checks if the value of the field is CAPT

pub fn is_captmin(&self) -> bool[src]

Checks if the value of the field is CAPTMIN

pub fn is_captmax(&self) -> bool[src]

Checks if the value of the field is CAPTMAX

pub fn is_locmin(&self) -> bool[src]

Checks if the value of the field is LOCMIN

pub fn is_locmax(&self) -> bool[src]

Checks if the value of the field is LOCMAX

pub fn is_deriv0(&self) -> bool[src]

Checks if the value of the field is DERIV0

pub fn is_captmark(&self) -> bool[src]

Checks if the value of the field is CAPTMARK

impl R<u32, Reg<u32, _FCTRLB>>[src]

pub fn src(&self) -> SRC_R[src]

Bits 0:1 - Fault B Source

pub fn keep(&self) -> KEEP_R[src]

Bit 3 - Fault B Keeper

pub fn qual(&self) -> QUAL_R[src]

Bit 4 - Fault B Qualification

pub fn blank(&self) -> BLANK_R[src]

Bits 5:6 - Fault B Blanking Mode

pub fn restart(&self) -> RESTART_R[src]

Bit 7 - Fault B Restart

pub fn halt(&self) -> HALT_R[src]

Bits 8:9 - Fault B Halt Mode

pub fn chsel(&self) -> CHSEL_R[src]

Bits 10:11 - Fault B Capture Channel

pub fn capture(&self) -> CAPTURE_R[src]

Bits 12:14 - Fault B Capture Action

pub fn blankpresc(&self) -> BLANKPRESC_R[src]

Bit 15 - Fault B Blanking Prescaler

pub fn blankval(&self) -> BLANKVAL_R[src]

Bits 16:23 - Fault B Blanking Time

pub fn filterval(&self) -> FILTERVAL_R[src]

Bits 24:27 - Fault B Filter Value

impl R<u32, Reg<u32, _WEXCTRL>>[src]

pub fn otmx(&self) -> OTMX_R[src]

Bits 0:1 - Output Matrix

pub fn dtien0(&self) -> DTIEN0_R[src]

Bit 8 - Dead-time Insertion Generator 0 Enable

pub fn dtien1(&self) -> DTIEN1_R[src]

Bit 9 - Dead-time Insertion Generator 1 Enable

pub fn dtien2(&self) -> DTIEN2_R[src]

Bit 10 - Dead-time Insertion Generator 2 Enable

pub fn dtien3(&self) -> DTIEN3_R[src]

Bit 11 - Dead-time Insertion Generator 3 Enable

pub fn dtls(&self) -> DTLS_R[src]

Bits 16:23 - Dead-time Low Side Outputs Value

pub fn dths(&self) -> DTHS_R[src]

Bits 24:31 - Dead-time High Side Outputs Value

impl R<u32, Reg<u32, _DRVCTRL>>[src]

pub fn nre0(&self) -> NRE0_R[src]

Bit 0 - Non-Recoverable State 0 Output Enable

pub fn nre1(&self) -> NRE1_R[src]

Bit 1 - Non-Recoverable State 1 Output Enable

pub fn nre2(&self) -> NRE2_R[src]

Bit 2 - Non-Recoverable State 2 Output Enable

pub fn nre3(&self) -> NRE3_R[src]

Bit 3 - Non-Recoverable State 3 Output Enable

pub fn nre4(&self) -> NRE4_R[src]

Bit 4 - Non-Recoverable State 4 Output Enable

pub fn nre5(&self) -> NRE5_R[src]

Bit 5 - Non-Recoverable State 5 Output Enable

pub fn nre6(&self) -> NRE6_R[src]

Bit 6 - Non-Recoverable State 6 Output Enable

pub fn nre7(&self) -> NRE7_R[src]

Bit 7 - Non-Recoverable State 7 Output Enable

pub fn nrv0(&self) -> NRV0_R[src]

Bit 8 - Non-Recoverable State 0 Output Value

pub fn nrv1(&self) -> NRV1_R[src]

Bit 9 - Non-Recoverable State 1 Output Value

pub fn nrv2(&self) -> NRV2_R[src]

Bit 10 - Non-Recoverable State 2 Output Value

pub fn nrv3(&self) -> NRV3_R[src]

Bit 11 - Non-Recoverable State 3 Output Value

pub fn nrv4(&self) -> NRV4_R[src]

Bit 12 - Non-Recoverable State 4 Output Value

pub fn nrv5(&self) -> NRV5_R[src]

Bit 13 - Non-Recoverable State 5 Output Value

pub fn nrv6(&self) -> NRV6_R[src]

Bit 14 - Non-Recoverable State 6 Output Value

pub fn nrv7(&self) -> NRV7_R[src]

Bit 15 - Non-Recoverable State 7 Output Value

pub fn inven0(&self) -> INVEN0_R[src]

Bit 16 - Output Waveform 0 Inversion

pub fn inven1(&self) -> INVEN1_R[src]

Bit 17 - Output Waveform 1 Inversion

pub fn inven2(&self) -> INVEN2_R[src]

Bit 18 - Output Waveform 2 Inversion

pub fn inven3(&self) -> INVEN3_R[src]

Bit 19 - Output Waveform 3 Inversion

pub fn inven4(&self) -> INVEN4_R[src]

Bit 20 - Output Waveform 4 Inversion

pub fn inven5(&self) -> INVEN5_R[src]

Bit 21 - Output Waveform 5 Inversion

pub fn inven6(&self) -> INVEN6_R[src]

Bit 22 - Output Waveform 6 Inversion

pub fn inven7(&self) -> INVEN7_R[src]

Bit 23 - Output Waveform 7 Inversion

pub fn filterval0(&self) -> FILTERVAL0_R[src]

Bits 24:27 - Non-Recoverable Fault Input 0 Filter Value

pub fn filterval1(&self) -> FILTERVAL1_R[src]

Bits 28:31 - Non-Recoverable Fault Input 1 Filter Value

impl R<u8, Reg<u8, _DBGCTRL>>[src]

pub fn dbgrun(&self) -> DBGRUN_R[src]

Bit 0 - Debug Running Mode

pub fn fddbd(&self) -> FDDBD_R[src]

Bit 2 - Fault Detection on Debug Break Detection

impl R<u8, EVACT0_A>[src]

pub fn variant(&self) -> EVACT0_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_countev(&self) -> bool[src]

Checks if the value of the field is COUNTEV

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_inc(&self) -> bool[src]

Checks if the value of the field is INC

pub fn is_count(&self) -> bool[src]

Checks if the value of the field is COUNT

pub fn is_stamp(&self) -> bool[src]

Checks if the value of the field is STAMP

pub fn is_fault(&self) -> bool[src]

Checks if the value of the field is FAULT

impl R<u8, EVACT1_A>[src]

pub fn variant(&self) -> EVACT1_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_retrigger(&self) -> bool[src]

Checks if the value of the field is RETRIGGER

pub fn is_dir(&self) -> bool[src]

Checks if the value of the field is DIR

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

pub fn is_dec(&self) -> bool[src]

Checks if the value of the field is DEC

pub fn is_ppw(&self) -> bool[src]

Checks if the value of the field is PPW

pub fn is_pwp(&self) -> bool[src]

Checks if the value of the field is PWP

pub fn is_fault(&self) -> bool[src]

Checks if the value of the field is FAULT

impl R<u8, CNTSEL_A>[src]

pub fn variant(&self) -> CNTSEL_A[src]

Get enumerated values variant

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_end(&self) -> bool[src]

Checks if the value of the field is END

pub fn is_between(&self) -> bool[src]

Checks if the value of the field is BETWEEN

pub fn is_boundary(&self) -> bool[src]

Checks if the value of the field is BOUNDARY

impl R<u32, Reg<u32, _EVCTRL>>[src]

pub fn evact0(&self) -> EVACT0_R[src]

Bits 0:2 - Timer/counter Input Event0 Action

pub fn evact1(&self) -> EVACT1_R[src]

Bits 3:5 - Timer/counter Input Event1 Action

pub fn cntsel(&self) -> CNTSEL_R[src]

Bits 6:7 - Timer/counter Output Event Mode

pub fn ovfeo(&self) -> OVFEO_R[src]

Bit 8 - Overflow/Underflow Output Event Enable

pub fn trgeo(&self) -> TRGEO_R[src]

Bit 9 - Retrigger Output Event Enable

pub fn cnteo(&self) -> CNTEO_R[src]

Bit 10 - Timer/counter Output Event Enable

pub fn tcinv0(&self) -> TCINV0_R[src]

Bit 12 - Inverted Event 0 Input Enable

pub fn tcinv1(&self) -> TCINV1_R[src]

Bit 13 - Inverted Event 1 Input Enable

pub fn tcei0(&self) -> TCEI0_R[src]

Bit 14 - Timer/counter Event 0 Input Enable

pub fn tcei1(&self) -> TCEI1_R[src]

Bit 15 - Timer/counter Event 1 Input Enable

pub fn mcei0(&self) -> MCEI0_R[src]

Bit 16 - Match or Capture Channel 0 Event Input Enable

pub fn mcei1(&self) -> MCEI1_R[src]

Bit 17 - Match or Capture Channel 1 Event Input Enable

pub fn mcei2(&self) -> MCEI2_R[src]

Bit 18 - Match or Capture Channel 2 Event Input Enable

pub fn mcei3(&self) -> MCEI3_R[src]

Bit 19 - Match or Capture Channel 3 Event Input Enable

pub fn mcei4(&self) -> MCEI4_R[src]

Bit 20 - Match or Capture Channel 4 Event Input Enable

pub fn mcei5(&self) -> MCEI5_R[src]

Bit 21 - Match or Capture Channel 5 Event Input Enable

pub fn mceo0(&self) -> MCEO0_R[src]

Bit 24 - Match or Capture Channel 0 Event Output Enable

pub fn mceo1(&self) -> MCEO1_R[src]

Bit 25 - Match or Capture Channel 1 Event Output Enable

pub fn mceo2(&self) -> MCEO2_R[src]

Bit 26 - Match or Capture Channel 2 Event Output Enable

pub fn mceo3(&self) -> MCEO3_R[src]

Bit 27 - Match or Capture Channel 3 Event Output Enable

pub fn mceo4(&self) -> MCEO4_R[src]

Bit 28 - Match or Capture Channel 4 Event Output Enable

pub fn mceo5(&self) -> MCEO5_R[src]

Bit 29 - Match or Capture Channel 5 Event Output Enable

impl R<u32, Reg<u32, _INTENCLR>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - Overflow Interrupt Enable

pub fn trg(&self) -> TRG_R[src]

Bit 1 - Retrigger Interrupt Enable

pub fn cnt(&self) -> CNT_R[src]

Bit 2 - Counter Interrupt Enable

pub fn err(&self) -> ERR_R[src]

Bit 3 - Error Interrupt Enable

pub fn ufs(&self) -> UFS_R[src]

Bit 10 - Non-Recoverable Update Fault Interrupt Enable

pub fn dfs(&self) -> DFS_R[src]

Bit 11 - Non-Recoverable Debug Fault Interrupt Enable

pub fn faulta(&self) -> FAULTA_R[src]

Bit 12 - Recoverable Fault A Interrupt Enable

pub fn faultb(&self) -> FAULTB_R[src]

Bit 13 - Recoverable Fault B Interrupt Enable

pub fn fault0(&self) -> FAULT0_R[src]

Bit 14 - Non-Recoverable Fault 0 Interrupt Enable

pub fn fault1(&self) -> FAULT1_R[src]

Bit 15 - Non-Recoverable Fault 1 Interrupt Enable

pub fn mc0(&self) -> MC0_R[src]

Bit 16 - Match or Capture Channel 0 Interrupt Enable

pub fn mc1(&self) -> MC1_R[src]

Bit 17 - Match or Capture Channel 1 Interrupt Enable

pub fn mc2(&self) -> MC2_R[src]

Bit 18 - Match or Capture Channel 2 Interrupt Enable

pub fn mc3(&self) -> MC3_R[src]

Bit 19 - Match or Capture Channel 3 Interrupt Enable

pub fn mc4(&self) -> MC4_R[src]

Bit 20 - Match or Capture Channel 4 Interrupt Enable

pub fn mc5(&self) -> MC5_R[src]

Bit 21 - Match or Capture Channel 5 Interrupt Enable

impl R<u32, Reg<u32, _INTENSET>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - Overflow Interrupt Enable

pub fn trg(&self) -> TRG_R[src]

Bit 1 - Retrigger Interrupt Enable

pub fn cnt(&self) -> CNT_R[src]

Bit 2 - Counter Interrupt Enable

pub fn err(&self) -> ERR_R[src]

Bit 3 - Error Interrupt Enable

pub fn ufs(&self) -> UFS_R[src]

Bit 10 - Non-Recoverable Update Fault Interrupt Enable

pub fn dfs(&self) -> DFS_R[src]

Bit 11 - Non-Recoverable Debug Fault Interrupt Enable

pub fn faulta(&self) -> FAULTA_R[src]

Bit 12 - Recoverable Fault A Interrupt Enable

pub fn faultb(&self) -> FAULTB_R[src]

Bit 13 - Recoverable Fault B Interrupt Enable

pub fn fault0(&self) -> FAULT0_R[src]

Bit 14 - Non-Recoverable Fault 0 Interrupt Enable

pub fn fault1(&self) -> FAULT1_R[src]

Bit 15 - Non-Recoverable Fault 1 Interrupt Enable

pub fn mc0(&self) -> MC0_R[src]

Bit 16 - Match or Capture Channel 0 Interrupt Enable

pub fn mc1(&self) -> MC1_R[src]

Bit 17 - Match or Capture Channel 1 Interrupt Enable

pub fn mc2(&self) -> MC2_R[src]

Bit 18 - Match or Capture Channel 2 Interrupt Enable

pub fn mc3(&self) -> MC3_R[src]

Bit 19 - Match or Capture Channel 3 Interrupt Enable

pub fn mc4(&self) -> MC4_R[src]

Bit 20 - Match or Capture Channel 4 Interrupt Enable

pub fn mc5(&self) -> MC5_R[src]

Bit 21 - Match or Capture Channel 5 Interrupt Enable

impl R<u32, Reg<u32, _INTFLAG>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - Overflow

pub fn trg(&self) -> TRG_R[src]

Bit 1 - Retrigger

pub fn cnt(&self) -> CNT_R[src]

Bit 2 - Counter

pub fn err(&self) -> ERR_R[src]

Bit 3 - Error

pub fn ufs(&self) -> UFS_R[src]

Bit 10 - Non-Recoverable Update Fault

pub fn dfs(&self) -> DFS_R[src]

Bit 11 - Non-Recoverable Debug Fault

pub fn faulta(&self) -> FAULTA_R[src]

Bit 12 - Recoverable Fault A

pub fn faultb(&self) -> FAULTB_R[src]

Bit 13 - Recoverable Fault B

pub fn fault0(&self) -> FAULT0_R[src]

Bit 14 - Non-Recoverable Fault 0

pub fn fault1(&self) -> FAULT1_R[src]

Bit 15 - Non-Recoverable Fault 1

pub fn mc0(&self) -> MC0_R[src]

Bit 16 - Match or Capture 0

pub fn mc1(&self) -> MC1_R[src]

Bit 17 - Match or Capture 1

pub fn mc2(&self) -> MC2_R[src]

Bit 18 - Match or Capture 2

pub fn mc3(&self) -> MC3_R[src]

Bit 19 - Match or Capture 3

pub fn mc4(&self) -> MC4_R[src]

Bit 20 - Match or Capture 4

pub fn mc5(&self) -> MC5_R[src]

Bit 21 - Match or Capture 5

impl R<u32, Reg<u32, _STATUS>>[src]

pub fn stop(&self) -> STOP_R[src]

Bit 0 - Stop

pub fn idx(&self) -> IDX_R[src]

Bit 1 - Ramp

pub fn ufs(&self) -> UFS_R[src]

Bit 2 - Non-recoverable Update Fault State

pub fn dfs(&self) -> DFS_R[src]

Bit 3 - Non-Recoverable Debug Fault State

pub fn slave(&self) -> SLAVE_R[src]

Bit 4 - Slave

pub fn pattbufv(&self) -> PATTBUFV_R[src]

Bit 5 - Pattern Buffer Valid

pub fn perbufv(&self) -> PERBUFV_R[src]

Bit 7 - Period Buffer Valid

pub fn faultain(&self) -> FAULTAIN_R[src]

Bit 8 - Recoverable Fault A Input

pub fn faultbin(&self) -> FAULTBIN_R[src]

Bit 9 - Recoverable Fault B Input

pub fn fault0in(&self) -> FAULT0IN_R[src]

Bit 10 - Non-Recoverable Fault0 Input

pub fn fault1in(&self) -> FAULT1IN_R[src]

Bit 11 - Non-Recoverable Fault1 Input

pub fn faulta(&self) -> FAULTA_R[src]

Bit 12 - Recoverable Fault A State

pub fn faultb(&self) -> FAULTB_R[src]

Bit 13 - Recoverable Fault B State

pub fn fault0(&self) -> FAULT0_R[src]

Bit 14 - Non-Recoverable Fault 0 State

pub fn fault1(&self) -> FAULT1_R[src]

Bit 15 - Non-Recoverable Fault 1 State

pub fn ccbufv0(&self) -> CCBUFV0_R[src]

Bit 16 - Compare Channel 0 Buffer Valid

pub fn ccbufv1(&self) -> CCBUFV1_R[src]

Bit 17 - Compare Channel 1 Buffer Valid

pub fn ccbufv2(&self) -> CCBUFV2_R[src]

Bit 18 - Compare Channel 2 Buffer Valid

pub fn ccbufv3(&self) -> CCBUFV3_R[src]

Bit 19 - Compare Channel 3 Buffer Valid

pub fn ccbufv4(&self) -> CCBUFV4_R[src]

Bit 20 - Compare Channel 4 Buffer Valid

pub fn ccbufv5(&self) -> CCBUFV5_R[src]

Bit 21 - Compare Channel 5 Buffer Valid

pub fn cmp0(&self) -> CMP0_R[src]

Bit 24 - Compare Channel 0 Value

pub fn cmp1(&self) -> CMP1_R[src]

Bit 25 - Compare Channel 1 Value

pub fn cmp2(&self) -> CMP2_R[src]

Bit 26 - Compare Channel 2 Value

pub fn cmp3(&self) -> CMP3_R[src]

Bit 27 - Compare Channel 3 Value

pub fn cmp4(&self) -> CMP4_R[src]

Bit 28 - Compare Channel 4 Value

pub fn cmp5(&self) -> CMP5_R[src]

Bit 29 - Compare Channel 5 Value

impl R<u32, Reg<u32, _COUNT>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 0:23 - Counter Value

impl R<u32, Reg<u32, _COUNT_DITH4_MODE>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 4:23 - Counter Value

impl R<u32, Reg<u32, _COUNT_DITH5_MODE>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 5:23 - Counter Value

impl R<u32, Reg<u32, _COUNT_DITH6_MODE>>[src]

pub fn count(&self) -> COUNT_R[src]

Bits 6:23 - Counter Value

impl R<u16, Reg<u16, _PATT>>[src]

pub fn pge0(&self) -> PGE0_R[src]

Bit 0 - Pattern Generator 0 Output Enable

pub fn pge1(&self) -> PGE1_R[src]

Bit 1 - Pattern Generator 1 Output Enable

pub fn pge2(&self) -> PGE2_R[src]

Bit 2 - Pattern Generator 2 Output Enable

pub fn pge3(&self) -> PGE3_R[src]

Bit 3 - Pattern Generator 3 Output Enable

pub fn pge4(&self) -> PGE4_R[src]

Bit 4 - Pattern Generator 4 Output Enable

pub fn pge5(&self) -> PGE5_R[src]

Bit 5 - Pattern Generator 5 Output Enable

pub fn pge6(&self) -> PGE6_R[src]

Bit 6 - Pattern Generator 6 Output Enable

pub fn pge7(&self) -> PGE7_R[src]

Bit 7 - Pattern Generator 7 Output Enable

pub fn pgv0(&self) -> PGV0_R[src]

Bit 8 - Pattern Generator 0 Output Value

pub fn pgv1(&self) -> PGV1_R[src]

Bit 9 - Pattern Generator 1 Output Value

pub fn pgv2(&self) -> PGV2_R[src]

Bit 10 - Pattern Generator 2 Output Value

pub fn pgv3(&self) -> PGV3_R[src]

Bit 11 - Pattern Generator 3 Output Value

pub fn pgv4(&self) -> PGV4_R[src]

Bit 12 - Pattern Generator 4 Output Value

pub fn pgv5(&self) -> PGV5_R[src]

Bit 13 - Pattern Generator 5 Output Value

pub fn pgv6(&self) -> PGV6_R[src]

Bit 14 - Pattern Generator 6 Output Value

pub fn pgv7(&self) -> PGV7_R[src]

Bit 15 - Pattern Generator 7 Output Value

impl R<u8, WAVEGEN_A>[src]

pub fn variant(&self) -> Variant<u8, WAVEGEN_A>[src]

Get enumerated values variant

pub fn is_nfrq(&self) -> bool[src]

Checks if the value of the field is NFRQ

pub fn is_mfrq(&self) -> bool[src]

Checks if the value of the field is MFRQ

pub fn is_npwm(&self) -> bool[src]

Checks if the value of the field is NPWM

pub fn is_dscritical(&self) -> bool[src]

Checks if the value of the field is DSCRITICAL

pub fn is_dsbottom(&self) -> bool[src]

Checks if the value of the field is DSBOTTOM

pub fn is_dsboth(&self) -> bool[src]

Checks if the value of the field is DSBOTH

pub fn is_dstop(&self) -> bool[src]

Checks if the value of the field is DSTOP

impl R<u8, RAMP_A>[src]

pub fn variant(&self) -> RAMP_A[src]

Get enumerated values variant

pub fn is_ramp1(&self) -> bool[src]

Checks if the value of the field is RAMP1

pub fn is_ramp2a(&self) -> bool[src]

Checks if the value of the field is RAMP2A

pub fn is_ramp2(&self) -> bool[src]

Checks if the value of the field is RAMP2

pub fn is_ramp2c(&self) -> bool[src]

Checks if the value of the field is RAMP2C

impl R<u32, Reg<u32, _WAVE>>[src]

pub fn wavegen(&self) -> WAVEGEN_R[src]

Bits 0:2 - Waveform Generation

pub fn ramp(&self) -> RAMP_R[src]

Bits 4:5 - Ramp Mode

pub fn ciperen(&self) -> CIPEREN_R[src]

Bit 7 - Circular period Enable

pub fn ciccen0(&self) -> CICCEN0_R[src]

Bit 8 - Circular Channel 0 Enable

pub fn ciccen1(&self) -> CICCEN1_R[src]

Bit 9 - Circular Channel 1 Enable

pub fn ciccen2(&self) -> CICCEN2_R[src]

Bit 10 - Circular Channel 2 Enable

pub fn ciccen3(&self) -> CICCEN3_R[src]

Bit 11 - Circular Channel 3 Enable

pub fn pol0(&self) -> POL0_R[src]

Bit 16 - Channel 0 Polarity

pub fn pol1(&self) -> POL1_R[src]

Bit 17 - Channel 1 Polarity

pub fn pol2(&self) -> POL2_R[src]

Bit 18 - Channel 2 Polarity

pub fn pol3(&self) -> POL3_R[src]

Bit 19 - Channel 3 Polarity

pub fn pol4(&self) -> POL4_R[src]

Bit 20 - Channel 4 Polarity

pub fn pol5(&self) -> POL5_R[src]

Bit 21 - Channel 5 Polarity

pub fn swap0(&self) -> SWAP0_R[src]

Bit 24 - Swap DTI Output Pair 0

pub fn swap1(&self) -> SWAP1_R[src]

Bit 25 - Swap DTI Output Pair 1

pub fn swap2(&self) -> SWAP2_R[src]

Bit 26 - Swap DTI Output Pair 2

pub fn swap3(&self) -> SWAP3_R[src]

Bit 27 - Swap DTI Output Pair 3

impl R<u32, Reg<u32, _PER>>[src]

pub fn per(&self) -> PER_R[src]

Bits 0:23 - Period Value

impl R<u32, Reg<u32, _PER_DITH4_MODE>>[src]

pub fn dither(&self) -> DITHER_R[src]

Bits 0:3 - Dithering Cycle Number

pub fn per(&self) -> PER_R[src]

Bits 4:23 - Period Value

impl R<u32, Reg<u32, _PER_DITH5_MODE>>[src]

pub fn dither(&self) -> DITHER_R[src]

Bits 0:4 - Dithering Cycle Number

pub fn per(&self) -> PER_R[src]

Bits 5:23 - Period Value

impl R<u32, Reg<u32, _PER_DITH6_MODE>>[src]

pub fn dither(&self) -> DITHER_R[src]

Bits 0:5 - Dithering Cycle Number

pub fn per(&self) -> PER_R[src]

Bits 6:23 - Period Value

impl R<u32, Reg<u32, _CC>>[src]

pub fn cc(&self) -> CC_R[src]

Bits 0:23 - Channel Compare/Capture Value

impl R<u32, Reg<u32, _CC_DITH4_MODE>>[src]

pub fn dither(&self) -> DITHER_R[src]

Bits 0:3 - Dithering Cycle Number

pub fn cc(&self) -> CC_R[src]

Bits 4:23 - Channel Compare/Capture Value

impl R<u32, Reg<u32, _CC_DITH5_MODE>>[src]

pub fn dither(&self) -> DITHER_R[src]

Bits 0:4 - Dithering Cycle Number

pub fn cc(&self) -> CC_R[src]

Bits 5:23 - Channel Compare/Capture Value

impl R<u32, Reg<u32, _CC_DITH6_MODE>>[src]

pub fn dither(&self) -> DITHER_R[src]

Bits 0:5 - Dithering Cycle Number

pub fn cc(&self) -> CC_R[src]

Bits 6:23 - Channel Compare/Capture Value

impl R<u16, Reg<u16, _PATTBUF>>[src]

pub fn pgeb0(&self) -> PGEB0_R[src]

Bit 0 - Pattern Generator 0 Output Enable Buffer

pub fn pgeb1(&self) -> PGEB1_R[src]

Bit 1 - Pattern Generator 1 Output Enable Buffer

pub fn pgeb2(&self) -> PGEB2_R[src]

Bit 2 - Pattern Generator 2 Output Enable Buffer

pub fn pgeb3(&self) -> PGEB3_R[src]

Bit 3 - Pattern Generator 3 Output Enable Buffer

pub fn pgeb4(&self) -> PGEB4_R[src]

Bit 4 - Pattern Generator 4 Output Enable Buffer

pub fn pgeb5(&self) -> PGEB5_R[src]

Bit 5 - Pattern Generator 5 Output Enable Buffer

pub fn pgeb6(&self) -> PGEB6_R[src]

Bit 6 - Pattern Generator 6 Output Enable Buffer

pub fn pgeb7(&self) -> PGEB7_R[src]

Bit 7 - Pattern Generator 7 Output Enable Buffer

pub fn pgvb0(&self) -> PGVB0_R[src]

Bit 8 - Pattern Generator 0 Output Enable

pub fn pgvb1(&self) -> PGVB1_R[src]

Bit 9 - Pattern Generator 1 Output Enable

pub fn pgvb2(&self) -> PGVB2_R[src]

Bit 10 - Pattern Generator 2 Output Enable

pub fn pgvb3(&self) -> PGVB3_R[src]

Bit 11 - Pattern Generator 3 Output Enable

pub fn pgvb4(&self) -> PGVB4_R[src]

Bit 12 - Pattern Generator 4 Output Enable

pub fn pgvb5(&self) -> PGVB5_R[src]

Bit 13 - Pattern Generator 5 Output Enable

pub fn pgvb6(&self) -> PGVB6_R[src]

Bit 14 - Pattern Generator 6 Output Enable

pub fn pgvb7(&self) -> PGVB7_R[src]

Bit 15 - Pattern Generator 7 Output Enable

impl R<u32, Reg<u32, _PERBUF>>[src]

pub fn perbuf(&self) -> PERBUF_R[src]

Bits 0:23 - Period Buffer Value

impl R<u32, Reg<u32, _PERBUF_DITH4_MODE>>[src]

pub fn ditherbuf(&self) -> DITHERBUF_R[src]

Bits 0:3 - Dithering Buffer Cycle Number

pub fn perbuf(&self) -> PERBUF_R[src]

Bits 4:23 - Period Buffer Value

impl R<u32, Reg<u32, _PERBUF_DITH5_MODE>>[src]

pub fn ditherbuf(&self) -> DITHERBUF_R[src]

Bits 0:4 - Dithering Buffer Cycle Number

pub fn perbuf(&self) -> PERBUF_R[src]

Bits 5:23 - Period Buffer Value

impl R<u32, Reg<u32, _PERBUF_DITH6_MODE>>[src]

pub fn ditherbuf(&self) -> DITHERBUF_R[src]

Bits 0:5 - Dithering Buffer Cycle Number

pub fn perbuf(&self) -> PERBUF_R[src]

Bits 6:23 - Period Buffer Value

impl R<u32, Reg<u32, _CCBUF>>[src]

pub fn ccbuf(&self) -> CCBUF_R[src]

Bits 0:23 - Channel Compare/Capture Buffer Value

impl R<u32, Reg<u32, _CCBUF_DITH4_MODE>>[src]

pub fn ccbuf(&self) -> CCBUF_R[src]

Bits 0:3 - Channel Compare/Capture Buffer Value

pub fn ditherbuf(&self) -> DITHERBUF_R[src]

Bits 4:23 - Dithering Buffer Cycle Number

impl R<u32, Reg<u32, _CCBUF_DITH5_MODE>>[src]

pub fn ditherbuf(&self) -> DITHERBUF_R[src]

Bits 0:4 - Dithering Buffer Cycle Number

pub fn ccbuf(&self) -> CCBUF_R[src]

Bits 5:23 - Channel Compare/Capture Buffer Value

impl R<u32, Reg<u32, _CCBUF_DITH6_MODE>>[src]

pub fn ditherbuf(&self) -> DITHERBUF_R[src]

Bits 0:5 - Dithering Buffer Cycle Number

pub fn ccbuf(&self) -> CCBUF_R[src]

Bits 6:23 - Channel Compare/Capture Buffer Value

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 6 - Run in Standby

impl R<u8, Reg<u8, _EVCTRL>>[src]

pub fn datardyeo(&self) -> DATARDYEO_R[src]

Bit 0 - Data Ready Event Output

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn datardy(&self) -> DATARDY_R[src]

Bit 0 - Data Ready Interrupt Enable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn datardy(&self) -> DATARDY_R[src]

Bit 0 - Data Ready Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn datardy(&self) -> DATARDY_R[src]

Bit 0 - Data Ready Interrupt Flag

impl R<u32, Reg<u32, _DATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Output Data

impl R<bool, MODE_A>[src]

pub fn variant(&self) -> MODE_A[src]

Get enumerated values variant

pub fn is_device(&self) -> bool[src]

Checks if the value of the field is DEVICE

pub fn is_host(&self) -> bool[src]

Checks if the value of the field is HOST

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 2 - Run in Standby Mode

pub fn mode(&self) -> MODE_R[src]

Bit 7 - Operating Mode

impl R<u8, Reg<u8, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable Synchronization Busy

impl R<u8, Reg<u8, _QOSCTRL>>[src]

pub fn cqos(&self) -> CQOS_R[src]

Bits 0:1 - Configuration Quality of Service

pub fn dqos(&self) -> DQOS_R[src]

Bits 2:3 - Data Quality of Service

impl R<u8, SPDCONF_A>[src]

pub fn variant(&self) -> SPDCONF_A[src]

Get enumerated values variant

pub fn is_fs(&self) -> bool[src]

Checks if the value of the field is FS

pub fn is_ls(&self) -> bool[src]

Checks if the value of the field is LS

pub fn is_hs(&self) -> bool[src]

Checks if the value of the field is HS

pub fn is_hstm(&self) -> bool[src]

Checks if the value of the field is HSTM

impl R<u8, LPMHDSK_A>[src]

pub fn variant(&self) -> LPMHDSK_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_ack(&self) -> bool[src]

Checks if the value of the field is ACK

pub fn is_nyet(&self) -> bool[src]

Checks if the value of the field is NYET

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

impl R<u16, Reg<u16, _CTRLB>>[src]

pub fn detach(&self) -> DETACH_R[src]

Bit 0 - Detach

pub fn uprsm(&self) -> UPRSM_R[src]

Bit 1 - Upstream Resume

pub fn spdconf(&self) -> SPDCONF_R[src]

Bits 2:3 - Speed Configuration

pub fn nreply(&self) -> NREPLY_R[src]

Bit 4 - No Reply

pub fn tstj(&self) -> TSTJ_R[src]

Bit 5 - Test mode J

pub fn tstk(&self) -> TSTK_R[src]

Bit 6 - Test mode K

pub fn tstpckt(&self) -> TSTPCKT_R[src]

Bit 7 - Test packet mode

pub fn opmode2(&self) -> OPMODE2_R[src]

Bit 8 - Specific Operational Mode

pub fn gnak(&self) -> GNAK_R[src]

Bit 9 - Global NAK

pub fn lpmhdsk(&self) -> LPMHDSK_R[src]

Bits 10:11 - Link Power Management Handshake

impl R<u8, Reg<u8, _DADD>>[src]

pub fn dadd(&self) -> DADD_R[src]

Bits 0:6 - Device Address

pub fn adden(&self) -> ADDEN_R[src]

Bit 7 - Device Address Enable

impl R<u8, SPEED_A>[src]

pub fn variant(&self) -> Variant<u8, SPEED_A>[src]

Get enumerated values variant

pub fn is_fs(&self) -> bool[src]

Checks if the value of the field is FS

pub fn is_ls(&self) -> bool[src]

Checks if the value of the field is LS

pub fn is_hs(&self) -> bool[src]

Checks if the value of the field is HS

impl R<u8, LINESTATE_A>[src]

pub fn variant(&self) -> Variant<u8, LINESTATE_A>[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

pub fn is_2(&self) -> bool[src]

Checks if the value of the field is _2

impl R<u8, Reg<u8, _STATUS>>[src]

pub fn speed(&self) -> SPEED_R[src]

Bits 2:3 - Speed Status

pub fn linestate(&self) -> LINESTATE_R[src]

Bits 6:7 - USB Line State Status

impl R<u8, FSMSTATE_A>[src]

pub fn variant(&self) -> Variant<u8, FSMSTATE_A>[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

pub fn is_suspend(&self) -> bool[src]

Checks if the value of the field is SUSPEND

pub fn is_sleep(&self) -> bool[src]

Checks if the value of the field is SLEEP

pub fn is_dnresume(&self) -> bool[src]

Checks if the value of the field is DNRESUME

pub fn is_upresume(&self) -> bool[src]

Checks if the value of the field is UPRESUME

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u8, Reg<u8, _FSMSTATUS>>[src]

pub fn fsmstate(&self) -> FSMSTATE_R[src]

Bits 0:6 - Fine State Machine Status

impl R<u16, Reg<u16, _FNUM>>[src]

pub fn mfnum(&self) -> MFNUM_R[src]

Bits 0:2 - Micro Frame Number

pub fn fnum(&self) -> FNUM_R[src]

Bits 3:13 - Frame Number

pub fn fncerr(&self) -> FNCERR_R[src]

Bit 15 - Frame Number CRC Error

impl R<u16, Reg<u16, _INTENCLR>>[src]

pub fn suspend(&self) -> SUSPEND_R[src]

Bit 0 - Suspend Interrupt Enable

pub fn msof(&self) -> MSOF_R[src]

Bit 1 - Micro Start of Frame Interrupt Enable in High Speed Mode

pub fn sof(&self) -> SOF_R[src]

Bit 2 - Start Of Frame Interrupt Enable

pub fn eorst(&self) -> EORST_R[src]

Bit 3 - End of Reset Interrupt Enable

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 4 - Wake Up Interrupt Enable

pub fn eorsm(&self) -> EORSM_R[src]

Bit 5 - End Of Resume Interrupt Enable

pub fn uprsm(&self) -> UPRSM_R[src]

Bit 6 - Upstream Resume Interrupt Enable

pub fn ramacer(&self) -> RAMACER_R[src]

Bit 7 - Ram Access Interrupt Enable

pub fn lpmnyet(&self) -> LPMNYET_R[src]

Bit 8 - Link Power Management Not Yet Interrupt Enable

pub fn lpmsusp(&self) -> LPMSUSP_R[src]

Bit 9 - Link Power Management Suspend Interrupt Enable

impl R<u16, Reg<u16, _INTENSET>>[src]

pub fn suspend(&self) -> SUSPEND_R[src]

Bit 0 - Suspend Interrupt Enable

pub fn msof(&self) -> MSOF_R[src]

Bit 1 - Micro Start of Frame Interrupt Enable in High Speed Mode

pub fn sof(&self) -> SOF_R[src]

Bit 2 - Start Of Frame Interrupt Enable

pub fn eorst(&self) -> EORST_R[src]

Bit 3 - End of Reset Interrupt Enable

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 4 - Wake Up Interrupt Enable

pub fn eorsm(&self) -> EORSM_R[src]

Bit 5 - End Of Resume Interrupt Enable

pub fn uprsm(&self) -> UPRSM_R[src]

Bit 6 - Upstream Resume Interrupt Enable

pub fn ramacer(&self) -> RAMACER_R[src]

Bit 7 - Ram Access Interrupt Enable

pub fn lpmnyet(&self) -> LPMNYET_R[src]

Bit 8 - Link Power Management Not Yet Interrupt Enable

pub fn lpmsusp(&self) -> LPMSUSP_R[src]

Bit 9 - Link Power Management Suspend Interrupt Enable

impl R<u16, Reg<u16, _INTFLAG>>[src]

pub fn suspend(&self) -> SUSPEND_R[src]

Bit 0 - Suspend

pub fn msof(&self) -> MSOF_R[src]

Bit 1 - Micro Start of Frame in High Speed Mode

pub fn sof(&self) -> SOF_R[src]

Bit 2 - Start Of Frame

pub fn eorst(&self) -> EORST_R[src]

Bit 3 - End of Reset

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 4 - Wake Up

pub fn eorsm(&self) -> EORSM_R[src]

Bit 5 - End Of Resume

pub fn uprsm(&self) -> UPRSM_R[src]

Bit 6 - Upstream Resume

pub fn ramacer(&self) -> RAMACER_R[src]

Bit 7 - Ram Access

pub fn lpmnyet(&self) -> LPMNYET_R[src]

Bit 8 - Link Power Management Not Yet

pub fn lpmsusp(&self) -> LPMSUSP_R[src]

Bit 9 - Link Power Management Suspend

impl R<u16, Reg<u16, _EPINTSMRY>>[src]

pub fn epint0(&self) -> EPINT0_R[src]

Bit 0 - End Point 0 Interrupt

pub fn epint1(&self) -> EPINT1_R[src]

Bit 1 - End Point 1 Interrupt

pub fn epint2(&self) -> EPINT2_R[src]

Bit 2 - End Point 2 Interrupt

pub fn epint3(&self) -> EPINT3_R[src]

Bit 3 - End Point 3 Interrupt

pub fn epint4(&self) -> EPINT4_R[src]

Bit 4 - End Point 4 Interrupt

pub fn epint5(&self) -> EPINT5_R[src]

Bit 5 - End Point 5 Interrupt

pub fn epint6(&self) -> EPINT6_R[src]

Bit 6 - End Point 6 Interrupt

pub fn epint7(&self) -> EPINT7_R[src]

Bit 7 - End Point 7 Interrupt

impl R<u32, Reg<u32, _DESCADD>>[src]

pub fn descadd(&self) -> DESCADD_R[src]

Bits 0:31 - Descriptor Address Value

impl R<u16, Reg<u16, _PADCAL>>[src]

pub fn transp(&self) -> TRANSP_R[src]

Bits 0:4 - USB Pad Transp calibration

pub fn transn(&self) -> TRANSN_R[src]

Bits 6:10 - USB Pad Transn calibration

pub fn trim(&self) -> TRIM_R[src]

Bits 12:14 - USB Pad Trim calibration

impl R<u8, Reg<u8, _EPCFG>>[src]

pub fn eptype0(&self) -> EPTYPE0_R[src]

Bits 0:2 - End Point Type0

pub fn eptype1(&self) -> EPTYPE1_R[src]

Bits 4:6 - End Point Type1

pub fn nyetdis(&self) -> NYETDIS_R[src]

Bit 7 - NYET Token Disable

impl R<u8, Reg<u8, _EPSTATUS>>[src]

pub fn dtglout(&self) -> DTGLOUT_R[src]

Bit 0 - Data Toggle Out

pub fn dtglin(&self) -> DTGLIN_R[src]

Bit 1 - Data Toggle In

pub fn curbk(&self) -> CURBK_R[src]

Bit 2 - Current Bank

pub fn stallrq0(&self) -> STALLRQ0_R[src]

Bit 4 - Stall 0 Request

pub fn stallrq1(&self) -> STALLRQ1_R[src]

Bit 5 - Stall 1 Request

pub fn bk0rdy(&self) -> BK0RDY_R[src]

Bit 6 - Bank 0 ready

pub fn bk1rdy(&self) -> BK1RDY_R[src]

Bit 7 - Bank 1 ready

impl R<u8, Reg<u8, _EPINTFLAG>>[src]

pub fn trcpt0(&self) -> TRCPT0_R[src]

Bit 0 - Transfer Complete 0

pub fn trcpt1(&self) -> TRCPT1_R[src]

Bit 1 - Transfer Complete 1

pub fn trfail0(&self) -> TRFAIL0_R[src]

Bit 2 - Error Flow 0

pub fn trfail1(&self) -> TRFAIL1_R[src]

Bit 3 - Error Flow 1

pub fn rxstp(&self) -> RXSTP_R[src]

Bit 4 - Received Setup

pub fn stall0(&self) -> STALL0_R[src]

Bit 5 - Stall 0 In/out

pub fn stall1(&self) -> STALL1_R[src]

Bit 6 - Stall 1 In/out

impl R<u8, Reg<u8, _EPINTENCLR>>[src]

pub fn trcpt0(&self) -> TRCPT0_R[src]

Bit 0 - Transfer Complete 0 Interrupt Disable

pub fn trcpt1(&self) -> TRCPT1_R[src]

Bit 1 - Transfer Complete 1 Interrupt Disable

pub fn trfail0(&self) -> TRFAIL0_R[src]

Bit 2 - Error Flow 0 Interrupt Disable

pub fn trfail1(&self) -> TRFAIL1_R[src]

Bit 3 - Error Flow 1 Interrupt Disable

pub fn rxstp(&self) -> RXSTP_R[src]

Bit 4 - Received Setup Interrupt Disable

pub fn stall0(&self) -> STALL0_R[src]

Bit 5 - Stall 0 In/Out Interrupt Disable

pub fn stall1(&self) -> STALL1_R[src]

Bit 6 - Stall 1 In/Out Interrupt Disable

impl R<u8, Reg<u8, _EPINTENSET>>[src]

pub fn trcpt0(&self) -> TRCPT0_R[src]

Bit 0 - Transfer Complete 0 Interrupt Enable

pub fn trcpt1(&self) -> TRCPT1_R[src]

Bit 1 - Transfer Complete 1 Interrupt Enable

pub fn trfail0(&self) -> TRFAIL0_R[src]

Bit 2 - Error Flow 0 Interrupt Enable

pub fn trfail1(&self) -> TRFAIL1_R[src]

Bit 3 - Error Flow 1 Interrupt Enable

pub fn rxstp(&self) -> RXSTP_R[src]

Bit 4 - Received Setup Interrupt Enable

pub fn stall0(&self) -> STALL0_R[src]

Bit 5 - Stall 0 In/out Interrupt enable

pub fn stall1(&self) -> STALL1_R[src]

Bit 6 - Stall 1 In/out Interrupt enable

impl R<bool, MODE_A>[src]

pub fn variant(&self) -> MODE_A[src]

Get enumerated values variant

pub fn is_device(&self) -> bool[src]

Checks if the value of the field is DEVICE

pub fn is_host(&self) -> bool[src]

Checks if the value of the field is HOST

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn runstdby(&self) -> RUNSTDBY_R[src]

Bit 2 - Run in Standby Mode

pub fn mode(&self) -> MODE_R[src]

Bit 7 - Operating Mode

impl R<u8, Reg<u8, _SYNCBUSY>>[src]

pub fn swrst(&self) -> SWRST_R[src]

Bit 0 - Software Reset Synchronization Busy

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable Synchronization Busy

impl R<u8, Reg<u8, _QOSCTRL>>[src]

pub fn cqos(&self) -> CQOS_R[src]

Bits 0:1 - Configuration Quality of Service

pub fn dqos(&self) -> DQOS_R[src]

Bits 2:3 - Data Quality of Service

impl R<u8, SPDCONF_A>[src]

pub fn variant(&self) -> Variant<u8, SPDCONF_A>[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_fs(&self) -> bool[src]

Checks if the value of the field is FS

impl R<u16, Reg<u16, _CTRLB>>[src]

pub fn resume(&self) -> RESUME_R[src]

Bit 1 - Send USB Resume

pub fn spdconf(&self) -> SPDCONF_R[src]

Bits 2:3 - Speed Configuration for Host

pub fn autoresume(&self) -> AUTORESUME_R[src]

Bit 4 - Auto Resume Enable

pub fn tstj(&self) -> TSTJ_R[src]

Bit 5 - Test mode J

pub fn tstk(&self) -> TSTK_R[src]

Bit 6 - Test mode K

pub fn sofe(&self) -> SOFE_R[src]

Bit 8 - Start of Frame Generation Enable

pub fn busreset(&self) -> BUSRESET_R[src]

Bit 9 - Send USB Reset

pub fn vbusok(&self) -> VBUSOK_R[src]

Bit 10 - VBUS is OK

pub fn l1resume(&self) -> L1RESUME_R[src]

Bit 11 - Send L1 Resume

impl R<u8, Reg<u8, _HSOFC>>[src]

pub fn flenc(&self) -> FLENC_R[src]

Bits 0:3 - Frame Length Control

pub fn flence(&self) -> FLENCE_R[src]

Bit 7 - Frame Length Control Enable

impl R<u8, Reg<u8, _STATUS>>[src]

pub fn speed(&self) -> SPEED_R[src]

Bits 2:3 - Speed Status

pub fn linestate(&self) -> LINESTATE_R[src]

Bits 6:7 - USB Line State Status

impl R<u8, FSMSTATE_A>[src]

pub fn variant(&self) -> Variant<u8, FSMSTATE_A>[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

pub fn is_suspend(&self) -> bool[src]

Checks if the value of the field is SUSPEND

pub fn is_sleep(&self) -> bool[src]

Checks if the value of the field is SLEEP

pub fn is_dnresume(&self) -> bool[src]

Checks if the value of the field is DNRESUME

pub fn is_upresume(&self) -> bool[src]

Checks if the value of the field is UPRESUME

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u8, Reg<u8, _FSMSTATUS>>[src]

pub fn fsmstate(&self) -> FSMSTATE_R[src]

Bits 0:6 - Fine State Machine Status

impl R<u16, Reg<u16, _FNUM>>[src]

pub fn mfnum(&self) -> MFNUM_R[src]

Bits 0:2 - Micro Frame Number

pub fn fnum(&self) -> FNUM_R[src]

Bits 3:13 - Frame Number

impl R<u8, Reg<u8, _FLENHIGH>>[src]

pub fn flenhigh(&self) -> FLENHIGH_R[src]

Bits 0:7 - Frame Length

impl R<u16, Reg<u16, _INTENCLR>>[src]

pub fn hsof(&self) -> HSOF_R[src]

Bit 2 - Host Start Of Frame Interrupt Disable

pub fn rst(&self) -> RST_R[src]

Bit 3 - BUS Reset Interrupt Disable

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 4 - Wake Up Interrupt Disable

pub fn dnrsm(&self) -> DNRSM_R[src]

Bit 5 - DownStream to Device Interrupt Disable

pub fn uprsm(&self) -> UPRSM_R[src]

Bit 6 - Upstream Resume from Device Interrupt Disable

pub fn ramacer(&self) -> RAMACER_R[src]

Bit 7 - Ram Access Interrupt Disable

pub fn dconn(&self) -> DCONN_R[src]

Bit 8 - Device Connection Interrupt Disable

pub fn ddisc(&self) -> DDISC_R[src]

Bit 9 - Device Disconnection Interrupt Disable

impl R<u16, Reg<u16, _INTENSET>>[src]

pub fn hsof(&self) -> HSOF_R[src]

Bit 2 - Host Start Of Frame Interrupt Enable

pub fn rst(&self) -> RST_R[src]

Bit 3 - Bus Reset Interrupt Enable

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 4 - Wake Up Interrupt Enable

pub fn dnrsm(&self) -> DNRSM_R[src]

Bit 5 - DownStream to the Device Interrupt Enable

pub fn uprsm(&self) -> UPRSM_R[src]

Bit 6 - Upstream Resume fromthe device Interrupt Enable

pub fn ramacer(&self) -> RAMACER_R[src]

Bit 7 - Ram Access Interrupt Enable

pub fn dconn(&self) -> DCONN_R[src]

Bit 8 - Link Power Management Interrupt Enable

pub fn ddisc(&self) -> DDISC_R[src]

Bit 9 - Device Disconnection Interrupt Enable

impl R<u16, Reg<u16, _INTFLAG>>[src]

pub fn hsof(&self) -> HSOF_R[src]

Bit 2 - Host Start Of Frame

pub fn rst(&self) -> RST_R[src]

Bit 3 - Bus Reset

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 4 - Wake Up

pub fn dnrsm(&self) -> DNRSM_R[src]

Bit 5 - Downstream

pub fn uprsm(&self) -> UPRSM_R[src]

Bit 6 - Upstream Resume from the Device

pub fn ramacer(&self) -> RAMACER_R[src]

Bit 7 - Ram Access

pub fn dconn(&self) -> DCONN_R[src]

Bit 8 - Device Connection

pub fn ddisc(&self) -> DDISC_R[src]

Bit 9 - Device Disconnection

impl R<u16, Reg<u16, _PINTSMRY>>[src]

pub fn epint0(&self) -> EPINT0_R[src]

Bit 0 - Pipe 0 Interrupt

pub fn epint1(&self) -> EPINT1_R[src]

Bit 1 - Pipe 1 Interrupt

pub fn epint2(&self) -> EPINT2_R[src]

Bit 2 - Pipe 2 Interrupt

pub fn epint3(&self) -> EPINT3_R[src]

Bit 3 - Pipe 3 Interrupt

pub fn epint4(&self) -> EPINT4_R[src]

Bit 4 - Pipe 4 Interrupt

pub fn epint5(&self) -> EPINT5_R[src]

Bit 5 - Pipe 5 Interrupt

pub fn epint6(&self) -> EPINT6_R[src]

Bit 6 - Pipe 6 Interrupt

pub fn epint7(&self) -> EPINT7_R[src]

Bit 7 - Pipe 7 Interrupt

impl R<u32, Reg<u32, _DESCADD>>[src]

pub fn descadd(&self) -> DESCADD_R[src]

Bits 0:31 - Descriptor Address Value

impl R<u16, Reg<u16, _PADCAL>>[src]

pub fn transp(&self) -> TRANSP_R[src]

Bits 0:4 - USB Pad Transp calibration

pub fn transn(&self) -> TRANSN_R[src]

Bits 6:10 - USB Pad Transn calibration

pub fn trim(&self) -> TRIM_R[src]

Bits 12:14 - USB Pad Trim calibration

impl R<u8, Reg<u8, _PCFG>>[src]

pub fn ptoken(&self) -> PTOKEN_R[src]

Bits 0:1 - Pipe Token

pub fn bk(&self) -> BK_R[src]

Bit 2 - Pipe Bank

pub fn ptype(&self) -> PTYPE_R[src]

Bits 3:5 - Pipe Type

impl R<u8, Reg<u8, _BINTERVAL>>[src]

pub fn bitinterval(&self) -> BITINTERVAL_R[src]

Bits 0:7 - Bit Interval

impl R<u8, Reg<u8, _PSTATUS>>[src]

pub fn dtgl(&self) -> DTGL_R[src]

Bit 0 - Data Toggle

pub fn curbk(&self) -> CURBK_R[src]

Bit 2 - Current Bank

pub fn pfreeze(&self) -> PFREEZE_R[src]

Bit 4 - Pipe Freeze

pub fn bk0rdy(&self) -> BK0RDY_R[src]

Bit 6 - Bank 0 ready

pub fn bk1rdy(&self) -> BK1RDY_R[src]

Bit 7 - Bank 1 ready

impl R<u8, Reg<u8, _PINTFLAG>>[src]

pub fn trcpt0(&self) -> TRCPT0_R[src]

Bit 0 - Transfer Complete 0 Interrupt Flag

pub fn trcpt1(&self) -> TRCPT1_R[src]

Bit 1 - Transfer Complete 1 Interrupt Flag

pub fn trfail(&self) -> TRFAIL_R[src]

Bit 2 - Error Flow Interrupt Flag

pub fn perr(&self) -> PERR_R[src]

Bit 3 - Pipe Error Interrupt Flag

pub fn txstp(&self) -> TXSTP_R[src]

Bit 4 - Transmit Setup Interrupt Flag

pub fn stall(&self) -> STALL_R[src]

Bit 5 - Stall Interrupt Flag

impl R<u8, Reg<u8, _PINTENCLR>>[src]

pub fn trcpt0(&self) -> TRCPT0_R[src]

Bit 0 - Transfer Complete 0 Disable

pub fn trcpt1(&self) -> TRCPT1_R[src]

Bit 1 - Transfer Complete 1 Disable

pub fn trfail(&self) -> TRFAIL_R[src]

Bit 2 - Error Flow Interrupt Disable

pub fn perr(&self) -> PERR_R[src]

Bit 3 - Pipe Error Interrupt Disable

pub fn txstp(&self) -> TXSTP_R[src]

Bit 4 - Transmit Setup Interrupt Disable

pub fn stall(&self) -> STALL_R[src]

Bit 5 - Stall Inetrrupt Disable

impl R<u8, Reg<u8, _PINTENSET>>[src]

pub fn trcpt0(&self) -> TRCPT0_R[src]

Bit 0 - Transfer Complete 0 Interrupt Enable

pub fn trcpt1(&self) -> TRCPT1_R[src]

Bit 1 - Transfer Complete 1 Interrupt Enable

pub fn trfail(&self) -> TRFAIL_R[src]

Bit 2 - Error Flow Interrupt Enable

pub fn perr(&self) -> PERR_R[src]

Bit 3 - Pipe Error Interrupt Enable

pub fn txstp(&self) -> TXSTP_R[src]

Bit 4 - Transmit Setup Interrupt Enable

pub fn stall(&self) -> STALL_R[src]

Bit 5 - Stall Interrupt Enable

impl R<u8, Reg<u8, _CTRLA>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable

pub fn wen(&self) -> WEN_R[src]

Bit 2 - Watchdog Timer Window Mode Enable

pub fn alwayson(&self) -> ALWAYSON_R[src]

Bit 7 - Always-On

impl R<u8, PER_A>[src]

pub fn variant(&self) -> Variant<u8, PER_A>[src]

Get enumerated values variant

pub fn is_cyc8(&self) -> bool[src]

Checks if the value of the field is CYC8

pub fn is_cyc16(&self) -> bool[src]

Checks if the value of the field is CYC16

pub fn is_cyc32(&self) -> bool[src]

Checks if the value of the field is CYC32

pub fn is_cyc64(&self) -> bool[src]

Checks if the value of the field is CYC64

pub fn is_cyc128(&self) -> bool[src]

Checks if the value of the field is CYC128

pub fn is_cyc256(&self) -> bool[src]

Checks if the value of the field is CYC256

pub fn is_cyc512(&self) -> bool[src]

Checks if the value of the field is CYC512

pub fn is_cyc1024(&self) -> bool[src]

Checks if the value of the field is CYC1024

pub fn is_cyc2048(&self) -> bool[src]

Checks if the value of the field is CYC2048

pub fn is_cyc4096(&self) -> bool[src]

Checks if the value of the field is CYC4096

pub fn is_cyc8192(&self) -> bool[src]

Checks if the value of the field is CYC8192

pub fn is_cyc16384(&self) -> bool[src]

Checks if the value of the field is CYC16384

impl R<u8, WINDOW_A>[src]

pub fn variant(&self) -> Variant<u8, WINDOW_A>[src]

Get enumerated values variant

pub fn is_cyc8(&self) -> bool[src]

Checks if the value of the field is CYC8

pub fn is_cyc16(&self) -> bool[src]

Checks if the value of the field is CYC16

pub fn is_cyc32(&self) -> bool[src]

Checks if the value of the field is CYC32

pub fn is_cyc64(&self) -> bool[src]

Checks if the value of the field is CYC64

pub fn is_cyc128(&self) -> bool[src]

Checks if the value of the field is CYC128

pub fn is_cyc256(&self) -> bool[src]

Checks if the value of the field is CYC256

pub fn is_cyc512(&self) -> bool[src]

Checks if the value of the field is CYC512

pub fn is_cyc1024(&self) -> bool[src]

Checks if the value of the field is CYC1024

pub fn is_cyc2048(&self) -> bool[src]

Checks if the value of the field is CYC2048

pub fn is_cyc4096(&self) -> bool[src]

Checks if the value of the field is CYC4096

pub fn is_cyc8192(&self) -> bool[src]

Checks if the value of the field is CYC8192

pub fn is_cyc16384(&self) -> bool[src]

Checks if the value of the field is CYC16384

impl R<u8, Reg<u8, _CONFIG>>[src]

pub fn per(&self) -> PER_R[src]

Bits 0:3 - Time-Out Period

pub fn window(&self) -> WINDOW_R[src]

Bits 4:7 - Window Mode Time-Out Period

impl R<u8, EWOFFSET_A>[src]

pub fn variant(&self) -> Variant<u8, EWOFFSET_A>[src]

Get enumerated values variant

pub fn is_cyc8(&self) -> bool[src]

Checks if the value of the field is CYC8

pub fn is_cyc16(&self) -> bool[src]

Checks if the value of the field is CYC16

pub fn is_cyc32(&self) -> bool[src]

Checks if the value of the field is CYC32

pub fn is_cyc64(&self) -> bool[src]

Checks if the value of the field is CYC64

pub fn is_cyc128(&self) -> bool[src]

Checks if the value of the field is CYC128

pub fn is_cyc256(&self) -> bool[src]

Checks if the value of the field is CYC256

pub fn is_cyc512(&self) -> bool[src]

Checks if the value of the field is CYC512

pub fn is_cyc1024(&self) -> bool[src]

Checks if the value of the field is CYC1024

pub fn is_cyc2048(&self) -> bool[src]

Checks if the value of the field is CYC2048

pub fn is_cyc4096(&self) -> bool[src]

Checks if the value of the field is CYC4096

pub fn is_cyc8192(&self) -> bool[src]

Checks if the value of the field is CYC8192

pub fn is_cyc16384(&self) -> bool[src]

Checks if the value of the field is CYC16384

impl R<u8, Reg<u8, _EWCTRL>>[src]

pub fn ewoffset(&self) -> EWOFFSET_R[src]

Bits 0:3 - Early Warning Interrupt Time Offset

impl R<u8, Reg<u8, _INTENCLR>>[src]

pub fn ew(&self) -> EW_R[src]

Bit 0 - Early Warning Interrupt Enable

impl R<u8, Reg<u8, _INTENSET>>[src]

pub fn ew(&self) -> EW_R[src]

Bit 0 - Early Warning Interrupt Enable

impl R<u8, Reg<u8, _INTFLAG>>[src]

pub fn ew(&self) -> EW_R[src]

Bit 0 - Early Warning

impl R<u32, Reg<u32, _SYNCBUSY>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enable Synchronization Busy

pub fn wen(&self) -> WEN_R[src]

Bit 2 - Window Enable Synchronization Busy

pub fn alwayson(&self) -> ALWAYSON_R[src]

Bit 3 - Always-On Synchronization Busy

pub fn clear(&self) -> CLEAR_R[src]

Bit 4 - Clear Synchronization Busy

impl R<u32, Reg<u32, _DHCSR>>[src]

pub fn c_debugen(&self) -> C_DEBUGEN_R[src]

Bit 0

pub fn c_halt(&self) -> C_HALT_R[src]

Bit 1

pub fn c_step(&self) -> C_STEP_R[src]

Bit 2

pub fn c_maskints(&self) -> C_MASKINTS_R[src]

Bit 3

pub fn c_snapstall(&self) -> C_SNAPSTALL_R[src]

Bit 5

pub fn s_regrdy(&self) -> S_REGRDY_R[src]

Bit 16

pub fn s_halt(&self) -> S_HALT_R[src]

Bit 17

pub fn s_sleep(&self) -> S_SLEEP_R[src]

Bit 18

pub fn s_lockup(&self) -> S_LOCKUP_R[src]

Bit 19

pub fn s_retire_st(&self) -> S_RETIRE_ST_R[src]

Bit 24

pub fn s_reset_st(&self) -> S_RESET_ST_R[src]

Bit 25

impl R<u32, Reg<u32, _DEMCR>>[src]

pub fn vc_corereset(&self) -> VC_CORERESET_R[src]

Bit 0

pub fn vc_mmerr(&self) -> VC_MMERR_R[src]

Bit 4

pub fn vc_nocperr(&self) -> VC_NOCPERR_R[src]

Bit 5

pub fn vc_chkerr(&self) -> VC_CHKERR_R[src]

Bit 6

pub fn vc_staterr(&self) -> VC_STATERR_R[src]

Bit 7

pub fn vc_buserr(&self) -> VC_BUSERR_R[src]

Bit 8

pub fn vc_interr(&self) -> VC_INTERR_R[src]

Bit 9

pub fn vc_harderr(&self) -> VC_HARDERR_R[src]

Bit 10

pub fn mon_en(&self) -> MON_EN_R[src]

Bit 16

pub fn mon_pend(&self) -> MON_PEND_R[src]

Bit 17

pub fn mon_step(&self) -> MON_STEP_R[src]

Bit 18

pub fn mon_req(&self) -> MON_REQ_R[src]

Bit 19

pub fn trcena(&self) -> TRCENA_R[src]

Bit 24

impl R<u32, Reg<u32, _CR>>[src]

pub fn etmpd(&self) -> ETMPD_R[src]

Bit 0 - ETM Power Down

pub fn portsize(&self) -> PORTSIZE_R[src]

Bits 4:6 - Port Size bits 2:0

pub fn stall(&self) -> STALL_R[src]

Bit 7 - Stall Processor

pub fn brout(&self) -> BROUT_R[src]

Bit 8 - Branch Output

pub fn dbgrq(&self) -> DBGRQ_R[src]

Bit 9 - Debug Request Control

pub fn prog(&self) -> PROG_R[src]

Bit 10 - ETM Programming

pub fn portsel(&self) -> PORTSEL_R[src]

Bit 11 - ETM Port Select

pub fn portmode2(&self) -> PORTMODE2_R[src]

Bit 13 - Port Mode bit 2

pub fn portmode(&self) -> PORTMODE_R[src]

Bits 16:17 - Port Mode bits 1:0

pub fn portsize3(&self) -> PORTSIZE3_R[src]

Bit 21 - Port Size bit 3

pub fn tsen(&self) -> TSEN_R[src]

Bit 28 - TimeStamp Enable

impl R<u32, Reg<u32, _ITCTRL>>[src]

pub fn integration(&self) -> INTEGRATION_R[src]

Bit 0

impl R<u32, Reg<u32, _LSR>>[src]

pub fn present(&self) -> PRESENT_R[src]

Bit 0

pub fn access(&self) -> ACCESS_R[src]

Bit 1

pub fn byte_acc(&self) -> BYTEACC_R[src]

Bit 2

impl R<bool, ENABLE_A>[src]

pub fn variant(&self) -> ENABLE_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<bool, TICKINT_A>[src]

pub fn variant(&self) -> TICKINT_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<bool, CLKSOURCE_A>[src]

pub fn variant(&self) -> CLKSOURCE_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<u32, Reg<u32, _CSR>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 0 - SysTick Counter Enable

pub fn tickint(&self) -> TICKINT_R[src]

Bit 1 - SysTick Exception Request Enable

pub fn clksource(&self) -> CLKSOURCE_R[src]

Bit 2 - Clock Source 0=external, 1=processor

pub fn countflag(&self) -> COUNTFLAG_R[src]

Bit 16 - Timer counted to 0 since last read of register

impl R<u32, Reg<u32, _RVR>>[src]

pub fn reload(&self) -> RELOAD_R[src]

Bits 0:23 - Value to load into the SysTick Current Value Register when the counter reaches 0

impl R<u32, Reg<u32, _CVR>>[src]

pub fn current(&self) -> CURRENT_R[src]

Bits 0:23 - Current value at the time the register is accessed

impl R<bool, SKEW_A>[src]

pub fn variant(&self) -> SKEW_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<bool, NOREF_A>[src]

pub fn variant(&self) -> NOREF_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<u32, Reg<u32, _CALIB>>[src]

pub fn tenms(&self) -> TENMS_R[src]

Bits 0:23 - Reload value to use for 10ms timing

pub fn skew(&self) -> SKEW_R[src]

Bit 30 - TENMS is rounded from non-integer ratio

pub fn noref(&self) -> NOREF_R[src]

Bit 31 - No Separate Reference Clock

impl R<u32, Reg<u32, _ICTR>>[src]

pub fn intlinesnum(&self) -> INTLINESNUM_R[src]

Bits 0:3

impl R<u32, Reg<u32, _ACTLR>>[src]

pub fn dismcycint(&self) -> DISMCYCINT_R[src]

Bit 0 - Disable interruption of LDM/STM instructions

pub fn disdefwbuf(&self) -> DISDEFWBUF_R[src]

Bit 1 - Disable wruite buffer use during default memory map accesses

pub fn disfold(&self) -> DISFOLD_R[src]

Bit 2 - Disable IT folding

pub fn disfpca(&self) -> DISFPCA_R[src]

Bit 8 - Disable automatic update of CONTROL.FPCA

pub fn disoofp(&self) -> DISOOFP_R[src]

Bit 9 - Disable out-of-order FP instructions

impl R<u32, Reg<u32, _CPUID>>[src]

pub fn revision(&self) -> REVISION_R[src]

Bits 0:3 - Processor revision number

pub fn partno(&self) -> PARTNO_R[src]

Bits 4:15 - Process Part Number, 0xC24=Cortex-M4

pub fn constant(&self) -> CONSTANT_R[src]

Bits 16:19 - Constant

pub fn variant(&self) -> VARIANT_R[src]

Bits 20:23 - Variant number

pub fn implementer(&self) -> IMPLEMENTER_R[src]

Bits 24:31 - Implementer code, 0x41=ARM

impl R<bool, PENDSTCLR_A>[src]

pub fn variant(&self) -> PENDSTCLR_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<bool, PENDSTSET_A>[src]

pub fn variant(&self) -> PENDSTSET_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<bool, PENDSVCLR_A>[src]

pub fn variant(&self) -> PENDSVCLR_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<bool, PENDSVSET_A>[src]

pub fn variant(&self) -> PENDSVSET_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<bool, NMIPENDSET_A>[src]

pub fn variant(&self) -> NMIPENDSET_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<u32, Reg<u32, _ICSR>>[src]

pub fn vectactive(&self) -> VECTACTIVE_R[src]

Bits 0:8 - Active exception number

pub fn rettobase(&self) -> RETTOBASE_R[src]

Bit 11 - No preempted active exceptions to execute

pub fn vectpending(&self) -> VECTPENDING_R[src]

Bits 12:17 - Exception number of the highest priority pending enabled exception

pub fn isrpending(&self) -> ISRPENDING_R[src]

Bit 22 - Interrupt pending flag

pub fn isrpreempt(&self) -> ISRPREEMPT_R[src]

Bit 23 - Debug only

pub fn pendstclr(&self) -> PENDSTCLR_R[src]

Bit 25 - SysTick clear-pending bit

pub fn pendstset(&self) -> PENDSTSET_R[src]

Bit 26 - SysTick set-pending bit

pub fn pendsvclr(&self) -> PENDSVCLR_R[src]

Bit 27 - PendSV clear-pending bit

pub fn pendsvset(&self) -> PENDSVSET_R[src]

Bit 28 - PendSV set-pending bit

pub fn nmipendset(&self) -> NMIPENDSET_R[src]

Bit 31 - NMI set-pending bit

impl R<u32, Reg<u32, _VTOR>>[src]

pub fn tbloff(&self) -> TBLOFF_R[src]

Bits 7:31 - Vector table base offset

impl R<bool, SYSRESETREQ_A>[src]

pub fn variant(&self) -> SYSRESETREQ_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<bool, ENDIANNESS_A>[src]

pub fn variant(&self) -> ENDIANNESS_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<u32, Reg<u32, _AIRCR>>[src]

pub fn vectreset(&self) -> VECTRESET_R[src]

Bit 0 - Must write 0

pub fn vectclractive(&self) -> VECTCLRACTIVE_R[src]

Bit 1 - Must write 0

pub fn sysresetreq(&self) -> SYSRESETREQ_R[src]

Bit 2 - System Reset Request

pub fn prigroup(&self) -> PRIGROUP_R[src]

Bits 8:10 - Interrupt priority grouping

pub fn endianness(&self) -> ENDIANNESS_R[src]

Bit 15 - Data endianness, 0=little, 1=big

pub fn vectkey(&self) -> VECTKEY_R[src]

Bits 16:31 - Register key

impl R<bool, SLEEPONEXIT_A>[src]

pub fn variant(&self) -> SLEEPONEXIT_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<bool, SLEEPDEEP_A>[src]

pub fn variant(&self) -> SLEEPDEEP_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<bool, SEVONPEND_A>[src]

pub fn variant(&self) -> SEVONPEND_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<u32, Reg<u32, _SCR>>[src]

pub fn sleeponexit(&self) -> SLEEPONEXIT_R[src]

Bit 1 - Sleep-on-exit on handler return

pub fn sleepdeep(&self) -> SLEEPDEEP_R[src]

Bit 2 - Deep Sleep used as low power mode

pub fn sevonpend(&self) -> SEVONPEND_R[src]

Bit 4 - Send Event on Pending bit

impl R<bool, UNALIGN_TRP_A>[src]

pub fn variant(&self) -> UNALIGN_TRP_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<bool, STKALIGN_A>[src]

pub fn variant(&self) -> STKALIGN_A[src]

Get enumerated values variant

pub fn is_value_0(&self) -> bool[src]

Checks if the value of the field is VALUE_0

pub fn is_value_1(&self) -> bool[src]

Checks if the value of the field is VALUE_1

impl R<u32, Reg<u32, _CCR>>[src]

pub fn nonbasethrdena(&self) -> NONBASETHRDENA_R[src]

Bit 0 - Indicates how processor enters Thread mode

pub fn usersetmpend(&self) -> USERSETMPEND_R[src]

Bit 1 - Enables unprivileged software access to STIR register

pub fn unalign_trp(&self) -> UNALIGN_TRP_R[src]

Bit 3 - Enables unaligned access traps

pub fn div_0_trp(&self) -> DIV_0_TRP_R[src]

Bit 4 - Enables divide by 0 trap

pub fn bfhfnmign(&self) -> BFHFNMIGN_R[src]

Bit 8 - Ignore LDM/STM BusFault for -1/-2 priority handlers

pub fn stkalign(&self) -> STKALIGN_R[src]

Bit 9 - Indicates stack alignment on exception entry

impl R<u32, Reg<u32, _SHPR1>>[src]

pub fn pri_4(&self) -> PRI_4_R[src]

Bits 0:7 - Priority of system handler 4, MemManage

pub fn pri_5(&self) -> PRI_5_R[src]

Bits 8:15 - Priority of system handler 5, BusFault

pub fn pri_6(&self) -> PRI_6_R[src]

Bits 16:23 - Priority of system handler 6, UsageFault

impl R<u32, Reg<u32, _SHPR2>>[src]

pub fn pri_11(&self) -> PRI_11_R[src]

Bits 24:31 - Priority of system handler 11, SVCall

impl R<u32, Reg<u32, _SHPR3>>[src]

pub fn pri_14(&self) -> PRI_14_R[src]

Bits 16:23 - Priority of system handler 14, PendSV

pub fn pri_15(&self) -> PRI_15_R[src]

Bits 24:31 - Priority of system handler 15, SysTick exception

impl R<u32, Reg<u32, _SHCSR>>[src]

pub fn memfaultact(&self) -> MEMFAULTACT_R[src]

Bit 0 - MemManage exception active bit

pub fn busfaultact(&self) -> BUSFAULTACT_R[src]

Bit 1 - BusFault exception active bit

pub fn usgfaultact(&self) -> USGFAULTACT_R[src]

Bit 3 - UsageFault exception active bit

pub fn svcallact(&self) -> SVCALLACT_R[src]

Bit 7 - SVCall active bit

pub fn monitoract(&self) -> MONITORACT_R[src]

Bit 8 - DebugMonitor exception active bit

pub fn pendsvact(&self) -> PENDSVACT_R[src]

Bit 10 - PendSV exception active bit

pub fn systickact(&self) -> SYSTICKACT_R[src]

Bit 11 - SysTick exception active bit

pub fn usgfaultpended(&self) -> USGFAULTPENDED_R[src]

Bit 12 - UsageFault exception pending bit

pub fn memfaultpended(&self) -> MEMFAULTPENDED_R[src]

Bit 13 - MemManage exception pending bit

pub fn busfaultpended(&self) -> BUSFAULTPENDED_R[src]

Bit 14 - BusFault exception pending bit

pub fn svcallpended(&self) -> SVCALLPENDED_R[src]

Bit 15 - SVCall pending bit

pub fn memfaultena(&self) -> MEMFAULTENA_R[src]

Bit 16 - MemManage enable bit

pub fn busfaultena(&self) -> BUSFAULTENA_R[src]

Bit 17 - BusFault enable bit

pub fn usgfaultena(&self) -> USGFAULTENA_R[src]

Bit 18 - UsageFault enable bit

impl R<u32, Reg<u32, _CFSR>>[src]

pub fn iaccviol(&self) -> IACCVIOL_R[src]

Bit 0 - Instruction access violation

pub fn daccviol(&self) -> DACCVIOL_R[src]

Bit 1 - Data access violation

pub fn munstkerr(&self) -> MUNSTKERR_R[src]

Bit 3 - MemManage Fault on unstacking for exception return

pub fn mstkerr(&self) -> MSTKERR_R[src]

Bit 4 - MemManage Fault on stacking for exception entry

pub fn mlsperr(&self) -> MLSPERR_R[src]

Bit 5 - MemManager Fault occured during FP lazy state preservation

pub fn mmarvalid(&self) -> MMARVALID_R[src]

Bit 7 - MemManage Fault Address Register valid

pub fn ibuserr(&self) -> IBUSERR_R[src]

Bit 8 - Instruction bus error

pub fn preciserr(&self) -> PRECISERR_R[src]

Bit 9 - Precise data bus error

pub fn impreciserr(&self) -> IMPRECISERR_R[src]

Bit 10 - Imprecise data bus error

pub fn unstkerr(&self) -> UNSTKERR_R[src]

Bit 11 - BusFault on unstacking for exception return

pub fn stkerr(&self) -> STKERR_R[src]

Bit 12 - BusFault on stacking for exception entry

pub fn lsperr(&self) -> LSPERR_R[src]

Bit 13 - BusFault occured during FP lazy state preservation

pub fn bfarvalid(&self) -> BFARVALID_R[src]

Bit 15 - BusFault Address Register valid

pub fn undefinstr(&self) -> UNDEFINSTR_R[src]

Bit 16 - Undefined instruction UsageFault

pub fn invstate(&self) -> INVSTATE_R[src]

Bit 17 - Invalid state UsageFault

pub fn invpc(&self) -> INVPC_R[src]

Bit 18 - Invalid PC load UsageFault

pub fn nocp(&self) -> NOCP_R[src]

Bit 19 - No coprocessor UsageFault

pub fn unaligned(&self) -> UNALIGNED_R[src]

Bit 24 - Unaligned access UsageFault

pub fn divbyzero(&self) -> DIVBYZERO_R[src]

Bit 25 - Divide by zero UsageFault

impl R<u32, Reg<u32, _HFSR>>[src]

pub fn vecttbl(&self) -> VECTTBL_R[src]

Bit 1 - BusFault on a Vector Table read during exception processing

pub fn forced(&self) -> FORCED_R[src]

Bit 30 - Forced Hard Fault

pub fn debugevt(&self) -> DEBUGEVT_R[src]

Bit 31 - Debug: always write 0

impl R<u32, Reg<u32, _DFSR>>[src]

pub fn halted(&self) -> HALTED_R[src]

Bit 0

pub fn bkpt(&self) -> BKPT_R[src]

Bit 1

pub fn dwttrap(&self) -> DWTTRAP_R[src]

Bit 2

pub fn vcatch(&self) -> VCATCH_R[src]

Bit 3

pub fn external(&self) -> EXTERNAL_R[src]

Bit 4

impl R<u32, Reg<u32, _MMFAR>>[src]

pub fn address(&self) -> ADDRESS_R[src]

Bits 0:31 - Address that generated the MemManage fault

impl R<u32, Reg<u32, _BFAR>>[src]

pub fn address(&self) -> ADDRESS_R[src]

Bits 0:31 - Address that generated the BusFault

impl R<u32, Reg<u32, _AFSR>>[src]

pub fn impdef(&self) -> IMPDEF_R[src]

Bits 0:31 - AUXFAULT input signals

impl R<u8, CP10_A>[src]

pub fn variant(&self) -> Variant<u8, CP10_A>[src]

Get enumerated values variant

pub fn is_denied(&self) -> bool[src]

Checks if the value of the field is DENIED

pub fn is_priv_(&self) -> bool[src]

Checks if the value of the field is PRIV

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u8, CP11_A>[src]

pub fn variant(&self) -> Variant<u8, CP11_A>[src]

Get enumerated values variant

pub fn is_denied(&self) -> bool[src]

Checks if the value of the field is DENIED

pub fn is_priv_(&self) -> bool[src]

Checks if the value of the field is PRIV

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u32, Reg<u32, _CPACR>>[src]

pub fn cp10(&self) -> CP10_R[src]

Bits 20:21 - Access privileges for coprocessor 10

pub fn cp11(&self) -> CP11_R[src]

Bits 22:23 - Access privileges for coprocessor 11

Trait Implementations

impl<U, T, FI> PartialEq<FI> for R<U, T> where
    U: PartialEq,
    FI: Copy + Into<U>, 
[src]

Auto Trait Implementations

impl<U, T> Send for R<U, T> where
    T: Send,
    U: Send

impl<U, T> Sync for R<U, T> where
    T: Sync,
    U: Sync

impl<U, T> Unpin for R<U, T> where
    T: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.