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#[doc = "Reader of register CTRLB"] pub type R = crate::R<u16, super::CTRLB>; #[doc = "Writer for register CTRLB"] pub type W = crate::W<u16, super::CTRLB>; #[doc = "Register CTRLB `reset()`'s with value 0"] impl crate::ResetValue for super::CTRLB { type Type = u16; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `RESUME`"] pub type RESUME_R = crate::R<bool, bool>; #[doc = "Write proxy for field `RESUME`"] pub struct RESUME_W<'a> { w: &'a mut W, } impl<'a> RESUME_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u16) & 0x01) << 1); self.w } } #[doc = "Speed Configuration for Host\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum SPDCONF_A { #[doc = "0: Normal mode: the host starts in full-speed mode and performs a high-speed reset to switch to the high speed mode if the downstream peripheral is high-speed capable."] NORMAL = 0, #[doc = "3: Full-speed: the host remains in full-speed mode whatever is the peripheral speed capability. Relevant in UTMI mode only."] FS = 3, } impl From<SPDCONF_A> for u8 { #[inline(always)] fn from(variant: SPDCONF_A) -> Self { variant as _ } } #[doc = "Reader of field `SPDCONF`"] pub type SPDCONF_R = crate::R<u8, SPDCONF_A>; impl SPDCONF_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> crate::Variant<u8, SPDCONF_A> { use crate::Variant::*; match self.bits { 0 => Val(SPDCONF_A::NORMAL), 3 => Val(SPDCONF_A::FS), i => Res(i), } } #[doc = "Checks if the value of the field is `NORMAL`"] #[inline(always)] pub fn is_normal(&self) -> bool { *self == SPDCONF_A::NORMAL } #[doc = "Checks if the value of the field is `FS`"] #[inline(always)] pub fn is_fs(&self) -> bool { *self == SPDCONF_A::FS } } #[doc = "Write proxy for field `SPDCONF`"] pub struct SPDCONF_W<'a> { w: &'a mut W, } impl<'a> SPDCONF_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SPDCONF_A) -> &'a mut W { unsafe { self.bits(variant.into()) } } #[doc = "Normal mode: the host starts in full-speed mode and performs a high-speed reset to switch to the high speed mode if the downstream peripheral is high-speed capable."] #[inline(always)] pub fn normal(self) -> &'a mut W { self.variant(SPDCONF_A::NORMAL) } #[doc = "Full-speed: the host remains in full-speed mode whatever is the peripheral speed capability. Relevant in UTMI mode only."] #[inline(always)] pub fn fs(self) -> &'a mut W { self.variant(SPDCONF_A::FS) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u16) & 0x03) << 2); self.w } } #[doc = "Reader of field `AUTORESUME`"] pub type AUTORESUME_R = crate::R<bool, bool>; #[doc = "Write proxy for field `AUTORESUME`"] pub struct AUTORESUME_W<'a> { w: &'a mut W, } impl<'a> AUTORESUME_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u16) & 0x01) << 4); self.w } } #[doc = "Reader of field `TSTJ`"] pub type TSTJ_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TSTJ`"] pub struct TSTJ_W<'a> { w: &'a mut W, } impl<'a> TSTJ_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u16) & 0x01) << 5); self.w } } #[doc = "Reader of field `TSTK`"] pub type TSTK_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TSTK`"] pub struct TSTK_W<'a> { w: &'a mut W, } impl<'a> TSTK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u16) & 0x01) << 6); self.w } } #[doc = "Reader of field `SOFE`"] pub type SOFE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SOFE`"] pub struct SOFE_W<'a> { w: &'a mut W, } impl<'a> SOFE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u16) & 0x01) << 8); self.w } } #[doc = "Reader of field `BUSRESET`"] pub type BUSRESET_R = crate::R<bool, bool>; #[doc = "Write proxy for field `BUSRESET`"] pub struct BUSRESET_W<'a> { w: &'a mut W, } impl<'a> BUSRESET_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u16) & 0x01) << 9); self.w } } #[doc = "Reader of field `VBUSOK`"] pub type VBUSOK_R = crate::R<bool, bool>; #[doc = "Write proxy for field `VBUSOK`"] pub struct VBUSOK_W<'a> { w: &'a mut W, } impl<'a> VBUSOK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u16) & 0x01) << 10); self.w } } #[doc = "Reader of field `L1RESUME`"] pub type L1RESUME_R = crate::R<bool, bool>; #[doc = "Write proxy for field `L1RESUME`"] pub struct L1RESUME_W<'a> { w: &'a mut W, } impl<'a> L1RESUME_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u16) & 0x01) << 11); self.w } } impl R { #[doc = "Bit 1 - Send USB Resume"] #[inline(always)] pub fn resume(&self) -> RESUME_R { RESUME_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bits 2:3 - Speed Configuration for Host"] #[inline(always)] pub fn spdconf(&self) -> SPDCONF_R { SPDCONF_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bit 4 - Auto Resume Enable"] #[inline(always)] pub fn autoresume(&self) -> AUTORESUME_R { AUTORESUME_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Test mode J"] #[inline(always)] pub fn tstj(&self) -> TSTJ_R { TSTJ_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Test mode K"] #[inline(always)] pub fn tstk(&self) -> TSTK_R { TSTK_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 8 - Start of Frame Generation Enable"] #[inline(always)] pub fn sofe(&self) -> SOFE_R { SOFE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Send USB Reset"] #[inline(always)] pub fn busreset(&self) -> BUSRESET_R { BUSRESET_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - VBUS is OK"] #[inline(always)] pub fn vbusok(&self) -> VBUSOK_R { VBUSOK_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Send L1 Resume"] #[inline(always)] pub fn l1resume(&self) -> L1RESUME_R { L1RESUME_R::new(((self.bits >> 11) & 0x01) != 0) } } impl W { #[doc = "Bit 1 - Send USB Resume"] #[inline(always)] pub fn resume(&mut self) -> RESUME_W { RESUME_W { w: self } } #[doc = "Bits 2:3 - Speed Configuration for Host"] #[inline(always)] pub fn spdconf(&mut self) -> SPDCONF_W { SPDCONF_W { w: self } } #[doc = "Bit 4 - Auto Resume Enable"] #[inline(always)] pub fn autoresume(&mut self) -> AUTORESUME_W { AUTORESUME_W { w: self } } #[doc = "Bit 5 - Test mode J"] #[inline(always)] pub fn tstj(&mut self) -> TSTJ_W { TSTJ_W { w: self } } #[doc = "Bit 6 - Test mode K"] #[inline(always)] pub fn tstk(&mut self) -> TSTK_W { TSTK_W { w: self } } #[doc = "Bit 8 - Start of Frame Generation Enable"] #[inline(always)] pub fn sofe(&mut self) -> SOFE_W { SOFE_W { w: self } } #[doc = "Bit 9 - Send USB Reset"] #[inline(always)] pub fn busreset(&mut self) -> BUSRESET_W { BUSRESET_W { w: self } } #[doc = "Bit 10 - VBUS is OK"] #[inline(always)] pub fn vbusok(&mut self) -> VBUSOK_W { VBUSOK_W { w: self } } #[doc = "Bit 11 - Send L1 Resume"] #[inline(always)] pub fn l1resume(&mut self) -> L1RESUME_W { L1RESUME_W { w: self } } }