Type Alias atsame54n::can0::ie::W

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pub type W = W<IE_SPEC>;
Expand description

Register IE writer

Aliased Type§

struct W { /* private fields */ }

Implementations§

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impl W

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pub fn rf0ne(&mut self) -> RF0NE_W<'_, IE_SPEC, 0>

Bit 0 - Rx FIFO 0 New Message Interrupt Enable

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pub fn rf0we(&mut self) -> RF0WE_W<'_, IE_SPEC, 1>

Bit 1 - Rx FIFO 0 Watermark Reached Interrupt Enable

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pub fn rf0fe(&mut self) -> RF0FE_W<'_, IE_SPEC, 2>

Bit 2 - Rx FIFO 0 Full Interrupt Enable

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pub fn rf0le(&mut self) -> RF0LE_W<'_, IE_SPEC, 3>

Bit 3 - Rx FIFO 0 Message Lost Interrupt Enable

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pub fn rf1ne(&mut self) -> RF1NE_W<'_, IE_SPEC, 4>

Bit 4 - Rx FIFO 1 New Message Interrupt Enable

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pub fn rf1we(&mut self) -> RF1WE_W<'_, IE_SPEC, 5>

Bit 5 - Rx FIFO 1 Watermark Reached Interrupt Enable

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pub fn rf1fe(&mut self) -> RF1FE_W<'_, IE_SPEC, 6>

Bit 6 - Rx FIFO 1 FIFO Full Interrupt Enable

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pub fn rf1le(&mut self) -> RF1LE_W<'_, IE_SPEC, 7>

Bit 7 - Rx FIFO 1 Message Lost Interrupt Enable

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pub fn hpme(&mut self) -> HPME_W<'_, IE_SPEC, 8>

Bit 8 - High Priority Message Interrupt Enable

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pub fn tce(&mut self) -> TCE_W<'_, IE_SPEC, 9>

Bit 9 - Timestamp Completed Interrupt Enable

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pub fn tcfe(&mut self) -> TCFE_W<'_, IE_SPEC, 10>

Bit 10 - Transmission Cancellation Finished Interrupt Enable

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pub fn tfee(&mut self) -> TFEE_W<'_, IE_SPEC, 11>

Bit 11 - Tx FIFO Empty Interrupt Enable

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pub fn tefne(&mut self) -> TEFNE_W<'_, IE_SPEC, 12>

Bit 12 - Tx Event FIFO New Entry Interrupt Enable

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pub fn tefwe(&mut self) -> TEFWE_W<'_, IE_SPEC, 13>

Bit 13 - Tx Event FIFO Watermark Reached Interrupt Enable

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pub fn teffe(&mut self) -> TEFFE_W<'_, IE_SPEC, 14>

Bit 14 - Tx Event FIFO Full Interrupt Enable

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pub fn tefle(&mut self) -> TEFLE_W<'_, IE_SPEC, 15>

Bit 15 - Tx Event FIFO Element Lost Interrupt Enable

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pub fn tswe(&mut self) -> TSWE_W<'_, IE_SPEC, 16>

Bit 16 - Timestamp Wraparound Interrupt Enable

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pub fn mrafe(&mut self) -> MRAFE_W<'_, IE_SPEC, 17>

Bit 17 - Message RAM Access Failure Interrupt Enable

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pub fn tooe(&mut self) -> TOOE_W<'_, IE_SPEC, 18>

Bit 18 - Timeout Occurred Interrupt Enable

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pub fn drxe(&mut self) -> DRXE_W<'_, IE_SPEC, 19>

Bit 19 - Message stored to Dedicated Rx Buffer Interrupt Enable

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pub fn bece(&mut self) -> BECE_W<'_, IE_SPEC, 20>

Bit 20 - Bit Error Corrected Interrupt Enable

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pub fn beue(&mut self) -> BEUE_W<'_, IE_SPEC, 21>

Bit 21 - Bit Error Uncorrected Interrupt Enable

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pub fn eloe(&mut self) -> ELOE_W<'_, IE_SPEC, 22>

Bit 22 - Error Logging Overflow Interrupt Enable

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pub fn epe(&mut self) -> EPE_W<'_, IE_SPEC, 23>

Bit 23 - Error Passive Interrupt Enable

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pub fn ewe(&mut self) -> EWE_W<'_, IE_SPEC, 24>

Bit 24 - Warning Status Interrupt Enable

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pub fn boe(&mut self) -> BOE_W<'_, IE_SPEC, 25>

Bit 25 - Bus_Off Status Interrupt Enable

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pub fn wdie(&mut self) -> WDIE_W<'_, IE_SPEC, 26>

Bit 26 - Watchdog Interrupt Interrupt Enable

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pub fn peae(&mut self) -> PEAE_W<'_, IE_SPEC, 27>

Bit 27 - Protocol Error in Arbitration Phase Enable

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pub fn pede(&mut self) -> PEDE_W<'_, IE_SPEC, 28>

Bit 28 - Protocol Error in Data Phase Enable

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pub fn arae(&mut self) -> ARAE_W<'_, IE_SPEC, 29>

Bit 29 - Access to Reserved Address Enable

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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

§Safety

Passing incorrect value can cause undefined behaviour. See reference manual