[−][src]Type Definition atsame54n::oscctrl::intenclr::W
type W = W<u32, INTENCLR>;
Writer for register INTENCLR
Implementations
impl W
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pub fn xoscrdy0(&mut self) -> XOSCRDY0_W<'_>
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Bit 0 - XOSC 0 Ready Interrupt Enable
pub fn xoscrdy1(&mut self) -> XOSCRDY1_W<'_>
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Bit 1 - XOSC 1 Ready Interrupt Enable
pub fn xoscfail0(&mut self) -> XOSCFAIL0_W<'_>
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Bit 2 - XOSC 0 Clock Failure Detector Interrupt Enable
pub fn xoscfail1(&mut self) -> XOSCFAIL1_W<'_>
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Bit 3 - XOSC 1 Clock Failure Detector Interrupt Enable
pub fn dfllrdy(&mut self) -> DFLLRDY_W<'_>
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Bit 8 - DFLL Ready Interrupt Enable
pub fn dflloob(&mut self) -> DFLLOOB_W<'_>
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Bit 9 - DFLL Out Of Bounds Interrupt Enable
pub fn dflllckf(&mut self) -> DFLLLCKF_W<'_>
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Bit 10 - DFLL Lock Fine Interrupt Enable
pub fn dflllckc(&mut self) -> DFLLLCKC_W<'_>
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Bit 11 - DFLL Lock Coarse Interrupt Enable
pub fn dfllrcs(&mut self) -> DFLLRCS_W<'_>
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Bit 12 - DFLL Reference Clock Stopped Interrupt Enable
pub fn dpll0lckr(&mut self) -> DPLL0LCKR_W<'_>
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Bit 16 - DPLL0 Lock Rise Interrupt Enable
pub fn dpll0lckf(&mut self) -> DPLL0LCKF_W<'_>
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Bit 17 - DPLL0 Lock Fall Interrupt Enable
pub fn dpll0lto(&mut self) -> DPLL0LTO_W<'_>
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Bit 18 - DPLL0 Lock Timeout Interrupt Enable
pub fn dpll0ldrto(&mut self) -> DPLL0LDRTO_W<'_>
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Bit 19 - DPLL0 Loop Divider Ratio Update Complete Interrupt Enable
pub fn dpll1lckr(&mut self) -> DPLL1LCKR_W<'_>
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Bit 24 - DPLL1 Lock Rise Interrupt Enable
pub fn dpll1lckf(&mut self) -> DPLL1LCKF_W<'_>
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Bit 25 - DPLL1 Lock Fall Interrupt Enable
pub fn dpll1lto(&mut self) -> DPLL1LTO_W<'_>
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Bit 26 - DPLL1 Lock Timeout Interrupt Enable
pub fn dpll1ldrto(&mut self) -> DPLL1LDRTO_W<'_>
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Bit 27 - DPLL1 Loop Divider Ratio Update Complete Interrupt Enable