Struct atsamd51j::sdhc0::RegisterBlock
source · [−]#[repr(C)]pub struct RegisterBlock {Show 30 fields
pub bsr: Reg<BSR_SPEC>,
pub bcr: Reg<BCR_SPEC>,
pub arg1r: Reg<ARG1R_SPEC>,
pub tmr: Reg<TMR_SPEC>,
pub cr: Reg<CR_SPEC>,
pub rr: [Reg<RR_SPEC>; 4],
pub bdpr: Reg<BDPR_SPEC>,
pub psr: Reg<PSR_SPEC>,
pub pcr: Reg<PCR_SPEC>,
pub wcr: Reg<WCR_SPEC>,
pub ccr: Reg<CCR_SPEC>,
pub tcr: Reg<TCR_SPEC>,
pub srr: Reg<SRR_SPEC>,
pub acesr: Reg<ACESR_SPEC>,
pub ca0r: Reg<CA0R_SPEC>,
pub ca1r: Reg<CA1R_SPEC>,
pub mccar: Reg<MCCAR_SPEC>,
pub feraces: Reg<FERACES_SPEC>,
pub fereis: Reg<FEREIS_SPEC>,
pub aesr: Reg<AESR_SPEC>,
pub asar: [Reg<ASAR_SPEC>; 1],
pub pvr: [Reg<PVR_SPEC>; 8],
pub sisr: Reg<SISR_SPEC>,
pub hcvr: Reg<HCVR_SPEC>,
pub mc1r: Reg<MC1R_SPEC>,
pub mc2r: Reg<MC2R_SPEC>,
pub acr: Reg<ACR_SPEC>,
pub cc2r: Reg<CC2R_SPEC>,
pub cacr: Reg<CACR_SPEC>,
pub dbgr: Reg<DBGR_SPEC>,
/* private fields */
}
Expand description
Register block
Fields
bsr: Reg<BSR_SPEC>
0x04 - Block Size
bcr: Reg<BCR_SPEC>
0x06 - Block Count
arg1r: Reg<ARG1R_SPEC>
0x08 - Argument 1
tmr: Reg<TMR_SPEC>
0x0c - Transfer Mode
cr: Reg<CR_SPEC>
0x0e - Command
rr: [Reg<RR_SPEC>; 4]
0x10..0x20 - Response
bdpr: Reg<BDPR_SPEC>
0x20 - Buffer Data Port
psr: Reg<PSR_SPEC>
0x24 - Present State
pcr: Reg<PCR_SPEC>
0x29 - Power Control
wcr: Reg<WCR_SPEC>
0x2b - Wakeup Control
ccr: Reg<CCR_SPEC>
0x2c - Clock Control
tcr: Reg<TCR_SPEC>
0x2e - Timeout Control
srr: Reg<SRR_SPEC>
0x2f - Software Reset
acesr: Reg<ACESR_SPEC>
0x3c - Auto CMD Error Status
ca0r: Reg<CA0R_SPEC>
0x40 - Capabilities 0
ca1r: Reg<CA1R_SPEC>
0x44 - Capabilities 1
mccar: Reg<MCCAR_SPEC>
0x48 - Maximum Current Capabilities
feraces: Reg<FERACES_SPEC>
0x50 - Force Event for Auto CMD Error Status
fereis: Reg<FEREIS_SPEC>
0x52 - Force Event for Error Interrupt Status
aesr: Reg<AESR_SPEC>
0x54 - ADMA Error Status
asar: [Reg<ASAR_SPEC>; 1]
0x58 - ADMA System Address n
pvr: [Reg<PVR_SPEC>; 8]
0x60..0x70 - Preset Value n
sisr: Reg<SISR_SPEC>
0xfc - Slot Interrupt Status
hcvr: Reg<HCVR_SPEC>
0xfe - Host Controller Version
mc1r: Reg<MC1R_SPEC>
0x204 - MMC Control 1
mc2r: Reg<MC2R_SPEC>
0x205 - MMC Control 2
acr: Reg<ACR_SPEC>
0x208 - AHB Control
cc2r: Reg<CC2R_SPEC>
0x20c - Clock Control 2
cacr: Reg<CACR_SPEC>
0x230 - Capabilities Control
dbgr: Reg<DBGR_SPEC>
0x234 - Debug
Implementations
sourceimpl RegisterBlock
impl RegisterBlock
sourcepub fn ssar_cmd23_mode(&self) -> &Reg<SSAR_CMD23_MODE_SPEC>
pub fn ssar_cmd23_mode(&self) -> &Reg<SSAR_CMD23_MODE_SPEC>
0x00 - SDMA System Address / Argument 2
sourcepub fn hc1r_emmc_mode(&self) -> &Reg<HC1R_EMMC_MODE_SPEC>
pub fn hc1r_emmc_mode(&self) -> &Reg<HC1R_EMMC_MODE_SPEC>
0x28 - Host Control 1
sourcepub fn bgcr_emmc_mode(&self) -> &Reg<BGCR_EMMC_MODE_SPEC>
pub fn bgcr_emmc_mode(&self) -> &Reg<BGCR_EMMC_MODE_SPEC>
0x2a - Block Gap Control
sourcepub fn nistr_emmc_mode(&self) -> &Reg<NISTR_EMMC_MODE_SPEC>
pub fn nistr_emmc_mode(&self) -> &Reg<NISTR_EMMC_MODE_SPEC>
0x30 - Normal Interrupt Status
sourcepub fn nistr(&self) -> &Reg<NISTR_SPEC>
pub fn nistr(&self) -> &Reg<NISTR_SPEC>
0x30 - Normal Interrupt Status
sourcepub fn eistr_emmc_mode(&self) -> &Reg<EISTR_EMMC_MODE_SPEC>
pub fn eistr_emmc_mode(&self) -> &Reg<EISTR_EMMC_MODE_SPEC>
0x32 - Error Interrupt Status
sourcepub fn eistr(&self) -> &Reg<EISTR_SPEC>
pub fn eistr(&self) -> &Reg<EISTR_SPEC>
0x32 - Error Interrupt Status
sourcepub fn nister_emmc_mode(&self) -> &Reg<NISTER_EMMC_MODE_SPEC>
pub fn nister_emmc_mode(&self) -> &Reg<NISTER_EMMC_MODE_SPEC>
0x34 - Normal Interrupt Status Enable
sourcepub fn nister(&self) -> &Reg<NISTER_SPEC>
pub fn nister(&self) -> &Reg<NISTER_SPEC>
0x34 - Normal Interrupt Status Enable
sourcepub fn eister_emmc_mode(&self) -> &Reg<EISTER_EMMC_MODE_SPEC>
pub fn eister_emmc_mode(&self) -> &Reg<EISTER_EMMC_MODE_SPEC>
0x36 - Error Interrupt Status Enable
sourcepub fn eister(&self) -> &Reg<EISTER_SPEC>
pub fn eister(&self) -> &Reg<EISTER_SPEC>
0x36 - Error Interrupt Status Enable
sourcepub fn nisier_emmc_mode(&self) -> &Reg<NISIER_EMMC_MODE_SPEC>
pub fn nisier_emmc_mode(&self) -> &Reg<NISIER_EMMC_MODE_SPEC>
0x38 - Normal Interrupt Signal Enable
sourcepub fn nisier(&self) -> &Reg<NISIER_SPEC>
pub fn nisier(&self) -> &Reg<NISIER_SPEC>
0x38 - Normal Interrupt Signal Enable
sourcepub fn eisier_emmc_mode(&self) -> &Reg<EISIER_EMMC_MODE_SPEC>
pub fn eisier_emmc_mode(&self) -> &Reg<EISIER_EMMC_MODE_SPEC>
0x3a - Error Interrupt Signal Enable
sourcepub fn eisier(&self) -> &Reg<EISIER_SPEC>
pub fn eisier(&self) -> &Reg<EISIER_SPEC>
0x3a - Error Interrupt Signal Enable
sourcepub fn hc2r_emmc_mode(&self) -> &Reg<HC2R_EMMC_MODE_SPEC>
pub fn hc2r_emmc_mode(&self) -> &Reg<HC2R_EMMC_MODE_SPEC>
0x3e - Host Control 2
Auto Trait Implementations
impl !RefUnwindSafe for RegisterBlock
impl Send for RegisterBlock
impl !Sync for RegisterBlock
impl Unpin for RegisterBlock
impl UnwindSafe for RegisterBlock
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more