Struct atsamd_hal::sercom::v2::uart::Uart [−][src]
pub struct Uart<C, D> where
C: ValidConfig,
D: Capability, { /* fields omitted */ }
Expand description
Abstraction over a UART peripheral, allowing to perform UART transactions.
The second type parameter, D
, denotes what the struct’s Capability
is.
Implementations
Read the interrupt flags
Clear interrupt status flags
Setting the ERROR
, RXBRK
, CTSIC
, RXS
, or TXC
flag will clear
the interrupts. This function has no effect on the DRE
or
RXC
flags.
Note that only the flags pertinent to Self
’s Capability
will be cleared. The other flags will be SILENTLY IGNORED.
- Available flags for
Receive
capability:RXC
,RXS
,RXBRK
andERROR
- Available flags for
Transmit
capability:DRE
andTXC
. Note: TheCTSIC
flag can only be cleared if aCTS
Pad was specified in theConfig
via theclear_ctsic
method. - Since
Duplex
Uart
s areReceive
+Transmit
they have all flags available.
Warning: The implementation of of
Write::flush
waits on and
clears the TXC
flag. Manually clearing this flag could cause it to
hang indefinitely.
Enable interrupts for the specified flags.
Note that only the flags pertinent to Self
’s Capability
will be cleared. The other flags will be SILENTLY IGNORED.
- Available flags for
Receive
capability:RXC
,RXS
,RXBRK
andERROR
- Available flags for
Transmit
capability:DRE
andTXC
. Note: TheCTSIC
interrupt can only be enabled if aCTS
Pad was specified in theConfig
via theenable_ctsic
method. - Since
Duplex
Uart
s areReceive
+Transmit
they have all flags available.
Disable interrupts for the specified flags.
Note that only the flags pertinent to Self
’s Capability
will be cleared. The other flags will be SILENTLY IGNORED
- Available flags for
Receive
capability:RXC
,RXS
,RXBRK
andERROR
- Available flags for
Transmit
capability:DRE
andTXC
. Note: TheCTSIC
interrupt can only be disabled if aCTS
Pad was specified in theConfig
via thedisable_ctsic
method. - Since
Duplex
Uart
s areReceive
+Transmit
they have all flags available.
Read the status flags
Clear the status flags
Note that only the status flags pertinent to Self
’s Capability
will be cleared. The other stattus flags will be SILENTLY IGNORED.
Clear the CTSIC
interrupt flag
Enable the CTSIC
interrupt
Disable the CTSIC
interrupt
Reconfigure the UART.
Calling this method will temporarily disable the SERCOM peripheral, as some registers are enable-protected. This may interrupt any ongoing transactions.
use atsamd_hal::sercom::v2::uart::{BaudMode, Oversampling, Uart};
uart.reconfigure(|c| c.set_run_in_standby(false));
Update the UART Config
uration.
Calling this method will temporarily disable the SERCOM peripheral, as some registers are enable-protected. This may interrupt any ongoing transactions.
use atsamd_hal::sercom::v2::uart::{BaudMode, Oversampling, Uart};
uart.reconfigure(|c| c.set_run_in_standby(false));
Read from the DATA register
Safety
Reading from the data register directly is unsafe
, because it will
clear the RXC flag, which could break assumptions made elsewhere in
this module.
Flush the RX buffer and clear RX errors.
Note: The datasheet states that disabling the receiver (RXEN) clears the RX buffer, and clears the BUFOVF, PERR and FERR bits. However, in practice, it seems like BUFOVF errors still pop up after a disable/enable cycle of the receiver, then immediately begin reading bytes from the DATA register. Instead, this method uses a workaround, which reads a few bytes to clear the RX buffer (3 bytes seems to be the trick), then manually clear the error bits.
Write to the DATA register
Safety
Writing to the data register directly is unsafe
, because it will clear
the DRE flag, which could break assumptions made elsewhere in this
module.
Trait Implementations
impl<C, D> AsRef<Config<<C as AnyConfig>::Pads, <C as AnyConfig>::CharSize>> for Uart<C, D> where
C: ValidConfig,
D: Capability,
impl<C, D> AsRef<Config<<C as AnyConfig>::Pads, <C as AnyConfig>::CharSize>> for Uart<C, D> where
C: ValidConfig,
D: Capability,
Performs the conversion.