Struct atsam4sd32c_pac::pioc::RegisterBlock
source · [−]#[repr(C)]pub struct RegisterBlock {Show 53 fields
pub per: Reg<PER_SPEC>,
pub pdr: Reg<PDR_SPEC>,
pub psr: Reg<PSR_SPEC>,
pub oer: Reg<OER_SPEC>,
pub odr: Reg<ODR_SPEC>,
pub osr: Reg<OSR_SPEC>,
pub ifer: Reg<IFER_SPEC>,
pub ifdr: Reg<IFDR_SPEC>,
pub ifsr: Reg<IFSR_SPEC>,
pub sodr: Reg<SODR_SPEC>,
pub codr: Reg<CODR_SPEC>,
pub odsr: Reg<ODSR_SPEC>,
pub pdsr: Reg<PDSR_SPEC>,
pub ier: Reg<IER_SPEC>,
pub idr: Reg<IDR_SPEC>,
pub imr: Reg<IMR_SPEC>,
pub isr: Reg<ISR_SPEC>,
pub mder: Reg<MDER_SPEC>,
pub mddr: Reg<MDDR_SPEC>,
pub mdsr: Reg<MDSR_SPEC>,
pub pudr: Reg<PUDR_SPEC>,
pub puer: Reg<PUER_SPEC>,
pub pusr: Reg<PUSR_SPEC>,
pub abcdsr: [Reg<ABCDSR_SPEC>; 2],
pub ifscdr: Reg<IFSCDR_SPEC>,
pub ifscer: Reg<IFSCER_SPEC>,
pub ifscsr: Reg<IFSCSR_SPEC>,
pub scdr: Reg<SCDR_SPEC>,
pub ppddr: Reg<PPDDR_SPEC>,
pub ppder: Reg<PPDER_SPEC>,
pub ppdsr: Reg<PPDSR_SPEC>,
pub ower: Reg<OWER_SPEC>,
pub owdr: Reg<OWDR_SPEC>,
pub owsr: Reg<OWSR_SPEC>,
pub aimer: Reg<AIMER_SPEC>,
pub aimdr: Reg<AIMDR_SPEC>,
pub aimmr: Reg<AIMMR_SPEC>,
pub esr: Reg<ESR_SPEC>,
pub lsr: Reg<LSR_SPEC>,
pub elsr: Reg<ELSR_SPEC>,
pub fellsr: Reg<FELLSR_SPEC>,
pub rehlsr: Reg<REHLSR_SPEC>,
pub frlhsr: Reg<FRLHSR_SPEC>,
pub locksr: Reg<LOCKSR_SPEC>,
pub wpmr: Reg<WPMR_SPEC>,
pub wpsr: Reg<WPSR_SPEC>,
pub schmitt: Reg<SCHMITT_SPEC>,
pub pcmr: Reg<PCMR_SPEC>,
pub pcier: Reg<PCIER_SPEC>,
pub pcidr: Reg<PCIDR_SPEC>,
pub pcimr: Reg<PCIMR_SPEC>,
pub pcisr: Reg<PCISR_SPEC>,
pub pcrhr: Reg<PCRHR_SPEC>,
/* private fields */
}
Expand description
Register block
Fields
per: Reg<PER_SPEC>
0x00 - PIO Enable Register
pdr: Reg<PDR_SPEC>
0x04 - PIO Disable Register
psr: Reg<PSR_SPEC>
0x08 - PIO Status Register
oer: Reg<OER_SPEC>
0x10 - Output Enable Register
odr: Reg<ODR_SPEC>
0x14 - Output Disable Register
osr: Reg<OSR_SPEC>
0x18 - Output Status Register
ifer: Reg<IFER_SPEC>
0x20 - Glitch Input Filter Enable Register
ifdr: Reg<IFDR_SPEC>
0x24 - Glitch Input Filter Disable Register
ifsr: Reg<IFSR_SPEC>
0x28 - Glitch Input Filter Status Register
sodr: Reg<SODR_SPEC>
0x30 - Set Output Data Register
codr: Reg<CODR_SPEC>
0x34 - Clear Output Data Register
odsr: Reg<ODSR_SPEC>
0x38 - Output Data Status Register
pdsr: Reg<PDSR_SPEC>
0x3c - Pin Data Status Register
ier: Reg<IER_SPEC>
0x40 - Interrupt Enable Register
idr: Reg<IDR_SPEC>
0x44 - Interrupt Disable Register
imr: Reg<IMR_SPEC>
0x48 - Interrupt Mask Register
isr: Reg<ISR_SPEC>
0x4c - Interrupt Status Register
mder: Reg<MDER_SPEC>
0x50 - Multi-driver Enable Register
mddr: Reg<MDDR_SPEC>
0x54 - Multi-driver Disable Register
mdsr: Reg<MDSR_SPEC>
0x58 - Multi-driver Status Register
pudr: Reg<PUDR_SPEC>
0x60 - Pull-up Disable Register
puer: Reg<PUER_SPEC>
0x64 - Pull-up Enable Register
pusr: Reg<PUSR_SPEC>
0x68 - Pad Pull-up Status Register
abcdsr: [Reg<ABCDSR_SPEC>; 2]
0x70..0x78 - Peripheral Select Register
ifscdr: Reg<IFSCDR_SPEC>
0x80 - Input Filter Slow Clock Disable Register
ifscer: Reg<IFSCER_SPEC>
0x84 - Input Filter Slow Clock Enable Register
ifscsr: Reg<IFSCSR_SPEC>
0x88 - Input Filter Slow Clock Status Register
scdr: Reg<SCDR_SPEC>
0x8c - Slow Clock Divider Debouncing Register
ppddr: Reg<PPDDR_SPEC>
0x90 - Pad Pull-down Disable Register
ppder: Reg<PPDER_SPEC>
0x94 - Pad Pull-down Enable Register
ppdsr: Reg<PPDSR_SPEC>
0x98 - Pad Pull-down Status Register
ower: Reg<OWER_SPEC>
0xa0 - Output Write Enable
owdr: Reg<OWDR_SPEC>
0xa4 - Output Write Disable
owsr: Reg<OWSR_SPEC>
0xa8 - Output Write Status Register
aimer: Reg<AIMER_SPEC>
0xb0 - Additional Interrupt Modes Enable Register
aimdr: Reg<AIMDR_SPEC>
0xb4 - Additional Interrupt Modes Disable Register
aimmr: Reg<AIMMR_SPEC>
0xb8 - Additional Interrupt Modes Mask Register
esr: Reg<ESR_SPEC>
0xc0 - Edge Select Register
lsr: Reg<LSR_SPEC>
0xc4 - Level Select Register
elsr: Reg<ELSR_SPEC>
0xc8 - Edge/Level Status Register
fellsr: Reg<FELLSR_SPEC>
0xd0 - Falling Edge/Low-Level Select Register
rehlsr: Reg<REHLSR_SPEC>
0xd4 - Rising Edge/ High-Level Select Register
frlhsr: Reg<FRLHSR_SPEC>
0xd8 - Fall/Rise - Low/High Status Register
locksr: Reg<LOCKSR_SPEC>
0xe0 - Lock Status
wpmr: Reg<WPMR_SPEC>
0xe4 - Write Protection Mode Register
wpsr: Reg<WPSR_SPEC>
0xe8 - Write Protection Status Register
schmitt: Reg<SCHMITT_SPEC>
0x100 - Schmitt Trigger Register
pcmr: Reg<PCMR_SPEC>
0x150 - Parallel Capture Mode Register
pcier: Reg<PCIER_SPEC>
0x154 - Parallel Capture Interrupt Enable Register
pcidr: Reg<PCIDR_SPEC>
0x158 - Parallel Capture Interrupt Disable Register
pcimr: Reg<PCIMR_SPEC>
0x15c - Parallel Capture Interrupt Mask Register
pcisr: Reg<PCISR_SPEC>
0x160 - Parallel Capture Interrupt Status Register
pcrhr: Reg<PCRHR_SPEC>
0x164 - Parallel Capture Reception Holding Register
Auto Trait Implementations
impl !RefUnwindSafe for RegisterBlock
impl Send for RegisterBlock
impl !Sync for RegisterBlock
impl Unpin for RegisterBlock
impl UnwindSafe for RegisterBlock
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more