Struct atsam4s2a_pac::generic::R[][src]

pub struct R<U, T> { /* fields omitted */ }

Register/field reader.

Result of the read methods of registers. Also used as a closure argument in the modify method.

Implementations

impl<U, T> R<U, T> where
    U: Copy
[src]

pub fn bits(&self) -> U[src]

Reads raw bits from register/field.

impl<FI> R<bool, FI>[src]

pub fn bit(&self) -> bool[src]

Value of the field as raw bits.

pub fn bit_is_clear(&self) -> bool[src]

Returns true if the bit is clear (0).

pub fn bit_is_set(&self) -> bool[src]

Returns true if the bit is set (1).

impl R<u32, Reg<u32, _CMR>>[src]

pub fn div(&self) -> DIV_R[src]

Bits 0:11 - Clock Divider

impl R<u8, CKS_A>[src]

pub fn variant(&self) -> Variant<u8, CKS_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_tk(&self) -> bool[src]

Checks if the value of the field is TK

pub fn is_rk(&self) -> bool[src]

Checks if the value of the field is RK

impl R<u8, CKO_A>[src]

pub fn variant(&self) -> Variant<u8, CKO_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_continuous(&self) -> bool[src]

Checks if the value of the field is CONTINUOUS

pub fn is_transfer(&self) -> bool[src]

Checks if the value of the field is TRANSFER

impl R<u8, CKG_A>[src]

pub fn variant(&self) -> Variant<u8, CKG_A>[src]

Get enumerated values variant

pub fn is_continuous(&self) -> bool[src]

Checks if the value of the field is CONTINUOUS

pub fn is_en_rf_low(&self) -> bool[src]

Checks if the value of the field is EN_RF_LOW

pub fn is_en_rf_high(&self) -> bool[src]

Checks if the value of the field is EN_RF_HIGH

impl R<u8, START_A>[src]

pub fn variant(&self) -> Variant<u8, START_A>[src]

Get enumerated values variant

pub fn is_continuous(&self) -> bool[src]

Checks if the value of the field is CONTINUOUS

pub fn is_transmit(&self) -> bool[src]

Checks if the value of the field is TRANSMIT

pub fn is_rf_low(&self) -> bool[src]

Checks if the value of the field is RF_LOW

pub fn is_rf_high(&self) -> bool[src]

Checks if the value of the field is RF_HIGH

pub fn is_rf_falling(&self) -> bool[src]

Checks if the value of the field is RF_FALLING

pub fn is_rf_rising(&self) -> bool[src]

Checks if the value of the field is RF_RISING

pub fn is_rf_level(&self) -> bool[src]

Checks if the value of the field is RF_LEVEL

pub fn is_rf_edge(&self) -> bool[src]

Checks if the value of the field is RF_EDGE

pub fn is_cmp_0(&self) -> bool[src]

Checks if the value of the field is CMP_0

impl R<u32, Reg<u32, _RCMR>>[src]

pub fn cks(&self) -> CKS_R[src]

Bits 0:1 - Receive Clock Selection

pub fn cko(&self) -> CKO_R[src]

Bits 2:4 - Receive Clock Output Mode Selection

pub fn cki(&self) -> CKI_R[src]

Bit 5 - Receive Clock Inversion

pub fn ckg(&self) -> CKG_R[src]

Bits 6:7 - Receive Clock Gating Selection

pub fn start(&self) -> START_R[src]

Bits 8:11 - Receive Start Selection

pub fn stop(&self) -> STOP_R[src]

Bit 12 - Receive Stop Selection

pub fn sttdly(&self) -> STTDLY_R[src]

Bits 16:23 - Receive Start Delay

pub fn period(&self) -> PERIOD_R[src]

Bits 24:31 - Receive Period Divider Selection

impl R<u8, FSOS_A>[src]

pub fn variant(&self) -> Variant<u8, FSOS_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_negative(&self) -> bool[src]

Checks if the value of the field is NEGATIVE

pub fn is_positive(&self) -> bool[src]

Checks if the value of the field is POSITIVE

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_toggling(&self) -> bool[src]

Checks if the value of the field is TOGGLING

impl R<bool, FSEDGE_A>[src]

pub fn variant(&self) -> FSEDGE_A[src]

Get enumerated values variant

pub fn is_positive(&self) -> bool[src]

Checks if the value of the field is POSITIVE

pub fn is_negative(&self) -> bool[src]

Checks if the value of the field is NEGATIVE

impl R<u32, Reg<u32, _RFMR>>[src]

pub fn datlen(&self) -> DATLEN_R[src]

Bits 0:4 - Data Length

pub fn loop_(&self) -> LOOP_R[src]

Bit 5 - Loop Mode

pub fn msbf(&self) -> MSBF_R[src]

Bit 7 - Most Significant Bit First

pub fn datnb(&self) -> DATNB_R[src]

Bits 8:11 - Data Number per Frame

pub fn fslen(&self) -> FSLEN_R[src]

Bits 16:19 - Receive Frame Sync Length

pub fn fsos(&self) -> FSOS_R[src]

Bits 20:22 - Receive Frame Sync Output Selection

pub fn fsedge(&self) -> FSEDGE_R[src]

Bit 24 - Frame Sync Edge Detection

pub fn fslen_ext(&self) -> FSLEN_EXT_R[src]

Bits 28:31 - FSLEN Field Extension

impl R<u8, CKS_A>[src]

pub fn variant(&self) -> Variant<u8, CKS_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_rk(&self) -> bool[src]

Checks if the value of the field is RK

pub fn is_tk(&self) -> bool[src]

Checks if the value of the field is TK

impl R<u8, CKO_A>[src]

pub fn variant(&self) -> Variant<u8, CKO_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_continuous(&self) -> bool[src]

Checks if the value of the field is CONTINUOUS

pub fn is_transfer(&self) -> bool[src]

Checks if the value of the field is TRANSFER

impl R<u8, CKG_A>[src]

pub fn variant(&self) -> Variant<u8, CKG_A>[src]

Get enumerated values variant

pub fn is_continuous(&self) -> bool[src]

Checks if the value of the field is CONTINUOUS

pub fn is_en_tf_low(&self) -> bool[src]

Checks if the value of the field is EN_TF_LOW

pub fn is_en_tf_high(&self) -> bool[src]

Checks if the value of the field is EN_TF_HIGH

impl R<u8, START_A>[src]

pub fn variant(&self) -> Variant<u8, START_A>[src]

Get enumerated values variant

pub fn is_continuous(&self) -> bool[src]

Checks if the value of the field is CONTINUOUS

pub fn is_receive(&self) -> bool[src]

Checks if the value of the field is RECEIVE

pub fn is_tf_low(&self) -> bool[src]

Checks if the value of the field is TF_LOW

pub fn is_tf_high(&self) -> bool[src]

Checks if the value of the field is TF_HIGH

pub fn is_tf_falling(&self) -> bool[src]

Checks if the value of the field is TF_FALLING

pub fn is_tf_rising(&self) -> bool[src]

Checks if the value of the field is TF_RISING

pub fn is_tf_level(&self) -> bool[src]

Checks if the value of the field is TF_LEVEL

pub fn is_tf_edge(&self) -> bool[src]

Checks if the value of the field is TF_EDGE

impl R<u32, Reg<u32, _TCMR>>[src]

pub fn cks(&self) -> CKS_R[src]

Bits 0:1 - Transmit Clock Selection

pub fn cko(&self) -> CKO_R[src]

Bits 2:4 - Transmit Clock Output Mode Selection

pub fn cki(&self) -> CKI_R[src]

Bit 5 - Transmit Clock Inversion

pub fn ckg(&self) -> CKG_R[src]

Bits 6:7 - Transmit Clock Gating Selection

pub fn start(&self) -> START_R[src]

Bits 8:11 - Transmit Start Selection

pub fn sttdly(&self) -> STTDLY_R[src]

Bits 16:23 - Transmit Start Delay

pub fn period(&self) -> PERIOD_R[src]

Bits 24:31 - Transmit Period Divider Selection

impl R<u8, FSOS_A>[src]

pub fn variant(&self) -> Variant<u8, FSOS_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_negative(&self) -> bool[src]

Checks if the value of the field is NEGATIVE

pub fn is_positive(&self) -> bool[src]

Checks if the value of the field is POSITIVE

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_toggling(&self) -> bool[src]

Checks if the value of the field is TOGGLING

impl R<bool, FSEDGE_A>[src]

pub fn variant(&self) -> FSEDGE_A[src]

Get enumerated values variant

pub fn is_positive(&self) -> bool[src]

Checks if the value of the field is POSITIVE

pub fn is_negative(&self) -> bool[src]

Checks if the value of the field is NEGATIVE

impl R<u32, Reg<u32, _TFMR>>[src]

pub fn datlen(&self) -> DATLEN_R[src]

Bits 0:4 - Data Length

pub fn datdef(&self) -> DATDEF_R[src]

Bit 5 - Data Default Value

pub fn msbf(&self) -> MSBF_R[src]

Bit 7 - Most Significant Bit First

pub fn datnb(&self) -> DATNB_R[src]

Bits 8:11 - Data Number per Frame

pub fn fslen(&self) -> FSLEN_R[src]

Bits 16:19 - Transmit Frame Sync Length

pub fn fsos(&self) -> FSOS_R[src]

Bits 20:22 - Transmit Frame Sync Output Selection

pub fn fsden(&self) -> FSDEN_R[src]

Bit 23 - Frame Sync Data Enable

pub fn fsedge(&self) -> FSEDGE_R[src]

Bit 24 - Frame Sync Edge Detection

pub fn fslen_ext(&self) -> FSLEN_EXT_R[src]

Bits 28:31 - FSLEN Field Extension

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rdat(&self) -> RDAT_R[src]

Bits 0:31 - Receive Data

impl R<u32, Reg<u32, _RSHR>>[src]

pub fn rsdat(&self) -> RSDAT_R[src]

Bits 0:15 - Receive Synchronization Data

impl R<u32, Reg<u32, _TSHR>>[src]

pub fn tsdat(&self) -> TSDAT_R[src]

Bits 0:15 - Transmit Synchronization Data

impl R<u32, Reg<u32, _RC0R>>[src]

pub fn cp0(&self) -> CP0_R[src]

Bits 0:15 - Receive Compare Data 0

impl R<u32, Reg<u32, _RC1R>>[src]

pub fn cp1(&self) -> CP1_R[src]

Bits 0:15 - Receive Compare Data 1

impl R<u32, Reg<u32, _SR>>[src]

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 0 - Transmit Ready

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 1 - Transmit Empty

pub fn endtx(&self) -> ENDTX_R[src]

Bit 2 - End of Transmission

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 3 - Transmit Buffer Empty

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 4 - Receive Ready

pub fn ovrun(&self) -> OVRUN_R[src]

Bit 5 - Receive Overrun

pub fn endrx(&self) -> ENDRX_R[src]

Bit 6 - End of Reception

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 7 - Receive Buffer Full

pub fn cp0(&self) -> CP0_R[src]

Bit 8 - Compare 0

pub fn cp1(&self) -> CP1_R[src]

Bit 9 - Compare 1

pub fn txsyn(&self) -> TXSYN_R[src]

Bit 10 - Transmit Sync

pub fn rxsyn(&self) -> RXSYN_R[src]

Bit 11 - Receive Sync

pub fn txen(&self) -> TXEN_R[src]

Bit 16 - Transmit Enable

pub fn rxen(&self) -> RXEN_R[src]

Bit 17 - Receive Enable

impl R<u32, Reg<u32, _IMR>>[src]

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 0 - Transmit Ready Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 1 - Transmit Empty Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 2 - End of Transmission Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 3 - Transmit Buffer Empty Interrupt Mask

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 4 - Receive Ready Interrupt Mask

pub fn ovrun(&self) -> OVRUN_R[src]

Bit 5 - Receive Overrun Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 6 - End of Reception Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 7 - Receive Buffer Full Interrupt Mask

pub fn cp0(&self) -> CP0_R[src]

Bit 8 - Compare 0 Interrupt Mask

pub fn cp1(&self) -> CP1_R[src]

Bit 9 - Compare 1 Interrupt Mask

pub fn txsyn(&self) -> TXSYN_R[src]

Bit 10 - Tx Sync Interrupt Mask

pub fn rxsyn(&self) -> RXSYN_R[src]

Bit 11 - Rx Sync Interrupt Mask

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protect Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u32, Reg<u32, _MR>>[src]

pub fn mstr(&self) -> MSTR_R[src]

Bit 0 - Master/Slave Mode

pub fn ps(&self) -> PS_R[src]

Bit 1 - Peripheral Select

pub fn pcsdec(&self) -> PCSDEC_R[src]

Bit 2 - Chip Select Decode

pub fn modfdis(&self) -> MODFDIS_R[src]

Bit 4 - Mode Fault Detection

pub fn wdrbt(&self) -> WDRBT_R[src]

Bit 5 - Wait Data Read Before Transfer

pub fn llb(&self) -> LLB_R[src]

Bit 7 - Local Loopback Enable

pub fn pcs(&self) -> PCS_R[src]

Bits 16:19 - Peripheral Chip Select

pub fn dlybcs(&self) -> DLYBCS_R[src]

Bits 24:31 - Delay Between Chip Selects

impl R<u32, Reg<u32, _RDR>>[src]

pub fn rd(&self) -> RD_R[src]

Bits 0:15 - Receive Data

pub fn pcs(&self) -> PCS_R[src]

Bits 16:19 - Peripheral Chip Select

impl R<u32, Reg<u32, _SR>>[src]

pub fn rdrf(&self) -> RDRF_R[src]

Bit 0 - Receive Data Register Full (cleared by reading SPI_RDR)

pub fn tdre(&self) -> TDRE_R[src]

Bit 1 - Transmit Data Register Empty (cleared by writing SPI_TDR)

pub fn modf(&self) -> MODF_R[src]

Bit 2 - Mode Fault Error (cleared on read)

pub fn ovres(&self) -> OVRES_R[src]

Bit 3 - Overrun Error Status (cleared on read)

pub fn endrx(&self) -> ENDRX_R[src]

Bit 4 - End of RX Buffer (cleared by writing SPI_RCR or SPI_RNCR)

pub fn endtx(&self) -> ENDTX_R[src]

Bit 5 - End of TX Buffer (cleared by writing SPI_TCR or SPI_TNCR)

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 6 - RX Buffer Full (cleared by writing SPI_RCR or SPI_RNCR)

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 7 - TX Buffer Empty (cleared by writing SPI_TCR or SPI_TNCR)

pub fn nssr(&self) -> NSSR_R[src]

Bit 8 - NSS Rising (cleared on read)

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmission Registers Empty (cleared by writing SPI_TDR)

pub fn undes(&self) -> UNDES_R[src]

Bit 10 - Underrun Error Status (Slave mode only) (cleared on read)

pub fn spiens(&self) -> SPIENS_R[src]

Bit 16 - SPI Enable Status

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rdrf(&self) -> RDRF_R[src]

Bit 0 - Receive Data Register Full Interrupt Mask

pub fn tdre(&self) -> TDRE_R[src]

Bit 1 - SPI Transmit Data Register Empty Interrupt Mask

pub fn modf(&self) -> MODF_R[src]

Bit 2 - Mode Fault Error Interrupt Mask

pub fn ovres(&self) -> OVRES_R[src]

Bit 3 - Overrun Error Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 4 - End of Receive Buffer Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 5 - End of Transmit Buffer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 6 - Receive Buffer Full Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 7 - Transmit Buffer Empty Interrupt Mask

pub fn nssr(&self) -> NSSR_R[src]

Bit 8 - NSS Rising Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmission Registers Empty Mask

pub fn undes(&self) -> UNDES_R[src]

Bit 10 - Underrun Error Interrupt Mask

impl R<u8, BITS_A>[src]

pub fn variant(&self) -> Variant<u8, BITS_A>[src]

Get enumerated values variant

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

pub fn is_9_bit(&self) -> bool[src]

Checks if the value of the field is _9_BIT

pub fn is_10_bit(&self) -> bool[src]

Checks if the value of the field is _10_BIT

pub fn is_11_bit(&self) -> bool[src]

Checks if the value of the field is _11_BIT

pub fn is_12_bit(&self) -> bool[src]

Checks if the value of the field is _12_BIT

pub fn is_13_bit(&self) -> bool[src]

Checks if the value of the field is _13_BIT

pub fn is_14_bit(&self) -> bool[src]

Checks if the value of the field is _14_BIT

pub fn is_15_bit(&self) -> bool[src]

Checks if the value of the field is _15_BIT

pub fn is_16_bit(&self) -> bool[src]

Checks if the value of the field is _16_BIT

impl R<u32, Reg<u32, _CSR>>[src]

pub fn cpol(&self) -> CPOL_R[src]

Bit 0 - Clock Polarity

pub fn ncpha(&self) -> NCPHA_R[src]

Bit 1 - Clock Phase

pub fn csnaat(&self) -> CSNAAT_R[src]

Bit 2 - Chip Select Not Active After Transfer (Ignored if CSAAT = 1)

pub fn csaat(&self) -> CSAAT_R[src]

Bit 3 - Chip Select Active After Transfer

pub fn bits_(&self) -> BITS_R[src]

Bits 4:7 - Bits Per Transfer

pub fn scbr(&self) -> SCBR_R[src]

Bits 8:15 - Serial Clock Bit Rate

pub fn dlybs(&self) -> DLYBS_R[src]

Bits 16:23 - Delay Before SPCK

pub fn dlybct(&self) -> DLYBCT_R[src]

Bits 24:31 - Delay Between Consecutive Transfers

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:15 - Write Protection Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, ETRGEDG_A>[src]

pub fn variant(&self) -> ETRGEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRA_A>[src]

pub fn variant(&self) -> LDRA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRB_A>[src]

pub fn variant(&self) -> LDRB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u32, Reg<u32, _CMR0>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn ldbstop(&self) -> LDBSTOP_R[src]

Bit 6 - Counter Clock Stopped with RB Loading

pub fn ldbdis(&self) -> LDBDIS_R[src]

Bit 7 - Counter Clock Disable with RB Loading

pub fn etrgedg(&self) -> ETRGEDG_R[src]

Bits 8:9 - External Trigger Edge Selection

pub fn abetrg(&self) -> ABETRG_R[src]

Bit 10 - TIOA or TIOB External Trigger Selection

pub fn cpctrg(&self) -> CPCTRG_R[src]

Bit 14 - RC Compare Trigger Enable

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn ldra(&self) -> LDRA_R[src]

Bits 16:17 - RA Loading Edge Selection

pub fn ldrb(&self) -> LDRB_R[src]

Bits 18:19 - RB Loading Edge Selection

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, EEVTEDG_A>[src]

pub fn variant(&self) -> EEVTEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, EEVT_A>[src]

pub fn variant(&self) -> EEVT_A[src]

Get enumerated values variant

pub fn is_tiob(&self) -> bool[src]

Checks if the value of the field is TIOB

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, WAVSEL_A>[src]

pub fn variant(&self) -> WAVSEL_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_updown(&self) -> bool[src]

Checks if the value of the field is UPDOWN

pub fn is_up_rc(&self) -> bool[src]

Checks if the value of the field is UP_RC

pub fn is_updown_rc(&self) -> bool[src]

Checks if the value of the field is UPDOWN_RC

impl R<u8, ACPA_A>[src]

pub fn variant(&self) -> ACPA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ACPC_A>[src]

pub fn variant(&self) -> ACPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, AEEVT_A>[src]

pub fn variant(&self) -> AEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ASWTRG_A>[src]

pub fn variant(&self) -> ASWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPB_A>[src]

pub fn variant(&self) -> BCPB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPC_A>[src]

pub fn variant(&self) -> BCPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BEEVT_A>[src]

pub fn variant(&self) -> BEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BSWTRG_A>[src]

pub fn variant(&self) -> BSWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u32, Reg<u32, _CMR0_WAVEFORM_MODE>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn cpcstop(&self) -> CPCSTOP_R[src]

Bit 6 - Counter Clock Stopped with RC Compare

pub fn cpcdis(&self) -> CPCDIS_R[src]

Bit 7 - Counter Clock Disable with RC Compare

pub fn eevtedg(&self) -> EEVTEDG_R[src]

Bits 8:9 - External Event Edge Selection

pub fn eevt(&self) -> EEVT_R[src]

Bits 10:11 - External Event Selection

pub fn enetrg(&self) -> ENETRG_R[src]

Bit 12 - External Event Trigger Enable

pub fn wavsel(&self) -> WAVSEL_R[src]

Bits 13:14 - Waveform Selection

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn acpa(&self) -> ACPA_R[src]

Bits 16:17 - RA Compare Effect on TIOA

pub fn acpc(&self) -> ACPC_R[src]

Bits 18:19 - RC Compare Effect on TIOA

pub fn aeevt(&self) -> AEEVT_R[src]

Bits 20:21 - External Event Effect on TIOA

pub fn aswtrg(&self) -> ASWTRG_R[src]

Bits 22:23 - Software Trigger Effect on TIOA

pub fn bcpb(&self) -> BCPB_R[src]

Bits 24:25 - RB Compare Effect on TIOB

pub fn bcpc(&self) -> BCPC_R[src]

Bits 26:27 - RC Compare Effect on TIOB

pub fn beevt(&self) -> BEEVT_R[src]

Bits 28:29 - External Event Effect on TIOB

pub fn bswtrg(&self) -> BSWTRG_R[src]

Bits 30:31 - Software Trigger Effect on TIOB

impl R<u32, Reg<u32, _SMMR0>>[src]

pub fn gcen(&self) -> GCEN_R[src]

Bit 0 - Gray Count Enable

pub fn down(&self) -> DOWN_R[src]

Bit 1 - Down Count

impl R<u32, Reg<u32, _CV0>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:31 - Counter Value

impl R<u32, Reg<u32, _RA0>>[src]

pub fn ra(&self) -> RA_R[src]

Bits 0:31 - Register A

impl R<u32, Reg<u32, _RB0>>[src]

pub fn rb(&self) -> RB_R[src]

Bits 0:31 - Register B

impl R<u32, Reg<u32, _RC0>>[src]

pub fn rc(&self) -> RC_R[src]

Bits 0:31 - Register C

impl R<u32, Reg<u32, _SR0>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow Status (cleared on read)

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun Status (cleared on read)

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare Status (cleared on read)

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare Status (cleared on read)

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare Status (cleared on read)

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading Status (cleared on read)

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading Status (cleared on read)

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger Status (cleared on read)

pub fn clksta(&self) -> CLKSTA_R[src]

Bit 16 - Clock Enabling Status

pub fn mtioa(&self) -> MTIOA_R[src]

Bit 17 - TIOA Mirror

pub fn mtiob(&self) -> MTIOB_R[src]

Bit 18 - TIOB Mirror

impl R<u32, Reg<u32, _IMR0>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, ETRGEDG_A>[src]

pub fn variant(&self) -> ETRGEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRA_A>[src]

pub fn variant(&self) -> LDRA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRB_A>[src]

pub fn variant(&self) -> LDRB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u32, Reg<u32, _CMR1>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn ldbstop(&self) -> LDBSTOP_R[src]

Bit 6 - Counter Clock Stopped with RB Loading

pub fn ldbdis(&self) -> LDBDIS_R[src]

Bit 7 - Counter Clock Disable with RB Loading

pub fn etrgedg(&self) -> ETRGEDG_R[src]

Bits 8:9 - External Trigger Edge Selection

pub fn abetrg(&self) -> ABETRG_R[src]

Bit 10 - TIOA or TIOB External Trigger Selection

pub fn cpctrg(&self) -> CPCTRG_R[src]

Bit 14 - RC Compare Trigger Enable

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn ldra(&self) -> LDRA_R[src]

Bits 16:17 - RA Loading Edge Selection

pub fn ldrb(&self) -> LDRB_R[src]

Bits 18:19 - RB Loading Edge Selection

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, EEVTEDG_A>[src]

pub fn variant(&self) -> EEVTEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, EEVT_A>[src]

pub fn variant(&self) -> EEVT_A[src]

Get enumerated values variant

pub fn is_tiob(&self) -> bool[src]

Checks if the value of the field is TIOB

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, WAVSEL_A>[src]

pub fn variant(&self) -> WAVSEL_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_updown(&self) -> bool[src]

Checks if the value of the field is UPDOWN

pub fn is_up_rc(&self) -> bool[src]

Checks if the value of the field is UP_RC

pub fn is_updown_rc(&self) -> bool[src]

Checks if the value of the field is UPDOWN_RC

impl R<u8, ACPA_A>[src]

pub fn variant(&self) -> ACPA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ACPC_A>[src]

pub fn variant(&self) -> ACPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, AEEVT_A>[src]

pub fn variant(&self) -> AEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ASWTRG_A>[src]

pub fn variant(&self) -> ASWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPB_A>[src]

pub fn variant(&self) -> BCPB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPC_A>[src]

pub fn variant(&self) -> BCPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BEEVT_A>[src]

pub fn variant(&self) -> BEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BSWTRG_A>[src]

pub fn variant(&self) -> BSWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u32, Reg<u32, _CMR1_WAVEFORM_MODE>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn cpcstop(&self) -> CPCSTOP_R[src]

Bit 6 - Counter Clock Stopped with RC Compare

pub fn cpcdis(&self) -> CPCDIS_R[src]

Bit 7 - Counter Clock Disable with RC Compare

pub fn eevtedg(&self) -> EEVTEDG_R[src]

Bits 8:9 - External Event Edge Selection

pub fn eevt(&self) -> EEVT_R[src]

Bits 10:11 - External Event Selection

pub fn enetrg(&self) -> ENETRG_R[src]

Bit 12 - External Event Trigger Enable

pub fn wavsel(&self) -> WAVSEL_R[src]

Bits 13:14 - Waveform Selection

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn acpa(&self) -> ACPA_R[src]

Bits 16:17 - RA Compare Effect on TIOA

pub fn acpc(&self) -> ACPC_R[src]

Bits 18:19 - RC Compare Effect on TIOA

pub fn aeevt(&self) -> AEEVT_R[src]

Bits 20:21 - External Event Effect on TIOA

pub fn aswtrg(&self) -> ASWTRG_R[src]

Bits 22:23 - Software Trigger Effect on TIOA

pub fn bcpb(&self) -> BCPB_R[src]

Bits 24:25 - RB Compare Effect on TIOB

pub fn bcpc(&self) -> BCPC_R[src]

Bits 26:27 - RC Compare Effect on TIOB

pub fn beevt(&self) -> BEEVT_R[src]

Bits 28:29 - External Event Effect on TIOB

pub fn bswtrg(&self) -> BSWTRG_R[src]

Bits 30:31 - Software Trigger Effect on TIOB

impl R<u32, Reg<u32, _SMMR1>>[src]

pub fn gcen(&self) -> GCEN_R[src]

Bit 0 - Gray Count Enable

pub fn down(&self) -> DOWN_R[src]

Bit 1 - Down Count

impl R<u32, Reg<u32, _CV1>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:31 - Counter Value

impl R<u32, Reg<u32, _RA1>>[src]

pub fn ra(&self) -> RA_R[src]

Bits 0:31 - Register A

impl R<u32, Reg<u32, _RB1>>[src]

pub fn rb(&self) -> RB_R[src]

Bits 0:31 - Register B

impl R<u32, Reg<u32, _RC1>>[src]

pub fn rc(&self) -> RC_R[src]

Bits 0:31 - Register C

impl R<u32, Reg<u32, _SR1>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow Status (cleared on read)

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun Status (cleared on read)

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare Status (cleared on read)

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare Status (cleared on read)

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare Status (cleared on read)

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading Status (cleared on read)

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading Status (cleared on read)

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger Status (cleared on read)

pub fn clksta(&self) -> CLKSTA_R[src]

Bit 16 - Clock Enabling Status

pub fn mtioa(&self) -> MTIOA_R[src]

Bit 17 - TIOA Mirror

pub fn mtiob(&self) -> MTIOB_R[src]

Bit 18 - TIOB Mirror

impl R<u32, Reg<u32, _IMR1>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, ETRGEDG_A>[src]

pub fn variant(&self) -> ETRGEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRA_A>[src]

pub fn variant(&self) -> LDRA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRB_A>[src]

pub fn variant(&self) -> LDRB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u32, Reg<u32, _CMR2>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn ldbstop(&self) -> LDBSTOP_R[src]

Bit 6 - Counter Clock Stopped with RB Loading

pub fn ldbdis(&self) -> LDBDIS_R[src]

Bit 7 - Counter Clock Disable with RB Loading

pub fn etrgedg(&self) -> ETRGEDG_R[src]

Bits 8:9 - External Trigger Edge Selection

pub fn abetrg(&self) -> ABETRG_R[src]

Bit 10 - TIOA or TIOB External Trigger Selection

pub fn cpctrg(&self) -> CPCTRG_R[src]

Bit 14 - RC Compare Trigger Enable

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn ldra(&self) -> LDRA_R[src]

Bits 16:17 - RA Loading Edge Selection

pub fn ldrb(&self) -> LDRB_R[src]

Bits 18:19 - RB Loading Edge Selection

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, EEVTEDG_A>[src]

pub fn variant(&self) -> EEVTEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, EEVT_A>[src]

pub fn variant(&self) -> EEVT_A[src]

Get enumerated values variant

pub fn is_tiob(&self) -> bool[src]

Checks if the value of the field is TIOB

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, WAVSEL_A>[src]

pub fn variant(&self) -> WAVSEL_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_updown(&self) -> bool[src]

Checks if the value of the field is UPDOWN

pub fn is_up_rc(&self) -> bool[src]

Checks if the value of the field is UP_RC

pub fn is_updown_rc(&self) -> bool[src]

Checks if the value of the field is UPDOWN_RC

impl R<u8, ACPA_A>[src]

pub fn variant(&self) -> ACPA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ACPC_A>[src]

pub fn variant(&self) -> ACPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, AEEVT_A>[src]

pub fn variant(&self) -> AEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ASWTRG_A>[src]

pub fn variant(&self) -> ASWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPB_A>[src]

pub fn variant(&self) -> BCPB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPC_A>[src]

pub fn variant(&self) -> BCPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BEEVT_A>[src]

pub fn variant(&self) -> BEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BSWTRG_A>[src]

pub fn variant(&self) -> BSWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u32, Reg<u32, _CMR2_WAVEFORM_MODE>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn cpcstop(&self) -> CPCSTOP_R[src]

Bit 6 - Counter Clock Stopped with RC Compare

pub fn cpcdis(&self) -> CPCDIS_R[src]

Bit 7 - Counter Clock Disable with RC Compare

pub fn eevtedg(&self) -> EEVTEDG_R[src]

Bits 8:9 - External Event Edge Selection

pub fn eevt(&self) -> EEVT_R[src]

Bits 10:11 - External Event Selection

pub fn enetrg(&self) -> ENETRG_R[src]

Bit 12 - External Event Trigger Enable

pub fn wavsel(&self) -> WAVSEL_R[src]

Bits 13:14 - Waveform Selection

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn acpa(&self) -> ACPA_R[src]

Bits 16:17 - RA Compare Effect on TIOA

pub fn acpc(&self) -> ACPC_R[src]

Bits 18:19 - RC Compare Effect on TIOA

pub fn aeevt(&self) -> AEEVT_R[src]

Bits 20:21 - External Event Effect on TIOA

pub fn aswtrg(&self) -> ASWTRG_R[src]

Bits 22:23 - Software Trigger Effect on TIOA

pub fn bcpb(&self) -> BCPB_R[src]

Bits 24:25 - RB Compare Effect on TIOB

pub fn bcpc(&self) -> BCPC_R[src]

Bits 26:27 - RC Compare Effect on TIOB

pub fn beevt(&self) -> BEEVT_R[src]

Bits 28:29 - External Event Effect on TIOB

pub fn bswtrg(&self) -> BSWTRG_R[src]

Bits 30:31 - Software Trigger Effect on TIOB

impl R<u32, Reg<u32, _SMMR2>>[src]

pub fn gcen(&self) -> GCEN_R[src]

Bit 0 - Gray Count Enable

pub fn down(&self) -> DOWN_R[src]

Bit 1 - Down Count

impl R<u32, Reg<u32, _CV2>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:31 - Counter Value

impl R<u32, Reg<u32, _RA2>>[src]

pub fn ra(&self) -> RA_R[src]

Bits 0:31 - Register A

impl R<u32, Reg<u32, _RB2>>[src]

pub fn rb(&self) -> RB_R[src]

Bits 0:31 - Register B

impl R<u32, Reg<u32, _RC2>>[src]

pub fn rc(&self) -> RC_R[src]

Bits 0:31 - Register C

impl R<u32, Reg<u32, _SR2>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow Status (cleared on read)

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun Status (cleared on read)

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare Status (cleared on read)

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare Status (cleared on read)

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare Status (cleared on read)

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading Status (cleared on read)

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading Status (cleared on read)

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger Status (cleared on read)

pub fn clksta(&self) -> CLKSTA_R[src]

Bit 16 - Clock Enabling Status

pub fn mtioa(&self) -> MTIOA_R[src]

Bit 17 - TIOA Mirror

pub fn mtiob(&self) -> MTIOB_R[src]

Bit 18 - TIOB Mirror

impl R<u32, Reg<u32, _IMR2>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger

impl R<u8, TC0XC0S_A>[src]

pub fn variant(&self) -> Variant<u8, TC0XC0S_A>[src]

Get enumerated values variant

pub fn is_tclk0(&self) -> bool[src]

Checks if the value of the field is TCLK0

pub fn is_tioa1(&self) -> bool[src]

Checks if the value of the field is TIOA1

pub fn is_tioa2(&self) -> bool[src]

Checks if the value of the field is TIOA2

impl R<u8, TC1XC1S_A>[src]

pub fn variant(&self) -> Variant<u8, TC1XC1S_A>[src]

Get enumerated values variant

pub fn is_tclk1(&self) -> bool[src]

Checks if the value of the field is TCLK1

pub fn is_tioa0(&self) -> bool[src]

Checks if the value of the field is TIOA0

pub fn is_tioa2(&self) -> bool[src]

Checks if the value of the field is TIOA2

impl R<u8, TC2XC2S_A>[src]

pub fn variant(&self) -> Variant<u8, TC2XC2S_A>[src]

Get enumerated values variant

pub fn is_tclk2(&self) -> bool[src]

Checks if the value of the field is TCLK2

pub fn is_tioa0(&self) -> bool[src]

Checks if the value of the field is TIOA0

pub fn is_tioa1(&self) -> bool[src]

Checks if the value of the field is TIOA1

impl R<u32, Reg<u32, _BMR>>[src]

pub fn tc0xc0s(&self) -> TC0XC0S_R[src]

Bits 0:1 - External Clock Signal 0 Selection

pub fn tc1xc1s(&self) -> TC1XC1S_R[src]

Bits 2:3 - External Clock Signal 1 Selection

pub fn tc2xc2s(&self) -> TC2XC2S_R[src]

Bits 4:5 - External Clock Signal 2 Selection

pub fn qden(&self) -> QDEN_R[src]

Bit 8 - Quadrature Decoder Enabled

pub fn posen(&self) -> POSEN_R[src]

Bit 9 - Position Enabled

pub fn speeden(&self) -> SPEEDEN_R[src]

Bit 10 - Speed Enabled

pub fn qdtrans(&self) -> QDTRANS_R[src]

Bit 11 - Quadrature Decoding Transparent

pub fn edgpha(&self) -> EDGPHA_R[src]

Bit 12 - Edge on PHA Count Mode

pub fn inva(&self) -> INVA_R[src]

Bit 13 - Inverted PHA

pub fn invb(&self) -> INVB_R[src]

Bit 14 - Inverted PHB

pub fn invidx(&self) -> INVIDX_R[src]

Bit 15 - Inverted Index

pub fn swap(&self) -> SWAP_R[src]

Bit 16 - Swap PHA and PHB

pub fn idxphb(&self) -> IDXPHB_R[src]

Bit 17 - Index Pin is PHB Pin

pub fn maxfilt(&self) -> MAXFILT_R[src]

Bits 20:25 - Maximum Filter

impl R<u32, Reg<u32, _QIMR>>[src]

pub fn idx(&self) -> IDX_R[src]

Bit 0 - Index

pub fn dirchg(&self) -> DIRCHG_R[src]

Bit 1 - Direction Change

pub fn qerr(&self) -> QERR_R[src]

Bit 2 - Quadrature Error

impl R<u32, Reg<u32, _QISR>>[src]

pub fn idx(&self) -> IDX_R[src]

Bit 0 - Index

pub fn dirchg(&self) -> DIRCHG_R[src]

Bit 1 - Direction Change

pub fn qerr(&self) -> QERR_R[src]

Bit 2 - Quadrature Error

pub fn dir(&self) -> DIR_R[src]

Bit 8 - Direction

impl R<u32, Reg<u32, _FMR>>[src]

pub fn encf0(&self) -> ENCF0_R[src]

Bit 0 - Enable Compare Fault Channel 0

pub fn encf1(&self) -> ENCF1_R[src]

Bit 1 - Enable Compare Fault Channel 1

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u8, IADRSZ_A>[src]

pub fn variant(&self) -> IADRSZ_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_1_byte(&self) -> bool[src]

Checks if the value of the field is _1_BYTE

pub fn is_2_byte(&self) -> bool[src]

Checks if the value of the field is _2_BYTE

pub fn is_3_byte(&self) -> bool[src]

Checks if the value of the field is _3_BYTE

impl R<u32, Reg<u32, _MMR>>[src]

pub fn iadrsz(&self) -> IADRSZ_R[src]

Bits 8:9 - Internal Device Address Size

pub fn mread(&self) -> MREAD_R[src]

Bit 12 - Master Read Direction

pub fn dadr(&self) -> DADR_R[src]

Bits 16:22 - Device Address

impl R<u32, Reg<u32, _SMR>>[src]

pub fn sadr(&self) -> SADR_R[src]

Bits 16:22 - Slave Address

impl R<u32, Reg<u32, _IADR>>[src]

pub fn iadr(&self) -> IADR_R[src]

Bits 0:23 - Internal Address

impl R<u32, Reg<u32, _CWGR>>[src]

pub fn cldiv(&self) -> CLDIV_R[src]

Bits 0:7 - Clock Low Divider

pub fn chdiv(&self) -> CHDIV_R[src]

Bits 8:15 - Clock High Divider

pub fn ckdiv(&self) -> CKDIV_R[src]

Bits 16:18 - Clock Divider

impl R<u32, Reg<u32, _SR>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Transmission Completed (cleared by writing TWI_THR)

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receive Holding Register Ready (cleared by reading TWI_RHR)

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 2 - Transmit Holding Register Ready (cleared by writing TWI_THR)

pub fn svread(&self) -> SVREAD_R[src]

Bit 3 - Slave Read

pub fn svacc(&self) -> SVACC_R[src]

Bit 4 - Slave Access

pub fn gacc(&self) -> GACC_R[src]

Bit 5 - General Call Access (cleared on read)

pub fn ovre(&self) -> OVRE_R[src]

Bit 6 - Overrun Error (cleared on read)

pub fn nack(&self) -> NACK_R[src]

Bit 8 - Not Acknowledged (cleared on read)

pub fn arblst(&self) -> ARBLST_R[src]

Bit 9 - Arbitration Lost (cleared on read)

pub fn sclws(&self) -> SCLWS_R[src]

Bit 10 - Clock Wait State

pub fn eosacc(&self) -> EOSACC_R[src]

Bit 11 - End Of Slave Access (cleared on read)

pub fn endrx(&self) -> ENDRX_R[src]

Bit 12 - End of RX buffer (cleared by writing TWI_RCR or TWI_RNCR)

pub fn endtx(&self) -> ENDTX_R[src]

Bit 13 - End of TX buffer (cleared by writing TWI_TCR or TWI_TNCR)

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 14 - RX Buffer Full (cleared by writing TWI_RCR or TWI_RNCR)

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 15 - TX Buffer Empty (cleared by writing TWI_TCR or TWI_TNCR)

impl R<u32, Reg<u32, _IMR>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Transmission Completed Interrupt Mask

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receive Holding Register Ready Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 2 - Transmit Holding Register Ready Interrupt Mask

pub fn svacc(&self) -> SVACC_R[src]

Bit 4 - Slave Access Interrupt Mask

pub fn gacc(&self) -> GACC_R[src]

Bit 5 - General Call Access Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 6 - Overrun Error Interrupt Mask

pub fn nack(&self) -> NACK_R[src]

Bit 8 - Not Acknowledge Interrupt Mask

pub fn arblst(&self) -> ARBLST_R[src]

Bit 9 - Arbitration Lost Interrupt Mask

pub fn scl_ws(&self) -> SCL_WS_R[src]

Bit 10 - Clock Wait State Interrupt Mask

pub fn eosacc(&self) -> EOSACC_R[src]

Bit 11 - End Of Slave Access Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 12 - End of Receive Buffer Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 13 - End of Transmit Buffer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 14 - Receive Buffer Full Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 15 - Transmit Buffer Empty Interrupt Mask

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxdata(&self) -> RXDATA_R[src]

Bits 0:7 - Master or Slave Receive Holding Data

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, IADRSZ_A>[src]

pub fn variant(&self) -> IADRSZ_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_1_byte(&self) -> bool[src]

Checks if the value of the field is _1_BYTE

pub fn is_2_byte(&self) -> bool[src]

Checks if the value of the field is _2_BYTE

pub fn is_3_byte(&self) -> bool[src]

Checks if the value of the field is _3_BYTE

impl R<u32, Reg<u32, _MMR>>[src]

pub fn iadrsz(&self) -> IADRSZ_R[src]

Bits 8:9 - Internal Device Address Size

pub fn mread(&self) -> MREAD_R[src]

Bit 12 - Master Read Direction

pub fn dadr(&self) -> DADR_R[src]

Bits 16:22 - Device Address

impl R<u32, Reg<u32, _SMR>>[src]

pub fn sadr(&self) -> SADR_R[src]

Bits 16:22 - Slave Address

impl R<u32, Reg<u32, _IADR>>[src]

pub fn iadr(&self) -> IADR_R[src]

Bits 0:23 - Internal Address

impl R<u32, Reg<u32, _CWGR>>[src]

pub fn cldiv(&self) -> CLDIV_R[src]

Bits 0:7 - Clock Low Divider

pub fn chdiv(&self) -> CHDIV_R[src]

Bits 8:15 - Clock High Divider

pub fn ckdiv(&self) -> CKDIV_R[src]

Bits 16:18 - Clock Divider

impl R<u32, Reg<u32, _SR>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Transmission Completed (cleared by writing TWI_THR)

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receive Holding Register Ready (cleared by reading TWI_RHR)

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 2 - Transmit Holding Register Ready (cleared by writing TWI_THR)

pub fn svread(&self) -> SVREAD_R[src]

Bit 3 - Slave Read

pub fn svacc(&self) -> SVACC_R[src]

Bit 4 - Slave Access

pub fn gacc(&self) -> GACC_R[src]

Bit 5 - General Call Access (cleared on read)

pub fn ovre(&self) -> OVRE_R[src]

Bit 6 - Overrun Error (cleared on read)

pub fn nack(&self) -> NACK_R[src]

Bit 8 - Not Acknowledged (cleared on read)

pub fn arblst(&self) -> ARBLST_R[src]

Bit 9 - Arbitration Lost (cleared on read)

pub fn sclws(&self) -> SCLWS_R[src]

Bit 10 - Clock Wait State

pub fn eosacc(&self) -> EOSACC_R[src]

Bit 11 - End Of Slave Access (cleared on read)

pub fn endrx(&self) -> ENDRX_R[src]

Bit 12 - End of RX buffer (cleared by writing TWI_RCR or TWI_RNCR)

pub fn endtx(&self) -> ENDTX_R[src]

Bit 13 - End of TX buffer (cleared by writing TWI_TCR or TWI_TNCR)

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 14 - RX Buffer Full (cleared by writing TWI_RCR or TWI_RNCR)

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 15 - TX Buffer Empty (cleared by writing TWI_TCR or TWI_TNCR)

impl R<u32, Reg<u32, _IMR>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Transmission Completed Interrupt Mask

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receive Holding Register Ready Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 2 - Transmit Holding Register Ready Interrupt Mask

pub fn svacc(&self) -> SVACC_R[src]

Bit 4 - Slave Access Interrupt Mask

pub fn gacc(&self) -> GACC_R[src]

Bit 5 - General Call Access Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 6 - Overrun Error Interrupt Mask

pub fn nack(&self) -> NACK_R[src]

Bit 8 - Not Acknowledge Interrupt Mask

pub fn arblst(&self) -> ARBLST_R[src]

Bit 9 - Arbitration Lost Interrupt Mask

pub fn scl_ws(&self) -> SCL_WS_R[src]

Bit 10 - Clock Wait State Interrupt Mask

pub fn eosacc(&self) -> EOSACC_R[src]

Bit 11 - End Of Slave Access Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 12 - End of Receive Buffer Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 13 - End of Transmit Buffer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 14 - Receive Buffer Full Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 15 - Transmit Buffer Empty Interrupt Mask

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxdata(&self) -> RXDATA_R[src]

Bits 0:7 - Master or Slave Receive Holding Data

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, DIVA_A>[src]

pub fn variant(&self) -> Variant<u8, DIVA_A>[src]

Get enumerated values variant

pub fn is_clka_poff(&self) -> bool[src]

Checks if the value of the field is CLKA_POFF

pub fn is_prea(&self) -> bool[src]

Checks if the value of the field is PREA

impl R<u8, PREA_A>[src]

pub fn variant(&self) -> Variant<u8, PREA_A>[src]

Get enumerated values variant

pub fn is_clk(&self) -> bool[src]

Checks if the value of the field is CLK

pub fn is_clk_div2(&self) -> bool[src]

Checks if the value of the field is CLK_DIV2

pub fn is_clk_div4(&self) -> bool[src]

Checks if the value of the field is CLK_DIV4

pub fn is_clk_div8(&self) -> bool[src]

Checks if the value of the field is CLK_DIV8

pub fn is_clk_div16(&self) -> bool[src]

Checks if the value of the field is CLK_DIV16

pub fn is_clk_div32(&self) -> bool[src]

Checks if the value of the field is CLK_DIV32

pub fn is_clk_div64(&self) -> bool[src]

Checks if the value of the field is CLK_DIV64

pub fn is_clk_div128(&self) -> bool[src]

Checks if the value of the field is CLK_DIV128

pub fn is_clk_div256(&self) -> bool[src]

Checks if the value of the field is CLK_DIV256

pub fn is_clk_div512(&self) -> bool[src]

Checks if the value of the field is CLK_DIV512

pub fn is_clk_div1024(&self) -> bool[src]

Checks if the value of the field is CLK_DIV1024

impl R<u8, DIVB_A>[src]

pub fn variant(&self) -> Variant<u8, DIVB_A>[src]

Get enumerated values variant

pub fn is_clkb_poff(&self) -> bool[src]

Checks if the value of the field is CLKB_POFF

pub fn is_preb(&self) -> bool[src]

Checks if the value of the field is PREB

impl R<u8, PREB_A>[src]

pub fn variant(&self) -> Variant<u8, PREB_A>[src]

Get enumerated values variant

pub fn is_clk(&self) -> bool[src]

Checks if the value of the field is CLK

pub fn is_clk_div2(&self) -> bool[src]

Checks if the value of the field is CLK_DIV2

pub fn is_clk_div4(&self) -> bool[src]

Checks if the value of the field is CLK_DIV4

pub fn is_clk_div8(&self) -> bool[src]

Checks if the value of the field is CLK_DIV8

pub fn is_clk_div16(&self) -> bool[src]

Checks if the value of the field is CLK_DIV16

pub fn is_clk_div32(&self) -> bool[src]

Checks if the value of the field is CLK_DIV32

pub fn is_clk_div64(&self) -> bool[src]

Checks if the value of the field is CLK_DIV64

pub fn is_clk_div128(&self) -> bool[src]

Checks if the value of the field is CLK_DIV128

pub fn is_clk_div256(&self) -> bool[src]

Checks if the value of the field is CLK_DIV256

pub fn is_clk_div512(&self) -> bool[src]

Checks if the value of the field is CLK_DIV512

pub fn is_clk_div1024(&self) -> bool[src]

Checks if the value of the field is CLK_DIV1024

impl R<u32, Reg<u32, _CLK>>[src]

pub fn diva(&self) -> DIVA_R[src]

Bits 0:7 - CLKA Divide Factor

pub fn prea(&self) -> PREA_R[src]

Bits 8:11 - CLKA Source Clock Selection

pub fn divb(&self) -> DIVB_R[src]

Bits 16:23 - CLKB Divide Factor

pub fn preb(&self) -> PREB_R[src]

Bits 24:27 - CLKB Source Clock Selection

impl R<u32, Reg<u32, _SR>>[src]

pub fn chid0(&self) -> CHID0_R[src]

Bit 0 - Channel ID

pub fn chid1(&self) -> CHID1_R[src]

Bit 1 - Channel ID

pub fn chid2(&self) -> CHID2_R[src]

Bit 2 - Channel ID

pub fn chid3(&self) -> CHID3_R[src]

Bit 3 - Channel ID

impl R<u32, Reg<u32, _IMR1>>[src]

pub fn chid0(&self) -> CHID0_R[src]

Bit 0 - Counter Event on Channel 0 Interrupt Mask

pub fn chid1(&self) -> CHID1_R[src]

Bit 1 - Counter Event on Channel 1 Interrupt Mask

pub fn chid2(&self) -> CHID2_R[src]

Bit 2 - Counter Event on Channel 2 Interrupt Mask

pub fn chid3(&self) -> CHID3_R[src]

Bit 3 - Counter Event on Channel 3 Interrupt Mask

pub fn fchid0(&self) -> FCHID0_R[src]

Bit 16 - Fault Protection Trigger on Channel 0 Interrupt Mask

pub fn fchid1(&self) -> FCHID1_R[src]

Bit 17 - Fault Protection Trigger on Channel 1 Interrupt Mask

pub fn fchid2(&self) -> FCHID2_R[src]

Bit 18 - Fault Protection Trigger on Channel 2 Interrupt Mask

pub fn fchid3(&self) -> FCHID3_R[src]

Bit 19 - Fault Protection Trigger on Channel 3 Interrupt Mask

impl R<u32, Reg<u32, _ISR1>>[src]

pub fn chid0(&self) -> CHID0_R[src]

Bit 0 - Counter Event on Channel 0

pub fn chid1(&self) -> CHID1_R[src]

Bit 1 - Counter Event on Channel 1

pub fn chid2(&self) -> CHID2_R[src]

Bit 2 - Counter Event on Channel 2

pub fn chid3(&self) -> CHID3_R[src]

Bit 3 - Counter Event on Channel 3

pub fn fchid0(&self) -> FCHID0_R[src]

Bit 16 - Fault Protection Trigger on Channel 0

pub fn fchid1(&self) -> FCHID1_R[src]

Bit 17 - Fault Protection Trigger on Channel 1

pub fn fchid2(&self) -> FCHID2_R[src]

Bit 18 - Fault Protection Trigger on Channel 2

pub fn fchid3(&self) -> FCHID3_R[src]

Bit 19 - Fault Protection Trigger on Channel 3

impl R<u8, UPDM_A>[src]

pub fn variant(&self) -> Variant<u8, UPDM_A>[src]

Get enumerated values variant

pub fn is_mode0(&self) -> bool[src]

Checks if the value of the field is MODE0

pub fn is_mode1(&self) -> bool[src]

Checks if the value of the field is MODE1

pub fn is_mode2(&self) -> bool[src]

Checks if the value of the field is MODE2

impl R<u32, Reg<u32, _SCM>>[src]

pub fn sync0(&self) -> SYNC0_R[src]

Bit 0 - Synchronous Channel 0

pub fn sync1(&self) -> SYNC1_R[src]

Bit 1 - Synchronous Channel 1

pub fn sync2(&self) -> SYNC2_R[src]

Bit 2 - Synchronous Channel 2

pub fn sync3(&self) -> SYNC3_R[src]

Bit 3 - Synchronous Channel 3

pub fn updm(&self) -> UPDM_R[src]

Bits 16:17 - Synchronous Channels Update Mode

pub fn ptrm(&self) -> PTRM_R[src]

Bit 20 - Peripheral DMA Controller Transfer Request Mode

pub fn ptrcs(&self) -> PTRCS_R[src]

Bits 21:23 - Peripheral DMA Controller Transfer Request Comparison Selection

impl R<u32, Reg<u32, _SCUC>>[src]

pub fn updulock(&self) -> UPDULOCK_R[src]

Bit 0 - Synchronous Channels Update Unlock

impl R<u32, Reg<u32, _SCUP>>[src]

pub fn upr(&self) -> UPR_R[src]

Bits 0:3 - Update Period

pub fn uprcnt(&self) -> UPRCNT_R[src]

Bits 4:7 - Update Period Counter

impl R<u32, Reg<u32, _IMR2>>[src]

pub fn wrdy(&self) -> WRDY_R[src]

Bit 0 - Write Ready for Synchronous Channels Update Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 1 - PDC End of TX Buffer Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 2 - PDC TX Buffer Empty Interrupt Mask

pub fn unre(&self) -> UNRE_R[src]

Bit 3 - Synchronous Channels Update Underrun Error Interrupt Mask

pub fn cmpm0(&self) -> CMPM0_R[src]

Bit 8 - Comparison 0 Match Interrupt Mask

pub fn cmpm1(&self) -> CMPM1_R[src]

Bit 9 - Comparison 1 Match Interrupt Mask

pub fn cmpm2(&self) -> CMPM2_R[src]

Bit 10 - Comparison 2 Match Interrupt Mask

pub fn cmpm3(&self) -> CMPM3_R[src]

Bit 11 - Comparison 3 Match Interrupt Mask

pub fn cmpm4(&self) -> CMPM4_R[src]

Bit 12 - Comparison 4 Match Interrupt Mask

pub fn cmpm5(&self) -> CMPM5_R[src]

Bit 13 - Comparison 5 Match Interrupt Mask

pub fn cmpm6(&self) -> CMPM6_R[src]

Bit 14 - Comparison 6 Match Interrupt Mask

pub fn cmpm7(&self) -> CMPM7_R[src]

Bit 15 - Comparison 7 Match Interrupt Mask

pub fn cmpu0(&self) -> CMPU0_R[src]

Bit 16 - Comparison 0 Update Interrupt Mask

pub fn cmpu1(&self) -> CMPU1_R[src]

Bit 17 - Comparison 1 Update Interrupt Mask

pub fn cmpu2(&self) -> CMPU2_R[src]

Bit 18 - Comparison 2 Update Interrupt Mask

pub fn cmpu3(&self) -> CMPU3_R[src]

Bit 19 - Comparison 3 Update Interrupt Mask

pub fn cmpu4(&self) -> CMPU4_R[src]

Bit 20 - Comparison 4 Update Interrupt Mask

pub fn cmpu5(&self) -> CMPU5_R[src]

Bit 21 - Comparison 5 Update Interrupt Mask

pub fn cmpu6(&self) -> CMPU6_R[src]

Bit 22 - Comparison 6 Update Interrupt Mask

pub fn cmpu7(&self) -> CMPU7_R[src]

Bit 23 - Comparison 7 Update Interrupt Mask

impl R<u32, Reg<u32, _ISR2>>[src]

pub fn wrdy(&self) -> WRDY_R[src]

Bit 0 - Write Ready for Synchronous Channels Update

pub fn endtx(&self) -> ENDTX_R[src]

Bit 1 - PDC End of TX Buffer

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 2 - PDC TX Buffer Empty

pub fn unre(&self) -> UNRE_R[src]

Bit 3 - Synchronous Channels Update Underrun Error

pub fn cmpm0(&self) -> CMPM0_R[src]

Bit 8 - Comparison 0 Match

pub fn cmpm1(&self) -> CMPM1_R[src]

Bit 9 - Comparison 1 Match

pub fn cmpm2(&self) -> CMPM2_R[src]

Bit 10 - Comparison 2 Match

pub fn cmpm3(&self) -> CMPM3_R[src]

Bit 11 - Comparison 3 Match

pub fn cmpm4(&self) -> CMPM4_R[src]

Bit 12 - Comparison 4 Match

pub fn cmpm5(&self) -> CMPM5_R[src]

Bit 13 - Comparison 5 Match

pub fn cmpm6(&self) -> CMPM6_R[src]

Bit 14 - Comparison 6 Match

pub fn cmpm7(&self) -> CMPM7_R[src]

Bit 15 - Comparison 7 Match

pub fn cmpu0(&self) -> CMPU0_R[src]

Bit 16 - Comparison 0 Update

pub fn cmpu1(&self) -> CMPU1_R[src]

Bit 17 - Comparison 1 Update

pub fn cmpu2(&self) -> CMPU2_R[src]

Bit 18 - Comparison 2 Update

pub fn cmpu3(&self) -> CMPU3_R[src]

Bit 19 - Comparison 3 Update

pub fn cmpu4(&self) -> CMPU4_R[src]

Bit 20 - Comparison 4 Update

pub fn cmpu5(&self) -> CMPU5_R[src]

Bit 21 - Comparison 5 Update

pub fn cmpu6(&self) -> CMPU6_R[src]

Bit 22 - Comparison 6 Update

pub fn cmpu7(&self) -> CMPU7_R[src]

Bit 23 - Comparison 7 Update

impl R<u32, Reg<u32, _OOV>>[src]

pub fn oovh0(&self) -> OOVH0_R[src]

Bit 0 - Output Override Value for PWMH output of the channel 0

pub fn oovh1(&self) -> OOVH1_R[src]

Bit 1 - Output Override Value for PWMH output of the channel 1

pub fn oovh2(&self) -> OOVH2_R[src]

Bit 2 - Output Override Value for PWMH output of the channel 2

pub fn oovh3(&self) -> OOVH3_R[src]

Bit 3 - Output Override Value for PWMH output of the channel 3

pub fn oovl0(&self) -> OOVL0_R[src]

Bit 16 - Output Override Value for PWML output of the channel 0

pub fn oovl1(&self) -> OOVL1_R[src]

Bit 17 - Output Override Value for PWML output of the channel 1

pub fn oovl2(&self) -> OOVL2_R[src]

Bit 18 - Output Override Value for PWML output of the channel 2

pub fn oovl3(&self) -> OOVL3_R[src]

Bit 19 - Output Override Value for PWML output of the channel 3

impl R<u32, Reg<u32, _OS>>[src]

pub fn osh0(&self) -> OSH0_R[src]

Bit 0 - Output Selection for PWMH output of the channel 0

pub fn osh1(&self) -> OSH1_R[src]

Bit 1 - Output Selection for PWMH output of the channel 1

pub fn osh2(&self) -> OSH2_R[src]

Bit 2 - Output Selection for PWMH output of the channel 2

pub fn osh3(&self) -> OSH3_R[src]

Bit 3 - Output Selection for PWMH output of the channel 3

pub fn osl0(&self) -> OSL0_R[src]

Bit 16 - Output Selection for PWML output of the channel 0

pub fn osl1(&self) -> OSL1_R[src]

Bit 17 - Output Selection for PWML output of the channel 1

pub fn osl2(&self) -> OSL2_R[src]

Bit 18 - Output Selection for PWML output of the channel 2

pub fn osl3(&self) -> OSL3_R[src]

Bit 19 - Output Selection for PWML output of the channel 3

impl R<u32, Reg<u32, _FMR>>[src]

pub fn fpol(&self) -> FPOL_R[src]

Bits 0:7 - Fault Polarity

pub fn fmod(&self) -> FMOD_R[src]

Bits 8:15 - Fault Activation Mode

pub fn ffil(&self) -> FFIL_R[src]

Bits 16:23 - Fault Filtering

impl R<u32, Reg<u32, _FSR>>[src]

pub fn fiv(&self) -> FIV_R[src]

Bits 0:7 - Fault Input Value

pub fn fs(&self) -> FS_R[src]

Bits 8:15 - Fault Status

impl R<u32, Reg<u32, _FPV>>[src]

pub fn fpvh0(&self) -> FPVH0_R[src]

Bit 0 - Fault Protection Value for PWMH output on channel 0

pub fn fpvh1(&self) -> FPVH1_R[src]

Bit 1 - Fault Protection Value for PWMH output on channel 1

pub fn fpvh2(&self) -> FPVH2_R[src]

Bit 2 - Fault Protection Value for PWMH output on channel 2

pub fn fpvh3(&self) -> FPVH3_R[src]

Bit 3 - Fault Protection Value for PWMH output on channel 3

pub fn fpvl0(&self) -> FPVL0_R[src]

Bit 16 - Fault Protection Value for PWML output on channel 0

pub fn fpvl1(&self) -> FPVL1_R[src]

Bit 17 - Fault Protection Value for PWML output on channel 1

pub fn fpvl2(&self) -> FPVL2_R[src]

Bit 18 - Fault Protection Value for PWML output on channel 2

pub fn fpvl3(&self) -> FPVL3_R[src]

Bit 19 - Fault Protection Value for PWML output on channel 3

impl R<u32, Reg<u32, _FPE>>[src]

pub fn fpe0(&self) -> FPE0_R[src]

Bits 0:7 - Fault Protection Enable for channel 0

pub fn fpe1(&self) -> FPE1_R[src]

Bits 8:15 - Fault Protection Enable for channel 1

pub fn fpe2(&self) -> FPE2_R[src]

Bits 16:23 - Fault Protection Enable for channel 2

pub fn fpe3(&self) -> FPE3_R[src]

Bits 24:31 - Fault Protection Enable for channel 3

impl R<u32, Reg<u32, _ELMR>>[src]

pub fn csel0(&self) -> CSEL0_R[src]

Bit 0 - Comparison 0 Selection

pub fn csel1(&self) -> CSEL1_R[src]

Bit 1 - Comparison 1 Selection

pub fn csel2(&self) -> CSEL2_R[src]

Bit 2 - Comparison 2 Selection

pub fn csel3(&self) -> CSEL3_R[src]

Bit 3 - Comparison 3 Selection

pub fn csel4(&self) -> CSEL4_R[src]

Bit 4 - Comparison 4 Selection

pub fn csel5(&self) -> CSEL5_R[src]

Bit 5 - Comparison 5 Selection

pub fn csel6(&self) -> CSEL6_R[src]

Bit 6 - Comparison 6 Selection

pub fn csel7(&self) -> CSEL7_R[src]

Bit 7 - Comparison 7 Selection

impl R<u32, Reg<u32, _SMMR>>[src]

pub fn gcen0(&self) -> GCEN0_R[src]

Bit 0 - Gray Count ENable

pub fn gcen1(&self) -> GCEN1_R[src]

Bit 1 - Gray Count ENable

pub fn down0(&self) -> DOWN0_R[src]

Bit 16 - DOWN Count

pub fn down1(&self) -> DOWN1_R[src]

Bit 17 - DOWN Count

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpsws0(&self) -> WPSWS0_R[src]

Bit 0 - Write Protect SW Status

pub fn wpsws1(&self) -> WPSWS1_R[src]

Bit 1 - Write Protect SW Status

pub fn wpsws2(&self) -> WPSWS2_R[src]

Bit 2 - Write Protect SW Status

pub fn wpsws3(&self) -> WPSWS3_R[src]

Bit 3 - Write Protect SW Status

pub fn wpsws4(&self) -> WPSWS4_R[src]

Bit 4 - Write Protect SW Status

pub fn wpsws5(&self) -> WPSWS5_R[src]

Bit 5 - Write Protect SW Status

pub fn wpvs(&self) -> WPVS_R[src]

Bit 7 - Write Protect Violation Status

pub fn wphws0(&self) -> WPHWS0_R[src]

Bit 8 - Write Protect HW Status

pub fn wphws1(&self) -> WPHWS1_R[src]

Bit 9 - Write Protect HW Status

pub fn wphws2(&self) -> WPHWS2_R[src]

Bit 10 - Write Protect HW Status

pub fn wphws3(&self) -> WPHWS3_R[src]

Bit 11 - Write Protect HW Status

pub fn wphws4(&self) -> WPHWS4_R[src]

Bit 12 - Write Protect HW Status

pub fn wphws5(&self) -> WPHWS5_R[src]

Bit 13 - Write Protect HW Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 16:31 - Write Protect Violation Source

impl R<u32, Reg<u32, _CMPV0>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM0>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV1>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV2>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM2>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV3>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM3>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV4>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM4>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV5>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM5>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV6>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM6>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV7>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM7>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u8, CPRE_A>[src]

pub fn variant(&self) -> Variant<u8, CPRE_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_mck_div_2(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_2

pub fn is_mck_div_4(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_4

pub fn is_mck_div_8(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_8

pub fn is_mck_div_16(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_16

pub fn is_mck_div_32(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_32

pub fn is_mck_div_64(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_64

pub fn is_mck_div_128(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_128

pub fn is_mck_div_256(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_256

pub fn is_mck_div_512(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_512

pub fn is_mck_div_1024(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_1024

pub fn is_clka(&self) -> bool[src]

Checks if the value of the field is CLKA

pub fn is_clkb(&self) -> bool[src]

Checks if the value of the field is CLKB

impl R<u32, Reg<u32, _CMR0>>[src]

pub fn cpre(&self) -> CPRE_R[src]

Bits 0:3 - Channel Pre-scaler

pub fn calg(&self) -> CALG_R[src]

Bit 8 - Channel Alignment

pub fn cpol(&self) -> CPOL_R[src]

Bit 9 - Channel Polarity

pub fn ces(&self) -> CES_R[src]

Bit 10 - Counter Event Selection

pub fn dte(&self) -> DTE_R[src]

Bit 16 - Dead-Time Generator Enable

pub fn dthi(&self) -> DTHI_R[src]

Bit 17 - Dead-Time PWMHx Output Inverted

pub fn dtli(&self) -> DTLI_R[src]

Bit 18 - Dead-Time PWMLx Output Inverted

impl R<u32, Reg<u32, _CDTY0>>[src]

pub fn cdty(&self) -> CDTY_R[src]

Bits 0:23 - Channel Duty-Cycle

impl R<u32, Reg<u32, _CPRD0>>[src]

pub fn cprd(&self) -> CPRD_R[src]

Bits 0:23 - Channel Period

impl R<u32, Reg<u32, _CCNT0>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:23 - Channel Counter Register

impl R<u32, Reg<u32, _DT0>>[src]

pub fn dth(&self) -> DTH_R[src]

Bits 0:15 - Dead-Time Value for PWMHx Output

pub fn dtl(&self) -> DTL_R[src]

Bits 16:31 - Dead-Time Value for PWMLx Output

impl R<u8, CPRE_A>[src]

pub fn variant(&self) -> Variant<u8, CPRE_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_mck_div_2(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_2

pub fn is_mck_div_4(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_4

pub fn is_mck_div_8(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_8

pub fn is_mck_div_16(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_16

pub fn is_mck_div_32(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_32

pub fn is_mck_div_64(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_64

pub fn is_mck_div_128(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_128

pub fn is_mck_div_256(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_256

pub fn is_mck_div_512(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_512

pub fn is_mck_div_1024(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_1024

pub fn is_clka(&self) -> bool[src]

Checks if the value of the field is CLKA

pub fn is_clkb(&self) -> bool[src]

Checks if the value of the field is CLKB

impl R<u32, Reg<u32, _CMR1>>[src]

pub fn cpre(&self) -> CPRE_R[src]

Bits 0:3 - Channel Pre-scaler

pub fn calg(&self) -> CALG_R[src]

Bit 8 - Channel Alignment

pub fn cpol(&self) -> CPOL_R[src]

Bit 9 - Channel Polarity

pub fn ces(&self) -> CES_R[src]

Bit 10 - Counter Event Selection

pub fn dte(&self) -> DTE_R[src]

Bit 16 - Dead-Time Generator Enable

pub fn dthi(&self) -> DTHI_R[src]

Bit 17 - Dead-Time PWMHx Output Inverted

pub fn dtli(&self) -> DTLI_R[src]

Bit 18 - Dead-Time PWMLx Output Inverted

impl R<u32, Reg<u32, _CDTY1>>[src]

pub fn cdty(&self) -> CDTY_R[src]

Bits 0:23 - Channel Duty-Cycle

impl R<u32, Reg<u32, _CPRD1>>[src]

pub fn cprd(&self) -> CPRD_R[src]

Bits 0:23 - Channel Period

impl R<u32, Reg<u32, _CCNT1>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:23 - Channel Counter Register

impl R<u32, Reg<u32, _DT1>>[src]

pub fn dth(&self) -> DTH_R[src]

Bits 0:15 - Dead-Time Value for PWMHx Output

pub fn dtl(&self) -> DTL_R[src]

Bits 16:31 - Dead-Time Value for PWMLx Output

impl R<u8, CPRE_A>[src]

pub fn variant(&self) -> Variant<u8, CPRE_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_mck_div_2(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_2

pub fn is_mck_div_4(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_4

pub fn is_mck_div_8(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_8

pub fn is_mck_div_16(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_16

pub fn is_mck_div_32(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_32

pub fn is_mck_div_64(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_64

pub fn is_mck_div_128(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_128

pub fn is_mck_div_256(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_256

pub fn is_mck_div_512(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_512

pub fn is_mck_div_1024(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_1024

pub fn is_clka(&self) -> bool[src]

Checks if the value of the field is CLKA

pub fn is_clkb(&self) -> bool[src]

Checks if the value of the field is CLKB

impl R<u32, Reg<u32, _CMR2>>[src]

pub fn cpre(&self) -> CPRE_R[src]

Bits 0:3 - Channel Pre-scaler

pub fn calg(&self) -> CALG_R[src]

Bit 8 - Channel Alignment

pub fn cpol(&self) -> CPOL_R[src]

Bit 9 - Channel Polarity

pub fn ces(&self) -> CES_R[src]

Bit 10 - Counter Event Selection

pub fn dte(&self) -> DTE_R[src]

Bit 16 - Dead-Time Generator Enable

pub fn dthi(&self) -> DTHI_R[src]

Bit 17 - Dead-Time PWMHx Output Inverted

pub fn dtli(&self) -> DTLI_R[src]

Bit 18 - Dead-Time PWMLx Output Inverted

impl R<u32, Reg<u32, _CDTY2>>[src]

pub fn cdty(&self) -> CDTY_R[src]

Bits 0:23 - Channel Duty-Cycle

impl R<u32, Reg<u32, _CPRD2>>[src]

pub fn cprd(&self) -> CPRD_R[src]

Bits 0:23 - Channel Period

impl R<u32, Reg<u32, _CCNT2>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:23 - Channel Counter Register

impl R<u32, Reg<u32, _DT2>>[src]

pub fn dth(&self) -> DTH_R[src]

Bits 0:15 - Dead-Time Value for PWMHx Output

pub fn dtl(&self) -> DTL_R[src]

Bits 16:31 - Dead-Time Value for PWMLx Output

impl R<u8, CPRE_A>[src]

pub fn variant(&self) -> Variant<u8, CPRE_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_mck_div_2(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_2

pub fn is_mck_div_4(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_4

pub fn is_mck_div_8(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_8

pub fn is_mck_div_16(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_16

pub fn is_mck_div_32(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_32

pub fn is_mck_div_64(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_64

pub fn is_mck_div_128(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_128

pub fn is_mck_div_256(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_256

pub fn is_mck_div_512(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_512

pub fn is_mck_div_1024(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_1024

pub fn is_clka(&self) -> bool[src]

Checks if the value of the field is CLKA

pub fn is_clkb(&self) -> bool[src]

Checks if the value of the field is CLKB

impl R<u32, Reg<u32, _CMR3>>[src]

pub fn cpre(&self) -> CPRE_R[src]

Bits 0:3 - Channel Pre-scaler

pub fn calg(&self) -> CALG_R[src]

Bit 8 - Channel Alignment

pub fn cpol(&self) -> CPOL_R[src]

Bit 9 - Channel Polarity

pub fn ces(&self) -> CES_R[src]

Bit 10 - Counter Event Selection

pub fn dte(&self) -> DTE_R[src]

Bit 16 - Dead-Time Generator Enable

pub fn dthi(&self) -> DTHI_R[src]

Bit 17 - Dead-Time PWMHx Output Inverted

pub fn dtli(&self) -> DTLI_R[src]

Bit 18 - Dead-Time PWMLx Output Inverted

impl R<u32, Reg<u32, _CDTY3>>[src]

pub fn cdty(&self) -> CDTY_R[src]

Bits 0:23 - Channel Duty-Cycle

impl R<u32, Reg<u32, _CPRD3>>[src]

pub fn cprd(&self) -> CPRD_R[src]

Bits 0:23 - Channel Period

impl R<u32, Reg<u32, _CCNT3>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:23 - Channel Counter Register

impl R<u32, Reg<u32, _DT3>>[src]

pub fn dth(&self) -> DTH_R[src]

Bits 0:15 - Dead-Time Value for PWMHx Output

pub fn dtl(&self) -> DTL_R[src]

Bits 16:31 - Dead-Time Value for PWMLx Output

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, USART_MODE_A>[src]

pub fn variant(&self) -> Variant<u8, USART_MODE_A>[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_rs485(&self) -> bool[src]

Checks if the value of the field is RS485

pub fn is_hw_handshaking(&self) -> bool[src]

Checks if the value of the field is HW_HANDSHAKING

pub fn is_modem(&self) -> bool[src]

Checks if the value of the field is MODEM

pub fn is_is07816_t_0(&self) -> bool[src]

Checks if the value of the field is IS07816_T_0

pub fn is_is07816_t_1(&self) -> bool[src]

Checks if the value of the field is IS07816_T_1

pub fn is_irda(&self) -> bool[src]

Checks if the value of the field is IRDA

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

impl R<u8, USCLKS_A>[src]

pub fn variant(&self) -> Variant<u8, USCLKS_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_div(&self) -> bool[src]

Checks if the value of the field is DIV

pub fn is_sck(&self) -> bool[src]

Checks if the value of the field is SCK

impl R<u8, CHRL_A>[src]

pub fn variant(&self) -> CHRL_A[src]

Get enumerated values variant

pub fn is_5_bit(&self) -> bool[src]

Checks if the value of the field is _5_BIT

pub fn is_6_bit(&self) -> bool[src]

Checks if the value of the field is _6_BIT

pub fn is_7_bit(&self) -> bool[src]

Checks if the value of the field is _7_BIT

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

impl R<u8, PAR_A>[src]

pub fn variant(&self) -> Variant<u8, PAR_A>[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

pub fn is_space(&self) -> bool[src]

Checks if the value of the field is SPACE

pub fn is_mark(&self) -> bool[src]

Checks if the value of the field is MARK

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_multidrop(&self) -> bool[src]

Checks if the value of the field is MULTIDROP

impl R<u8, NBSTOP_A>[src]

pub fn variant(&self) -> Variant<u8, NBSTOP_A>[src]

Get enumerated values variant

pub fn is_1_bit(&self) -> bool[src]

Checks if the value of the field is _1_BIT

pub fn is_1_5_bit(&self) -> bool[src]

Checks if the value of the field is _1_5_BIT

pub fn is_2_bit(&self) -> bool[src]

Checks if the value of the field is _2_BIT

impl R<u8, CHMODE_A>[src]

pub fn variant(&self) -> CHMODE_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_automatic(&self) -> bool[src]

Checks if the value of the field is AUTOMATIC

pub fn is_local_loopback(&self) -> bool[src]

Checks if the value of the field is LOCAL_LOOPBACK

pub fn is_remote_loopback(&self) -> bool[src]

Checks if the value of the field is REMOTE_LOOPBACK

impl R<u32, Reg<u32, _MR>>[src]

pub fn usart_mode(&self) -> USART_MODE_R[src]

Bits 0:3 - USART Mode of Operation

pub fn usclks(&self) -> USCLKS_R[src]

Bits 4:5 - Clock Selection

pub fn chrl(&self) -> CHRL_R[src]

Bits 6:7 - Character Length

pub fn sync(&self) -> SYNC_R[src]

Bit 8 - Synchronous Mode Select

pub fn par(&self) -> PAR_R[src]

Bits 9:11 - Parity Type

pub fn nbstop(&self) -> NBSTOP_R[src]

Bits 12:13 - Number of Stop Bits

pub fn chmode(&self) -> CHMODE_R[src]

Bits 14:15 - Channel Mode

pub fn msbf(&self) -> MSBF_R[src]

Bit 16 - Bit Order

pub fn mode9(&self) -> MODE9_R[src]

Bit 17 - 9-bit Character Length

pub fn clko(&self) -> CLKO_R[src]

Bit 18 - Clock Output Select

pub fn over(&self) -> OVER_R[src]

Bit 19 - Oversampling Mode

pub fn inack(&self) -> INACK_R[src]

Bit 20 - Inhibit Non Acknowledge

pub fn dsnack(&self) -> DSNACK_R[src]

Bit 21 - Disable Successive NACK

pub fn var_sync(&self) -> VAR_SYNC_R[src]

Bit 22 - Variable Synchronization of Command/Data Sync Start Frame Delimiter

pub fn invdata(&self) -> INVDATA_R[src]

Bit 23 - Inverted Data

pub fn max_iteration(&self) -> MAX_ITERATION_R[src]

Bits 24:26 - Maximum Number of Automatic Iteration

pub fn filter(&self) -> FILTER_R[src]

Bit 28 - Receive Line Filter

pub fn man(&self) -> MAN_R[src]

Bit 29 - Manchester Encoder/Decoder Enable

pub fn modsync(&self) -> MODSYNC_R[src]

Bit 30 - Manchester Synchronization Mode

pub fn onebit(&self) -> ONEBIT_R[src]

Bit 31 - Start Frame Delimiter Selector

impl R<u8, USART_MODE_A>[src]

pub fn variant(&self) -> Variant<u8, USART_MODE_A>[src]

Get enumerated values variant

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

impl R<u8, USCLKS_A>[src]

pub fn variant(&self) -> Variant<u8, USCLKS_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_div(&self) -> bool[src]

Checks if the value of the field is DIV

pub fn is_sck(&self) -> bool[src]

Checks if the value of the field is SCK

impl R<u8, CHRL_A>[src]

pub fn variant(&self) -> Variant<u8, CHRL_A>[src]

Get enumerated values variant

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

impl R<u32, Reg<u32, _MR_SPI_MODE>>[src]

pub fn usart_mode(&self) -> USART_MODE_R[src]

Bits 0:3 - USART Mode of Operation

pub fn usclks(&self) -> USCLKS_R[src]

Bits 4:5 - Clock Selection

pub fn chrl(&self) -> CHRL_R[src]

Bits 6:7 - Character Length

pub fn cpha(&self) -> CPHA_R[src]

Bit 8 - SPI Clock Phase

pub fn cpol(&self) -> CPOL_R[src]

Bit 16 - SPI Clock Polarity

pub fn clko(&self) -> CLKO_R[src]

Bit 18 - Clock Output Select

pub fn wrdbt(&self) -> WRDBT_R[src]

Bit 20 - Wait Read Data Before Transfer

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RXRDY Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - TXRDY Interrupt Mask

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Receiver Break Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of Receive Buffer Interrupt Mask (available in all USART modes of operation)

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of Transmit Buffer Interrupt Mask (available in all USART modes of operation)

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error Interrupt Mask

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error Interrupt Mask

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error Interrupt Mask

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Time-out Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - TXEMPTY Interrupt Mask

pub fn iter(&self) -> ITER_R[src]

Bit 10 - Max Number of Repetitions Reached Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Transmit Buffer Empty Interrupt Mask (available in all USART modes of operation)

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Receive Buffer Full Interrupt Mask (available in all USART modes of operation)

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge Interrupt Mask

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Mask

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Mask

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Mask

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Interrupt Mask

pub fn mane(&self) -> MANE_R[src]

Bit 24 - Manchester Error Interrupt Mask

impl R<u32, Reg<u32, _IMR_SPI_MODE>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RXRDY Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - TXRDY Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of Receive Buffer Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of Transmit Buffer Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - TXEMPTY Interrupt Mask

pub fn unre(&self) -> UNRE_R[src]

Bit 10 - SPI Underrun Error Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Transmit Buffer Empty Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Receive Buffer Full Interrupt Mask

impl R<u32, Reg<u32, _CSR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready (cleared by reading US_RHR)

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready (cleared by writing US_THR)

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Break Received/End of Break (cleared by writing a one to bit US_CR.RSTSTA)

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of RX Buffer (cleared by writing US_RCR or US_RNCR)

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of TX Buffer (cleared by writing US_TCR or US_TNCR)

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error (cleared by writing a one to bit US_CR.RSTSTA)

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error (cleared by writing a one to bit US_CR.RSTSTA)

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Receiver Time-out (cleared by writing a one to bit US_CR.STTTO)

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty (cleared by writing US_THR)

pub fn iter(&self) -> ITER_R[src]

Bit 10 - Max Number of Repetitions Reached (cleared by writing a one to bit US_CR.RSTIT)

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - TX Buffer Empty (cleared by writing US_TCR or US_TNCR)

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - RX Buffer Full (cleared by writing US_RCR or US_RNCR)

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge Interrupt (cleared by writing a one to bit US_CR.RSTNACK)

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Flag (cleared on read)

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Flag (cleared on read)

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Flag (cleared on read)

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Flag (cleared on read)

pub fn ri(&self) -> RI_R[src]

Bit 20 - Image of RI Input

pub fn dsr(&self) -> DSR_R[src]

Bit 21 - Image of DSR Input

pub fn dcd(&self) -> DCD_R[src]

Bit 22 - Image of DCD Input

pub fn cts(&self) -> CTS_R[src]

Bit 23 - Image of CTS Input

pub fn manerr(&self) -> MANERR_R[src]

Bit 24 - Manchester Error (cleared by writing a one to the bit US_CR.RSTSTA)

impl R<u32, Reg<u32, _CSR_SPI_MODE>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready (cleared by reading US_RHR)

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready (cleared by writing US_THR)

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of RX Buffer (cleared by writing US_RCR or US_RNCR)

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of TX Buffer (cleared by writing US_TCR or US_TNCR)

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty (cleared by writing US_THR)

pub fn unre(&self) -> UNRE_R[src]

Bit 10 - Underrun Error (cleared by writing a one to bit US_CR.RSTSTA)

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - TX Buffer Empty (cleared by writing US_TCR or US_TNCR)

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - RX Buffer Full (cleared by writing US_RCR or US_RNCR)

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxchr(&self) -> RXCHR_R[src]

Bits 0:8 - Received Character

pub fn rxsynh(&self) -> RXSYNH_R[src]

Bit 15 - Received Sync

impl R<u32, Reg<u32, _BRGR>>[src]

pub fn cd(&self) -> CD_R[src]

Bits 0:15 - Clock Divider

pub fn fp(&self) -> FP_R[src]

Bits 16:18 - Fractional Part

impl R<u32, Reg<u32, _RTOR>>[src]

pub fn to(&self) -> TO_R[src]

Bits 0:15 - Time-out Value

impl R<u32, Reg<u32, _TTGR>>[src]

pub fn tg(&self) -> TG_R[src]

Bits 0:7 - Timeguard Value

impl R<u32, Reg<u32, _FIDI>>[src]

pub fn fi_di_ratio(&self) -> FI_DI_RATIO_R[src]

Bits 0:10 - FI Over DI Ratio Value

impl R<u32, Reg<u32, _NER>>[src]

pub fn nb_errors(&self) -> NB_ERRORS_R[src]

Bits 0:7 - Number of Errors

impl R<u32, Reg<u32, _IF>>[src]

pub fn irda_filter(&self) -> IRDA_FILTER_R[src]

Bits 0:7 - IrDA Filter

impl R<u8, TX_PP_A>[src]

pub fn variant(&self) -> TX_PP_A[src]

Get enumerated values variant

pub fn is_all_one(&self) -> bool[src]

Checks if the value of the field is ALL_ONE

pub fn is_all_zero(&self) -> bool[src]

Checks if the value of the field is ALL_ZERO

pub fn is_zero_one(&self) -> bool[src]

Checks if the value of the field is ZERO_ONE

pub fn is_one_zero(&self) -> bool[src]

Checks if the value of the field is ONE_ZERO

impl R<u8, RX_PP_A>[src]

pub fn variant(&self) -> RX_PP_A[src]

Get enumerated values variant

pub fn is_all_one(&self) -> bool[src]

Checks if the value of the field is ALL_ONE

pub fn is_all_zero(&self) -> bool[src]

Checks if the value of the field is ALL_ZERO

pub fn is_zero_one(&self) -> bool[src]

Checks if the value of the field is ZERO_ONE

pub fn is_one_zero(&self) -> bool[src]

Checks if the value of the field is ONE_ZERO

impl R<u32, Reg<u32, _MAN>>[src]

pub fn tx_pl(&self) -> TX_PL_R[src]

Bits 0:3 - Transmitter Preamble Length

pub fn tx_pp(&self) -> TX_PP_R[src]

Bits 8:9 - Transmitter Preamble Pattern

pub fn tx_mpol(&self) -> TX_MPOL_R[src]

Bit 12 - Transmitter Manchester Polarity

pub fn rx_pl(&self) -> RX_PL_R[src]

Bits 16:19 - Receiver Preamble Length

pub fn rx_pp(&self) -> RX_PP_R[src]

Bits 24:25 - Receiver Preamble Pattern detected

pub fn rx_mpol(&self) -> RX_MPOL_R[src]

Bit 28 - Receiver Manchester Polarity

pub fn one(&self) -> ONE_R[src]

Bit 29 - Must Be Set to 1

pub fn drift(&self) -> DRIFT_R[src]

Bit 30 - Drift Compensation

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u32, Reg<u32, _FRM_NUM>>[src]

pub fn frm_num(&self) -> FRM_NUM_R[src]

Bits 0:10 - Frame Number as Defined in the Packet Field Formats

pub fn frm_err(&self) -> FRM_ERR_R[src]

Bit 16 - Frame Error

pub fn frm_ok(&self) -> FRM_OK_R[src]

Bit 17 - Frame OK

impl R<u32, Reg<u32, _GLB_STAT>>[src]

pub fn fadden(&self) -> FADDEN_R[src]

Bit 0 - Function Address Enable

pub fn confg(&self) -> CONFG_R[src]

Bit 1 - Configured

pub fn esr(&self) -> ESR_R[src]

Bit 2 - Enable Send Resume

pub fn rsminpr(&self) -> RSMINPR_R[src]

Bit 3

pub fn rmwupe(&self) -> RMWUPE_R[src]

Bit 4 - Remote Wakeup Enable

impl R<u32, Reg<u32, _FADDR>>[src]

pub fn fadd(&self) -> FADD_R[src]

Bits 0:6 - Function Address Value

pub fn fen(&self) -> FEN_R[src]

Bit 8 - Function Enable

impl R<u32, Reg<u32, _IMR>>[src]

pub fn ep0int(&self) -> EP0INT_R[src]

Bit 0 - Mask Endpoint 0 Interrupt

pub fn ep1int(&self) -> EP1INT_R[src]

Bit 1 - Mask Endpoint 1 Interrupt

pub fn ep2int(&self) -> EP2INT_R[src]

Bit 2 - Mask Endpoint 2 Interrupt

pub fn ep3int(&self) -> EP3INT_R[src]

Bit 3 - Mask Endpoint 3 Interrupt

pub fn ep4int(&self) -> EP4INT_R[src]

Bit 4 - Mask Endpoint 4 Interrupt

pub fn ep5int(&self) -> EP5INT_R[src]

Bit 5 - Mask Endpoint 5 Interrupt

pub fn ep6int(&self) -> EP6INT_R[src]

Bit 6 - Mask Endpoint 6 Interrupt

pub fn ep7int(&self) -> EP7INT_R[src]

Bit 7 - Mask Endpoint 7 Interrupt

pub fn rxsusp(&self) -> RXSUSP_R[src]

Bit 8 - Mask UDP Suspend Interrupt

pub fn rxrsm(&self) -> RXRSM_R[src]

Bit 9 - Mask UDP Resume Interrupt.

pub fn extrsm(&self) -> EXTRSM_R[src]

Bit 10

pub fn sofint(&self) -> SOFINT_R[src]

Bit 11 - Mask Start Of Frame Interrupt

pub fn bit12(&self) -> BIT12_R[src]

Bit 12 - UDP_IMR Bit 12

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 13 - USB Bus Wakeup Interrupt

impl R<u32, Reg<u32, _ISR>>[src]

pub fn ep0int(&self) -> EP0INT_R[src]

Bit 0 - Endpoint 0 Interrupt Status

pub fn ep1int(&self) -> EP1INT_R[src]

Bit 1 - Endpoint 1 Interrupt Status

pub fn ep2int(&self) -> EP2INT_R[src]

Bit 2 - Endpoint 2 Interrupt Status

pub fn ep3int(&self) -> EP3INT_R[src]

Bit 3 - Endpoint 3 Interrupt Status

pub fn ep4int(&self) -> EP4INT_R[src]

Bit 4 - Endpoint 4 Interrupt Status

pub fn ep5int(&self) -> EP5INT_R[src]

Bit 5 - Endpoint 5 Interrupt Status

pub fn ep6int(&self) -> EP6INT_R[src]

Bit 6 - Endpoint 6 Interrupt Status

pub fn ep7int(&self) -> EP7INT_R[src]

Bit 7 - Endpoint 7Interrupt Status

pub fn rxsusp(&self) -> RXSUSP_R[src]

Bit 8 - UDP Suspend Interrupt Status

pub fn rxrsm(&self) -> RXRSM_R[src]

Bit 9 - UDP Resume Interrupt Status

pub fn extrsm(&self) -> EXTRSM_R[src]

Bit 10

pub fn sofint(&self) -> SOFINT_R[src]

Bit 11 - Start of Frame Interrupt Status

pub fn endbusres(&self) -> ENDBUSRES_R[src]

Bit 12 - End of BUS Reset Interrupt Status

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 13 - UDP Resume Interrupt Status

impl R<u32, Reg<u32, _RST_EP>>[src]

pub fn ep0(&self) -> EP0_R[src]

Bit 0 - Reset Endpoint 0

pub fn ep1(&self) -> EP1_R[src]

Bit 1 - Reset Endpoint 1

pub fn ep2(&self) -> EP2_R[src]

Bit 2 - Reset Endpoint 2

pub fn ep3(&self) -> EP3_R[src]

Bit 3 - Reset Endpoint 3

pub fn ep4(&self) -> EP4_R[src]

Bit 4 - Reset Endpoint 4

pub fn ep5(&self) -> EP5_R[src]

Bit 5 - Reset Endpoint 5

pub fn ep6(&self) -> EP6_R[src]

Bit 6 - Reset Endpoint 6

pub fn ep7(&self) -> EP7_R[src]

Bit 7 - Reset Endpoint 7

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> Variant<u8, EPTYPE_A>[src]

Get enumerated values variant

pub fn is_ctrl(&self) -> bool[src]

Checks if the value of the field is CTRL

pub fn is_iso_out(&self) -> bool[src]

Checks if the value of the field is ISO_OUT

pub fn is_bulk_out(&self) -> bool[src]

Checks if the value of the field is BULK_OUT

pub fn is_int_out(&self) -> bool[src]

Checks if the value of the field is INT_OUT

pub fn is_iso_in(&self) -> bool[src]

Checks if the value of the field is ISO_IN

pub fn is_bulk_in(&self) -> bool[src]

Checks if the value of the field is BULK_IN

pub fn is_int_in(&self) -> bool[src]

Checks if the value of the field is INT_IN

impl R<u32, Reg<u32, _CSR>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Generates an IN Packet with Data Previously Written in the DPR

pub fn rx_data_bk0(&self) -> RX_DATA_BK0_R[src]

Bit 1 - Receive Data Bank 0

pub fn rxsetup(&self) -> RXSETUP_R[src]

Bit 2 - Received Setup

pub fn stallsent(&self) -> STALLSENT_R[src]

Bit 3 - Stall Sent

pub fn txpktrdy(&self) -> TXPKTRDY_R[src]

Bit 4 - Transmit Packet Ready

pub fn forcestall(&self) -> FORCESTALL_R[src]

Bit 5 - Force Stall (used by Control, Bulk and Isochronous Endpoints)

pub fn rx_data_bk1(&self) -> RX_DATA_BK1_R[src]

Bit 6 - Receive Data Bank 1 (only used by endpoints with ping-pong attributes)

pub fn dir(&self) -> DIR_R[src]

Bit 7 - Transfer Direction (only available for control endpoints) (Read/Write)

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 8:10 - Endpoint Type (Read/Write)

pub fn dtgle(&self) -> DTGLE_R[src]

Bit 11 - Data Toggle (Read-only)

pub fn epeds(&self) -> EPEDS_R[src]

Bit 15 - Endpoint Enable Disable

pub fn rxbytecnt(&self) -> RXBYTECNT_R[src]

Bits 16:26 - Number of Bytes Available in the FIFO (Read-only)

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> Variant<u8, EPTYPE_A>[src]

Get enumerated values variant

pub fn is_ctrl(&self) -> bool[src]

Checks if the value of the field is CTRL

pub fn is_iso_out(&self) -> bool[src]

Checks if the value of the field is ISO_OUT

pub fn is_iso_in(&self) -> bool[src]

Checks if the value of the field is ISO_IN

pub fn is_bulk_out(&self) -> bool[src]

Checks if the value of the field is BULK_OUT

pub fn is_bulk_in(&self) -> bool[src]

Checks if the value of the field is BULK_IN

pub fn is_int_out(&self) -> bool[src]

Checks if the value of the field is INT_OUT

pub fn is_int_in(&self) -> bool[src]

Checks if the value of the field is INT_IN

impl R<u32, Reg<u32, _CSR0_ISOCHRONOUS>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Generates an IN Packet with Data Previously Written in the DPR

pub fn rx_data_bk0(&self) -> RX_DATA_BK0_R[src]

Bit 1 - Receive Data Bank 0

pub fn rxsetup(&self) -> RXSETUP_R[src]

Bit 2 - Received Setup

pub fn isoerror(&self) -> ISOERROR_R[src]

Bit 3 - A CRC error has been detected in an isochronous transfer

pub fn txpktrdy(&self) -> TXPKTRDY_R[src]

Bit 4 - Transmit Packet Ready

pub fn forcestall(&self) -> FORCESTALL_R[src]

Bit 5 - Force Stall (used by Control, Bulk and Isochronous Endpoints)

pub fn rx_data_bk1(&self) -> RX_DATA_BK1_R[src]

Bit 6 - Receive Data Bank 1 (only used by endpoints with ping-pong attributes)

pub fn dir(&self) -> DIR_R[src]

Bit 7 - Transfer Direction (only available for control endpoints) (Read/Write)

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 8:10 - Endpoint Type (Read/Write)

pub fn dtgle(&self) -> DTGLE_R[src]

Bit 11 - Data Toggle (Read-only)

pub fn epeds(&self) -> EPEDS_R[src]

Bit 15 - Endpoint Enable Disable

pub fn rxbytecnt(&self) -> RXBYTECNT_R[src]

Bits 16:26 - Number of Bytes Available in the FIFO (Read-only)

impl R<u32, Reg<u32, _FDR>>[src]

pub fn fifo_data(&self) -> FIFO_DATA_R[src]

Bits 0:7 - FIFO Data Value

impl R<u32, Reg<u32, _TXVC>>[src]

pub fn txvdis(&self) -> TXVDIS_R[src]

Bit 8 - Transceiver Disable

pub fn puon(&self) -> PUON_R[src]

Bit 9 - Pull-up On

impl R<bool, TRGEN_A>[src]

pub fn variant(&self) -> TRGEN_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<u8, TRGSEL_A>[src]

pub fn variant(&self) -> Variant<u8, TRGSEL_A>[src]

Get enumerated values variant

pub fn is_adc_trig0(&self) -> bool[src]

Checks if the value of the field is ADC_TRIG0

pub fn is_adc_trig1(&self) -> bool[src]

Checks if the value of the field is ADC_TRIG1

pub fn is_adc_trig2(&self) -> bool[src]

Checks if the value of the field is ADC_TRIG2

pub fn is_adc_trig3(&self) -> bool[src]

Checks if the value of the field is ADC_TRIG3

pub fn is_adc_trig4(&self) -> bool[src]

Checks if the value of the field is ADC_TRIG4

pub fn is_adc_trig5(&self) -> bool[src]

Checks if the value of the field is ADC_TRIG5

impl R<bool, SLEEP_A>[src]

pub fn variant(&self) -> SLEEP_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_sleep(&self) -> bool[src]

Checks if the value of the field is SLEEP

impl R<bool, FWUP_A>[src]

pub fn variant(&self) -> FWUP_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, FREERUN_A>[src]

pub fn variant(&self) -> FREERUN_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<u8, STARTUP_A>[src]

pub fn variant(&self) -> STARTUP_A[src]

Get enumerated values variant

pub fn is_sut0(&self) -> bool[src]

Checks if the value of the field is SUT0

pub fn is_sut8(&self) -> bool[src]

Checks if the value of the field is SUT8

pub fn is_sut16(&self) -> bool[src]

Checks if the value of the field is SUT16

pub fn is_sut24(&self) -> bool[src]

Checks if the value of the field is SUT24

pub fn is_sut64(&self) -> bool[src]

Checks if the value of the field is SUT64

pub fn is_sut80(&self) -> bool[src]

Checks if the value of the field is SUT80

pub fn is_sut96(&self) -> bool[src]

Checks if the value of the field is SUT96

pub fn is_sut112(&self) -> bool[src]

Checks if the value of the field is SUT112

pub fn is_sut512(&self) -> bool[src]

Checks if the value of the field is SUT512

pub fn is_sut576(&self) -> bool[src]

Checks if the value of the field is SUT576

pub fn is_sut640(&self) -> bool[src]

Checks if the value of the field is SUT640

pub fn is_sut704(&self) -> bool[src]

Checks if the value of the field is SUT704

pub fn is_sut768(&self) -> bool[src]

Checks if the value of the field is SUT768

pub fn is_sut832(&self) -> bool[src]

Checks if the value of the field is SUT832

pub fn is_sut896(&self) -> bool[src]

Checks if the value of the field is SUT896

pub fn is_sut960(&self) -> bool[src]

Checks if the value of the field is SUT960

impl R<u8, SETTLING_A>[src]

pub fn variant(&self) -> SETTLING_A[src]

Get enumerated values variant

pub fn is_ast3(&self) -> bool[src]

Checks if the value of the field is AST3

pub fn is_ast5(&self) -> bool[src]

Checks if the value of the field is AST5

pub fn is_ast9(&self) -> bool[src]

Checks if the value of the field is AST9

pub fn is_ast17(&self) -> bool[src]

Checks if the value of the field is AST17

impl R<bool, ANACH_A>[src]

pub fn variant(&self) -> ANACH_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_allowed(&self) -> bool[src]

Checks if the value of the field is ALLOWED

impl R<bool, USEQ_A>[src]

pub fn variant(&self) -> USEQ_A[src]

Get enumerated values variant

pub fn is_num_order(&self) -> bool[src]

Checks if the value of the field is NUM_ORDER

pub fn is_reg_order(&self) -> bool[src]

Checks if the value of the field is REG_ORDER

impl R<u32, Reg<u32, _MR>>[src]

pub fn trgen(&self) -> TRGEN_R[src]

Bit 0 - Trigger Enable

pub fn trgsel(&self) -> TRGSEL_R[src]

Bits 1:3 - Trigger Selection

pub fn sleep(&self) -> SLEEP_R[src]

Bit 5 - Sleep Mode

pub fn fwup(&self) -> FWUP_R[src]

Bit 6 - Fast Wake Up

pub fn freerun(&self) -> FREERUN_R[src]

Bit 7 - Free Run Mode

pub fn prescal(&self) -> PRESCAL_R[src]

Bits 8:15 - Prescaler Rate Selection

pub fn startup(&self) -> STARTUP_R[src]

Bits 16:19 - Startup Time

pub fn settling(&self) -> SETTLING_R[src]

Bits 20:21 - Analog Settling Time

pub fn anach(&self) -> ANACH_R[src]

Bit 23 - Analog Change

pub fn tracktim(&self) -> TRACKTIM_R[src]

Bits 24:27 - Tracking Time

pub fn transfer(&self) -> TRANSFER_R[src]

Bits 28:29 - Hold Time

pub fn useq(&self) -> USEQ_R[src]

Bit 31 - Use Sequence Enable

impl R<u32, Reg<u32, _SEQR1>>[src]

pub fn usch1(&self) -> USCH1_R[src]

Bits 0:3 - User Sequence Number 1

pub fn usch2(&self) -> USCH2_R[src]

Bits 4:7 - User Sequence Number 2

pub fn usch3(&self) -> USCH3_R[src]

Bits 8:11 - User Sequence Number 3

pub fn usch4(&self) -> USCH4_R[src]

Bits 12:15 - User Sequence Number 4

pub fn usch5(&self) -> USCH5_R[src]

Bits 16:19 - User Sequence Number 5

pub fn usch6(&self) -> USCH6_R[src]

Bits 20:23 - User Sequence Number 6

pub fn usch7(&self) -> USCH7_R[src]

Bits 24:27 - User Sequence Number 7

pub fn usch8(&self) -> USCH8_R[src]

Bits 28:31 - User Sequence Number 8

impl R<u32, Reg<u32, _SEQR2>>[src]

pub fn usch9(&self) -> USCH9_R[src]

Bits 0:3 - User Sequence Number 9

pub fn usch10(&self) -> USCH10_R[src]

Bits 4:7 - User Sequence Number 10

pub fn usch11(&self) -> USCH11_R[src]

Bits 8:11 - User Sequence Number 11

pub fn usch12(&self) -> USCH12_R[src]

Bits 12:15 - User Sequence Number 12

pub fn usch13(&self) -> USCH13_R[src]

Bits 16:19 - User Sequence Number 13

pub fn usch14(&self) -> USCH14_R[src]

Bits 20:23 - User Sequence Number 14

pub fn usch15(&self) -> USCH15_R[src]

Bits 24:27 - User Sequence Number 15

impl R<u32, Reg<u32, _CHSR>>[src]

pub fn ch0(&self) -> CH0_R[src]

Bit 0 - Channel 0 Status

pub fn ch1(&self) -> CH1_R[src]

Bit 1 - Channel 1 Status

pub fn ch2(&self) -> CH2_R[src]

Bit 2 - Channel 2 Status

pub fn ch3(&self) -> CH3_R[src]

Bit 3 - Channel 3 Status

pub fn ch4(&self) -> CH4_R[src]

Bit 4 - Channel 4 Status

pub fn ch5(&self) -> CH5_R[src]

Bit 5 - Channel 5 Status

pub fn ch6(&self) -> CH6_R[src]

Bit 6 - Channel 6 Status

pub fn ch7(&self) -> CH7_R[src]

Bit 7 - Channel 7 Status

pub fn ch8(&self) -> CH8_R[src]

Bit 8 - Channel 8 Status

pub fn ch9(&self) -> CH9_R[src]

Bit 9 - Channel 9 Status

pub fn ch10(&self) -> CH10_R[src]

Bit 10 - Channel 10 Status

pub fn ch11(&self) -> CH11_R[src]

Bit 11 - Channel 11 Status

pub fn ch12(&self) -> CH12_R[src]

Bit 12 - Channel 12 Status

pub fn ch13(&self) -> CH13_R[src]

Bit 13 - Channel 13 Status

pub fn ch14(&self) -> CH14_R[src]

Bit 14 - Channel 14 Status

pub fn ch15(&self) -> CH15_R[src]

Bit 15 - Channel 15 Status

impl R<u32, Reg<u32, _LCDR>>[src]

pub fn ldata(&self) -> LDATA_R[src]

Bits 0:11 - Last Data Converted

pub fn chnb(&self) -> CHNB_R[src]

Bits 12:15 - Channel Number

impl R<u32, Reg<u32, _IMR>>[src]

pub fn eoc0(&self) -> EOC0_R[src]

Bit 0 - End of Conversion Interrupt Mask 0

pub fn eoc1(&self) -> EOC1_R[src]

Bit 1 - End of Conversion Interrupt Mask 1

pub fn eoc2(&self) -> EOC2_R[src]

Bit 2 - End of Conversion Interrupt Mask 2

pub fn eoc3(&self) -> EOC3_R[src]

Bit 3 - End of Conversion Interrupt Mask 3

pub fn eoc4(&self) -> EOC4_R[src]

Bit 4 - End of Conversion Interrupt Mask 4

pub fn eoc5(&self) -> EOC5_R[src]

Bit 5 - End of Conversion Interrupt Mask 5

pub fn eoc6(&self) -> EOC6_R[src]

Bit 6 - End of Conversion Interrupt Mask 6

pub fn eoc7(&self) -> EOC7_R[src]

Bit 7 - End of Conversion Interrupt Mask 7

pub fn eoc8(&self) -> EOC8_R[src]

Bit 8 - End of Conversion Interrupt Mask 8

pub fn eoc9(&self) -> EOC9_R[src]

Bit 9 - End of Conversion Interrupt Mask 9

pub fn eoc10(&self) -> EOC10_R[src]

Bit 10 - End of Conversion Interrupt Mask 10

pub fn eoc11(&self) -> EOC11_R[src]

Bit 11 - End of Conversion Interrupt Mask 11

pub fn eoc12(&self) -> EOC12_R[src]

Bit 12 - End of Conversion Interrupt Mask 12

pub fn eoc13(&self) -> EOC13_R[src]

Bit 13 - End of Conversion Interrupt Mask 13

pub fn eoc14(&self) -> EOC14_R[src]

Bit 14 - End of Conversion Interrupt Mask 14

pub fn eoc15(&self) -> EOC15_R[src]

Bit 15 - End of Conversion Interrupt Mask 15

pub fn eocal(&self) -> EOCAL_R[src]

Bit 23 - End of Calibration Sequence

pub fn drdy(&self) -> DRDY_R[src]

Bit 24 - Data Ready Interrupt Mask

pub fn govre(&self) -> GOVRE_R[src]

Bit 25 - General Overrun Error Interrupt Mask

pub fn compe(&self) -> COMPE_R[src]

Bit 26 - Comparison Event Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 27 - End of Receive Buffer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 28 - Receive Buffer Full Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn eoc0(&self) -> EOC0_R[src]

Bit 0 - End of Conversion 0 (automatically set / cleared)

pub fn eoc1(&self) -> EOC1_R[src]

Bit 1 - End of Conversion 1 (automatically set / cleared)

pub fn eoc2(&self) -> EOC2_R[src]

Bit 2 - End of Conversion 2 (automatically set / cleared)

pub fn eoc3(&self) -> EOC3_R[src]

Bit 3 - End of Conversion 3 (automatically set / cleared)

pub fn eoc4(&self) -> EOC4_R[src]

Bit 4 - End of Conversion 4 (automatically set / cleared)

pub fn eoc5(&self) -> EOC5_R[src]

Bit 5 - End of Conversion 5 (automatically set / cleared)

pub fn eoc6(&self) -> EOC6_R[src]

Bit 6 - End of Conversion 6 (automatically set / cleared)

pub fn eoc7(&self) -> EOC7_R[src]

Bit 7 - End of Conversion 7 (automatically set / cleared)

pub fn eoc8(&self) -> EOC8_R[src]

Bit 8 - End of Conversion 8 (automatically set / cleared)

pub fn eoc9(&self) -> EOC9_R[src]

Bit 9 - End of Conversion 9 (automatically set / cleared)

pub fn eoc10(&self) -> EOC10_R[src]

Bit 10 - End of Conversion 10 (automatically set / cleared)

pub fn eoc11(&self) -> EOC11_R[src]

Bit 11 - End of Conversion 11 (automatically set / cleared)

pub fn eoc12(&self) -> EOC12_R[src]

Bit 12 - End of Conversion 12 (automatically set / cleared)

pub fn eoc13(&self) -> EOC13_R[src]

Bit 13 - End of Conversion 13 (automatically set / cleared)

pub fn eoc14(&self) -> EOC14_R[src]

Bit 14 - End of Conversion 14 (automatically set / cleared)

pub fn eoc15(&self) -> EOC15_R[src]

Bit 15 - End of Conversion 15 (automatically set / cleared)

pub fn eocal(&self) -> EOCAL_R[src]

Bit 23 - End of Calibration Sequence

pub fn drdy(&self) -> DRDY_R[src]

Bit 24 - Data Ready (automatically set / cleared)

pub fn govre(&self) -> GOVRE_R[src]

Bit 25 - General Overrun Error (cleared on read)

pub fn compe(&self) -> COMPE_R[src]

Bit 26 - Comparison Event (cleared on read)

pub fn endrx(&self) -> ENDRX_R[src]

Bit 27 - End of Receive Transfer (cleared by writing ADC_RCR or ADC_RNCR)

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 28 - Receive Buffer Full (cleared by writing ADC_RCR or ADC_RNCR)

impl R<u32, Reg<u32, _OVER>>[src]

pub fn ovre0(&self) -> OVRE0_R[src]

Bit 0 - Overrun Error 0

pub fn ovre1(&self) -> OVRE1_R[src]

Bit 1 - Overrun Error 1

pub fn ovre2(&self) -> OVRE2_R[src]

Bit 2 - Overrun Error 2

pub fn ovre3(&self) -> OVRE3_R[src]

Bit 3 - Overrun Error 3

pub fn ovre4(&self) -> OVRE4_R[src]

Bit 4 - Overrun Error 4

pub fn ovre5(&self) -> OVRE5_R[src]

Bit 5 - Overrun Error 5

pub fn ovre6(&self) -> OVRE6_R[src]

Bit 6 - Overrun Error 6

pub fn ovre7(&self) -> OVRE7_R[src]

Bit 7 - Overrun Error 7

pub fn ovre8(&self) -> OVRE8_R[src]

Bit 8 - Overrun Error 8

pub fn ovre9(&self) -> OVRE9_R[src]

Bit 9 - Overrun Error 9

pub fn ovre10(&self) -> OVRE10_R[src]

Bit 10 - Overrun Error 10

pub fn ovre11(&self) -> OVRE11_R[src]

Bit 11 - Overrun Error 11

pub fn ovre12(&self) -> OVRE12_R[src]

Bit 12 - Overrun Error 12

pub fn ovre13(&self) -> OVRE13_R[src]

Bit 13 - Overrun Error 13

pub fn ovre14(&self) -> OVRE14_R[src]

Bit 14 - Overrun Error 14

pub fn ovre15(&self) -> OVRE15_R[src]

Bit 15 - Overrun Error 15

impl R<u8, CMPMODE_A>[src]

pub fn variant(&self) -> CMPMODE_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u32, Reg<u32, _EMR>>[src]

pub fn cmpmode(&self) -> CMPMODE_R[src]

Bits 0:1 - Comparison Mode

pub fn cmpsel(&self) -> CMPSEL_R[src]

Bits 4:7 - Comparison Selected Channel

pub fn cmpall(&self) -> CMPALL_R[src]

Bit 9 - Compare All Channels

pub fn tag(&self) -> TAG_R[src]

Bit 24 - Tag of the ADC_LCDR

impl R<u32, Reg<u32, _CWR>>[src]

pub fn lowthres(&self) -> LOWTHRES_R[src]

Bits 0:11 - Low Threshold

pub fn highthres(&self) -> HIGHTHRES_R[src]

Bits 16:27 - High Threshold

impl R<u8, GAIN0_A>[src]

pub fn variant(&self) -> GAIN0_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN1_A>[src]

pub fn variant(&self) -> GAIN1_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN2_A>[src]

pub fn variant(&self) -> GAIN2_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN3_A>[src]

pub fn variant(&self) -> GAIN3_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN4_A>[src]

pub fn variant(&self) -> GAIN4_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN5_A>[src]

pub fn variant(&self) -> GAIN5_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN6_A>[src]

pub fn variant(&self) -> GAIN6_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN7_A>[src]

pub fn variant(&self) -> GAIN7_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN8_A>[src]

pub fn variant(&self) -> GAIN8_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN9_A>[src]

pub fn variant(&self) -> GAIN9_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN10_A>[src]

pub fn variant(&self) -> GAIN10_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN11_A>[src]

pub fn variant(&self) -> GAIN11_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN12_A>[src]

pub fn variant(&self) -> GAIN12_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN13_A>[src]

pub fn variant(&self) -> GAIN13_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN14_A>[src]

pub fn variant(&self) -> GAIN14_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u8, GAIN15_A>[src]

pub fn variant(&self) -> GAIN15_A[src]

Get enumerated values variant

pub fn is_se1_diff0_5(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF0_5

pub fn is_se1_diff1(&self) -> bool[src]

Checks if the value of the field is SE1_DIFF1

pub fn is_se2_diff2(&self) -> bool[src]

Checks if the value of the field is SE2_DIFF2

pub fn is_se4_diff2(&self) -> bool[src]

Checks if the value of the field is SE4_DIFF2

impl R<u32, Reg<u32, _CGR>>[src]

pub fn gain0(&self) -> GAIN0_R[src]

Bits 0:1 - Gain for Channel 0

pub fn gain1(&self) -> GAIN1_R[src]

Bits 2:3 - Gain for Channel 1

pub fn gain2(&self) -> GAIN2_R[src]

Bits 4:5 - Gain for Channel 2

pub fn gain3(&self) -> GAIN3_R[src]

Bits 6:7 - Gain for Channel 3

pub fn gain4(&self) -> GAIN4_R[src]

Bits 8:9 - Gain for Channel 4

pub fn gain5(&self) -> GAIN5_R[src]

Bits 10:11 - Gain for Channel 5

pub fn gain6(&self) -> GAIN6_R[src]

Bits 12:13 - Gain for Channel 6

pub fn gain7(&self) -> GAIN7_R[src]

Bits 14:15 - Gain for Channel 7

pub fn gain8(&self) -> GAIN8_R[src]

Bits 16:17 - Gain for Channel 8

pub fn gain9(&self) -> GAIN9_R[src]

Bits 18:19 - Gain for Channel 9

pub fn gain10(&self) -> GAIN10_R[src]

Bits 20:21 - Gain for Channel 10

pub fn gain11(&self) -> GAIN11_R[src]

Bits 22:23 - Gain for Channel 11

pub fn gain12(&self) -> GAIN12_R[src]

Bits 24:25 - Gain for Channel 12

pub fn gain13(&self) -> GAIN13_R[src]

Bits 26:27 - Gain for Channel 13

pub fn gain14(&self) -> GAIN14_R[src]

Bits 28:29 - Gain for Channel 14

pub fn gain15(&self) -> GAIN15_R[src]

Bits 30:31 - Gain for Channel 15

impl R<u32, Reg<u32, _COR>>[src]

pub fn off0(&self) -> OFF0_R[src]

Bit 0 - Offset for Channel 0

pub fn off1(&self) -> OFF1_R[src]

Bit 1 - Offset for Channel 1

pub fn off2(&self) -> OFF2_R[src]

Bit 2 - Offset for Channel 2

pub fn off3(&self) -> OFF3_R[src]

Bit 3 - Offset for Channel 3

pub fn off4(&self) -> OFF4_R[src]

Bit 4 - Offset for Channel 4

pub fn off5(&self) -> OFF5_R[src]

Bit 5 - Offset for Channel 5

pub fn off6(&self) -> OFF6_R[src]

Bit 6 - Offset for Channel 6

pub fn off7(&self) -> OFF7_R[src]

Bit 7 - Offset for Channel 7

pub fn off8(&self) -> OFF8_R[src]

Bit 8 - Offset for Channel 8

pub fn off9(&self) -> OFF9_R[src]

Bit 9 - Offset for Channel 9

pub fn off10(&self) -> OFF10_R[src]

Bit 10 - Offset for Channel 10

pub fn off11(&self) -> OFF11_R[src]

Bit 11 - Offset for Channel 11

pub fn off12(&self) -> OFF12_R[src]

Bit 12 - Offset for Channel 12

pub fn off13(&self) -> OFF13_R[src]

Bit 13 - Offset for Channel 13

pub fn off14(&self) -> OFF14_R[src]

Bit 14 - Offset for Channel 14

pub fn off15(&self) -> OFF15_R[src]

Bit 15 - Offset for Channel 15

pub fn diff0(&self) -> DIFF0_R[src]

Bit 16 - Differential Inputs for Channel 0

pub fn diff1(&self) -> DIFF1_R[src]

Bit 17 - Differential Inputs for Channel 1

pub fn diff2(&self) -> DIFF2_R[src]

Bit 18 - Differential Inputs for Channel 2

pub fn diff3(&self) -> DIFF3_R[src]

Bit 19 - Differential Inputs for Channel 3

pub fn diff4(&self) -> DIFF4_R[src]

Bit 20 - Differential Inputs for Channel 4

pub fn diff5(&self) -> DIFF5_R[src]

Bit 21 - Differential Inputs for Channel 5

pub fn diff6(&self) -> DIFF6_R[src]

Bit 22 - Differential Inputs for Channel 6

pub fn diff7(&self) -> DIFF7_R[src]

Bit 23 - Differential Inputs for Channel 7

pub fn diff8(&self) -> DIFF8_R[src]

Bit 24 - Differential Inputs for Channel 8

pub fn diff9(&self) -> DIFF9_R[src]

Bit 25 - Differential Inputs for Channel 9

pub fn diff10(&self) -> DIFF10_R[src]

Bit 26 - Differential Inputs for Channel 10

pub fn diff11(&self) -> DIFF11_R[src]

Bit 27 - Differential Inputs for Channel 11

pub fn diff12(&self) -> DIFF12_R[src]

Bit 28 - Differential Inputs for Channel 12

pub fn diff13(&self) -> DIFF13_R[src]

Bit 29 - Differential Inputs for Channel 13

pub fn diff14(&self) -> DIFF14_R[src]

Bit 30 - Differential Inputs for Channel 14

pub fn diff15(&self) -> DIFF15_R[src]

Bit 31 - Differential Inputs for Channel 15

impl R<u32, Reg<u32, _CDR>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:11 - Converted Data

impl R<u32, Reg<u32, _ACR>>[src]

pub fn tson(&self) -> TSON_R[src]

Bit 4 - Temperature Sensor On

pub fn ibctl(&self) -> IBCTL_R[src]

Bits 8:9 - ADC Bias Current Control

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, SELMINUS_A>[src]

pub fn variant(&self) -> SELMINUS_A[src]

Get enumerated values variant

pub fn is_ts(&self) -> bool[src]

Checks if the value of the field is TS

pub fn is_advref(&self) -> bool[src]

Checks if the value of the field is ADVREF

pub fn is_dac0(&self) -> bool[src]

Checks if the value of the field is DAC0

pub fn is_dac1(&self) -> bool[src]

Checks if the value of the field is DAC1

pub fn is_ad0(&self) -> bool[src]

Checks if the value of the field is AD0

pub fn is_ad1(&self) -> bool[src]

Checks if the value of the field is AD1

pub fn is_ad2(&self) -> bool[src]

Checks if the value of the field is AD2

pub fn is_ad3(&self) -> bool[src]

Checks if the value of the field is AD3

impl R<u8, SELPLUS_A>[src]

pub fn variant(&self) -> SELPLUS_A[src]

Get enumerated values variant

pub fn is_ad0(&self) -> bool[src]

Checks if the value of the field is AD0

pub fn is_ad1(&self) -> bool[src]

Checks if the value of the field is AD1

pub fn is_ad2(&self) -> bool[src]

Checks if the value of the field is AD2

pub fn is_ad3(&self) -> bool[src]

Checks if the value of the field is AD3

pub fn is_ad4(&self) -> bool[src]

Checks if the value of the field is AD4

pub fn is_ad5(&self) -> bool[src]

Checks if the value of the field is AD5

pub fn is_ad6(&self) -> bool[src]

Checks if the value of the field is AD6

pub fn is_ad7(&self) -> bool[src]

Checks if the value of the field is AD7

impl R<bool, ACEN_A>[src]

pub fn variant(&self) -> ACEN_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<u8, EDGETYP_A>[src]

pub fn variant(&self) -> Variant<u8, EDGETYP_A>[src]

Get enumerated values variant

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_any(&self) -> bool[src]

Checks if the value of the field is ANY

impl R<bool, INV_A>[src]

pub fn variant(&self) -> INV_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, SELFS_A>[src]

pub fn variant(&self) -> SELFS_A[src]

Get enumerated values variant

pub fn is_ce(&self) -> bool[src]

Checks if the value of the field is CE

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, FE_A>[src]

pub fn variant(&self) -> FE_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<u32, Reg<u32, _MR>>[src]

pub fn selminus(&self) -> SELMINUS_R[src]

Bits 0:2 - Selection for Minus Comparator Input

pub fn selplus(&self) -> SELPLUS_R[src]

Bits 4:6 - Selection For Plus Comparator Input

pub fn acen(&self) -> ACEN_R[src]

Bit 8 - Analog Comparator Enable

pub fn edgetyp(&self) -> EDGETYP_R[src]

Bits 9:10 - Edge Type

pub fn inv(&self) -> INV_R[src]

Bit 12 - Invert Comparator Output

pub fn selfs(&self) -> SELFS_R[src]

Bit 13 - Selection Of Fault Source

pub fn fe(&self) -> FE_R[src]

Bit 14 - Fault Enable

impl R<u32, Reg<u32, _IMR>>[src]

pub fn ce(&self) -> CE_R[src]

Bit 0 - Comparison Edge

impl R<u32, Reg<u32, _ISR>>[src]

pub fn ce(&self) -> CE_R[src]

Bit 0 - Comparison Edge (cleared on read)

pub fn sco(&self) -> SCO_R[src]

Bit 1 - Synchronized Comparator Output

pub fn mask(&self) -> MASK_R[src]

Bit 31 - Flag Mask

impl R<bool, ISEL_A>[src]

pub fn variant(&self) -> ISEL_A[src]

Get enumerated values variant

pub fn is_lopw(&self) -> bool[src]

Checks if the value of the field is LOPW

pub fn is_hisp(&self) -> bool[src]

Checks if the value of the field is HISP

impl R<u32, Reg<u32, _ACR>>[src]

pub fn isel(&self) -> ISEL_R[src]

Bit 0 - Current Selection

pub fn hyst(&self) -> HYST_R[src]

Bits 1:2 - Hysteresis Selection

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

impl R<u32, Reg<u32, _DSCR>>[src]

pub fn dscr(&self) -> DSCR_R[src]

Bits 9:31 - Descriptor Base Address

impl R<u32, Reg<u32, _DMA_SR>>[src]

pub fn dmasr(&self) -> DMASR_R[src]

Bit 0 - DMA Status

impl R<u32, Reg<u32, _DMA_IMR>>[src]

pub fn dmaimr(&self) -> DMAIMR_R[src]

Bit 0 - Interrupt Mask

impl R<u32, Reg<u32, _DMA_ISR>>[src]

pub fn dmaisr(&self) -> DMAISR_R[src]

Bit 0 - Interrupt Status

impl R<u8, PTYPE_A>[src]

pub fn variant(&self) -> Variant<u8, PTYPE_A>[src]

Get enumerated values variant

pub fn is_ccitt8023(&self) -> bool[src]

Checks if the value of the field is CCITT8023

pub fn is_castagnoli(&self) -> bool[src]

Checks if the value of the field is CASTAGNOLI

pub fn is_ccitt16(&self) -> bool[src]

Checks if the value of the field is CCITT16

impl R<u32, Reg<u32, _MR>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 0 - CRC Enable

pub fn compare(&self) -> COMPARE_R[src]

Bit 1 - CRC Compare

pub fn ptype(&self) -> PTYPE_R[src]

Bits 2:3 - Primitive Polynomial

pub fn divider(&self) -> DIVIDER_R[src]

Bits 4:7 - Request Divider

impl R<u32, Reg<u32, _SR>>[src]

pub fn crc(&self) -> CRC_R[src]

Bits 0:31 - Cyclic Redundancy Check Value

impl R<u32, Reg<u32, _IMR>>[src]

pub fn errimr(&self) -> ERRIMR_R[src]

Bit 0 - CRC Error Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn errisr(&self) -> ERRISR_R[src]

Bit 0 - CRC Error Interrupt Status

impl R<u8, ULBT_A>[src]

pub fn variant(&self) -> Variant<u8, ULBT_A>[src]

Get enumerated values variant

pub fn is_infinite(&self) -> bool[src]

Checks if the value of the field is INFINITE

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_four_beat(&self) -> bool[src]

Checks if the value of the field is FOUR_BEAT

pub fn is_eight_beat(&self) -> bool[src]

Checks if the value of the field is EIGHT_BEAT

pub fn is_sixteen_beat(&self) -> bool[src]

Checks if the value of the field is SIXTEEN_BEAT

impl R<u32, Reg<u32, _MATRIX_MCFG>>[src]

pub fn ulbt(&self) -> ULBT_R[src]

Bits 0:2 - Undefined Length Burst Type

impl R<u8, DEFMSTR_TYPE_A>[src]

pub fn variant(&self) -> Variant<u8, DEFMSTR_TYPE_A>[src]

Get enumerated values variant

pub fn is_no_default(&self) -> bool[src]

Checks if the value of the field is NO_DEFAULT

pub fn is_last(&self) -> bool[src]

Checks if the value of the field is LAST

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

impl R<u8, ARBT_A>[src]

pub fn variant(&self) -> Variant<u8, ARBT_A>[src]

Get enumerated values variant

pub fn is_round_robin(&self) -> bool[src]

Checks if the value of the field is ROUND_ROBIN

pub fn is_fixed_priority(&self) -> bool[src]

Checks if the value of the field is FIXED_PRIORITY

impl R<u32, Reg<u32, _MATRIX_SCFG>>[src]

pub fn slot_cycle(&self) -> SLOT_CYCLE_R[src]

Bits 0:7 - Maximum Number of Allowed Cycles for a Burst

pub fn defmstr_type(&self) -> DEFMSTR_TYPE_R[src]

Bits 16:17 - Default Master Type

pub fn fixed_defmstr(&self) -> FIXED_DEFMSTR_R[src]

Bits 18:20 - Fixed Default Master

pub fn arbt(&self) -> ARBT_R[src]

Bits 24:25 - Arbitration Type

impl R<u32, Reg<u32, _MATRIX_PRAS0>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:1 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:5 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:9 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:13 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:17 - Master 4 Priority

impl R<u32, Reg<u32, _MATRIX_PRAS1>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:1 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:5 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:9 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:13 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:17 - Master 4 Priority

impl R<u32, Reg<u32, _MATRIX_PRAS2>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:1 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:5 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:9 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:13 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:17 - Master 4 Priority

impl R<u32, Reg<u32, _MATRIX_PRAS3>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:1 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:5 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:9 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:13 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:17 - Master 4 Priority

impl R<u32, Reg<u32, _MATRIX_PRAS4>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:1 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:5 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:9 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:13 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:17 - Master 4 Priority

impl R<u32, Reg<u32, _CCFG_SYSIO>>[src]

pub fn sysio4(&self) -> SYSIO4_R[src]

Bit 4 - PB4 or TDI Assignment

pub fn sysio5(&self) -> SYSIO5_R[src]

Bit 5 - PB5 or TDO/TRACESWO Assignment

pub fn sysio6(&self) -> SYSIO6_R[src]

Bit 6 - PB6 or TMS/SWDIO Assignment

pub fn sysio7(&self) -> SYSIO7_R[src]

Bit 7 - PB7 or TCK/SWCLK Assignment

pub fn sysio10(&self) -> SYSIO10_R[src]

Bit 10 - PB10 or DDM Assignment

pub fn sysio11(&self) -> SYSIO11_R[src]

Bit 11 - PB11 or DDP Assignment

pub fn sysio12(&self) -> SYSIO12_R[src]

Bit 12 - PB12 or ERASE Assignment

impl R<u32, Reg<u32, _CCFG_SMCNFCS>>[src]

pub fn smc_nfcs0(&self) -> SMC_NFCS0_R[src]

Bit 0 - SMC NAND Flash Chip Select 0 Assignment

pub fn smc_nfcs1(&self) -> SMC_NFCS1_R[src]

Bit 1 - SMC NAND Flash Chip Select 1 Assignment

pub fn smc_nfcs2(&self) -> SMC_NFCS2_R[src]

Bit 2 - SMC NAND Flash Chip Select 2 Assignment

pub fn smc_nfcs3(&self) -> SMC_NFCS3_R[src]

Bit 3 - SMC NAND Flash Chip Select 3 Assignment

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _MATRIX_WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protect Key

impl R<u32, Reg<u32, _MATRIX_WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _PMC_SCSR>>[src]

pub fn udp(&self) -> UDP_R[src]

Bit 7 - USB Device Port Clock Status

pub fn pck0(&self) -> PCK0_R[src]

Bit 8 - Programmable Clock 0 Output Status

pub fn pck1(&self) -> PCK1_R[src]

Bit 9 - Programmable Clock 1 Output Status

pub fn pck2(&self) -> PCK2_R[src]

Bit 10 - Programmable Clock 2 Output Status

impl R<u32, Reg<u32, _PMC_PCSR0>>[src]

pub fn pid8(&self) -> PID8_R[src]

Bit 8 - Peripheral Clock 8 Status

pub fn pid9(&self) -> PID9_R[src]

Bit 9 - Peripheral Clock 9 Status

pub fn pid10(&self) -> PID10_R[src]

Bit 10 - Peripheral Clock 10 Status

pub fn pid11(&self) -> PID11_R[src]

Bit 11 - Peripheral Clock 11 Status

pub fn pid12(&self) -> PID12_R[src]

Bit 12 - Peripheral Clock 12 Status

pub fn pid13(&self) -> PID13_R[src]

Bit 13 - Peripheral Clock 13 Status

pub fn pid14(&self) -> PID14_R[src]

Bit 14 - Peripheral Clock 14 Status

pub fn pid15(&self) -> PID15_R[src]

Bit 15 - Peripheral Clock 15 Status

pub fn pid16(&self) -> PID16_R[src]

Bit 16 - Peripheral Clock 16 Status

pub fn pid17(&self) -> PID17_R[src]

Bit 17 - Peripheral Clock 17 Status

pub fn pid18(&self) -> PID18_R[src]

Bit 18 - Peripheral Clock 18 Status

pub fn pid19(&self) -> PID19_R[src]

Bit 19 - Peripheral Clock 19 Status

pub fn pid20(&self) -> PID20_R[src]

Bit 20 - Peripheral Clock 20 Status

pub fn pid21(&self) -> PID21_R[src]

Bit 21 - Peripheral Clock 21 Status

pub fn pid22(&self) -> PID22_R[src]

Bit 22 - Peripheral Clock 22 Status

pub fn pid23(&self) -> PID23_R[src]

Bit 23 - Peripheral Clock 23 Status

pub fn pid24(&self) -> PID24_R[src]

Bit 24 - Peripheral Clock 24 Status

pub fn pid25(&self) -> PID25_R[src]

Bit 25 - Peripheral Clock 25 Status

pub fn pid26(&self) -> PID26_R[src]

Bit 26 - Peripheral Clock 26 Status

pub fn pid27(&self) -> PID27_R[src]

Bit 27 - Peripheral Clock 27 Status

pub fn pid28(&self) -> PID28_R[src]

Bit 28 - Peripheral Clock 28 Status

pub fn pid29(&self) -> PID29_R[src]

Bit 29 - Peripheral Clock 29 Status

pub fn pid30(&self) -> PID30_R[src]

Bit 30 - Peripheral Clock 30 Status

pub fn pid31(&self) -> PID31_R[src]

Bit 31 - Peripheral Clock 31 Status

impl R<u8, MOSCRCF_A>[src]

pub fn variant(&self) -> Variant<u8, MOSCRCF_A>[src]

Get enumerated values variant

pub fn is_4_mhz(&self) -> bool[src]

Checks if the value of the field is _4_MHZ

pub fn is_8_mhz(&self) -> bool[src]

Checks if the value of the field is _8_MHZ

pub fn is_12_mhz(&self) -> bool[src]

Checks if the value of the field is _12_MHZ

impl R<u8, KEY_A>[src]

pub fn variant(&self) -> Variant<u8, KEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _CKGR_MOR>>[src]

pub fn moscxten(&self) -> MOSCXTEN_R[src]

Bit 0 - Main Crystal Oscillator Enable

pub fn moscxtby(&self) -> MOSCXTBY_R[src]

Bit 1 - Main Crystal Oscillator Bypass

pub fn waitmode(&self) -> WAITMODE_R[src]

Bit 2 - Wait Mode Command (Write-only)

pub fn moscrcen(&self) -> MOSCRCEN_R[src]

Bit 3 - Main On-Chip RC Oscillator Enable

pub fn moscrcf(&self) -> MOSCRCF_R[src]

Bits 4:6 - Main On-Chip RC Oscillator Frequency Selection

pub fn moscxtst(&self) -> MOSCXTST_R[src]

Bits 8:15 - Main Crystal Oscillator Start-up Time

pub fn key(&self) -> KEY_R[src]

Bits 16:23 - Write Access Password

pub fn moscsel(&self) -> MOSCSEL_R[src]

Bit 24 - Main Oscillator Selection

pub fn cfden(&self) -> CFDEN_R[src]

Bit 25 - Clock Failure Detector Enable

impl R<u32, Reg<u32, _CKGR_MCFR>>[src]

pub fn mainf(&self) -> MAINF_R[src]

Bits 0:15 - Main Clock Frequency

pub fn mainfrdy(&self) -> MAINFRDY_R[src]

Bit 16 - Main Clock Frequency Measure Ready

pub fn rcmeas(&self) -> RCMEAS_R[src]

Bit 20 - RC Oscillator Frequency Measure (write-only)

impl R<u32, Reg<u32, _CKGR_PLLAR>>[src]

pub fn diva(&self) -> DIVA_R[src]

Bits 0:7 - PLLA Front_End Divider

pub fn pllacount(&self) -> PLLACOUNT_R[src]

Bits 8:13 - PLLA Counter

pub fn mula(&self) -> MULA_R[src]

Bits 16:26 - PLLA Multiplier

pub fn one(&self) -> ONE_R[src]

Bit 29 - Must Be Set to 1

impl R<u32, Reg<u32, _CKGR_PLLBR>>[src]

pub fn divb(&self) -> DIVB_R[src]

Bits 0:7 - PLLB Front-End Divider

pub fn pllbcount(&self) -> PLLBCOUNT_R[src]

Bits 8:13 - PLLB Counter

pub fn mulb(&self) -> MULB_R[src]

Bits 16:26 - PLLB Multiplier

impl R<u8, CSS_A>[src]

pub fn variant(&self) -> CSS_A[src]

Get enumerated values variant

pub fn is_slow_clk(&self) -> bool[src]

Checks if the value of the field is SLOW_CLK

pub fn is_main_clk(&self) -> bool[src]

Checks if the value of the field is MAIN_CLK

pub fn is_plla_clk(&self) -> bool[src]

Checks if the value of the field is PLLA_CLK

pub fn is_pllb_clk(&self) -> bool[src]

Checks if the value of the field is PLLB_CLK

impl R<u8, PRES_A>[src]

pub fn variant(&self) -> PRES_A[src]

Get enumerated values variant

pub fn is_clk_1(&self) -> bool[src]

Checks if the value of the field is CLK_1

pub fn is_clk_2(&self) -> bool[src]

Checks if the value of the field is CLK_2

pub fn is_clk_4(&self) -> bool[src]

Checks if the value of the field is CLK_4

pub fn is_clk_8(&self) -> bool[src]

Checks if the value of the field is CLK_8

pub fn is_clk_16(&self) -> bool[src]

Checks if the value of the field is CLK_16

pub fn is_clk_32(&self) -> bool[src]

Checks if the value of the field is CLK_32

pub fn is_clk_64(&self) -> bool[src]

Checks if the value of the field is CLK_64

pub fn is_clk_3(&self) -> bool[src]

Checks if the value of the field is CLK_3

impl R<u32, Reg<u32, _PMC_MCKR>>[src]

pub fn css(&self) -> CSS_R[src]

Bits 0:1 - Master Clock Source Selection

pub fn pres(&self) -> PRES_R[src]

Bits 4:6 - Processor Clock Prescaler

pub fn plladiv2(&self) -> PLLADIV2_R[src]

Bit 12 - PLLA Divisor by 2

pub fn pllbdiv2(&self) -> PLLBDIV2_R[src]

Bit 13 - PLLB Divisor by 2

impl R<u32, Reg<u32, _PMC_USB>>[src]

pub fn usbs(&self) -> USBS_R[src]

Bit 0 - USB Input Clock Selection

pub fn usbdiv(&self) -> USBDIV_R[src]

Bits 8:11 - Divider for USB Clock

impl R<u8, CSS_A>[src]

pub fn variant(&self) -> Variant<u8, CSS_A>[src]

Get enumerated values variant

pub fn is_slow_clk(&self) -> bool[src]

Checks if the value of the field is SLOW_CLK

pub fn is_main_clk(&self) -> bool[src]

Checks if the value of the field is MAIN_CLK

pub fn is_plla_clk(&self) -> bool[src]

Checks if the value of the field is PLLA_CLK

pub fn is_pllb_clk(&self) -> bool[src]

Checks if the value of the field is PLLB_CLK

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

impl R<u8, PRES_A>[src]

pub fn variant(&self) -> Variant<u8, PRES_A>[src]

Get enumerated values variant

pub fn is_clk_1(&self) -> bool[src]

Checks if the value of the field is CLK_1

pub fn is_clk_2(&self) -> bool[src]

Checks if the value of the field is CLK_2

pub fn is_clk_4(&self) -> bool[src]

Checks if the value of the field is CLK_4

pub fn is_clk_8(&self) -> bool[src]

Checks if the value of the field is CLK_8

pub fn is_clk_16(&self) -> bool[src]

Checks if the value of the field is CLK_16

pub fn is_clk_32(&self) -> bool[src]

Checks if the value of the field is CLK_32

pub fn is_clk_64(&self) -> bool[src]

Checks if the value of the field is CLK_64

impl R<u32, Reg<u32, _PMC_PCK>>[src]

pub fn css(&self) -> CSS_R[src]

Bits 0:2 - Master Clock Source Selection

pub fn pres(&self) -> PRES_R[src]

Bits 4:6 - Programmable Clock Prescaler

impl R<u32, Reg<u32, _PMC_SR>>[src]

pub fn moscxts(&self) -> MOSCXTS_R[src]

Bit 0 - Main Crystal Oscillator Status

pub fn locka(&self) -> LOCKA_R[src]

Bit 1 - PLLA Lock Status

pub fn lockb(&self) -> LOCKB_R[src]

Bit 2 - PLLB Lock Status

pub fn mckrdy(&self) -> MCKRDY_R[src]

Bit 3 - Master Clock Status

pub fn oscsels(&self) -> OSCSELS_R[src]

Bit 7 - Slow Clock Oscillator Selection

pub fn pckrdy0(&self) -> PCKRDY0_R[src]

Bit 8 - Programmable Clock Ready Status

pub fn pckrdy1(&self) -> PCKRDY1_R[src]

Bit 9 - Programmable Clock Ready Status

pub fn pckrdy2(&self) -> PCKRDY2_R[src]

Bit 10 - Programmable Clock Ready Status

pub fn moscsels(&self) -> MOSCSELS_R[src]

Bit 16 - Main Oscillator Selection Status

pub fn moscrcs(&self) -> MOSCRCS_R[src]

Bit 17 - Main On-Chip RC Oscillator Status

pub fn cfdev(&self) -> CFDEV_R[src]

Bit 18 - Clock Failure Detector Event

pub fn cfds(&self) -> CFDS_R[src]

Bit 19 - Clock Failure Detector Status

pub fn fos(&self) -> FOS_R[src]

Bit 20 - Clock Failure Detector Fault Output Status

impl R<u32, Reg<u32, _PMC_IMR>>[src]

pub fn moscxts(&self) -> MOSCXTS_R[src]

Bit 0 - Main Crystal Oscillator Status Interrupt Mask

pub fn locka(&self) -> LOCKA_R[src]

Bit 1 - PLLA Lock Interrupt Mask

pub fn lockb(&self) -> LOCKB_R[src]

Bit 2 - PLLB Lock Interrupt Mask

pub fn mckrdy(&self) -> MCKRDY_R[src]

Bit 3 - Master Clock Ready Interrupt Mask

pub fn pckrdy0(&self) -> PCKRDY0_R[src]

Bit 8 - Programmable Clock Ready 0 Interrupt Mask

pub fn pckrdy1(&self) -> PCKRDY1_R[src]

Bit 9 - Programmable Clock Ready 1 Interrupt Mask

pub fn pckrdy2(&self) -> PCKRDY2_R[src]

Bit 10 - Programmable Clock Ready 2 Interrupt Mask

pub fn moscsels(&self) -> MOSCSELS_R[src]

Bit 16 - Main Oscillator Selection Status Interrupt Mask

pub fn moscrcs(&self) -> MOSCRCS_R[src]

Bit 17 - Main On-Chip RC Status Interrupt Mask

pub fn cfdev(&self) -> CFDEV_R[src]

Bit 18 - Clock Failure Detector Event Interrupt Mask

impl R<u8, FLPM_A>[src]

pub fn variant(&self) -> Variant<u8, FLPM_A>[src]

Get enumerated values variant

pub fn is_flash_standby(&self) -> bool[src]

Checks if the value of the field is FLASH_STANDBY

pub fn is_flash_deep_powerdown(&self) -> bool[src]

Checks if the value of the field is FLASH_DEEP_POWERDOWN

pub fn is_flash_idle(&self) -> bool[src]

Checks if the value of the field is FLASH_IDLE

impl R<u32, Reg<u32, _PMC_FSMR>>[src]

pub fn fstt0(&self) -> FSTT0_R[src]

Bit 0 - Fast Startup Input Enable 0

pub fn fstt1(&self) -> FSTT1_R[src]

Bit 1 - Fast Startup Input Enable 1

pub fn fstt2(&self) -> FSTT2_R[src]

Bit 2 - Fast Startup Input Enable 2

pub fn fstt3(&self) -> FSTT3_R[src]

Bit 3 - Fast Startup Input Enable 3

pub fn fstt4(&self) -> FSTT4_R[src]

Bit 4 - Fast Startup Input Enable 4

pub fn fstt5(&self) -> FSTT5_R[src]

Bit 5 - Fast Startup Input Enable 5

pub fn fstt6(&self) -> FSTT6_R[src]

Bit 6 - Fast Startup Input Enable 6

pub fn fstt7(&self) -> FSTT7_R[src]

Bit 7 - Fast Startup Input Enable 7

pub fn fstt8(&self) -> FSTT8_R[src]

Bit 8 - Fast Startup Input Enable 8

pub fn fstt9(&self) -> FSTT9_R[src]

Bit 9 - Fast Startup Input Enable 9

pub fn fstt10(&self) -> FSTT10_R[src]

Bit 10 - Fast Startup Input Enable 10

pub fn fstt11(&self) -> FSTT11_R[src]

Bit 11 - Fast Startup Input Enable 11

pub fn fstt12(&self) -> FSTT12_R[src]

Bit 12 - Fast Startup Input Enable 12

pub fn fstt13(&self) -> FSTT13_R[src]

Bit 13 - Fast Startup Input Enable 13

pub fn fstt14(&self) -> FSTT14_R[src]

Bit 14 - Fast Startup Input Enable 14

pub fn fstt15(&self) -> FSTT15_R[src]

Bit 15 - Fast Startup Input Enable 15

pub fn rttal(&self) -> RTTAL_R[src]

Bit 16 - RTT Alarm Enable

pub fn rtcal(&self) -> RTCAL_R[src]

Bit 17 - RTC Alarm Enable

pub fn usbal(&self) -> USBAL_R[src]

Bit 18 - USB Alarm Enable

pub fn lpm(&self) -> LPM_R[src]

Bit 20 - Low-power Mode

pub fn flpm(&self) -> FLPM_R[src]

Bits 21:22 - Flash Low-power Mode

impl R<u32, Reg<u32, _PMC_FSPR>>[src]

pub fn fstp0(&self) -> FSTP0_R[src]

Bit 0 - Fast Startup Input Polarityx

pub fn fstp1(&self) -> FSTP1_R[src]

Bit 1 - Fast Startup Input Polarityx

pub fn fstp2(&self) -> FSTP2_R[src]

Bit 2 - Fast Startup Input Polarityx

pub fn fstp3(&self) -> FSTP3_R[src]

Bit 3 - Fast Startup Input Polarityx

pub fn fstp4(&self) -> FSTP4_R[src]

Bit 4 - Fast Startup Input Polarityx

pub fn fstp5(&self) -> FSTP5_R[src]

Bit 5 - Fast Startup Input Polarityx

pub fn fstp6(&self) -> FSTP6_R[src]

Bit 6 - Fast Startup Input Polarityx

pub fn fstp7(&self) -> FSTP7_R[src]

Bit 7 - Fast Startup Input Polarityx

pub fn fstp8(&self) -> FSTP8_R[src]

Bit 8 - Fast Startup Input Polarityx

pub fn fstp9(&self) -> FSTP9_R[src]

Bit 9 - Fast Startup Input Polarityx

pub fn fstp10(&self) -> FSTP10_R[src]

Bit 10 - Fast Startup Input Polarityx

pub fn fstp11(&self) -> FSTP11_R[src]

Bit 11 - Fast Startup Input Polarityx

pub fn fstp12(&self) -> FSTP12_R[src]

Bit 12 - Fast Startup Input Polarityx

pub fn fstp13(&self) -> FSTP13_R[src]

Bit 13 - Fast Startup Input Polarityx

pub fn fstp14(&self) -> FSTP14_R[src]

Bit 14 - Fast Startup Input Polarityx

pub fn fstp15(&self) -> FSTP15_R[src]

Bit 15 - Fast Startup Input Polarityx

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _PMC_WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _PMC_WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _PMC_PCSR1>>[src]

pub fn pid32(&self) -> PID32_R[src]

Bit 0 - Peripheral Clock 32 Status

pub fn pid33(&self) -> PID33_R[src]

Bit 1 - Peripheral Clock 33 Status

pub fn pid34(&self) -> PID34_R[src]

Bit 2 - Peripheral Clock 34 Status

impl R<u32, Reg<u32, _PMC_OCR>>[src]

pub fn cal4(&self) -> CAL4_R[src]

Bits 0:6 - RC Oscillator Calibration bits for 4 MHz

pub fn sel4(&self) -> SEL4_R[src]

Bit 7 - Selection of RC Oscillator Calibration bits for 4 MHz

pub fn cal8(&self) -> CAL8_R[src]

Bits 8:14 - RC Oscillator Calibration bits for 8 MHz

pub fn sel8(&self) -> SEL8_R[src]

Bit 15 - Selection of RC Oscillator Calibration bits for 8 MHz

pub fn cal12(&self) -> CAL12_R[src]

Bits 16:22 - RC Oscillator Calibration bits for 12 MHz

pub fn sel12(&self) -> SEL12_R[src]

Bit 23 - Selection of RC Oscillator Calibration bits for 12 MHz

impl R<u8, PAR_A>[src]

pub fn variant(&self) -> Variant<u8, PAR_A>[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

pub fn is_space(&self) -> bool[src]

Checks if the value of the field is SPACE

pub fn is_mark(&self) -> bool[src]

Checks if the value of the field is MARK

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

impl R<u8, CHMODE_A>[src]

pub fn variant(&self) -> CHMODE_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_automatic(&self) -> bool[src]

Checks if the value of the field is AUTOMATIC

pub fn is_local_loopback(&self) -> bool[src]

Checks if the value of the field is LOCAL_LOOPBACK

pub fn is_remote_loopback(&self) -> bool[src]

Checks if the value of the field is REMOTE_LOOPBACK

impl R<u32, Reg<u32, _MR>>[src]

pub fn par(&self) -> PAR_R[src]

Bits 9:11 - Parity Type

pub fn chmode(&self) -> CHMODE_R[src]

Bits 14:15 - Channel Mode

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Mask RXRDY Interrupt

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Disable TXRDY Interrupt

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - Mask End of Receive Transfer Interrupt

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - Mask End of Transmit Interrupt

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Mask Overrun Error Interrupt

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Mask Framing Error Interrupt

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Mask Parity Error Interrupt

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Mask TXEMPTY Interrupt

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Mask TXBUFE Interrupt

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Mask RXBUFF Interrupt

impl R<u32, Reg<u32, _SR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of Receiver Transfer

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of Transmitter Transfer

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Transmission Buffer Empty

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Receive Buffer Full

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxchr(&self) -> RXCHR_R[src]

Bits 0:7 - Received Character

impl R<u32, Reg<u32, _BRGR>>[src]

pub fn cd(&self) -> CD_R[src]

Bits 0:15 - Clock Divisor

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, EPROC_A>[src]

pub fn variant(&self) -> Variant<u8, EPROC_A>[src]

Get enumerated values variant

pub fn is_arm946es(&self) -> bool[src]

Checks if the value of the field is ARM946ES

pub fn is_arm7tdmi(&self) -> bool[src]

Checks if the value of the field is ARM7TDMI

pub fn is_cm3(&self) -> bool[src]

Checks if the value of the field is CM3

pub fn is_arm920t(&self) -> bool[src]

Checks if the value of the field is ARM920T

pub fn is_arm926ejs(&self) -> bool[src]

Checks if the value of the field is ARM926EJS

pub fn is_ca5(&self) -> bool[src]

Checks if the value of the field is CA5

pub fn is_cm4(&self) -> bool[src]

Checks if the value of the field is CM4

impl R<u8, NVPSIZ_A>[src]

pub fn variant(&self) -> Variant<u8, NVPSIZ_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_8k(&self) -> bool[src]

Checks if the value of the field is _8K

pub fn is_16k(&self) -> bool[src]

Checks if the value of the field is _16K

pub fn is_32k(&self) -> bool[src]

Checks if the value of the field is _32K

pub fn is_64k(&self) -> bool[src]

Checks if the value of the field is _64K

pub fn is_128k(&self) -> bool[src]

Checks if the value of the field is _128K

pub fn is_160k(&self) -> bool[src]

Checks if the value of the field is _160K

pub fn is_256k(&self) -> bool[src]

Checks if the value of the field is _256K

pub fn is_512k(&self) -> bool[src]

Checks if the value of the field is _512K

pub fn is_1024k(&self) -> bool[src]

Checks if the value of the field is _1024K

pub fn is_2048k(&self) -> bool[src]

Checks if the value of the field is _2048K

impl R<u8, NVPSIZ2_A>[src]

pub fn variant(&self) -> Variant<u8, NVPSIZ2_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_8k(&self) -> bool[src]

Checks if the value of the field is _8K

pub fn is_16k(&self) -> bool[src]

Checks if the value of the field is _16K

pub fn is_32k(&self) -> bool[src]

Checks if the value of the field is _32K

pub fn is_64k(&self) -> bool[src]

Checks if the value of the field is _64K

pub fn is_128k(&self) -> bool[src]

Checks if the value of the field is _128K

pub fn is_256k(&self) -> bool[src]

Checks if the value of the field is _256K

pub fn is_512k(&self) -> bool[src]

Checks if the value of the field is _512K

pub fn is_1024k(&self) -> bool[src]

Checks if the value of the field is _1024K

pub fn is_2048k(&self) -> bool[src]

Checks if the value of the field is _2048K

impl R<u8, SRAMSIZ_A>[src]

pub fn variant(&self) -> SRAMSIZ_A[src]

Get enumerated values variant

pub fn is_48k(&self) -> bool[src]

Checks if the value of the field is _48K

pub fn is_192k(&self) -> bool[src]

Checks if the value of the field is _192K

pub fn is_384k(&self) -> bool[src]

Checks if the value of the field is _384K

pub fn is_6k(&self) -> bool[src]

Checks if the value of the field is _6K

pub fn is_24k(&self) -> bool[src]

Checks if the value of the field is _24K

pub fn is_4k(&self) -> bool[src]

Checks if the value of the field is _4K

pub fn is_80k(&self) -> bool[src]

Checks if the value of the field is _80K

pub fn is_160k(&self) -> bool[src]

Checks if the value of the field is _160K

pub fn is_8k(&self) -> bool[src]

Checks if the value of the field is _8K

pub fn is_16k(&self) -> bool[src]

Checks if the value of the field is _16K

pub fn is_32k(&self) -> bool[src]

Checks if the value of the field is _32K

pub fn is_64k(&self) -> bool[src]

Checks if the value of the field is _64K

pub fn is_128k(&self) -> bool[src]

Checks if the value of the field is _128K

pub fn is_256k(&self) -> bool[src]

Checks if the value of the field is _256K

pub fn is_96k(&self) -> bool[src]

Checks if the value of the field is _96K

pub fn is_512k(&self) -> bool[src]

Checks if the value of the field is _512K

impl R<u8, ARCH_A>[src]

pub fn variant(&self) -> Variant<u8, ARCH_A>[src]

Get enumerated values variant

pub fn is_sam4sx_a(&self) -> bool[src]

Checks if the value of the field is SAM4SXA

pub fn is_sam4sx_b(&self) -> bool[src]

Checks if the value of the field is SAM4SXB

pub fn is_sam4sx_c(&self) -> bool[src]

Checks if the value of the field is SAM4SXC

impl R<u8, NVPTYP_A>[src]

pub fn variant(&self) -> Variant<u8, NVPTYP_A>[src]

Get enumerated values variant

pub fn is_rom(&self) -> bool[src]

Checks if the value of the field is ROM

pub fn is_romless(&self) -> bool[src]

Checks if the value of the field is ROMLESS

pub fn is_flash(&self) -> bool[src]

Checks if the value of the field is FLASH

pub fn is_rom_flash(&self) -> bool[src]

Checks if the value of the field is ROM_FLASH

pub fn is_sram(&self) -> bool[src]

Checks if the value of the field is SRAM

impl R<u32, Reg<u32, _CIDR>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:4 - Version of the Device

pub fn eproc(&self) -> EPROC_R[src]

Bits 5:7 - Embedded Processor

pub fn nvpsiz(&self) -> NVPSIZ_R[src]

Bits 8:11 - Nonvolatile Program Memory Size

pub fn nvpsiz2(&self) -> NVPSIZ2_R[src]

Bits 12:15 - Second Nonvolatile Program Memory Size

pub fn sramsiz(&self) -> SRAMSIZ_R[src]

Bits 16:19 - Internal SRAM Size

pub fn arch(&self) -> ARCH_R[src]

Bits 20:27 - Architecture Identifier

pub fn nvptyp(&self) -> NVPTYP_R[src]

Bits 28:30 - Nonvolatile Program Memory Type

pub fn ext(&self) -> EXT_R[src]

Bit 31 - Extension Flag

impl R<u32, Reg<u32, _EXID>>[src]

pub fn exid(&self) -> EXID_R[src]

Bits 0:31 - Chip ID Extension

impl R<u8, PAR_A>[src]

pub fn variant(&self) -> Variant<u8, PAR_A>[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

pub fn is_space(&self) -> bool[src]

Checks if the value of the field is SPACE

pub fn is_mark(&self) -> bool[src]

Checks if the value of the field is MARK

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

impl R<u8, CHMODE_A>[src]

pub fn variant(&self) -> CHMODE_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_automatic(&self) -> bool[src]

Checks if the value of the field is AUTOMATIC

pub fn is_local_loopback(&self) -> bool[src]

Checks if the value of the field is LOCAL_LOOPBACK

pub fn is_remote_loopback(&self) -> bool[src]

Checks if the value of the field is REMOTE_LOOPBACK

impl R<u32, Reg<u32, _MR>>[src]

pub fn par(&self) -> PAR_R[src]

Bits 9:11 - Parity Type

pub fn chmode(&self) -> CHMODE_R[src]

Bits 14:15 - Channel Mode

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Mask RXRDY Interrupt

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Disable TXRDY Interrupt

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - Mask End of Receive Transfer Interrupt

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - Mask End of Transmit Interrupt

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Mask Overrun Error Interrupt

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Mask Framing Error Interrupt

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Mask Parity Error Interrupt

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Mask TXEMPTY Interrupt

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Mask TXBUFE Interrupt

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Mask RXBUFF Interrupt

impl R<u32, Reg<u32, _SR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of Receiver Transfer

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of Transmitter Transfer

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Transmission Buffer Empty

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Receive Buffer Full

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxchr(&self) -> RXCHR_R[src]

Bits 0:7 - Received Character

impl R<u32, Reg<u32, _BRGR>>[src]

pub fn cd(&self) -> CD_R[src]

Bits 0:15 - Clock Divisor

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u32, Reg<u32, _FMR>>[src]

pub fn frdy(&self) -> FRDY_R[src]

Bit 0 - Flash Ready Interrupt Enable

pub fn fws(&self) -> FWS_R[src]

Bits 8:11 - Flash Wait State

pub fn scod(&self) -> SCOD_R[src]

Bit 16 - Sequential Code Optimization Disable

pub fn fam(&self) -> FAM_R[src]

Bit 24 - Flash Access Mode

pub fn cloe(&self) -> CLOE_R[src]

Bit 26 - Code Loop Optimization Enable

impl R<u32, Reg<u32, _FSR>>[src]

pub fn frdy(&self) -> FRDY_R[src]

Bit 0 - Flash Ready Status (cleared when Flash is busy)

pub fn fcmde(&self) -> FCMDE_R[src]

Bit 1 - Flash Command Error Status (cleared on read or by writing EEFC_FCR)

pub fn flocke(&self) -> FLOCKE_R[src]

Bit 2 - Flash Lock Error Status (cleared on read)

pub fn flerr(&self) -> FLERR_R[src]

Bit 3 - Flash Error Status (cleared when a programming operation starts)

impl R<u32, Reg<u32, _FRR>>[src]

pub fn fvalue(&self) -> FVALUE_R[src]

Bits 0:31 - Flash Result Value

impl R<u32, Reg<u32, _PSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - PIO Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - PIO Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - PIO Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - PIO Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - PIO Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - PIO Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - PIO Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - PIO Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - PIO Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - PIO Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - PIO Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - PIO Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - PIO Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - PIO Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - PIO Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - PIO Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - PIO Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - PIO Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - PIO Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - PIO Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - PIO Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - PIO Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - PIO Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - PIO Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - PIO Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - PIO Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - PIO Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - PIO Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - PIO Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - PIO Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - PIO Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - PIO Status

impl R<u32, Reg<u32, _OSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Status

impl R<u32, Reg<u32, _IFSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Filter Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Filter Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Filter Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Filter Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Filter Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Filter Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Filter Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Filter Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Filter Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Filter Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Filter Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Filter Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Filter Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Filter Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Filter Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Filter Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Filter Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Filter Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Filter Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Filter Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Filter Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Filter Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Filter Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Filter Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Filter Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Filter Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Filter Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Filter Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Filter Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Filter Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Filter Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Filter Status

impl R<u32, Reg<u32, _ODSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Data Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Data Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Data Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Data Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Data Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Data Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Data Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Data Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Data Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Data Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Data Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Data Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Data Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Data Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Data Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Data Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Data Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Data Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Data Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Data Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Data Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Data Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Data Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Data Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Data Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Data Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Data Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Data Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Data Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Data Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Data Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Data Status

impl R<u32, Reg<u32, _PDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Data Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Data Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Data Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Data Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Data Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Data Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Data Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Data Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Data Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Data Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Data Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Data Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Data Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Data Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Data Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Data Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Data Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Data Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Data Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Data Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Data Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Data Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Data Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Data Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Data Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Data Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Data Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Data Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Data Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Data Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Data Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Data Status

impl R<u32, Reg<u32, _IMR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Change Interrupt Mask

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Change Interrupt Mask

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Change Interrupt Mask

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Change Interrupt Mask

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Change Interrupt Mask

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Change Interrupt Mask

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Change Interrupt Mask

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Change Interrupt Mask

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Change Interrupt Mask

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Change Interrupt Mask

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Change Interrupt Mask

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Change Interrupt Mask

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Change Interrupt Mask

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Change Interrupt Mask

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Change Interrupt Mask

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Change Interrupt Mask

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Change Interrupt Mask

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Change Interrupt Mask

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Change Interrupt Mask

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Change Interrupt Mask

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Change Interrupt Mask

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Change Interrupt Mask

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Change Interrupt Mask

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Change Interrupt Mask

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Change Interrupt Mask

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Change Interrupt Mask

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Change Interrupt Mask

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Change Interrupt Mask

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Change Interrupt Mask

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Change Interrupt Mask

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Change Interrupt Mask

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Change Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Change Interrupt Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Change Interrupt Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Change Interrupt Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Change Interrupt Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Change Interrupt Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Change Interrupt Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Change Interrupt Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Change Interrupt Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Change Interrupt Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Change Interrupt Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Change Interrupt Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Change Interrupt Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Change Interrupt Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Change Interrupt Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Change Interrupt Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Change Interrupt Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Change Interrupt Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Change Interrupt Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Change Interrupt Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Change Interrupt Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Change Interrupt Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Change Interrupt Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Change Interrupt Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Change Interrupt Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Change Interrupt Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Change Interrupt Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Change Interrupt Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Change Interrupt Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Change Interrupt Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Change Interrupt Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Change Interrupt Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Change Interrupt Status

impl R<u32, Reg<u32, _MDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Multi-drive Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Multi-drive Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Multi-drive Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Multi-drive Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Multi-drive Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Multi-drive Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Multi-drive Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Multi-drive Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Multi-drive Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Multi-drive Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Multi-drive Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Multi-drive Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Multi-drive Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Multi-drive Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Multi-drive Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Multi-drive Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Multi-drive Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Multi-drive Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Multi-drive Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Multi-drive Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Multi-drive Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Multi-drive Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Multi-drive Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Multi-drive Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Multi-drive Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Multi-drive Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Multi-drive Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Multi-drive Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Multi-drive Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Multi-drive Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Multi-drive Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Multi-drive Status

impl R<u32, Reg<u32, _PUSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-Up Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-Up Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-Up Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-Up Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-Up Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-Up Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-Up Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-Up Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-Up Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-Up Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-Up Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-Up Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-Up Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-Up Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-Up Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-Up Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-Up Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-Up Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-Up Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-Up Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-Up Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-Up Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-Up Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-Up Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-Up Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-Up Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-Up Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-Up Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-Up Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-Up Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-Up Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-Up Status

impl R<u32, Reg<u32, _ABCDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Peripheral Select

pub fn p1(&self) -> P1_R[src]

Bit 1 - Peripheral Select

pub fn p2(&self) -> P2_R[src]

Bit 2 - Peripheral Select

pub fn p3(&self) -> P3_R[src]

Bit 3 - Peripheral Select

pub fn p4(&self) -> P4_R[src]

Bit 4 - Peripheral Select

pub fn p5(&self) -> P5_R[src]

Bit 5 - Peripheral Select

pub fn p6(&self) -> P6_R[src]

Bit 6 - Peripheral Select

pub fn p7(&self) -> P7_R[src]

Bit 7 - Peripheral Select

pub fn p8(&self) -> P8_R[src]

Bit 8 - Peripheral Select

pub fn p9(&self) -> P9_R[src]

Bit 9 - Peripheral Select

pub fn p10(&self) -> P10_R[src]

Bit 10 - Peripheral Select

pub fn p11(&self) -> P11_R[src]

Bit 11 - Peripheral Select

pub fn p12(&self) -> P12_R[src]

Bit 12 - Peripheral Select

pub fn p13(&self) -> P13_R[src]

Bit 13 - Peripheral Select

pub fn p14(&self) -> P14_R[src]

Bit 14 - Peripheral Select

pub fn p15(&self) -> P15_R[src]

Bit 15 - Peripheral Select

pub fn p16(&self) -> P16_R[src]

Bit 16 - Peripheral Select

pub fn p17(&self) -> P17_R[src]

Bit 17 - Peripheral Select

pub fn p18(&self) -> P18_R[src]

Bit 18 - Peripheral Select

pub fn p19(&self) -> P19_R[src]

Bit 19 - Peripheral Select

pub fn p20(&self) -> P20_R[src]

Bit 20 - Peripheral Select

pub fn p21(&self) -> P21_R[src]

Bit 21 - Peripheral Select

pub fn p22(&self) -> P22_R[src]

Bit 22 - Peripheral Select

pub fn p23(&self) -> P23_R[src]

Bit 23 - Peripheral Select

pub fn p24(&self) -> P24_R[src]

Bit 24 - Peripheral Select

pub fn p25(&self) -> P25_R[src]

Bit 25 - Peripheral Select

pub fn p26(&self) -> P26_R[src]

Bit 26 - Peripheral Select

pub fn p27(&self) -> P27_R[src]

Bit 27 - Peripheral Select

pub fn p28(&self) -> P28_R[src]

Bit 28 - Peripheral Select

pub fn p29(&self) -> P29_R[src]

Bit 29 - Peripheral Select

pub fn p30(&self) -> P30_R[src]

Bit 30 - Peripheral Select

pub fn p31(&self) -> P31_R[src]

Bit 31 - Peripheral Select

impl R<u32, Reg<u32, _IFSCSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Glitch or Debouncing Filter Selection Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Glitch or Debouncing Filter Selection Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Glitch or Debouncing Filter Selection Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Glitch or Debouncing Filter Selection Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Glitch or Debouncing Filter Selection Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Glitch or Debouncing Filter Selection Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Glitch or Debouncing Filter Selection Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Glitch or Debouncing Filter Selection Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Glitch or Debouncing Filter Selection Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Glitch or Debouncing Filter Selection Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Glitch or Debouncing Filter Selection Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Glitch or Debouncing Filter Selection Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Glitch or Debouncing Filter Selection Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Glitch or Debouncing Filter Selection Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Glitch or Debouncing Filter Selection Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Glitch or Debouncing Filter Selection Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Glitch or Debouncing Filter Selection Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Glitch or Debouncing Filter Selection Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Glitch or Debouncing Filter Selection Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Glitch or Debouncing Filter Selection Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Glitch or Debouncing Filter Selection Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Glitch or Debouncing Filter Selection Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Glitch or Debouncing Filter Selection Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Glitch or Debouncing Filter Selection Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Glitch or Debouncing Filter Selection Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Glitch or Debouncing Filter Selection Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Glitch or Debouncing Filter Selection Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Glitch or Debouncing Filter Selection Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Glitch or Debouncing Filter Selection Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Glitch or Debouncing Filter Selection Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Glitch or Debouncing Filter Selection Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Glitch or Debouncing Filter Selection Status

impl R<u32, Reg<u32, _SCDR>>[src]

pub fn div(&self) -> DIV_R[src]

Bits 0:13 - Slow Clock Divider Selection for Debouncing

impl R<u32, Reg<u32, _PPDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-Down Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-Down Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-Down Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-Down Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-Down Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-Down Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-Down Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-Down Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-Down Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-Down Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-Down Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-Down Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-Down Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-Down Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-Down Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-Down Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-Down Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-Down Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-Down Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-Down Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-Down Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-Down Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-Down Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-Down Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-Down Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-Down Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-Down Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-Down Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-Down Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-Down Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-Down Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-Down Status

impl R<u32, Reg<u32, _OWSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Write Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Write Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Write Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Write Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Write Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Write Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Write Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Write Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Write Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Write Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Write Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Write Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Write Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Write Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Write Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Write Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Write Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Write Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Write Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Write Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Write Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Write Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Write Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Write Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Write Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Write Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Write Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Write Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Write Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Write Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Write Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Write Status

impl R<u32, Reg<u32, _AIMMR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - IO Line Index

pub fn p1(&self) -> P1_R[src]

Bit 1 - IO Line Index

pub fn p2(&self) -> P2_R[src]

Bit 2 - IO Line Index

pub fn p3(&self) -> P3_R[src]

Bit 3 - IO Line Index

pub fn p4(&self) -> P4_R[src]

Bit 4 - IO Line Index

pub fn p5(&self) -> P5_R[src]

Bit 5 - IO Line Index

pub fn p6(&self) -> P6_R[src]

Bit 6 - IO Line Index

pub fn p7(&self) -> P7_R[src]

Bit 7 - IO Line Index

pub fn p8(&self) -> P8_R[src]

Bit 8 - IO Line Index

pub fn p9(&self) -> P9_R[src]

Bit 9 - IO Line Index

pub fn p10(&self) -> P10_R[src]

Bit 10 - IO Line Index

pub fn p11(&self) -> P11_R[src]

Bit 11 - IO Line Index

pub fn p12(&self) -> P12_R[src]

Bit 12 - IO Line Index

pub fn p13(&self) -> P13_R[src]

Bit 13 - IO Line Index

pub fn p14(&self) -> P14_R[src]

Bit 14 - IO Line Index

pub fn p15(&self) -> P15_R[src]

Bit 15 - IO Line Index

pub fn p16(&self) -> P16_R[src]

Bit 16 - IO Line Index

pub fn p17(&self) -> P17_R[src]

Bit 17 - IO Line Index

pub fn p18(&self) -> P18_R[src]

Bit 18 - IO Line Index

pub fn p19(&self) -> P19_R[src]

Bit 19 - IO Line Index

pub fn p20(&self) -> P20_R[src]

Bit 20 - IO Line Index

pub fn p21(&self) -> P21_R[src]

Bit 21 - IO Line Index

pub fn p22(&self) -> P22_R[src]

Bit 22 - IO Line Index

pub fn p23(&self) -> P23_R[src]

Bit 23 - IO Line Index

pub fn p24(&self) -> P24_R[src]

Bit 24 - IO Line Index

pub fn p25(&self) -> P25_R[src]

Bit 25 - IO Line Index

pub fn p26(&self) -> P26_R[src]

Bit 26 - IO Line Index

pub fn p27(&self) -> P27_R[src]

Bit 27 - IO Line Index

pub fn p28(&self) -> P28_R[src]

Bit 28 - IO Line Index

pub fn p29(&self) -> P29_R[src]

Bit 29 - IO Line Index

pub fn p30(&self) -> P30_R[src]

Bit 30 - IO Line Index

pub fn p31(&self) -> P31_R[src]

Bit 31 - IO Line Index

impl R<u32, Reg<u32, _ELSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Edge/Level Interrupt Source Selection

pub fn p1(&self) -> P1_R[src]

Bit 1 - Edge/Level Interrupt Source Selection

pub fn p2(&self) -> P2_R[src]

Bit 2 - Edge/Level Interrupt Source Selection

pub fn p3(&self) -> P3_R[src]

Bit 3 - Edge/Level Interrupt Source Selection

pub fn p4(&self) -> P4_R[src]

Bit 4 - Edge/Level Interrupt Source Selection

pub fn p5(&self) -> P5_R[src]

Bit 5 - Edge/Level Interrupt Source Selection

pub fn p6(&self) -> P6_R[src]

Bit 6 - Edge/Level Interrupt Source Selection

pub fn p7(&self) -> P7_R[src]

Bit 7 - Edge/Level Interrupt Source Selection

pub fn p8(&self) -> P8_R[src]

Bit 8 - Edge/Level Interrupt Source Selection

pub fn p9(&self) -> P9_R[src]

Bit 9 - Edge/Level Interrupt Source Selection

pub fn p10(&self) -> P10_R[src]

Bit 10 - Edge/Level Interrupt Source Selection

pub fn p11(&self) -> P11_R[src]

Bit 11 - Edge/Level Interrupt Source Selection

pub fn p12(&self) -> P12_R[src]

Bit 12 - Edge/Level Interrupt Source Selection

pub fn p13(&self) -> P13_R[src]

Bit 13 - Edge/Level Interrupt Source Selection

pub fn p14(&self) -> P14_R[src]

Bit 14 - Edge/Level Interrupt Source Selection

pub fn p15(&self) -> P15_R[src]

Bit 15 - Edge/Level Interrupt Source Selection

pub fn p16(&self) -> P16_R[src]

Bit 16 - Edge/Level Interrupt Source Selection

pub fn p17(&self) -> P17_R[src]

Bit 17 - Edge/Level Interrupt Source Selection

pub fn p18(&self) -> P18_R[src]

Bit 18 - Edge/Level Interrupt Source Selection

pub fn p19(&self) -> P19_R[src]

Bit 19 - Edge/Level Interrupt Source Selection

pub fn p20(&self) -> P20_R[src]

Bit 20 - Edge/Level Interrupt Source Selection

pub fn p21(&self) -> P21_R[src]

Bit 21 - Edge/Level Interrupt Source Selection

pub fn p22(&self) -> P22_R[src]

Bit 22 - Edge/Level Interrupt Source Selection

pub fn p23(&self) -> P23_R[src]

Bit 23 - Edge/Level Interrupt Source Selection

pub fn p24(&self) -> P24_R[src]

Bit 24 - Edge/Level Interrupt Source Selection

pub fn p25(&self) -> P25_R[src]

Bit 25 - Edge/Level Interrupt Source Selection

pub fn p26(&self) -> P26_R[src]

Bit 26 - Edge/Level Interrupt Source Selection

pub fn p27(&self) -> P27_R[src]

Bit 27 - Edge/Level Interrupt Source Selection

pub fn p28(&self) -> P28_R[src]

Bit 28 - Edge/Level Interrupt Source Selection

pub fn p29(&self) -> P29_R[src]

Bit 29 - Edge/Level Interrupt Source Selection

pub fn p30(&self) -> P30_R[src]

Bit 30 - Edge/Level Interrupt Source Selection

pub fn p31(&self) -> P31_R[src]

Bit 31 - Edge/Level Interrupt Source Selection

impl R<u32, Reg<u32, _FRLHSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Edge/Level Interrupt Source Selection

pub fn p1(&self) -> P1_R[src]

Bit 1 - Edge/Level Interrupt Source Selection

pub fn p2(&self) -> P2_R[src]

Bit 2 - Edge/Level Interrupt Source Selection

pub fn p3(&self) -> P3_R[src]

Bit 3 - Edge/Level Interrupt Source Selection

pub fn p4(&self) -> P4_R[src]

Bit 4 - Edge/Level Interrupt Source Selection

pub fn p5(&self) -> P5_R[src]

Bit 5 - Edge/Level Interrupt Source Selection

pub fn p6(&self) -> P6_R[src]

Bit 6 - Edge/Level Interrupt Source Selection

pub fn p7(&self) -> P7_R[src]

Bit 7 - Edge/Level Interrupt Source Selection

pub fn p8(&self) -> P8_R[src]

Bit 8 - Edge/Level Interrupt Source Selection

pub fn p9(&self) -> P9_R[src]

Bit 9 - Edge/Level Interrupt Source Selection

pub fn p10(&self) -> P10_R[src]

Bit 10 - Edge/Level Interrupt Source Selection

pub fn p11(&self) -> P11_R[src]

Bit 11 - Edge/Level Interrupt Source Selection

pub fn p12(&self) -> P12_R[src]

Bit 12 - Edge/Level Interrupt Source Selection

pub fn p13(&self) -> P13_R[src]

Bit 13 - Edge/Level Interrupt Source Selection

pub fn p14(&self) -> P14_R[src]

Bit 14 - Edge/Level Interrupt Source Selection

pub fn p15(&self) -> P15_R[src]

Bit 15 - Edge/Level Interrupt Source Selection

pub fn p16(&self) -> P16_R[src]

Bit 16 - Edge/Level Interrupt Source Selection

pub fn p17(&self) -> P17_R[src]

Bit 17 - Edge/Level Interrupt Source Selection

pub fn p18(&self) -> P18_R[src]

Bit 18 - Edge/Level Interrupt Source Selection

pub fn p19(&self) -> P19_R[src]

Bit 19 - Edge/Level Interrupt Source Selection

pub fn p20(&self) -> P20_R[src]

Bit 20 - Edge/Level Interrupt Source Selection

pub fn p21(&self) -> P21_R[src]

Bit 21 - Edge/Level Interrupt Source Selection

pub fn p22(&self) -> P22_R[src]

Bit 22 - Edge/Level Interrupt Source Selection

pub fn p23(&self) -> P23_R[src]

Bit 23 - Edge/Level Interrupt Source Selection

pub fn p24(&self) -> P24_R[src]

Bit 24 - Edge/Level Interrupt Source Selection

pub fn p25(&self) -> P25_R[src]

Bit 25 - Edge/Level Interrupt Source Selection

pub fn p26(&self) -> P26_R[src]

Bit 26 - Edge/Level Interrupt Source Selection

pub fn p27(&self) -> P27_R[src]

Bit 27 - Edge/Level Interrupt Source Selection

pub fn p28(&self) -> P28_R[src]

Bit 28 - Edge/Level Interrupt Source Selection

pub fn p29(&self) -> P29_R[src]

Bit 29 - Edge/Level Interrupt Source Selection

pub fn p30(&self) -> P30_R[src]

Bit 30 - Edge/Level Interrupt Source Selection

pub fn p31(&self) -> P31_R[src]

Bit 31 - Edge/Level Interrupt Source Selection

impl R<u32, Reg<u32, _LOCKSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Lock Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Lock Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Lock Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Lock Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Lock Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Lock Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Lock Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Lock Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Lock Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Lock Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Lock Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Lock Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Lock Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Lock Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Lock Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Lock Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Lock Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Lock Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Lock Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Lock Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Lock Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Lock Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Lock Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Lock Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Lock Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Lock Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Lock Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Lock Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Lock Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Lock Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Lock Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Lock Status

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _SCHMITT>>[src]

pub fn schmitt0(&self) -> SCHMITT0_R[src]

Bit 0 - Schmitt Trigger Control

pub fn schmitt1(&self) -> SCHMITT1_R[src]

Bit 1 - Schmitt Trigger Control

pub fn schmitt2(&self) -> SCHMITT2_R[src]

Bit 2 - Schmitt Trigger Control

pub fn schmitt3(&self) -> SCHMITT3_R[src]

Bit 3 - Schmitt Trigger Control

pub fn schmitt4(&self) -> SCHMITT4_R[src]

Bit 4 - Schmitt Trigger Control

pub fn schmitt5(&self) -> SCHMITT5_R[src]

Bit 5 - Schmitt Trigger Control

pub fn schmitt6(&self) -> SCHMITT6_R[src]

Bit 6 - Schmitt Trigger Control

pub fn schmitt7(&self) -> SCHMITT7_R[src]

Bit 7 - Schmitt Trigger Control

pub fn schmitt8(&self) -> SCHMITT8_R[src]

Bit 8 - Schmitt Trigger Control

pub fn schmitt9(&self) -> SCHMITT9_R[src]

Bit 9 - Schmitt Trigger Control

pub fn schmitt10(&self) -> SCHMITT10_R[src]

Bit 10 - Schmitt Trigger Control

pub fn schmitt11(&self) -> SCHMITT11_R[src]

Bit 11 - Schmitt Trigger Control

pub fn schmitt12(&self) -> SCHMITT12_R[src]

Bit 12 - Schmitt Trigger Control

pub fn schmitt13(&self) -> SCHMITT13_R[src]

Bit 13 - Schmitt Trigger Control

pub fn schmitt14(&self) -> SCHMITT14_R[src]

Bit 14 - Schmitt Trigger Control

pub fn schmitt15(&self) -> SCHMITT15_R[src]

Bit 15 - Schmitt Trigger Control

pub fn schmitt16(&self) -> SCHMITT16_R[src]

Bit 16 - Schmitt Trigger Control

pub fn schmitt17(&self) -> SCHMITT17_R[src]

Bit 17 - Schmitt Trigger Control

pub fn schmitt18(&self) -> SCHMITT18_R[src]

Bit 18 - Schmitt Trigger Control

pub fn schmitt19(&self) -> SCHMITT19_R[src]

Bit 19 - Schmitt Trigger Control

pub fn schmitt20(&self) -> SCHMITT20_R[src]

Bit 20 - Schmitt Trigger Control

pub fn schmitt21(&self) -> SCHMITT21_R[src]

Bit 21 - Schmitt Trigger Control

pub fn schmitt22(&self) -> SCHMITT22_R[src]

Bit 22 - Schmitt Trigger Control

pub fn schmitt23(&self) -> SCHMITT23_R[src]

Bit 23 - Schmitt Trigger Control

pub fn schmitt24(&self) -> SCHMITT24_R[src]

Bit 24 - Schmitt Trigger Control

pub fn schmitt25(&self) -> SCHMITT25_R[src]

Bit 25 - Schmitt Trigger Control

pub fn schmitt26(&self) -> SCHMITT26_R[src]

Bit 26 - Schmitt Trigger Control

pub fn schmitt27(&self) -> SCHMITT27_R[src]

Bit 27 - Schmitt Trigger Control

pub fn schmitt28(&self) -> SCHMITT28_R[src]

Bit 28 - Schmitt Trigger Control

pub fn schmitt29(&self) -> SCHMITT29_R[src]

Bit 29 - Schmitt Trigger Control

pub fn schmitt30(&self) -> SCHMITT30_R[src]

Bit 30 - Schmitt Trigger Control

pub fn schmitt31(&self) -> SCHMITT31_R[src]

Bit 31 - Schmitt Trigger Control

impl R<u8, DSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, DSIZE_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_halfword(&self) -> bool[src]

Checks if the value of the field is HALFWORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u32, Reg<u32, _PCMR>>[src]

pub fn pcen(&self) -> PCEN_R[src]

Bit 0 - Parallel Capture Mode Enable

pub fn dsize(&self) -> DSIZE_R[src]

Bits 4:5 - Parallel Capture Mode Data Size

pub fn alwys(&self) -> ALWYS_R[src]

Bit 9 - Parallel Capture Mode Always Sampling

pub fn halfs(&self) -> HALFS_R[src]

Bit 10 - Parallel Capture Mode Half Sampling

pub fn frsts(&self) -> FRSTS_R[src]

Bit 11 - Parallel Capture Mode First Sample

impl R<u32, Reg<u32, _PCIMR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Parallel Capture Mode Data Ready Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Parallel Capture Mode Overrun Error Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 2 - End of Reception Transfer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 3 - Reception Buffer Full Interrupt Mask

impl R<u32, Reg<u32, _PCISR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Parallel Capture Mode Data Ready

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Parallel Capture Mode Overrun Error

pub fn endrx(&self) -> ENDRX_R[src]

Bit 2

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 3

impl R<u32, Reg<u32, _PCRHR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 0:31 - Parallel Capture Mode Reception Data

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u32, Reg<u32, _PSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - PIO Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - PIO Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - PIO Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - PIO Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - PIO Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - PIO Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - PIO Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - PIO Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - PIO Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - PIO Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - PIO Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - PIO Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - PIO Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - PIO Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - PIO Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - PIO Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - PIO Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - PIO Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - PIO Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - PIO Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - PIO Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - PIO Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - PIO Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - PIO Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - PIO Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - PIO Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - PIO Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - PIO Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - PIO Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - PIO Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - PIO Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - PIO Status

impl R<u32, Reg<u32, _OSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Status

impl R<u32, Reg<u32, _IFSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Filter Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Filter Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Filter Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Filter Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Filter Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Filter Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Filter Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Filter Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Filter Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Filter Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Filter Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Filter Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Filter Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Filter Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Filter Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Filter Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Filter Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Filter Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Filter Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Filter Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Filter Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Filter Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Filter Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Filter Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Filter Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Filter Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Filter Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Filter Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Filter Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Filter Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Filter Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Filter Status

impl R<u32, Reg<u32, _ODSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Data Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Data Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Data Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Data Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Data Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Data Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Data Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Data Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Data Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Data Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Data Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Data Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Data Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Data Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Data Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Data Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Data Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Data Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Data Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Data Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Data Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Data Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Data Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Data Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Data Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Data Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Data Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Data Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Data Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Data Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Data Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Data Status

impl R<u32, Reg<u32, _PDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Data Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Data Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Data Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Data Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Data Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Data Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Data Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Data Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Data Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Data Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Data Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Data Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Data Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Data Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Data Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Data Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Data Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Data Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Data Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Data Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Data Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Data Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Data Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Data Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Data Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Data Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Data Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Data Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Data Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Data Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Data Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Data Status

impl R<u32, Reg<u32, _IMR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Change Interrupt Mask

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Change Interrupt Mask

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Change Interrupt Mask

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Change Interrupt Mask

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Change Interrupt Mask

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Change Interrupt Mask

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Change Interrupt Mask

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Change Interrupt Mask

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Change Interrupt Mask

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Change Interrupt Mask

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Change Interrupt Mask

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Change Interrupt Mask

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Change Interrupt Mask

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Change Interrupt Mask

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Change Interrupt Mask

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Change Interrupt Mask

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Change Interrupt Mask

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Change Interrupt Mask

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Change Interrupt Mask

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Change Interrupt Mask

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Change Interrupt Mask

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Change Interrupt Mask

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Change Interrupt Mask

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Change Interrupt Mask

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Change Interrupt Mask

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Change Interrupt Mask

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Change Interrupt Mask

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Change Interrupt Mask

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Change Interrupt Mask

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Change Interrupt Mask

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Change Interrupt Mask

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Change Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Change Interrupt Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Change Interrupt Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Change Interrupt Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Change Interrupt Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Change Interrupt Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Change Interrupt Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Change Interrupt Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Change Interrupt Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Change Interrupt Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Change Interrupt Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Change Interrupt Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Change Interrupt Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Change Interrupt Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Change Interrupt Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Change Interrupt Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Change Interrupt Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Change Interrupt Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Change Interrupt Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Change Interrupt Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Change Interrupt Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Change Interrupt Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Change Interrupt Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Change Interrupt Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Change Interrupt Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Change Interrupt Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Change Interrupt Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Change Interrupt Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Change Interrupt Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Change Interrupt Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Change Interrupt Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Change Interrupt Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Change Interrupt Status

impl R<u32, Reg<u32, _MDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Multi-drive Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Multi-drive Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Multi-drive Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Multi-drive Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Multi-drive Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Multi-drive Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Multi-drive Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Multi-drive Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Multi-drive Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Multi-drive Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Multi-drive Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Multi-drive Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Multi-drive Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Multi-drive Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Multi-drive Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Multi-drive Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Multi-drive Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Multi-drive Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Multi-drive Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Multi-drive Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Multi-drive Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Multi-drive Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Multi-drive Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Multi-drive Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Multi-drive Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Multi-drive Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Multi-drive Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Multi-drive Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Multi-drive Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Multi-drive Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Multi-drive Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Multi-drive Status

impl R<u32, Reg<u32, _PUSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-Up Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-Up Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-Up Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-Up Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-Up Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-Up Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-Up Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-Up Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-Up Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-Up Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-Up Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-Up Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-Up Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-Up Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-Up Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-Up Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-Up Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-Up Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-Up Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-Up Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-Up Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-Up Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-Up Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-Up Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-Up Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-Up Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-Up Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-Up Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-Up Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-Up Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-Up Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-Up Status

impl R<u32, Reg<u32, _ABCDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Peripheral Select

pub fn p1(&self) -> P1_R[src]

Bit 1 - Peripheral Select

pub fn p2(&self) -> P2_R[src]

Bit 2 - Peripheral Select

pub fn p3(&self) -> P3_R[src]

Bit 3 - Peripheral Select

pub fn p4(&self) -> P4_R[src]

Bit 4 - Peripheral Select

pub fn p5(&self) -> P5_R[src]

Bit 5 - Peripheral Select

pub fn p6(&self) -> P6_R[src]

Bit 6 - Peripheral Select

pub fn p7(&self) -> P7_R[src]

Bit 7 - Peripheral Select

pub fn p8(&self) -> P8_R[src]

Bit 8 - Peripheral Select

pub fn p9(&self) -> P9_R[src]

Bit 9 - Peripheral Select

pub fn p10(&self) -> P10_R[src]

Bit 10 - Peripheral Select

pub fn p11(&self) -> P11_R[src]

Bit 11 - Peripheral Select

pub fn p12(&self) -> P12_R[src]

Bit 12 - Peripheral Select

pub fn p13(&self) -> P13_R[src]

Bit 13 - Peripheral Select

pub fn p14(&self) -> P14_R[src]

Bit 14 - Peripheral Select

pub fn p15(&self) -> P15_R[src]

Bit 15 - Peripheral Select

pub fn p16(&self) -> P16_R[src]

Bit 16 - Peripheral Select

pub fn p17(&self) -> P17_R[src]

Bit 17 - Peripheral Select

pub fn p18(&self) -> P18_R[src]

Bit 18 - Peripheral Select

pub fn p19(&self) -> P19_R[src]

Bit 19 - Peripheral Select

pub fn p20(&self) -> P20_R[src]

Bit 20 - Peripheral Select

pub fn p21(&self) -> P21_R[src]

Bit 21 - Peripheral Select

pub fn p22(&self) -> P22_R[src]

Bit 22 - Peripheral Select

pub fn p23(&self) -> P23_R[src]

Bit 23 - Peripheral Select

pub fn p24(&self) -> P24_R[src]

Bit 24 - Peripheral Select

pub fn p25(&self) -> P25_R[src]

Bit 25 - Peripheral Select

pub fn p26(&self) -> P26_R[src]

Bit 26 - Peripheral Select

pub fn p27(&self) -> P27_R[src]

Bit 27 - Peripheral Select

pub fn p28(&self) -> P28_R[src]

Bit 28 - Peripheral Select

pub fn p29(&self) -> P29_R[src]

Bit 29 - Peripheral Select

pub fn p30(&self) -> P30_R[src]

Bit 30 - Peripheral Select

pub fn p31(&self) -> P31_R[src]

Bit 31 - Peripheral Select

impl R<u32, Reg<u32, _IFSCSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Glitch or Debouncing Filter Selection Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Glitch or Debouncing Filter Selection Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Glitch or Debouncing Filter Selection Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Glitch or Debouncing Filter Selection Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Glitch or Debouncing Filter Selection Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Glitch or Debouncing Filter Selection Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Glitch or Debouncing Filter Selection Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Glitch or Debouncing Filter Selection Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Glitch or Debouncing Filter Selection Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Glitch or Debouncing Filter Selection Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Glitch or Debouncing Filter Selection Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Glitch or Debouncing Filter Selection Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Glitch or Debouncing Filter Selection Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Glitch or Debouncing Filter Selection Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Glitch or Debouncing Filter Selection Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Glitch or Debouncing Filter Selection Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Glitch or Debouncing Filter Selection Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Glitch or Debouncing Filter Selection Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Glitch or Debouncing Filter Selection Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Glitch or Debouncing Filter Selection Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Glitch or Debouncing Filter Selection Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Glitch or Debouncing Filter Selection Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Glitch or Debouncing Filter Selection Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Glitch or Debouncing Filter Selection Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Glitch or Debouncing Filter Selection Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Glitch or Debouncing Filter Selection Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Glitch or Debouncing Filter Selection Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Glitch or Debouncing Filter Selection Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Glitch or Debouncing Filter Selection Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Glitch or Debouncing Filter Selection Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Glitch or Debouncing Filter Selection Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Glitch or Debouncing Filter Selection Status

impl R<u32, Reg<u32, _SCDR>>[src]

pub fn div(&self) -> DIV_R[src]

Bits 0:13 - Slow Clock Divider Selection for Debouncing

impl R<u32, Reg<u32, _PPDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-Down Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-Down Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-Down Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-Down Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-Down Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-Down Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-Down Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-Down Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-Down Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-Down Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-Down Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-Down Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-Down Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-Down Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-Down Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-Down Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-Down Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-Down Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-Down Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-Down Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-Down Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-Down Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-Down Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-Down Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-Down Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-Down Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-Down Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-Down Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-Down Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-Down Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-Down Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-Down Status

impl R<u32, Reg<u32, _OWSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Write Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Write Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Write Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Write Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Write Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Write Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Write Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Write Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Write Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Write Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Write Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Write Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Write Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Write Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Write Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Write Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Write Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Write Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Write Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Write Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Write Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Write Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Write Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Write Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Write Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Write Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Write Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Write Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Write Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Write Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Write Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Write Status

impl R<u32, Reg<u32, _AIMMR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - IO Line Index

pub fn p1(&self) -> P1_R[src]

Bit 1 - IO Line Index

pub fn p2(&self) -> P2_R[src]

Bit 2 - IO Line Index

pub fn p3(&self) -> P3_R[src]

Bit 3 - IO Line Index

pub fn p4(&self) -> P4_R[src]

Bit 4 - IO Line Index

pub fn p5(&self) -> P5_R[src]

Bit 5 - IO Line Index

pub fn p6(&self) -> P6_R[src]

Bit 6 - IO Line Index

pub fn p7(&self) -> P7_R[src]

Bit 7 - IO Line Index

pub fn p8(&self) -> P8_R[src]

Bit 8 - IO Line Index

pub fn p9(&self) -> P9_R[src]

Bit 9 - IO Line Index

pub fn p10(&self) -> P10_R[src]

Bit 10 - IO Line Index

pub fn p11(&self) -> P11_R[src]

Bit 11 - IO Line Index

pub fn p12(&self) -> P12_R[src]

Bit 12 - IO Line Index

pub fn p13(&self) -> P13_R[src]

Bit 13 - IO Line Index

pub fn p14(&self) -> P14_R[src]

Bit 14 - IO Line Index

pub fn p15(&self) -> P15_R[src]

Bit 15 - IO Line Index

pub fn p16(&self) -> P16_R[src]

Bit 16 - IO Line Index

pub fn p17(&self) -> P17_R[src]

Bit 17 - IO Line Index

pub fn p18(&self) -> P18_R[src]

Bit 18 - IO Line Index

pub fn p19(&self) -> P19_R[src]

Bit 19 - IO Line Index

pub fn p20(&self) -> P20_R[src]

Bit 20 - IO Line Index

pub fn p21(&self) -> P21_R[src]

Bit 21 - IO Line Index

pub fn p22(&self) -> P22_R[src]

Bit 22 - IO Line Index

pub fn p23(&self) -> P23_R[src]

Bit 23 - IO Line Index

pub fn p24(&self) -> P24_R[src]

Bit 24 - IO Line Index

pub fn p25(&self) -> P25_R[src]

Bit 25 - IO Line Index

pub fn p26(&self) -> P26_R[src]

Bit 26 - IO Line Index

pub fn p27(&self) -> P27_R[src]

Bit 27 - IO Line Index

pub fn p28(&self) -> P28_R[src]

Bit 28 - IO Line Index

pub fn p29(&self) -> P29_R[src]

Bit 29 - IO Line Index

pub fn p30(&self) -> P30_R[src]

Bit 30 - IO Line Index

pub fn p31(&self) -> P31_R[src]

Bit 31 - IO Line Index

impl R<u32, Reg<u32, _ELSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Edge/Level Interrupt Source Selection

pub fn p1(&self) -> P1_R[src]

Bit 1 - Edge/Level Interrupt Source Selection

pub fn p2(&self) -> P2_R[src]

Bit 2 - Edge/Level Interrupt Source Selection

pub fn p3(&self) -> P3_R[src]

Bit 3 - Edge/Level Interrupt Source Selection

pub fn p4(&self) -> P4_R[src]

Bit 4 - Edge/Level Interrupt Source Selection

pub fn p5(&self) -> P5_R[src]

Bit 5 - Edge/Level Interrupt Source Selection

pub fn p6(&self) -> P6_R[src]

Bit 6 - Edge/Level Interrupt Source Selection

pub fn p7(&self) -> P7_R[src]

Bit 7 - Edge/Level Interrupt Source Selection

pub fn p8(&self) -> P8_R[src]

Bit 8 - Edge/Level Interrupt Source Selection

pub fn p9(&self) -> P9_R[src]

Bit 9 - Edge/Level Interrupt Source Selection

pub fn p10(&self) -> P10_R[src]

Bit 10 - Edge/Level Interrupt Source Selection

pub fn p11(&self) -> P11_R[src]

Bit 11 - Edge/Level Interrupt Source Selection

pub fn p12(&self) -> P12_R[src]

Bit 12 - Edge/Level Interrupt Source Selection

pub fn p13(&self) -> P13_R[src]

Bit 13 - Edge/Level Interrupt Source Selection

pub fn p14(&self) -> P14_R[src]

Bit 14 - Edge/Level Interrupt Source Selection

pub fn p15(&self) -> P15_R[src]

Bit 15 - Edge/Level Interrupt Source Selection

pub fn p16(&self) -> P16_R[src]

Bit 16 - Edge/Level Interrupt Source Selection

pub fn p17(&self) -> P17_R[src]

Bit 17 - Edge/Level Interrupt Source Selection

pub fn p18(&self) -> P18_R[src]

Bit 18 - Edge/Level Interrupt Source Selection

pub fn p19(&self) -> P19_R[src]

Bit 19 - Edge/Level Interrupt Source Selection

pub fn p20(&self) -> P20_R[src]

Bit 20 - Edge/Level Interrupt Source Selection

pub fn p21(&self) -> P21_R[src]

Bit 21 - Edge/Level Interrupt Source Selection

pub fn p22(&self) -> P22_R[src]

Bit 22 - Edge/Level Interrupt Source Selection

pub fn p23(&self) -> P23_R[src]

Bit 23 - Edge/Level Interrupt Source Selection

pub fn p24(&self) -> P24_R[src]

Bit 24 - Edge/Level Interrupt Source Selection

pub fn p25(&self) -> P25_R[src]

Bit 25 - Edge/Level Interrupt Source Selection

pub fn p26(&self) -> P26_R[src]

Bit 26 - Edge/Level Interrupt Source Selection

pub fn p27(&self) -> P27_R[src]

Bit 27 - Edge/Level Interrupt Source Selection

pub fn p28(&self) -> P28_R[src]

Bit 28 - Edge/Level Interrupt Source Selection

pub fn p29(&self) -> P29_R[src]

Bit 29 - Edge/Level Interrupt Source Selection

pub fn p30(&self) -> P30_R[src]

Bit 30 - Edge/Level Interrupt Source Selection

pub fn p31(&self) -> P31_R[src]

Bit 31 - Edge/Level Interrupt Source Selection

impl R<u32, Reg<u32, _FRLHSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Edge/Level Interrupt Source Selection

pub fn p1(&self) -> P1_R[src]

Bit 1 - Edge/Level Interrupt Source Selection

pub fn p2(&self) -> P2_R[src]

Bit 2 - Edge/Level Interrupt Source Selection

pub fn p3(&self) -> P3_R[src]

Bit 3 - Edge/Level Interrupt Source Selection

pub fn p4(&self) -> P4_R[src]

Bit 4 - Edge/Level Interrupt Source Selection

pub fn p5(&self) -> P5_R[src]

Bit 5 - Edge/Level Interrupt Source Selection

pub fn p6(&self) -> P6_R[src]

Bit 6 - Edge/Level Interrupt Source Selection

pub fn p7(&self) -> P7_R[src]

Bit 7 - Edge/Level Interrupt Source Selection

pub fn p8(&self) -> P8_R[src]

Bit 8 - Edge/Level Interrupt Source Selection

pub fn p9(&self) -> P9_R[src]

Bit 9 - Edge/Level Interrupt Source Selection

pub fn p10(&self) -> P10_R[src]

Bit 10 - Edge/Level Interrupt Source Selection

pub fn p11(&self) -> P11_R[src]

Bit 11 - Edge/Level Interrupt Source Selection

pub fn p12(&self) -> P12_R[src]

Bit 12 - Edge/Level Interrupt Source Selection

pub fn p13(&self) -> P13_R[src]

Bit 13 - Edge/Level Interrupt Source Selection

pub fn p14(&self) -> P14_R[src]

Bit 14 - Edge/Level Interrupt Source Selection

pub fn p15(&self) -> P15_R[src]

Bit 15 - Edge/Level Interrupt Source Selection

pub fn p16(&self) -> P16_R[src]

Bit 16 - Edge/Level Interrupt Source Selection

pub fn p17(&self) -> P17_R[src]

Bit 17 - Edge/Level Interrupt Source Selection

pub fn p18(&self) -> P18_R[src]

Bit 18 - Edge/Level Interrupt Source Selection

pub fn p19(&self) -> P19_R[src]

Bit 19 - Edge/Level Interrupt Source Selection

pub fn p20(&self) -> P20_R[src]

Bit 20 - Edge/Level Interrupt Source Selection

pub fn p21(&self) -> P21_R[src]

Bit 21 - Edge/Level Interrupt Source Selection

pub fn p22(&self) -> P22_R[src]

Bit 22 - Edge/Level Interrupt Source Selection

pub fn p23(&self) -> P23_R[src]

Bit 23 - Edge/Level Interrupt Source Selection

pub fn p24(&self) -> P24_R[src]

Bit 24 - Edge/Level Interrupt Source Selection

pub fn p25(&self) -> P25_R[src]

Bit 25 - Edge/Level Interrupt Source Selection

pub fn p26(&self) -> P26_R[src]

Bit 26 - Edge/Level Interrupt Source Selection

pub fn p27(&self) -> P27_R[src]

Bit 27 - Edge/Level Interrupt Source Selection

pub fn p28(&self) -> P28_R[src]

Bit 28 - Edge/Level Interrupt Source Selection

pub fn p29(&self) -> P29_R[src]

Bit 29 - Edge/Level Interrupt Source Selection

pub fn p30(&self) -> P30_R[src]

Bit 30 - Edge/Level Interrupt Source Selection

pub fn p31(&self) -> P31_R[src]

Bit 31 - Edge/Level Interrupt Source Selection

impl R<u32, Reg<u32, _LOCKSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Lock Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Lock Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Lock Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Lock Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Lock Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Lock Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Lock Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Lock Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Lock Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Lock Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Lock Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Lock Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Lock Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Lock Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Lock Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Lock Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Lock Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Lock Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Lock Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Lock Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Lock Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Lock Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Lock Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Lock Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Lock Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Lock Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Lock Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Lock Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Lock Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Lock Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Lock Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Lock Status

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _SCHMITT>>[src]

pub fn schmitt0(&self) -> SCHMITT0_R[src]

Bit 0 - Schmitt Trigger Control

pub fn schmitt1(&self) -> SCHMITT1_R[src]

Bit 1 - Schmitt Trigger Control

pub fn schmitt2(&self) -> SCHMITT2_R[src]

Bit 2 - Schmitt Trigger Control

pub fn schmitt3(&self) -> SCHMITT3_R[src]

Bit 3 - Schmitt Trigger Control

pub fn schmitt4(&self) -> SCHMITT4_R[src]

Bit 4 - Schmitt Trigger Control

pub fn schmitt5(&self) -> SCHMITT5_R[src]

Bit 5 - Schmitt Trigger Control

pub fn schmitt6(&self) -> SCHMITT6_R[src]

Bit 6 - Schmitt Trigger Control

pub fn schmitt7(&self) -> SCHMITT7_R[src]

Bit 7 - Schmitt Trigger Control

pub fn schmitt8(&self) -> SCHMITT8_R[src]

Bit 8 - Schmitt Trigger Control

pub fn schmitt9(&self) -> SCHMITT9_R[src]

Bit 9 - Schmitt Trigger Control

pub fn schmitt10(&self) -> SCHMITT10_R[src]

Bit 10 - Schmitt Trigger Control

pub fn schmitt11(&self) -> SCHMITT11_R[src]

Bit 11 - Schmitt Trigger Control

pub fn schmitt12(&self) -> SCHMITT12_R[src]

Bit 12 - Schmitt Trigger Control

pub fn schmitt13(&self) -> SCHMITT13_R[src]

Bit 13 - Schmitt Trigger Control

pub fn schmitt14(&self) -> SCHMITT14_R[src]

Bit 14 - Schmitt Trigger Control

pub fn schmitt15(&self) -> SCHMITT15_R[src]

Bit 15 - Schmitt Trigger Control

pub fn schmitt16(&self) -> SCHMITT16_R[src]

Bit 16 - Schmitt Trigger Control

pub fn schmitt17(&self) -> SCHMITT17_R[src]

Bit 17 - Schmitt Trigger Control

pub fn schmitt18(&self) -> SCHMITT18_R[src]

Bit 18 - Schmitt Trigger Control

pub fn schmitt19(&self) -> SCHMITT19_R[src]

Bit 19 - Schmitt Trigger Control

pub fn schmitt20(&self) -> SCHMITT20_R[src]

Bit 20 - Schmitt Trigger Control

pub fn schmitt21(&self) -> SCHMITT21_R[src]

Bit 21 - Schmitt Trigger Control

pub fn schmitt22(&self) -> SCHMITT22_R[src]

Bit 22 - Schmitt Trigger Control

pub fn schmitt23(&self) -> SCHMITT23_R[src]

Bit 23 - Schmitt Trigger Control

pub fn schmitt24(&self) -> SCHMITT24_R[src]

Bit 24 - Schmitt Trigger Control

pub fn schmitt25(&self) -> SCHMITT25_R[src]

Bit 25 - Schmitt Trigger Control

pub fn schmitt26(&self) -> SCHMITT26_R[src]

Bit 26 - Schmitt Trigger Control

pub fn schmitt27(&self) -> SCHMITT27_R[src]

Bit 27 - Schmitt Trigger Control

pub fn schmitt28(&self) -> SCHMITT28_R[src]

Bit 28 - Schmitt Trigger Control

pub fn schmitt29(&self) -> SCHMITT29_R[src]

Bit 29 - Schmitt Trigger Control

pub fn schmitt30(&self) -> SCHMITT30_R[src]

Bit 30 - Schmitt Trigger Control

pub fn schmitt31(&self) -> SCHMITT31_R[src]

Bit 31 - Schmitt Trigger Control

impl R<u8, DSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, DSIZE_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_halfword(&self) -> bool[src]

Checks if the value of the field is HALFWORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u32, Reg<u32, _PCMR>>[src]

pub fn pcen(&self) -> PCEN_R[src]

Bit 0 - Parallel Capture Mode Enable

pub fn dsize(&self) -> DSIZE_R[src]

Bits 4:5 - Parallel Capture Mode Data Size

pub fn alwys(&self) -> ALWYS_R[src]

Bit 9 - Parallel Capture Mode Always Sampling

pub fn halfs(&self) -> HALFS_R[src]

Bit 10 - Parallel Capture Mode Half Sampling

pub fn frsts(&self) -> FRSTS_R[src]

Bit 11 - Parallel Capture Mode First Sample

impl R<u32, Reg<u32, _PCIMR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Parallel Capture Mode Data Ready Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Parallel Capture Mode Overrun Error Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 2 - End of Reception Transfer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 3 - Reception Buffer Full Interrupt Mask

impl R<u32, Reg<u32, _PCISR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Parallel Capture Mode Data Ready

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Parallel Capture Mode Overrun Error

pub fn endrx(&self) -> ENDRX_R[src]

Bit 2

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 3

impl R<u32, Reg<u32, _PCRHR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 0:31 - Parallel Capture Mode Reception Data

impl R<u8, RSTTYP_A>[src]

pub fn variant(&self) -> Variant<u8, RSTTYP_A>[src]

Get enumerated values variant

pub fn is_general_rst(&self) -> bool[src]

Checks if the value of the field is GENERAL_RST

pub fn is_backup_rst(&self) -> bool[src]

Checks if the value of the field is BACKUP_RST

pub fn is_wdt_rst(&self) -> bool[src]

Checks if the value of the field is WDT_RST

pub fn is_soft_rst(&self) -> bool[src]

Checks if the value of the field is SOFT_RST

pub fn is_user_rst(&self) -> bool[src]

Checks if the value of the field is USER_RST

impl R<u32, Reg<u32, _SR>>[src]

pub fn ursts(&self) -> URSTS_R[src]

Bit 0 - User Reset Status

pub fn rsttyp(&self) -> RSTTYP_R[src]

Bits 8:10 - Reset Type

pub fn nrstl(&self) -> NRSTL_R[src]

Bit 16 - NRST Pin Level

pub fn srcmp(&self) -> SRCMP_R[src]

Bit 17 - Software Reset Command in Progress

impl R<u8, KEY_A>[src]

pub fn variant(&self) -> Variant<u8, KEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _MR>>[src]

pub fn ursten(&self) -> URSTEN_R[src]

Bit 0 - User Reset Enable

pub fn urstien(&self) -> URSTIEN_R[src]

Bit 4 - User Reset Interrupt Enable

pub fn erstl(&self) -> ERSTL_R[src]

Bits 8:11 - External Reset Length

pub fn key(&self) -> KEY_R[src]

Bits 24:31 - Write Access Password

impl R<u8, SMSMPL_A>[src]

pub fn variant(&self) -> Variant<u8, SMSMPL_A>[src]

Get enumerated values variant

pub fn is_smd(&self) -> bool[src]

Checks if the value of the field is SMD

pub fn is_csm(&self) -> bool[src]

Checks if the value of the field is CSM

pub fn is_32slck(&self) -> bool[src]

Checks if the value of the field is _32SLCK

pub fn is_256slck(&self) -> bool[src]

Checks if the value of the field is _256SLCK

pub fn is_2048slck(&self) -> bool[src]

Checks if the value of the field is _2048SLCK

impl R<bool, SMRSTEN_A>[src]

pub fn variant(&self) -> SMRSTEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, SMIEN_A>[src]

pub fn variant(&self) -> SMIEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u32, Reg<u32, _SMMR>>[src]

pub fn smth(&self) -> SMTH_R[src]

Bits 0:3 - Supply Monitor Threshold

pub fn smsmpl(&self) -> SMSMPL_R[src]

Bits 8:10 - Supply Monitor Sampling Period

pub fn smrsten(&self) -> SMRSTEN_R[src]

Bit 12 - Supply Monitor Reset Enable

pub fn smien(&self) -> SMIEN_R[src]

Bit 13 - Supply Monitor Interrupt Enable

impl R<bool, BODRSTEN_A>[src]

pub fn variant(&self) -> BODRSTEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, BODDIS_A>[src]

pub fn variant(&self) -> BODDIS_A[src]

Get enumerated values variant

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<bool, ONREG_A>[src]

pub fn variant(&self) -> ONREG_A[src]

Get enumerated values variant

pub fn is_onreg_unused(&self) -> bool[src]

Checks if the value of the field is ONREG_UNUSED

pub fn is_onreg_used(&self) -> bool[src]

Checks if the value of the field is ONREG_USED

impl R<bool, OSCBYPASS_A>[src]

pub fn variant(&self) -> OSCBYPASS_A[src]

Get enumerated values variant

pub fn is_no_effect(&self) -> bool[src]

Checks if the value of the field is NO_EFFECT

pub fn is_bypass(&self) -> bool[src]

Checks if the value of the field is BYPASS

impl R<u8, KEY_A>[src]

pub fn variant(&self) -> Variant<u8, KEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _MR>>[src]

pub fn bodrsten(&self) -> BODRSTEN_R[src]

Bit 12 - Brownout Detector Reset Enable

pub fn boddis(&self) -> BODDIS_R[src]

Bit 13 - Brownout Detector Disable

pub fn onreg(&self) -> ONREG_R[src]

Bit 14 - Voltage Regulator Enable

pub fn oscbypass(&self) -> OSCBYPASS_R[src]

Bit 20 - Oscillator Bypass

pub fn key(&self) -> KEY_R[src]

Bits 24:31 - Password Key

impl R<bool, SMEN_A>[src]

pub fn variant(&self) -> SMEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, RTTEN_A>[src]

pub fn variant(&self) -> RTTEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, RTCEN_A>[src]

pub fn variant(&self) -> RTCEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LPDBCEN0_A>[src]

pub fn variant(&self) -> LPDBCEN0_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LPDBCEN1_A>[src]

pub fn variant(&self) -> LPDBCEN1_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LPDBCCLR_A>[src]

pub fn variant(&self) -> LPDBCCLR_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u8, WKUPDBC_A>[src]

pub fn variant(&self) -> Variant<u8, WKUPDBC_A>[src]

Get enumerated values variant

pub fn is_immediate(&self) -> bool[src]

Checks if the value of the field is IMMEDIATE

pub fn is_3_sclk(&self) -> bool[src]

Checks if the value of the field is _3_SCLK

pub fn is_32_sclk(&self) -> bool[src]

Checks if the value of the field is _32_SCLK

pub fn is_512_sclk(&self) -> bool[src]

Checks if the value of the field is _512_SCLK

pub fn is_4096_sclk(&self) -> bool[src]

Checks if the value of the field is _4096_SCLK

pub fn is_32768_sclk(&self) -> bool[src]

Checks if the value of the field is _32768_SCLK

impl R<u8, LPDBC_A>[src]

pub fn variant(&self) -> LPDBC_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_2_rtcout0(&self) -> bool[src]

Checks if the value of the field is _2_RTCOUT0

pub fn is_3_rtcout0(&self) -> bool[src]

Checks if the value of the field is _3_RTCOUT0

pub fn is_4_rtcout0(&self) -> bool[src]

Checks if the value of the field is _4_RTCOUT0

pub fn is_5_rtcout0(&self) -> bool[src]

Checks if the value of the field is _5_RTCOUT0

pub fn is_6_rtcout0(&self) -> bool[src]

Checks if the value of the field is _6_RTCOUT0

pub fn is_7_rtcout0(&self) -> bool[src]

Checks if the value of the field is _7_RTCOUT0

pub fn is_8_rtcout0(&self) -> bool[src]

Checks if the value of the field is _8_RTCOUT0

impl R<u32, Reg<u32, _WUMR>>[src]

pub fn smen(&self) -> SMEN_R[src]

Bit 1 - Supply Monitor Wake-up Enable

pub fn rtten(&self) -> RTTEN_R[src]

Bit 2 - Real-time Timer Wake-up Enable

pub fn rtcen(&self) -> RTCEN_R[src]

Bit 3 - Real-time Clock Wake-up Enable

pub fn lpdbcen0(&self) -> LPDBCEN0_R[src]

Bit 5 - Low-power Debouncer Enable WKUP0

pub fn lpdbcen1(&self) -> LPDBCEN1_R[src]

Bit 6 - Low-power Debouncer Enable WKUP1

pub fn lpdbcclr(&self) -> LPDBCCLR_R[src]

Bit 7 - Low-power Debouncer Clear

pub fn wkupdbc(&self) -> WKUPDBC_R[src]

Bits 12:14 - Wake-up Inputs Debouncer Period

pub fn lpdbc(&self) -> LPDBC_R[src]

Bits 16:18 - Low-power Debouncer Period

impl R<bool, WKUPEN0_A>[src]

pub fn variant(&self) -> WKUPEN0_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN1_A>[src]

pub fn variant(&self) -> WKUPEN1_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN2_A>[src]

pub fn variant(&self) -> WKUPEN2_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN3_A>[src]

pub fn variant(&self) -> WKUPEN3_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN4_A>[src]

pub fn variant(&self) -> WKUPEN4_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN5_A>[src]

pub fn variant(&self) -> WKUPEN5_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN6_A>[src]

pub fn variant(&self) -> WKUPEN6_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN7_A>[src]

pub fn variant(&self) -> WKUPEN7_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN8_A>[src]

pub fn variant(&self) -> WKUPEN8_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN9_A>[src]

pub fn variant(&self) -> WKUPEN9_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN10_A>[src]

pub fn variant(&self) -> WKUPEN10_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN11_A>[src]

pub fn variant(&self) -> WKUPEN11_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN12_A>[src]

pub fn variant(&self) -> WKUPEN12_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN13_A>[src]

pub fn variant(&self) -> WKUPEN13_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN14_A>[src]

pub fn variant(&self) -> WKUPEN14_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN15_A>[src]

pub fn variant(&self) -> WKUPEN15_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPT0_A>[src]

pub fn variant(&self) -> WKUPT0_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT1_A>[src]

pub fn variant(&self) -> WKUPT1_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT2_A>[src]

pub fn variant(&self) -> WKUPT2_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT3_A>[src]

pub fn variant(&self) -> WKUPT3_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT4_A>[src]

pub fn variant(&self) -> WKUPT4_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT5_A>[src]

pub fn variant(&self) -> WKUPT5_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT6_A>[src]

pub fn variant(&self) -> WKUPT6_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT7_A>[src]

pub fn variant(&self) -> WKUPT7_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT8_A>[src]

pub fn variant(&self) -> WKUPT8_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT9_A>[src]

pub fn variant(&self) -> WKUPT9_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT10_A>[src]

pub fn variant(&self) -> WKUPT10_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT11_A>[src]

pub fn variant(&self) -> WKUPT11_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT12_A>[src]

pub fn variant(&self) -> WKUPT12_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT13_A>[src]

pub fn variant(&self) -> WKUPT13_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT14_A>[src]

pub fn variant(&self) -> WKUPT14_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT15_A>[src]

pub fn variant(&self) -> WKUPT15_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<u32, Reg<u32, _WUIR>>[src]

pub fn wkupen0(&self) -> WKUPEN0_R[src]

Bit 0 - Wake-up Input Enable 0 to 0

pub fn wkupen1(&self) -> WKUPEN1_R[src]

Bit 1 - Wake-up Input Enable 0 to 1

pub fn wkupen2(&self) -> WKUPEN2_R[src]

Bit 2 - Wake-up Input Enable 0 to 2

pub fn wkupen3(&self) -> WKUPEN3_R[src]

Bit 3 - Wake-up Input Enable 0 to 3

pub fn wkupen4(&self) -> WKUPEN4_R[src]

Bit 4 - Wake-up Input Enable 0 to 4

pub fn wkupen5(&self) -> WKUPEN5_R[src]

Bit 5 - Wake-up Input Enable 0 to 5

pub fn wkupen6(&self) -> WKUPEN6_R[src]

Bit 6 - Wake-up Input Enable 0 to 6

pub fn wkupen7(&self) -> WKUPEN7_R[src]

Bit 7 - Wake-up Input Enable 0 to 7

pub fn wkupen8(&self) -> WKUPEN8_R[src]

Bit 8 - Wake-up Input Enable 0 to 8

pub fn wkupen9(&self) -> WKUPEN9_R[src]

Bit 9 - Wake-up Input Enable 0 to 9

pub fn wkupen10(&self) -> WKUPEN10_R[src]

Bit 10 - Wake-up Input Enable 0 to 10

pub fn wkupen11(&self) -> WKUPEN11_R[src]

Bit 11 - Wake-up Input Enable 0 to 11

pub fn wkupen12(&self) -> WKUPEN12_R[src]

Bit 12 - Wake-up Input Enable 0 to 12

pub fn wkupen13(&self) -> WKUPEN13_R[src]

Bit 13 - Wake-up Input Enable 0 to 13

pub fn wkupen14(&self) -> WKUPEN14_R[src]

Bit 14 - Wake-up Input Enable 0 to 14

pub fn wkupen15(&self) -> WKUPEN15_R[src]

Bit 15 - Wake-up Input Enable 0 to 15

pub fn wkupt0(&self) -> WKUPT0_R[src]

Bit 16 - Wake-up Input Type 0 to 0

pub fn wkupt1(&self) -> WKUPT1_R[src]

Bit 17 - Wake-up Input Type 0 to 1

pub fn wkupt2(&self) -> WKUPT2_R[src]

Bit 18 - Wake-up Input Type 0 to 2

pub fn wkupt3(&self) -> WKUPT3_R[src]

Bit 19 - Wake-up Input Type 0 to 3

pub fn wkupt4(&self) -> WKUPT4_R[src]

Bit 20 - Wake-up Input Type 0 to 4

pub fn wkupt5(&self) -> WKUPT5_R[src]

Bit 21 - Wake-up Input Type 0 to 5

pub fn wkupt6(&self) -> WKUPT6_R[src]

Bit 22 - Wake-up Input Type 0 to 6

pub fn wkupt7(&self) -> WKUPT7_R[src]

Bit 23 - Wake-up Input Type 0 to 7

pub fn wkupt8(&self) -> WKUPT8_R[src]

Bit 24 - Wake-up Input Type 0 to 8

pub fn wkupt9(&self) -> WKUPT9_R[src]

Bit 25 - Wake-up Input Type 0 to 9

pub fn wkupt10(&self) -> WKUPT10_R[src]

Bit 26 - Wake-up Input Type 0 to 10

pub fn wkupt11(&self) -> WKUPT11_R[src]

Bit 27 - Wake-up Input Type 0 to 11

pub fn wkupt12(&self) -> WKUPT12_R[src]

Bit 28 - Wake-up Input Type 0 to 12

pub fn wkupt13(&self) -> WKUPT13_R[src]

Bit 29 - Wake-up Input Type 0 to 13

pub fn wkupt14(&self) -> WKUPT14_R[src]

Bit 30 - Wake-up Input Type 0 to 14

pub fn wkupt15(&self) -> WKUPT15_R[src]

Bit 31 - Wake-up Input Type 0 to 15

impl R<bool, WKUPS_A>[src]

pub fn variant(&self) -> WKUPS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, SMWS_A>[src]

pub fn variant(&self) -> SMWS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, BODRSTS_A>[src]

pub fn variant(&self) -> BODRSTS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, SMRSTS_A>[src]

pub fn variant(&self) -> SMRSTS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, SMOS_A>[src]

pub fn variant(&self) -> SMOS_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<bool, OSCSEL_A>[src]

pub fn variant(&self) -> OSCSEL_A[src]

Get enumerated values variant

pub fn is_rc(&self) -> bool[src]

Checks if the value of the field is RC

pub fn is_cryst(&self) -> bool[src]

Checks if the value of the field is CRYST

impl R<bool, LPDBCS0_A>[src]

pub fn variant(&self) -> LPDBCS0_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, LPDBCS1_A>[src]

pub fn variant(&self) -> LPDBCS1_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, WKUPIS0_A>[src]

pub fn variant(&self) -> WKUPIS0_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS1_A>[src]

pub fn variant(&self) -> WKUPIS1_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS2_A>[src]

pub fn variant(&self) -> WKUPIS2_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS3_A>[src]

pub fn variant(&self) -> WKUPIS3_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS4_A>[src]

pub fn variant(&self) -> WKUPIS4_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS5_A>[src]

pub fn variant(&self) -> WKUPIS5_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS6_A>[src]

pub fn variant(&self) -> WKUPIS6_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS7_A>[src]

pub fn variant(&self) -> WKUPIS7_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS8_A>[src]

pub fn variant(&self) -> WKUPIS8_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS9_A>[src]

pub fn variant(&self) -> WKUPIS9_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS10_A>[src]

pub fn variant(&self) -> WKUPIS10_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS11_A>[src]

pub fn variant(&self) -> WKUPIS11_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS12_A>[src]

pub fn variant(&self) -> WKUPIS12_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS13_A>[src]

pub fn variant(&self) -> WKUPIS13_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS14_A>[src]

pub fn variant(&self) -> WKUPIS14_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS15_A>[src]

pub fn variant(&self) -> WKUPIS15_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<u32, Reg<u32, _SR>>[src]

pub fn wkups(&self) -> WKUPS_R[src]

Bit 1 - WKUP Wake-up Status (cleared on read)

pub fn smws(&self) -> SMWS_R[src]

Bit 2 - Supply Monitor Detection Wake-up Status (cleared on read)

pub fn bodrsts(&self) -> BODRSTS_R[src]

Bit 3 - Brownout Detector Reset Status (cleared on read)

pub fn smrsts(&self) -> SMRSTS_R[src]

Bit 4 - Supply Monitor Reset Status (cleared on read)

pub fn sms(&self) -> SMS_R[src]

Bit 5 - Supply Monitor Status (cleared on read)

pub fn smos(&self) -> SMOS_R[src]

Bit 6 - Supply Monitor Output Status

pub fn oscsel(&self) -> OSCSEL_R[src]

Bit 7 - 32-kHz Oscillator Selection Status

pub fn lpdbcs0(&self) -> LPDBCS0_R[src]

Bit 13 - Low-power Debouncer Wake-up Status on WKUP0 (cleared on read)

pub fn lpdbcs1(&self) -> LPDBCS1_R[src]

Bit 14 - Low-power Debouncer Wake-up Status on WKUP1 (cleared on read)

pub fn wkupis0(&self) -> WKUPIS0_R[src]

Bit 16 - WKUPx Input Status (cleared on read)

pub fn wkupis1(&self) -> WKUPIS1_R[src]

Bit 17 - WKUPx Input Status (cleared on read)

pub fn wkupis2(&self) -> WKUPIS2_R[src]

Bit 18 - WKUPx Input Status (cleared on read)

pub fn wkupis3(&self) -> WKUPIS3_R[src]

Bit 19 - WKUPx Input Status (cleared on read)

pub fn wkupis4(&self) -> WKUPIS4_R[src]

Bit 20 - WKUPx Input Status (cleared on read)

pub fn wkupis5(&self) -> WKUPIS5_R[src]

Bit 21 - WKUPx Input Status (cleared on read)

pub fn wkupis6(&self) -> WKUPIS6_R[src]

Bit 22 - WKUPx Input Status (cleared on read)

pub fn wkupis7(&self) -> WKUPIS7_R[src]

Bit 23 - WKUPx Input Status (cleared on read)

pub fn wkupis8(&self) -> WKUPIS8_R[src]

Bit 24 - WKUPx Input Status (cleared on read)

pub fn wkupis9(&self) -> WKUPIS9_R[src]

Bit 25 - WKUPx Input Status (cleared on read)

pub fn wkupis10(&self) -> WKUPIS10_R[src]

Bit 26 - WKUPx Input Status (cleared on read)

pub fn wkupis11(&self) -> WKUPIS11_R[src]

Bit 27 - WKUPx Input Status (cleared on read)

pub fn wkupis12(&self) -> WKUPIS12_R[src]

Bit 28 - WKUPx Input Status (cleared on read)

pub fn wkupis13(&self) -> WKUPIS13_R[src]

Bit 29 - WKUPx Input Status (cleared on read)

pub fn wkupis14(&self) -> WKUPIS14_R[src]

Bit 30 - WKUPx Input Status (cleared on read)

pub fn wkupis15(&self) -> WKUPIS15_R[src]

Bit 31 - WKUPx Input Status (cleared on read)

impl R<u32, Reg<u32, _MR>>[src]

pub fn rtpres(&self) -> RTPRES_R[src]

Bits 0:15 - Real-time Timer Prescaler Value

pub fn almien(&self) -> ALMIEN_R[src]

Bit 16 - Alarm Interrupt Enable

pub fn rttincien(&self) -> RTTINCIEN_R[src]

Bit 17 - Real-time Timer Increment Interrupt Enable

pub fn rttrst(&self) -> RTTRST_R[src]

Bit 18 - Real-time Timer Restart

pub fn rttdis(&self) -> RTTDIS_R[src]

Bit 20 - Real-time Timer Disable

pub fn rtc1hz(&self) -> RTC1HZ_R[src]

Bit 24 - Real-Time Clock 1Hz Clock Selection

impl R<u32, Reg<u32, _AR>>[src]

pub fn almv(&self) -> ALMV_R[src]

Bits 0:31 - Alarm Value

impl R<u32, Reg<u32, _VR>>[src]

pub fn crtv(&self) -> CRTV_R[src]

Bits 0:31 - Current Real-time Value

impl R<u32, Reg<u32, _SR>>[src]

pub fn alms(&self) -> ALMS_R[src]

Bit 0 - Real-time Alarm Status (cleared on read)

pub fn rttinc(&self) -> RTTINC_R[src]

Bit 1 - Prescaler Roll-over Status (cleared on read)

impl R<u32, Reg<u32, _MR>>[src]

pub fn wdv(&self) -> WDV_R[src]

Bits 0:11 - Watchdog Counter Value

pub fn wdfien(&self) -> WDFIEN_R[src]

Bit 12 - Watchdog Fault Interrupt Enable

pub fn wdrsten(&self) -> WDRSTEN_R[src]

Bit 13 - Watchdog Reset Enable

pub fn wdrproc(&self) -> WDRPROC_R[src]

Bit 14 - Watchdog Reset Processor

pub fn wddis(&self) -> WDDIS_R[src]

Bit 15 - Watchdog Disable

pub fn wdd(&self) -> WDD_R[src]

Bits 16:27 - Watchdog Delta Value

pub fn wddbghlt(&self) -> WDDBGHLT_R[src]

Bit 28 - Watchdog Debug Halt

pub fn wdidlehlt(&self) -> WDIDLEHLT_R[src]

Bit 29 - Watchdog Idle Halt

impl R<u32, Reg<u32, _SR>>[src]

pub fn wdunf(&self) -> WDUNF_R[src]

Bit 0 - Watchdog Underflow (cleared on read)

pub fn wderr(&self) -> WDERR_R[src]

Bit 1 - Watchdog Error (cleared on read)

impl R<u8, TIMEVSEL_A>[src]

pub fn variant(&self) -> TIMEVSEL_A[src]

Get enumerated values variant

pub fn is_minute(&self) -> bool[src]

Checks if the value of the field is MINUTE

pub fn is_hour(&self) -> bool[src]

Checks if the value of the field is HOUR

pub fn is_midnight(&self) -> bool[src]

Checks if the value of the field is MIDNIGHT

pub fn is_noon(&self) -> bool[src]

Checks if the value of the field is NOON

impl R<u8, CALEVSEL_A>[src]

pub fn variant(&self) -> Variant<u8, CALEVSEL_A>[src]

Get enumerated values variant

pub fn is_week(&self) -> bool[src]

Checks if the value of the field is WEEK

pub fn is_month(&self) -> bool[src]

Checks if the value of the field is MONTH

pub fn is_year(&self) -> bool[src]

Checks if the value of the field is YEAR

impl R<u32, Reg<u32, _CR>>[src]

pub fn updtim(&self) -> UPDTIM_R[src]

Bit 0 - Update Request Time Register

pub fn updcal(&self) -> UPDCAL_R[src]

Bit 1 - Update Request Calendar Register

pub fn timevsel(&self) -> TIMEVSEL_R[src]

Bits 8:9 - Time Event Selection

pub fn calevsel(&self) -> CALEVSEL_R[src]

Bits 16:17 - Calendar Event Selection

impl R<u8, OUT0_A>[src]

pub fn variant(&self) -> OUT0_A[src]

Get enumerated values variant

pub fn is_no_wave(&self) -> bool[src]

Checks if the value of the field is NO_WAVE

pub fn is_freq1hz(&self) -> bool[src]

Checks if the value of the field is FREQ1HZ

pub fn is_freq32hz(&self) -> bool[src]

Checks if the value of the field is FREQ32HZ

pub fn is_freq64hz(&self) -> bool[src]

Checks if the value of the field is FREQ64HZ

pub fn is_freq512hz(&self) -> bool[src]

Checks if the value of the field is FREQ512HZ

pub fn is_alarm_toggle(&self) -> bool[src]

Checks if the value of the field is ALARM_TOGGLE

pub fn is_alarm_flag(&self) -> bool[src]

Checks if the value of the field is ALARM_FLAG

pub fn is_prog_pulse(&self) -> bool[src]

Checks if the value of the field is PROG_PULSE

impl R<u8, OUT1_A>[src]

pub fn variant(&self) -> OUT1_A[src]

Get enumerated values variant

pub fn is_no_wave(&self) -> bool[src]

Checks if the value of the field is NO_WAVE

pub fn is_freq1hz(&self) -> bool[src]

Checks if the value of the field is FREQ1HZ

pub fn is_freq32hz(&self) -> bool[src]

Checks if the value of the field is FREQ32HZ

pub fn is_freq64hz(&self) -> bool[src]

Checks if the value of the field is FREQ64HZ

pub fn is_freq512hz(&self) -> bool[src]

Checks if the value of the field is FREQ512HZ

pub fn is_alarm_toggle(&self) -> bool[src]

Checks if the value of the field is ALARM_TOGGLE

pub fn is_alarm_flag(&self) -> bool[src]

Checks if the value of the field is ALARM_FLAG

pub fn is_prog_pulse(&self) -> bool[src]

Checks if the value of the field is PROG_PULSE

impl R<u8, THIGH_A>[src]

pub fn variant(&self) -> THIGH_A[src]

Get enumerated values variant

pub fn is_h_31ms(&self) -> bool[src]

Checks if the value of the field is H_31MS

pub fn is_h_16ms(&self) -> bool[src]

Checks if the value of the field is H_16MS

pub fn is_h_4ms(&self) -> bool[src]

Checks if the value of the field is H_4MS

pub fn is_h_976us(&self) -> bool[src]

Checks if the value of the field is H_976US

pub fn is_h_488us(&self) -> bool[src]

Checks if the value of the field is H_488US

pub fn is_h_122us(&self) -> bool[src]

Checks if the value of the field is H_122US

pub fn is_h_30us(&self) -> bool[src]

Checks if the value of the field is H_30US

pub fn is_h_15us(&self) -> bool[src]

Checks if the value of the field is H_15US

impl R<u8, TPERIOD_A>[src]

pub fn variant(&self) -> TPERIOD_A[src]

Get enumerated values variant

pub fn is_p_1s(&self) -> bool[src]

Checks if the value of the field is P_1S

pub fn is_p_500ms(&self) -> bool[src]

Checks if the value of the field is P_500MS

pub fn is_p_250ms(&self) -> bool[src]

Checks if the value of the field is P_250MS

pub fn is_p_125ms(&self) -> bool[src]

Checks if the value of the field is P_125MS

impl R<u32, Reg<u32, _MR>>[src]

pub fn hrmod(&self) -> HRMOD_R[src]

Bit 0 - 12-/24-hour Mode

pub fn persian(&self) -> PERSIAN_R[src]

Bit 1 - PERSIAN Calendar

pub fn negppm(&self) -> NEGPPM_R[src]

Bit 4 - NEGative PPM Correction

pub fn correction(&self) -> CORRECTION_R[src]

Bits 8:14 - Slow Clock Correction

pub fn highppm(&self) -> HIGHPPM_R[src]

Bit 15 - HIGH PPM Correction

pub fn out0(&self) -> OUT0_R[src]

Bits 16:18 - RTCOUT0 OutputSource Selection

pub fn out1(&self) -> OUT1_R[src]

Bits 20:22 - RTCOUT1 Output Source Selection

pub fn thigh(&self) -> THIGH_R[src]

Bits 24:26 - High Duration of the Output Pulse

pub fn tperiod(&self) -> TPERIOD_R[src]

Bits 28:29 - Period of the Output Pulse

impl R<u32, Reg<u32, _TIMR>>[src]

pub fn sec(&self) -> SEC_R[src]

Bits 0:6 - Current Second

pub fn min(&self) -> MIN_R[src]

Bits 8:14 - Current Minute

pub fn hour(&self) -> HOUR_R[src]

Bits 16:21 - Current Hour

pub fn ampm(&self) -> AMPM_R[src]

Bit 22 - Ante Meridiem Post Meridiem Indicator

impl R<u32, Reg<u32, _CALR>>[src]

pub fn cent(&self) -> CENT_R[src]

Bits 0:6 - Current Century

pub fn year(&self) -> YEAR_R[src]

Bits 8:15 - Current Year

pub fn month(&self) -> MONTH_R[src]

Bits 16:20 - Current Month

pub fn day(&self) -> DAY_R[src]

Bits 21:23 - Current Day in Current Week

pub fn date(&self) -> DATE_R[src]

Bits 24:29 - Current Day in Current Month

impl R<u32, Reg<u32, _TIMALR>>[src]

pub fn sec(&self) -> SEC_R[src]

Bits 0:6 - Second Alarm

pub fn secen(&self) -> SECEN_R[src]

Bit 7 - Second Alarm Enable

pub fn min(&self) -> MIN_R[src]

Bits 8:14 - Minute Alarm

pub fn minen(&self) -> MINEN_R[src]

Bit 15 - Minute Alarm Enable

pub fn hour(&self) -> HOUR_R[src]

Bits 16:21 - Hour Alarm

pub fn ampm(&self) -> AMPM_R[src]

Bit 22 - AM/PM Indicator

pub fn houren(&self) -> HOUREN_R[src]

Bit 23 - Hour Alarm Enable

impl R<u32, Reg<u32, _CALALR>>[src]

pub fn month(&self) -> MONTH_R[src]

Bits 16:20 - Month Alarm

pub fn mthen(&self) -> MTHEN_R[src]

Bit 23 - Month Alarm Enable

pub fn date(&self) -> DATE_R[src]

Bits 24:29 - Date Alarm

pub fn dateen(&self) -> DATEEN_R[src]

Bit 31 - Date Alarm Enable

impl R<bool, ACKUPD_A>[src]

pub fn variant(&self) -> ACKUPD_A[src]

Get enumerated values variant

pub fn is_freerun(&self) -> bool[src]

Checks if the value of the field is FREERUN

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

impl R<bool, ALARM_A>[src]

pub fn variant(&self) -> ALARM_A[src]

Get enumerated values variant

pub fn is_no_alarmevent(&self) -> bool[src]

Checks if the value of the field is NO_ALARMEVENT

pub fn is_alarmevent(&self) -> bool[src]

Checks if the value of the field is ALARMEVENT

impl R<bool, SEC_A>[src]

pub fn variant(&self) -> SEC_A[src]

Get enumerated values variant

pub fn is_no_secevent(&self) -> bool[src]

Checks if the value of the field is NO_SECEVENT

pub fn is_secevent(&self) -> bool[src]

Checks if the value of the field is SECEVENT

impl R<bool, TIMEV_A>[src]

pub fn variant(&self) -> TIMEV_A[src]

Get enumerated values variant

pub fn is_no_timevent(&self) -> bool[src]

Checks if the value of the field is NO_TIMEVENT

pub fn is_timevent(&self) -> bool[src]

Checks if the value of the field is TIMEVENT

impl R<bool, CALEV_A>[src]

pub fn variant(&self) -> CALEV_A[src]

Get enumerated values variant

pub fn is_no_calevent(&self) -> bool[src]

Checks if the value of the field is NO_CALEVENT

pub fn is_calevent(&self) -> bool[src]

Checks if the value of the field is CALEVENT

impl R<bool, TDERR_A>[src]

pub fn variant(&self) -> TDERR_A[src]

Get enumerated values variant

pub fn is_correct(&self) -> bool[src]

Checks if the value of the field is CORRECT

pub fn is_err_timedate(&self) -> bool[src]

Checks if the value of the field is ERR_TIMEDATE

impl R<u32, Reg<u32, _SR>>[src]

pub fn ackupd(&self) -> ACKUPD_R[src]

Bit 0 - Acknowledge for Update

pub fn alarm(&self) -> ALARM_R[src]

Bit 1 - Alarm Flag

pub fn sec(&self) -> SEC_R[src]

Bit 2 - Second Event

pub fn timev(&self) -> TIMEV_R[src]

Bit 3 - Time Event

pub fn calev(&self) -> CALEV_R[src]

Bit 4 - Calendar Event

pub fn tderr(&self) -> TDERR_R[src]

Bit 5 - Time and/or Date Free Running Error

impl R<u32, Reg<u32, _IMR>>[src]

pub fn ack(&self) -> ACK_R[src]

Bit 0 - Acknowledge Update Interrupt Mask

pub fn alr(&self) -> ALR_R[src]

Bit 1 - Alarm Interrupt Mask

pub fn sec(&self) -> SEC_R[src]

Bit 2 - Second Event Interrupt Mask

pub fn tim(&self) -> TIM_R[src]

Bit 3 - Time Event Interrupt Mask

pub fn cal(&self) -> CAL_R[src]

Bit 4 - Calendar Event Interrupt Mask

pub fn tderr(&self) -> TDERR_R[src]

Bit 5 - Time and/or Date Error Mask

impl R<u32, Reg<u32, _VER>>[src]

pub fn nvtim(&self) -> NVTIM_R[src]

Bit 0 - Non-valid Time

pub fn nvcal(&self) -> NVCAL_R[src]

Bit 1 - Non-valid Calendar

pub fn nvtimalr(&self) -> NVTIMALR_R[src]

Bit 2 - Non-valid Time Alarm

pub fn nvcalalr(&self) -> NVCALALR_R[src]

Bit 3 - Non-valid Calendar Alarm

impl R<u32, Reg<u32, _GPBR>>[src]

pub fn gpbr_value(&self) -> GPBR_VALUE_R[src]

Bits 0:31 - Value of GPBR x

Trait Implementations

impl<U, T, FI> PartialEq<FI> for R<U, T> where
    U: PartialEq,
    FI: Copy + Into<U>, 
[src]

Auto Trait Implementations

impl<U, T> Send for R<U, T> where
    T: Send,
    U: Send

impl<U, T> Sync for R<U, T> where
    T: Sync,
    U: Sync

impl<U, T> Unpin for R<U, T> where
    T: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.