Struct atsam4lc4c::pm::RegisterBlock
[−]
[src]
#[repr(C)]pub struct RegisterBlock { pub mcctrl: MCCTRL, pub cpusel: CPUSEL, pub pbasel: PBASEL, pub pbbsel: PBBSEL, pub pbcsel: PBCSEL, pub pbdsel: PBDSEL, pub cpumask: CPUMASK, pub hsbmask: HSBMASK, pub pbamask: PBAMASK, pub pbbmask: PBBMASK, pub pbcmask: PBCMASK, pub pbdmask: PBDMASK, pub pbadivmask: PBADIVMASK, pub cfdctrl: CFDCTRL, pub unlock: UNLOCK, pub ier: IER, pub idr: IDR, pub imr: IMR, pub isr: ISR, pub icr: ICR, pub sr: SR, pub ppcr: PPCR, pub rcause: RCAUSE, pub wcause: WCAUSE, pub awen: AWEN, pub obs: OBS, pub fastsleep: FASTSLEEP, pub config: CONFIG, pub version: VERSION, // some fields omitted }
Register block
Fields
mcctrl: MCCTRL
0x00 - Main Clock Control
cpusel: CPUSEL
0x04 - CPU Clock Select
pbasel: PBASEL
0x0c - PBA Clock Select
pbbsel: PBBSEL
0x10 - PBB Clock Select
pbcsel: PBCSEL
0x14 - PBC Clock Select
pbdsel: PBDSEL
0x18 - PBD Clock Select
cpumask: CPUMASK
0x20 - CPU Mask
hsbmask: HSBMASK
0x24 - HSB Mask
pbamask: PBAMASK
0x28 - PBA Mask
pbbmask: PBBMASK
0x2c - PBB Mask
pbcmask: PBCMASK
0x30 - PBC Mask
pbdmask: PBDMASK
0x34 - PBD Mask
pbadivmask: PBADIVMASK
0x40 - PBA Divided Clock Mask
cfdctrl: CFDCTRL
0x54 - Clock Failure Detector Control
unlock: UNLOCK
0x58 - Unlock Register
ier: IER
0xc0 - Interrupt Enable Register
idr: IDR
0xc4 - Interrupt Disable Register
imr: IMR
0xc8 - Interrupt Mask Register
isr: ISR
0xcc - Interrupt Status Register
icr: ICR
0xd0 - Interrupt Clear Register
sr: SR
0xd4 - Status Register
ppcr: PPCR
0x160 - Peripheral Power Control Register
rcause: RCAUSE
0x180 - Reset Cause Register
wcause: WCAUSE
0x184 - Wake Cause Register
awen: AWEN
0x188 - Asynchronous Wake Enable
obs: OBS
0x190 - Obsvervability
fastsleep: FASTSLEEP
0x194 - Fast Sleep Register
config: CONFIG
0x3f8 - Configuration Register
version: VERSION
0x3fc - Version Register