Struct TimerCounter 

pub struct TimerCounter<TC> { /* private fields */ }

Hardware timers for atsam4 can be 16 or 32-bit depending on the hardware.. It is also possible to chain TC (timer channels) within a Timer Module to create larger timer registers (not currently implemented in this hal). TimerCounter implements both the Periodic and the CountDown embedded_hal timer traits. Before a hardware timer can be used, it must first have a clock configured.

Implementations

impl TimerCounter<TC0>

pub fn new(tc: TC0) -> Self

Configure this timer counter block. Each TC block has 3 channels The clock is obtained from the ClockController instance and its frequency impacts the resolution and maximum range of the timeout values that can be passed to the start method.

Example

let clocks = ClockController::new(
    cx.device.PMC,
    &cx.device.SUPC,
    &cx.device.EFC0,
    MainClock::Crystal12Mhz,
    SlowClock::RcOscillator32Khz,
);

let mut tc0 = TimerCounter::new(TC0);
let tc0_chs = tc0.split(
    clocks.peripheral_clocks.tc_0.into_enabled_clock(),
    clocks.peripheral_clocks.tc_1.into_enabled_clock(),
    clocks.peripheral_clocks.tc_2.into_enabled_clock(),
);

let mut tcc0 = tc0_chs.ch0;
tcc0.clock_input(ClockSource::Slck32768Hz);
tcc0.start(500_u32.millis());
while !tcc0.wait().is_ok() {}

let mut tcc1 = tc0_chs.ch1;
tcc1.clock_input(ClockSource::MckDiv2);
tcc1.start(17_u32.nanos()); // Assuming MCK is 120 MHz or faster
while !tcc1.wait().is_ok() {}

pub fn split<const FREQ1: u32, const FREQ2: u32, const FREQ3: u32>( self, clock1: Tc0Clock<Enabled>, _clock2: Tc1Clock<Enabled>, _clock3: Tc2Clock<Enabled>, ) -> TimerCounterChannels<TC0, Tc0Clock<Enabled>, Tc1Clock<Enabled>, Tc2Clock<Enabled>, FREQ1, FREQ2, FREQ3>

Splits the TimerCounter module into 3 channels Defaults to MckDiv2 clock source

impl TimerCounter<TC1>

pub fn new(tc: TC1) -> Self

Configure this timer counter block. Each TC block has 3 channels The clock is obtained from the ClockController instance and its frequency impacts the resolution and maximum range of the timeout values that can be passed to the start method.

Example

let clocks = ClockController::new(
    cx.device.PMC,
    &cx.device.SUPC,
    &cx.device.EFC0,
    MainClock::Crystal12Mhz,
    SlowClock::RcOscillator32Khz,
);

let mut tc0 = TimerCounter::new(TC0);
let tc0_chs = tc0.split(
    clocks.peripheral_clocks.tc_0.into_enabled_clock(),
    clocks.peripheral_clocks.tc_1.into_enabled_clock(),
    clocks.peripheral_clocks.tc_2.into_enabled_clock(),
);

let mut tcc0 = tc0_chs.ch0;
tcc0.clock_input(ClockSource::Slck32768Hz);
tcc0.start(500_u32.millis());
while !tcc0.wait().is_ok() {}

let mut tcc1 = tc0_chs.ch1;
tcc1.clock_input(ClockSource::MckDiv2);
tcc1.start(17_u32.nanos()); // Assuming MCK is 120 MHz or faster
while !tcc1.wait().is_ok() {}

pub fn split<const FREQ1: u32, const FREQ2: u32, const FREQ3: u32>( self, clock1: Tc3Clock<Enabled>, _clock2: Tc4Clock<Enabled>, _clock3: Tc5Clock<Enabled>, ) -> TimerCounterChannels<TC1, Tc3Clock<Enabled>, Tc4Clock<Enabled>, Tc5Clock<Enabled>, FREQ1, FREQ2, FREQ3>

Splits the TimerCounter module into 3 channels Defaults to MckDiv2 clock source

impl TimerCounter<TC2>

pub fn new(tc: TC2) -> Self

Configure this timer counter block. Each TC block has 3 channels The clock is obtained from the ClockController instance and its frequency impacts the resolution and maximum range of the timeout values that can be passed to the start method.

Example

let clocks = ClockController::new(
    cx.device.PMC,
    &cx.device.SUPC,
    &cx.device.EFC0,
    MainClock::Crystal12Mhz,
    SlowClock::RcOscillator32Khz,
);

let mut tc0 = TimerCounter::new(TC0);
let tc0_chs = tc0.split(
    clocks.peripheral_clocks.tc_0.into_enabled_clock(),
    clocks.peripheral_clocks.tc_1.into_enabled_clock(),
    clocks.peripheral_clocks.tc_2.into_enabled_clock(),
);

let mut tcc0 = tc0_chs.ch0;
tcc0.clock_input(ClockSource::Slck32768Hz);
tcc0.start(500_u32.millis());
while !tcc0.wait().is_ok() {}

let mut tcc1 = tc0_chs.ch1;
tcc1.clock_input(ClockSource::MckDiv2);
tcc1.start(17_u32.nanos()); // Assuming MCK is 120 MHz or faster
while !tcc1.wait().is_ok() {}

pub fn split<const FREQ1: u32, const FREQ2: u32, const FREQ3: u32>( self, clock1: Tc6Clock<Enabled>, _clock2: Tc7Clock<Enabled>, _clock3: Tc8Clock<Enabled>, ) -> TimerCounterChannels<TC2, Tc6Clock<Enabled>, Tc7Clock<Enabled>, Tc8Clock<Enabled>, FREQ1, FREQ2, FREQ3>

Splits the TimerCounter module into 3 channels Defaults to MckDiv2 clock source