Enum ShiftOp 

pub enum ShiftOp {
    Lsl,
    Lsr,
    Asr,
    Ror,
    Rrx,
    Msl,
    Uxtb,
    Uxth,
    Uxtw,
    Uxtx,
    Sxtb,
    Sxth,
    Sxtw,
    Sxtx,
}

A barrel-shift or register-extend operation.

Variants

Lsl

Logical shift left.

Lsr

Logical shift right.

Asr

Arithmetic shift right.

Ror

Rotate right.

Rrx

Rotate right with extend (ARM32 only; shifts by exactly one through C).

Msl

Move shifted left, filling with ones (AArch64 SIMD immediates).

Uxtb

Zero-extend byte (AArch64 register extend).

Uxth

Zero-extend halfword.

Uxtw

Zero-extend word.

Uxtx

Zero-extend doubleword (no-op; the canonical LSL form for X registers).

Sxtb

Sign-extend byte.

Sxth

Sign-extend halfword.

Sxtw

Sign-extend word.

Sxtx

Sign-extend doubleword.

Implementations

impl ShiftOp

pub fn from_lower(s: &str) -> Option<Self>

Parse a shift/extend keyword. Input must already be lowercase.

pub fn shift_type_bits(self) -> Option<u32>

The 2-bit shift-type field used by ARM32 and AArch64 data-processing instructions, or None for extends (which use a 3-bit option field).

pub fn extend_option_bits(self) -> Option<u32>

The 3-bit option field for AArch64 register-extend operands.

Trait Implementations

impl Clone for ShiftOp

fn clone(&self) -> ShiftOp

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for ShiftOp

impl Debug for ShiftOp

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Display for ShiftOp

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Eq for ShiftOp

impl PartialEq for ShiftOp

fn eq(&self, other: &ShiftOp) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for ShiftOp